1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/lock.h> 59 #include <sys/malloc.h> 60 #include <sys/mbuf.h> 61 #include <sys/mutex.h> 62 #include <sys/pioctl.h> 63 #include <sys/proc.h> 64 #include <sys/sysent.h> 65 #include <sys/sf_buf.h> 66 #include <sys/smp.h> 67 #include <sys/sched.h> 68 #include <sys/sysctl.h> 69 #include <sys/unistd.h> 70 #include <sys/vnode.h> 71 #include <sys/vmmeter.h> 72 73 #include <machine/cpu.h> 74 #include <machine/cputypes.h> 75 #include <machine/md_var.h> 76 #include <machine/pcb.h> 77 #include <machine/pcb_ext.h> 78 #include <machine/smp.h> 79 #include <machine/vm86.h> 80 81 #ifdef CPU_ELAN 82 #include <machine/elan_mmcr.h> 83 #endif 84 85 #include <vm/vm.h> 86 #include <vm/vm_extern.h> 87 #include <vm/vm_kern.h> 88 #include <vm/vm_page.h> 89 #include <vm/vm_map.h> 90 #include <vm/vm_param.h> 91 92 #ifdef PC98 93 #include <pc98/cbus/cbus.h> 94 #else 95 #include <isa/isareg.h> 96 #endif 97 98 #ifdef XBOX 99 #include <machine/xbox.h> 100 #endif 101 102 #ifndef NSFBUFS 103 #define NSFBUFS (512 + maxusers * 16) 104 #endif 105 106 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 107 #define CPU_ENABLE_SSE 108 #endif 109 110 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread), 111 "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread."); 112 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb), 113 "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb."); 114 _Static_assert(__OFFSETOF_MONITORBUF == offsetof(struct pcpu, pc_monitorbuf), 115 "__OFFSETOF_MONINORBUF does not correspond with offset of pc_monitorbuf."); 116 117 static void cpu_reset_real(void); 118 #ifdef SMP 119 static void cpu_reset_proxy(void); 120 static u_int cpu_reset_proxyid; 121 static volatile u_int cpu_reset_proxy_active; 122 #endif 123 124 union savefpu * 125 get_pcb_user_save_td(struct thread *td) 126 { 127 vm_offset_t p; 128 129 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 130 cpu_max_ext_state_size; 131 KASSERT((p % 64) == 0, ("Unaligned pcb_user_save area")); 132 return ((union savefpu *)p); 133 } 134 135 union savefpu * 136 get_pcb_user_save_pcb(struct pcb *pcb) 137 { 138 vm_offset_t p; 139 140 p = (vm_offset_t)(pcb + 1); 141 return ((union savefpu *)p); 142 } 143 144 struct pcb * 145 get_pcb_td(struct thread *td) 146 { 147 vm_offset_t p; 148 149 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 150 cpu_max_ext_state_size - sizeof(struct pcb); 151 return ((struct pcb *)p); 152 } 153 154 void * 155 alloc_fpusave(int flags) 156 { 157 void *res; 158 #ifdef CPU_ENABLE_SSE 159 struct savefpu_ymm *sf; 160 #endif 161 162 res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags); 163 #ifdef CPU_ENABLE_SSE 164 if (use_xsave) { 165 sf = (struct savefpu_ymm *)res; 166 bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd)); 167 sf->sv_xstate.sx_hd.xstate_bv = xsave_mask; 168 } 169 #endif 170 return (res); 171 } 172 /* 173 * Finish a fork operation, with process p2 nearly set up. 174 * Copy and update the pcb, set up the stack so that the child 175 * ready to run and return to user mode. 176 */ 177 void 178 cpu_fork(td1, p2, td2, flags) 179 register struct thread *td1; 180 register struct proc *p2; 181 struct thread *td2; 182 int flags; 183 { 184 register struct proc *p1; 185 struct pcb *pcb2; 186 struct mdproc *mdp2; 187 188 p1 = td1->td_proc; 189 if ((flags & RFPROC) == 0) { 190 if ((flags & RFMEM) == 0) { 191 /* unshare user LDT */ 192 struct mdproc *mdp1 = &p1->p_md; 193 struct proc_ldt *pldt, *pldt1; 194 195 mtx_lock_spin(&dt_lock); 196 if ((pldt1 = mdp1->md_ldt) != NULL && 197 pldt1->ldt_refcnt > 1) { 198 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len); 199 if (pldt == NULL) 200 panic("could not copy LDT"); 201 mdp1->md_ldt = pldt; 202 set_user_ldt(mdp1); 203 user_ldt_deref(pldt1); 204 } else 205 mtx_unlock_spin(&dt_lock); 206 } 207 return; 208 } 209 210 /* Ensure that td1's pcb is up to date. */ 211 if (td1 == curthread) 212 td1->td_pcb->pcb_gs = rgs(); 213 #ifdef DEV_NPX 214 critical_enter(); 215 if (PCPU_GET(fpcurthread) == td1) 216 npxsave(td1->td_pcb->pcb_save); 217 critical_exit(); 218 #endif 219 220 /* Point the pcb to the top of the stack */ 221 pcb2 = get_pcb_td(td2); 222 td2->td_pcb = pcb2; 223 224 /* Copy td1's pcb */ 225 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 226 227 /* Properly initialize pcb_save */ 228 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 229 bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2), 230 cpu_max_ext_state_size); 231 232 /* Point mdproc and then copy over td1's contents */ 233 mdp2 = &p2->p_md; 234 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 235 236 /* 237 * Create a new fresh stack for the new process. 238 * Copy the trap frame for the return to user mode as if from a 239 * syscall. This copies most of the user mode register values. 240 * The -16 is so we can expand the trapframe if we go to vm86. 241 */ 242 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 243 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 244 245 td2->td_frame->tf_eax = 0; /* Child returns zero */ 246 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 247 td2->td_frame->tf_edx = 1; 248 249 /* 250 * If the parent process has the trap bit set (i.e. a debugger had 251 * single stepped the process to the system call), we need to clear 252 * the trap flag from the new frame unless the debugger had set PF_FORK 253 * on the parent. Otherwise, the child will receive a (likely 254 * unexpected) SIGTRAP when it executes the first instruction after 255 * returning to userland. 256 */ 257 if ((p1->p_pfsflags & PF_FORK) == 0) 258 td2->td_frame->tf_eflags &= ~PSL_T; 259 260 /* 261 * Set registers for trampoline to user mode. Leave space for the 262 * return address on stack. These are the kernel mode register values. 263 */ 264 #if defined(PAE) || defined(PAE_TABLES) 265 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 266 #else 267 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 268 #endif 269 pcb2->pcb_edi = 0; 270 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 271 pcb2->pcb_ebp = 0; 272 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 273 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 274 pcb2->pcb_eip = (int)fork_trampoline; 275 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 276 /*- 277 * pcb2->pcb_dr*: cloned above. 278 * pcb2->pcb_savefpu: cloned above. 279 * pcb2->pcb_flags: cloned above. 280 * pcb2->pcb_onfault: cloned above (always NULL here?). 281 * pcb2->pcb_gs: cloned above. 282 * pcb2->pcb_ext: cleared below. 283 */ 284 285 /* 286 * XXX don't copy the i/o pages. this should probably be fixed. 287 */ 288 pcb2->pcb_ext = 0; 289 290 /* Copy the LDT, if necessary. */ 291 mtx_lock_spin(&dt_lock); 292 if (mdp2->md_ldt != NULL) { 293 if (flags & RFMEM) { 294 mdp2->md_ldt->ldt_refcnt++; 295 } else { 296 mdp2->md_ldt = user_ldt_alloc(mdp2, 297 mdp2->md_ldt->ldt_len); 298 if (mdp2->md_ldt == NULL) 299 panic("could not copy LDT"); 300 } 301 } 302 mtx_unlock_spin(&dt_lock); 303 304 /* Setup to release spin count in fork_exit(). */ 305 td2->td_md.md_spinlock_count = 1; 306 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 307 308 /* 309 * Now, cpu_switch() can schedule the new process. 310 * pcb_esp is loaded pointing to the cpu_switch() stack frame 311 * containing the return address when exiting cpu_switch. 312 * This will normally be to fork_trampoline(), which will have 313 * %ebx loaded with the new proc's pointer. fork_trampoline() 314 * will set up a stack to call fork_return(p, frame); to complete 315 * the return to user-mode. 316 */ 317 } 318 319 /* 320 * Intercept the return address from a freshly forked process that has NOT 321 * been scheduled yet. 322 * 323 * This is needed to make kernel threads stay in kernel mode. 324 */ 325 void 326 cpu_set_fork_handler(td, func, arg) 327 struct thread *td; 328 void (*func)(void *); 329 void *arg; 330 { 331 /* 332 * Note that the trap frame follows the args, so the function 333 * is really called like this: func(arg, frame); 334 */ 335 td->td_pcb->pcb_esi = (int) func; /* function */ 336 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 337 } 338 339 void 340 cpu_exit(struct thread *td) 341 { 342 343 /* 344 * If this process has a custom LDT, release it. Reset pc->pcb_gs 345 * and %gs before we free it in case they refer to an LDT entry. 346 */ 347 mtx_lock_spin(&dt_lock); 348 if (td->td_proc->p_md.md_ldt) { 349 td->td_pcb->pcb_gs = _udatasel; 350 load_gs(_udatasel); 351 user_ldt_free(td); 352 } else 353 mtx_unlock_spin(&dt_lock); 354 } 355 356 void 357 cpu_thread_exit(struct thread *td) 358 { 359 360 #ifdef DEV_NPX 361 critical_enter(); 362 if (td == PCPU_GET(fpcurthread)) 363 npxdrop(); 364 critical_exit(); 365 #endif 366 367 /* Disable any hardware breakpoints. */ 368 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 369 reset_dbregs(); 370 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 371 } 372 } 373 374 void 375 cpu_thread_clean(struct thread *td) 376 { 377 struct pcb *pcb; 378 379 pcb = td->td_pcb; 380 if (pcb->pcb_ext != NULL) { 381 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 382 /* 383 * XXX do we need to move the TSS off the allocated pages 384 * before freeing them? (not done here) 385 */ 386 kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext, 387 ctob(IOPAGES + 1)); 388 pcb->pcb_ext = NULL; 389 } 390 } 391 392 void 393 cpu_thread_swapin(struct thread *td) 394 { 395 } 396 397 void 398 cpu_thread_swapout(struct thread *td) 399 { 400 } 401 402 void 403 cpu_thread_alloc(struct thread *td) 404 { 405 struct pcb *pcb; 406 #ifdef CPU_ENABLE_SSE 407 struct xstate_hdr *xhdr; 408 #endif 409 410 td->td_pcb = pcb = get_pcb_td(td); 411 td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1; 412 pcb->pcb_ext = NULL; 413 pcb->pcb_save = get_pcb_user_save_pcb(pcb); 414 #ifdef CPU_ENABLE_SSE 415 if (use_xsave) { 416 xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1); 417 bzero(xhdr, sizeof(*xhdr)); 418 xhdr->xstate_bv = xsave_mask; 419 } 420 #endif 421 } 422 423 void 424 cpu_thread_free(struct thread *td) 425 { 426 427 cpu_thread_clean(td); 428 } 429 430 void 431 cpu_set_syscall_retval(struct thread *td, int error) 432 { 433 434 switch (error) { 435 case 0: 436 td->td_frame->tf_eax = td->td_retval[0]; 437 td->td_frame->tf_edx = td->td_retval[1]; 438 td->td_frame->tf_eflags &= ~PSL_C; 439 break; 440 441 case ERESTART: 442 /* 443 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int 444 * 0x80 is 2 bytes. We saved this in tf_err. 445 */ 446 td->td_frame->tf_eip -= td->td_frame->tf_err; 447 break; 448 449 case EJUSTRETURN: 450 break; 451 452 default: 453 if (td->td_proc->p_sysent->sv_errsize) { 454 if (error >= td->td_proc->p_sysent->sv_errsize) 455 error = -1; /* XXX */ 456 else 457 error = td->td_proc->p_sysent->sv_errtbl[error]; 458 } 459 td->td_frame->tf_eax = error; 460 td->td_frame->tf_eflags |= PSL_C; 461 break; 462 } 463 } 464 465 /* 466 * Initialize machine state (pcb and trap frame) for a new thread about to 467 * upcall. Put enough state in the new thread's PCB to get it to go back 468 * userret(), where we can intercept it again to set the return (upcall) 469 * Address and stack, along with those from upcals that are from other sources 470 * such as those generated in thread_userret() itself. 471 */ 472 void 473 cpu_set_upcall(struct thread *td, struct thread *td0) 474 { 475 struct pcb *pcb2; 476 477 /* Point the pcb to the top of the stack. */ 478 pcb2 = td->td_pcb; 479 480 /* 481 * Copy the upcall pcb. This loads kernel regs. 482 * Those not loaded individually below get their default 483 * values here. 484 */ 485 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 486 pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE | 487 PCB_KERNNPX); 488 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 489 bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save, 490 cpu_max_ext_state_size); 491 492 /* 493 * Create a new fresh stack for the new thread. 494 */ 495 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 496 497 /* If the current thread has the trap bit set (i.e. a debugger had 498 * single stepped the process to the system call), we need to clear 499 * the trap flag from the new frame. Otherwise, the new thread will 500 * receive a (likely unexpected) SIGTRAP when it executes the first 501 * instruction after returning to userland. 502 */ 503 td->td_frame->tf_eflags &= ~PSL_T; 504 505 /* 506 * Set registers for trampoline to user mode. Leave space for the 507 * return address on stack. These are the kernel mode register values. 508 */ 509 pcb2->pcb_edi = 0; 510 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 511 pcb2->pcb_ebp = 0; 512 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 513 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 514 pcb2->pcb_eip = (int)fork_trampoline; 515 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 516 pcb2->pcb_gs = rgs(); 517 /* 518 * If we didn't copy the pcb, we'd need to do the following registers: 519 * pcb2->pcb_cr3: cloned above. 520 * pcb2->pcb_dr*: cloned above. 521 * pcb2->pcb_savefpu: cloned above. 522 * pcb2->pcb_flags: cloned above. 523 * pcb2->pcb_onfault: cloned above (always NULL here?). 524 * pcb2->pcb_gs: cloned above. 525 * pcb2->pcb_ext: cleared below. 526 */ 527 pcb2->pcb_ext = NULL; 528 529 /* Setup to release spin count in fork_exit(). */ 530 td->td_md.md_spinlock_count = 1; 531 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 532 } 533 534 /* 535 * Set that machine state for performing an upcall that has to 536 * be done in thread_userret() so that those upcalls generated 537 * in thread_userret() itself can be done as well. 538 */ 539 void 540 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 541 stack_t *stack) 542 { 543 544 /* 545 * Do any extra cleaning that needs to be done. 546 * The thread may have optional components 547 * that are not present in a fresh thread. 548 * This may be a recycled thread so make it look 549 * as though it's newly allocated. 550 */ 551 cpu_thread_clean(td); 552 553 /* 554 * Set the trap frame to point at the beginning of the uts 555 * function. 556 */ 557 td->td_frame->tf_ebp = 0; 558 td->td_frame->tf_esp = 559 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 560 td->td_frame->tf_eip = (int)entry; 561 562 /* 563 * Pass the address of the mailbox for this kse to the uts 564 * function as a parameter on the stack. 565 */ 566 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 567 (int)arg); 568 } 569 570 int 571 cpu_set_user_tls(struct thread *td, void *tls_base) 572 { 573 struct segment_descriptor sd; 574 uint32_t base; 575 576 /* 577 * Construct a descriptor and store it in the pcb for 578 * the next context switch. Also store it in the gdt 579 * so that the load of tf_fs into %fs will activate it 580 * at return to userland. 581 */ 582 base = (uint32_t)tls_base; 583 sd.sd_lobase = base & 0xffffff; 584 sd.sd_hibase = (base >> 24) & 0xff; 585 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 586 sd.sd_hilimit = 0xf; 587 sd.sd_type = SDT_MEMRWA; 588 sd.sd_dpl = SEL_UPL; 589 sd.sd_p = 1; 590 sd.sd_xx = 0; 591 sd.sd_def32 = 1; 592 sd.sd_gran = 1; 593 critical_enter(); 594 /* set %gs */ 595 td->td_pcb->pcb_gsd = sd; 596 if (td == curthread) { 597 PCPU_GET(fsgs_gdt)[1] = sd; 598 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 599 } 600 critical_exit(); 601 return (0); 602 } 603 604 /* 605 * Convert kernel VA to physical address 606 */ 607 vm_paddr_t 608 kvtop(void *addr) 609 { 610 vm_paddr_t pa; 611 612 pa = pmap_kextract((vm_offset_t)addr); 613 if (pa == 0) 614 panic("kvtop: zero page frame"); 615 return (pa); 616 } 617 618 #ifdef SMP 619 static void 620 cpu_reset_proxy() 621 { 622 cpuset_t tcrp; 623 624 cpu_reset_proxy_active = 1; 625 while (cpu_reset_proxy_active == 1) 626 ; /* Wait for other cpu to see that we've started */ 627 CPU_SETOF(cpu_reset_proxyid, &tcrp); 628 stop_cpus(tcrp); 629 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 630 DELAY(1000000); 631 cpu_reset_real(); 632 } 633 #endif 634 635 void 636 cpu_reset() 637 { 638 #ifdef XBOX 639 if (arch_i386_is_xbox) { 640 /* Kick the PIC16L, it can reboot the box */ 641 pic16l_reboot(); 642 for (;;); 643 } 644 #endif 645 646 #ifdef SMP 647 cpuset_t map; 648 u_int cnt; 649 650 if (smp_started) { 651 map = all_cpus; 652 CPU_CLR(PCPU_GET(cpuid), &map); 653 CPU_NAND(&map, &stopped_cpus); 654 if (!CPU_EMPTY(&map)) { 655 printf("cpu_reset: Stopping other CPUs\n"); 656 stop_cpus(map); 657 } 658 659 if (PCPU_GET(cpuid) != 0) { 660 cpu_reset_proxyid = PCPU_GET(cpuid); 661 cpustop_restartfunc = cpu_reset_proxy; 662 cpu_reset_proxy_active = 0; 663 printf("cpu_reset: Restarting BSP\n"); 664 665 /* Restart CPU #0. */ 666 /* XXX: restart_cpus(1 << 0); */ 667 CPU_SETOF(0, &started_cpus); 668 wmb(); 669 670 cnt = 0; 671 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 672 cnt++; /* Wait for BSP to announce restart */ 673 if (cpu_reset_proxy_active == 0) 674 printf("cpu_reset: Failed to restart BSP\n"); 675 enable_intr(); 676 cpu_reset_proxy_active = 2; 677 678 while (1); 679 /* NOTREACHED */ 680 } 681 682 DELAY(1000000); 683 } 684 #endif 685 cpu_reset_real(); 686 /* NOTREACHED */ 687 } 688 689 static void 690 cpu_reset_real() 691 { 692 struct region_descriptor null_idt; 693 #ifndef PC98 694 int b; 695 #endif 696 697 disable_intr(); 698 #ifdef CPU_ELAN 699 if (elan_mmcr != NULL) 700 elan_mmcr->RESCFG = 1; 701 #endif 702 703 if (cpu == CPU_GEODE1100) { 704 /* Attempt Geode's own reset */ 705 outl(0xcf8, 0x80009044ul); 706 outl(0xcfc, 0xf); 707 } 708 709 #ifdef PC98 710 /* 711 * Attempt to do a CPU reset via CPU reset port. 712 */ 713 if ((inb(0x35) & 0xa0) != 0xa0) { 714 outb(0x37, 0x0f); /* SHUT0 = 0. */ 715 outb(0x37, 0x0b); /* SHUT1 = 0. */ 716 } 717 outb(0xf0, 0x00); /* Reset. */ 718 #else 719 #if !defined(BROKEN_KEYBOARD_RESET) 720 /* 721 * Attempt to do a CPU reset via the keyboard controller, 722 * do not turn off GateA20, as any machine that fails 723 * to do the reset here would then end up in no man's land. 724 */ 725 outb(IO_KBD + 4, 0xFE); 726 DELAY(500000); /* wait 0.5 sec to see if that did it */ 727 #endif 728 729 /* 730 * Attempt to force a reset via the Reset Control register at 731 * I/O port 0xcf9. Bit 2 forces a system reset when it 732 * transitions from 0 to 1. Bit 1 selects the type of reset 733 * to attempt: 0 selects a "soft" reset, and 1 selects a 734 * "hard" reset. We try a "hard" reset. The first write sets 735 * bit 1 to select a "hard" reset and clears bit 2. The 736 * second write forces a 0 -> 1 transition in bit 2 to trigger 737 * a reset. 738 */ 739 outb(0xcf9, 0x2); 740 outb(0xcf9, 0x6); 741 DELAY(500000); /* wait 0.5 sec to see if that did it */ 742 743 /* 744 * Attempt to force a reset via the Fast A20 and Init register 745 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 746 * Bit 0 asserts INIT# when set to 1. We are careful to only 747 * preserve bit 1 while setting bit 0. We also must clear bit 748 * 0 before setting it if it isn't already clear. 749 */ 750 b = inb(0x92); 751 if (b != 0xff) { 752 if ((b & 0x1) != 0) 753 outb(0x92, b & 0xfe); 754 outb(0x92, b | 0x1); 755 DELAY(500000); /* wait 0.5 sec to see if that did it */ 756 } 757 #endif /* PC98 */ 758 759 printf("No known reset method worked, attempting CPU shutdown\n"); 760 DELAY(1000000); /* wait 1 sec for printf to complete */ 761 762 /* Wipe the IDT. */ 763 null_idt.rd_limit = 0; 764 null_idt.rd_base = 0; 765 lidt(&null_idt); 766 767 /* "good night, sweet prince .... <THUNK!>" */ 768 breakpoint(); 769 770 /* NOTREACHED */ 771 while(1); 772 } 773 774 /* 775 * Get an sf_buf from the freelist. May block if none are available. 776 */ 777 void 778 sf_buf_map(struct sf_buf *sf, int flags) 779 { 780 pt_entry_t opte, *ptep; 781 782 /* 783 * Update the sf_buf's virtual-to-physical mapping, flushing the 784 * virtual address from the TLB. Since the reference count for 785 * the sf_buf's old mapping was zero, that mapping is not 786 * currently in use. Consequently, there is no need to exchange 787 * the old and new PTEs atomically, even under PAE. 788 */ 789 ptep = vtopte(sf->kva); 790 opte = *ptep; 791 *ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V | 792 pmap_cache_bits(sf->m->md.pat_mode, 0); 793 794 /* 795 * Avoid unnecessary TLB invalidations: If the sf_buf's old 796 * virtual-to-physical mapping was not used, then any processor 797 * that has invalidated the sf_buf's virtual address from its TLB 798 * since the last used mapping need not invalidate again. 799 */ 800 #ifdef SMP 801 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 802 CPU_ZERO(&sf->cpumask); 803 804 sf_buf_shootdown(sf, flags); 805 #else 806 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 807 pmap_invalidate_page(kernel_pmap, sf->kva); 808 #endif 809 } 810 811 #ifdef SMP 812 void 813 sf_buf_shootdown(struct sf_buf *sf, int flags) 814 { 815 cpuset_t other_cpus; 816 u_int cpuid; 817 818 sched_pin(); 819 cpuid = PCPU_GET(cpuid); 820 if (!CPU_ISSET(cpuid, &sf->cpumask)) { 821 CPU_SET(cpuid, &sf->cpumask); 822 invlpg(sf->kva); 823 } 824 if ((flags & SFB_CPUPRIVATE) == 0) { 825 other_cpus = all_cpus; 826 CPU_CLR(cpuid, &other_cpus); 827 CPU_NAND(&other_cpus, &sf->cpumask); 828 if (!CPU_EMPTY(&other_cpus)) { 829 CPU_OR(&sf->cpumask, &other_cpus); 830 smp_masked_invlpg(other_cpus, sf->kva); 831 } 832 } 833 sched_unpin(); 834 } 835 #endif 836 837 /* 838 * MD part of sf_buf_free(). 839 */ 840 int 841 sf_buf_unmap(struct sf_buf *sf) 842 { 843 844 return (0); 845 } 846 847 static void 848 sf_buf_invalidate(struct sf_buf *sf) 849 { 850 vm_page_t m = sf->m; 851 852 /* 853 * Use pmap_qenter to update the pte for 854 * existing mapping, in particular, the PAT 855 * settings are recalculated. 856 */ 857 pmap_qenter(sf->kva, &m, 1); 858 pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE); 859 } 860 861 /* 862 * Invalidate the cache lines that may belong to the page, if 863 * (possibly old) mapping of the page by sf buffer exists. Returns 864 * TRUE when mapping was found and cache invalidated. 865 */ 866 boolean_t 867 sf_buf_invalidate_cache(vm_page_t m) 868 { 869 870 return (sf_buf_process_page(m, sf_buf_invalidate)); 871 } 872 873 /* 874 * Software interrupt handler for queued VM system processing. 875 */ 876 void 877 swi_vm(void *dummy) 878 { 879 if (busdma_swi_pending != 0) 880 busdma_swi(); 881 } 882 883 /* 884 * Tell whether this address is in some physical memory region. 885 * Currently used by the kernel coredump code in order to avoid 886 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 887 * or other unpredictable behaviour. 888 */ 889 890 int 891 is_physical_memory(vm_paddr_t addr) 892 { 893 894 #ifdef DEV_ISA 895 /* The ISA ``memory hole''. */ 896 if (addr >= 0xa0000 && addr < 0x100000) 897 return 0; 898 #endif 899 900 /* 901 * stuff other tests for known memory-mapped devices (PCI?) 902 * here 903 */ 904 905 return 1; 906 } 907