1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kse.h> 57 #include <sys/kernel.h> 58 #include <sys/ktr.h> 59 #include <sys/lock.h> 60 #include <sys/malloc.h> 61 #include <sys/mbuf.h> 62 #include <sys/mutex.h> 63 #include <sys/pioctl.h> 64 #include <sys/proc.h> 65 #include <sys/sf_buf.h> 66 #include <sys/smp.h> 67 #include <sys/sched.h> 68 #include <sys/sysctl.h> 69 #include <sys/unistd.h> 70 #include <sys/vnode.h> 71 #include <sys/vmmeter.h> 72 73 #include <machine/cpu.h> 74 #include <machine/cputypes.h> 75 #include <machine/md_var.h> 76 #include <machine/pcb.h> 77 #include <machine/pcb_ext.h> 78 #include <machine/smp.h> 79 #include <machine/vm86.h> 80 81 #ifdef CPU_ELAN 82 #include <machine/elan_mmcr.h> 83 #endif 84 85 #include <vm/vm.h> 86 #include <vm/vm_extern.h> 87 #include <vm/vm_kern.h> 88 #include <vm/vm_page.h> 89 #include <vm/vm_map.h> 90 #include <vm/vm_param.h> 91 92 #ifdef PC98 93 #include <pc98/cbus/cbus.h> 94 #else 95 #include <i386/isa/isa.h> 96 #endif 97 98 #ifdef XBOX 99 #include <machine/xbox.h> 100 #endif 101 102 #ifndef NSFBUFS 103 #define NSFBUFS (512 + maxusers * 16) 104 #endif 105 106 static void cpu_reset_real(void); 107 #ifdef SMP 108 static void cpu_reset_proxy(void); 109 static u_int cpu_reset_proxyid; 110 static volatile u_int cpu_reset_proxy_active; 111 #endif 112 static void sf_buf_init(void *arg); 113 SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL) 114 115 LIST_HEAD(sf_head, sf_buf); 116 117 /* 118 * A hash table of active sendfile(2) buffers 119 */ 120 static struct sf_head *sf_buf_active; 121 static u_long sf_buf_hashmask; 122 123 #define SF_BUF_HASH(m) (((m) - vm_page_array) & sf_buf_hashmask) 124 125 static TAILQ_HEAD(, sf_buf) sf_buf_freelist; 126 static u_int sf_buf_alloc_want; 127 128 /* 129 * A lock used to synchronize access to the hash table and free list 130 */ 131 static struct mtx sf_buf_lock; 132 133 extern int _ucodesel, _udatasel; 134 135 /* 136 * Finish a fork operation, with process p2 nearly set up. 137 * Copy and update the pcb, set up the stack so that the child 138 * ready to run and return to user mode. 139 */ 140 void 141 cpu_fork(td1, p2, td2, flags) 142 register struct thread *td1; 143 register struct proc *p2; 144 struct thread *td2; 145 int flags; 146 { 147 register struct proc *p1; 148 struct pcb *pcb2; 149 struct mdproc *mdp2; 150 #ifdef DEV_NPX 151 register_t savecrit; 152 #endif 153 154 p1 = td1->td_proc; 155 if ((flags & RFPROC) == 0) { 156 if ((flags & RFMEM) == 0) { 157 /* unshare user LDT */ 158 struct mdproc *mdp1 = &p1->p_md; 159 struct proc_ldt *pldt; 160 161 mtx_lock_spin(&dt_lock); 162 if ((pldt = mdp1->md_ldt) != NULL && 163 pldt->ldt_refcnt > 1) { 164 pldt = user_ldt_alloc(mdp1, pldt->ldt_len); 165 if (pldt == NULL) 166 panic("could not copy LDT"); 167 mdp1->md_ldt = pldt; 168 set_user_ldt(mdp1); 169 user_ldt_free(td1); 170 } else 171 mtx_unlock_spin(&dt_lock); 172 } 173 return; 174 } 175 176 /* Ensure that p1's pcb is up to date. */ 177 if (td1 == curthread) 178 td1->td_pcb->pcb_gs = rgs(); 179 #ifdef DEV_NPX 180 savecrit = intr_disable(); 181 if (PCPU_GET(fpcurthread) == td1) 182 npxsave(&td1->td_pcb->pcb_save); 183 intr_restore(savecrit); 184 #endif 185 186 /* Point the pcb to the top of the stack */ 187 pcb2 = (struct pcb *)(td2->td_kstack + 188 td2->td_kstack_pages * PAGE_SIZE) - 1; 189 td2->td_pcb = pcb2; 190 191 /* Copy p1's pcb */ 192 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 193 194 /* Point mdproc and then copy over td1's contents */ 195 mdp2 = &p2->p_md; 196 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 197 198 /* 199 * Create a new fresh stack for the new process. 200 * Copy the trap frame for the return to user mode as if from a 201 * syscall. This copies most of the user mode register values. 202 * The -16 is so we can expand the trapframe if we go to vm86. 203 */ 204 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 205 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 206 207 td2->td_frame->tf_eax = 0; /* Child returns zero */ 208 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 209 td2->td_frame->tf_edx = 1; 210 211 /* 212 * If the parent process has the trap bit set (i.e. a debugger had 213 * single stepped the process to the system call), we need to clear 214 * the trap flag from the new frame unless the debugger had set PF_FORK 215 * on the parent. Otherwise, the child will receive a (likely 216 * unexpected) SIGTRAP when it executes the first instruction after 217 * returning to userland. 218 */ 219 if ((p1->p_pfsflags & PF_FORK) == 0) 220 td2->td_frame->tf_eflags &= ~PSL_T; 221 222 /* 223 * Set registers for trampoline to user mode. Leave space for the 224 * return address on stack. These are the kernel mode register values. 225 */ 226 #ifdef PAE 227 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 228 #else 229 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 230 #endif 231 pcb2->pcb_edi = 0; 232 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 233 pcb2->pcb_ebp = 0; 234 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 235 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 236 pcb2->pcb_eip = (int)fork_trampoline; 237 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 238 /*- 239 * pcb2->pcb_dr*: cloned above. 240 * pcb2->pcb_savefpu: cloned above. 241 * pcb2->pcb_flags: cloned above. 242 * pcb2->pcb_onfault: cloned above (always NULL here?). 243 * pcb2->pcb_gs: cloned above. 244 * pcb2->pcb_ext: cleared below. 245 */ 246 247 /* 248 * XXX don't copy the i/o pages. this should probably be fixed. 249 */ 250 pcb2->pcb_ext = 0; 251 252 /* Copy the LDT, if necessary. */ 253 mtx_lock_spin(&dt_lock); 254 if (mdp2->md_ldt != NULL) { 255 if (flags & RFMEM) { 256 mdp2->md_ldt->ldt_refcnt++; 257 } else { 258 mdp2->md_ldt = user_ldt_alloc(mdp2, 259 mdp2->md_ldt->ldt_len); 260 if (mdp2->md_ldt == NULL) 261 panic("could not copy LDT"); 262 } 263 } 264 mtx_unlock_spin(&dt_lock); 265 266 /* Setup to release spin count in fork_exit(). */ 267 td2->td_md.md_spinlock_count = 1; 268 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 269 270 /* 271 * Now, cpu_switch() can schedule the new process. 272 * pcb_esp is loaded pointing to the cpu_switch() stack frame 273 * containing the return address when exiting cpu_switch. 274 * This will normally be to fork_trampoline(), which will have 275 * %ebx loaded with the new proc's pointer. fork_trampoline() 276 * will set up a stack to call fork_return(p, frame); to complete 277 * the return to user-mode. 278 */ 279 } 280 281 /* 282 * Intercept the return address from a freshly forked process that has NOT 283 * been scheduled yet. 284 * 285 * This is needed to make kernel threads stay in kernel mode. 286 */ 287 void 288 cpu_set_fork_handler(td, func, arg) 289 struct thread *td; 290 void (*func)(void *); 291 void *arg; 292 { 293 /* 294 * Note that the trap frame follows the args, so the function 295 * is really called like this: func(arg, frame); 296 */ 297 td->td_pcb->pcb_esi = (int) func; /* function */ 298 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 299 } 300 301 void 302 cpu_exit(struct thread *td) 303 { 304 305 /* 306 * If this process has a custom LDT, release it. Reset pc->pcb_gs 307 * and %gs before we free it in case they refer to an LDT entry. 308 */ 309 mtx_lock_spin(&dt_lock); 310 if (td->td_proc->p_md.md_ldt) { 311 td->td_pcb->pcb_gs = _udatasel; 312 load_gs(_udatasel); 313 user_ldt_free(td); 314 } else 315 mtx_unlock_spin(&dt_lock); 316 } 317 318 void 319 cpu_thread_exit(struct thread *td) 320 { 321 322 #ifdef DEV_NPX 323 if (td == PCPU_GET(fpcurthread)) 324 npxdrop(); 325 #endif 326 327 /* Disable any hardware breakpoints. */ 328 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 329 reset_dbregs(); 330 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 331 } 332 } 333 334 void 335 cpu_thread_clean(struct thread *td) 336 { 337 struct pcb *pcb; 338 339 pcb = td->td_pcb; 340 if (pcb->pcb_ext != NULL) { 341 /* XXXKSE XXXSMP not SMP SAFE.. what locks do we have? */ 342 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 343 /* 344 * XXX do we need to move the TSS off the allocated pages 345 * before freeing them? (not done here) 346 */ 347 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ext, 348 ctob(IOPAGES + 1)); 349 pcb->pcb_ext = NULL; 350 } 351 } 352 353 void 354 cpu_thread_swapin(struct thread *td) 355 { 356 } 357 358 void 359 cpu_thread_swapout(struct thread *td) 360 { 361 } 362 363 void 364 cpu_thread_setup(struct thread *td) 365 { 366 367 td->td_pcb = (struct pcb *)(td->td_kstack + 368 td->td_kstack_pages * PAGE_SIZE) - 1; 369 td->td_frame = (struct trapframe *)((caddr_t)td->td_pcb - 16) - 1; 370 td->td_pcb->pcb_ext = NULL; 371 } 372 373 /* 374 * Initialize machine state (pcb and trap frame) for a new thread about to 375 * upcall. Put enough state in the new thread's PCB to get it to go back 376 * userret(), where we can intercept it again to set the return (upcall) 377 * Address and stack, along with those from upcals that are from other sources 378 * such as those generated in thread_userret() itself. 379 */ 380 void 381 cpu_set_upcall(struct thread *td, struct thread *td0) 382 { 383 struct pcb *pcb2; 384 385 /* Point the pcb to the top of the stack. */ 386 pcb2 = td->td_pcb; 387 388 /* 389 * Copy the upcall pcb. This loads kernel regs. 390 * Those not loaded individually below get their default 391 * values here. 392 * 393 * XXXKSE It might be a good idea to simply skip this as 394 * the values of the other registers may be unimportant. 395 * This would remove any requirement for knowing the KSE 396 * at this time (see the matching comment below for 397 * more analysis) (need a good safe default). 398 */ 399 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 400 pcb2->pcb_flags &= ~(PCB_NPXTRAP|PCB_NPXINITDONE); 401 402 /* 403 * Create a new fresh stack for the new thread. 404 * The -16 is so we can expand the trapframe if we go to vm86. 405 * Don't forget to set this stack value into whatever supplies 406 * the address for the fault handlers. 407 * The contexts are filled in at the time we actually DO the 408 * upcall as only then do we know which KSE we got. 409 */ 410 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 411 412 /* 413 * Set registers for trampoline to user mode. Leave space for the 414 * return address on stack. These are the kernel mode register values. 415 */ 416 #ifdef PAE 417 pcb2->pcb_cr3 = vtophys(vmspace_pmap(td->td_proc->p_vmspace)->pm_pdpt); 418 #else 419 pcb2->pcb_cr3 = vtophys(vmspace_pmap(td->td_proc->p_vmspace)->pm_pdir); 420 #endif 421 pcb2->pcb_edi = 0; 422 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 423 pcb2->pcb_ebp = 0; 424 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 425 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 426 pcb2->pcb_eip = (int)fork_trampoline; 427 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 428 pcb2->pcb_gs = rgs(); 429 /* 430 * If we didn't copy the pcb, we'd need to do the following registers: 431 * pcb2->pcb_dr*: cloned above. 432 * pcb2->pcb_savefpu: cloned above. 433 * pcb2->pcb_flags: cloned above. 434 * pcb2->pcb_onfault: cloned above (always NULL here?). 435 * pcb2->pcb_gs: cloned above. XXXKSE ??? 436 * pcb2->pcb_ext: cleared below. 437 */ 438 pcb2->pcb_ext = NULL; 439 440 /* Setup to release spin count in fork_exit(). */ 441 td->td_md.md_spinlock_count = 1; 442 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 443 } 444 445 /* 446 * Set that machine state for performing an upcall that has to 447 * be done in thread_userret() so that those upcalls generated 448 * in thread_userret() itself can be done as well. 449 */ 450 void 451 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 452 stack_t *stack) 453 { 454 455 /* 456 * Do any extra cleaning that needs to be done. 457 * The thread may have optional components 458 * that are not present in a fresh thread. 459 * This may be a recycled thread so make it look 460 * as though it's newly allocated. 461 */ 462 cpu_thread_clean(td); 463 464 /* 465 * Set the trap frame to point at the beginning of the uts 466 * function. 467 */ 468 td->td_frame->tf_ebp = 0; 469 td->td_frame->tf_esp = 470 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 471 td->td_frame->tf_eip = (int)entry; 472 473 /* 474 * Pass the address of the mailbox for this kse to the uts 475 * function as a parameter on the stack. 476 */ 477 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 478 (int)arg); 479 } 480 481 int 482 cpu_set_user_tls(struct thread *td, void *tls_base) 483 { 484 struct segment_descriptor sd; 485 uint32_t base; 486 487 /* 488 * Construct a descriptor and store it in the pcb for 489 * the next context switch. Also store it in the gdt 490 * so that the load of tf_fs into %fs will activate it 491 * at return to userland. 492 */ 493 base = (uint32_t)tls_base; 494 sd.sd_lobase = base & 0xffffff; 495 sd.sd_hibase = (base >> 24) & 0xff; 496 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 497 sd.sd_hilimit = 0xf; 498 sd.sd_type = SDT_MEMRWA; 499 sd.sd_dpl = SEL_UPL; 500 sd.sd_p = 1; 501 sd.sd_xx = 0; 502 sd.sd_def32 = 1; 503 sd.sd_gran = 1; 504 critical_enter(); 505 /* set %gs */ 506 td->td_pcb->pcb_gsd = sd; 507 if (td == curthread) { 508 PCPU_GET(fsgs_gdt)[1] = sd; 509 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 510 } 511 critical_exit(); 512 return (0); 513 } 514 515 /* 516 * Convert kernel VA to physical address 517 */ 518 vm_paddr_t 519 kvtop(void *addr) 520 { 521 vm_paddr_t pa; 522 523 pa = pmap_kextract((vm_offset_t)addr); 524 if (pa == 0) 525 panic("kvtop: zero page frame"); 526 return (pa); 527 } 528 529 #ifdef SMP 530 static void 531 cpu_reset_proxy() 532 { 533 534 cpu_reset_proxy_active = 1; 535 while (cpu_reset_proxy_active == 1) 536 ; /* Wait for other cpu to see that we've started */ 537 stop_cpus((1<<cpu_reset_proxyid)); 538 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 539 DELAY(1000000); 540 cpu_reset_real(); 541 } 542 #endif 543 544 void 545 cpu_reset() 546 { 547 #ifdef XBOX 548 if (arch_i386_is_xbox) { 549 /* Kick the PIC16L, it can reboot the box */ 550 pic16l_reboot(); 551 for (;;); 552 } 553 #endif 554 555 #ifdef SMP 556 u_int cnt, map; 557 558 if (smp_active) { 559 map = PCPU_GET(other_cpus) & ~stopped_cpus; 560 if (map != 0) { 561 printf("cpu_reset: Stopping other CPUs\n"); 562 stop_cpus(map); 563 } 564 565 if (PCPU_GET(cpuid) != 0) { 566 cpu_reset_proxyid = PCPU_GET(cpuid); 567 cpustop_restartfunc = cpu_reset_proxy; 568 cpu_reset_proxy_active = 0; 569 printf("cpu_reset: Restarting BSP\n"); 570 571 /* Restart CPU #0. */ 572 /* XXX: restart_cpus(1 << 0); */ 573 atomic_store_rel_int(&started_cpus, (1 << 0)); 574 575 cnt = 0; 576 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 577 cnt++; /* Wait for BSP to announce restart */ 578 if (cpu_reset_proxy_active == 0) 579 printf("cpu_reset: Failed to restart BSP\n"); 580 enable_intr(); 581 cpu_reset_proxy_active = 2; 582 583 while (1); 584 /* NOTREACHED */ 585 } 586 587 DELAY(1000000); 588 } 589 #endif 590 cpu_reset_real(); 591 /* NOTREACHED */ 592 } 593 594 static void 595 cpu_reset_real() 596 { 597 struct region_descriptor null_idt; 598 #ifndef PC98 599 int b; 600 #endif 601 602 disable_intr(); 603 #ifdef CPU_ELAN 604 if (elan_mmcr != NULL) 605 elan_mmcr->RESCFG = 1; 606 #endif 607 608 if (cpu == CPU_GEODE1100) { 609 /* Attempt Geode's own reset */ 610 outl(0xcf8, 0x80009044ul); 611 outl(0xcfc, 0xf); 612 } 613 614 #ifdef PC98 615 /* 616 * Attempt to do a CPU reset via CPU reset port. 617 */ 618 if ((inb(0x35) & 0xa0) != 0xa0) { 619 outb(0x37, 0x0f); /* SHUT0 = 0. */ 620 outb(0x37, 0x0b); /* SHUT1 = 0. */ 621 } 622 outb(0xf0, 0x00); /* Reset. */ 623 #else 624 #if !defined(BROKEN_KEYBOARD_RESET) 625 /* 626 * Attempt to do a CPU reset via the keyboard controller, 627 * do not turn off GateA20, as any machine that fails 628 * to do the reset here would then end up in no man's land. 629 */ 630 outb(IO_KBD + 4, 0xFE); 631 DELAY(500000); /* wait 0.5 sec to see if that did it */ 632 #endif 633 634 /* 635 * Attempt to force a reset via the Reset Control register at 636 * I/O port 0xcf9. Bit 2 forces a system reset when it is 637 * written as 1. Bit 1 selects the type of reset to attempt: 638 * 0 selects a "soft" reset, and 1 selects a "hard" reset. We 639 * try to do a "soft" reset first, and then a "hard" reset. 640 */ 641 outb(0xcf9, 0x2); 642 outb(0xcf9, 0x6); 643 DELAY(500000); /* wait 0.5 sec to see if that did it */ 644 645 /* 646 * Attempt to force a reset via the Fast A20 and Init register 647 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 648 * Bit 0 asserts INIT# when set to 1. We are careful to only 649 * preserve bit 1 while setting bit 0. We also must clear bit 650 * 0 before setting it if it isn't already clear. 651 */ 652 b = inb(0x92); 653 if (b != 0xff) { 654 if ((b & 0x1) != 0) 655 outb(0x92, b & 0xfe); 656 outb(0x92, b | 0x1); 657 DELAY(500000); /* wait 0.5 sec to see if that did it */ 658 } 659 #endif /* PC98 */ 660 661 printf("No known reset method worked, attempting CPU shutdown\n"); 662 DELAY(1000000); /* wait 1 sec for printf to complete */ 663 664 /* Wipe the IDT. */ 665 null_idt.rd_limit = 0; 666 null_idt.rd_base = 0; 667 lidt(&null_idt); 668 669 /* "good night, sweet prince .... <THUNK!>" */ 670 breakpoint(); 671 672 /* NOTREACHED */ 673 while(1); 674 } 675 676 /* 677 * Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-)) 678 */ 679 static void 680 sf_buf_init(void *arg) 681 { 682 struct sf_buf *sf_bufs; 683 vm_offset_t sf_base; 684 int i; 685 686 nsfbufs = NSFBUFS; 687 TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs); 688 689 sf_buf_active = hashinit(nsfbufs, M_TEMP, &sf_buf_hashmask); 690 TAILQ_INIT(&sf_buf_freelist); 691 sf_base = kmem_alloc_nofault(kernel_map, nsfbufs * PAGE_SIZE); 692 sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP, 693 M_NOWAIT | M_ZERO); 694 for (i = 0; i < nsfbufs; i++) { 695 sf_bufs[i].kva = sf_base + i * PAGE_SIZE; 696 TAILQ_INSERT_TAIL(&sf_buf_freelist, &sf_bufs[i], free_entry); 697 } 698 sf_buf_alloc_want = 0; 699 mtx_init(&sf_buf_lock, "sf_buf", NULL, MTX_DEF); 700 } 701 702 /* 703 * Get an sf_buf from the freelist. May block if none are available. 704 */ 705 struct sf_buf * 706 sf_buf_alloc(struct vm_page *m, int flags) 707 { 708 pt_entry_t opte, *ptep; 709 struct sf_head *hash_list; 710 struct sf_buf *sf; 711 #ifdef SMP 712 cpumask_t cpumask, other_cpus; 713 #endif 714 int error; 715 716 KASSERT(curthread->td_pinned > 0 || (flags & SFB_CPUPRIVATE) == 0, 717 ("sf_buf_alloc(SFB_CPUPRIVATE): curthread not pinned")); 718 hash_list = &sf_buf_active[SF_BUF_HASH(m)]; 719 mtx_lock(&sf_buf_lock); 720 LIST_FOREACH(sf, hash_list, list_entry) { 721 if (sf->m == m) { 722 sf->ref_count++; 723 if (sf->ref_count == 1) { 724 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 725 nsfbufsused++; 726 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 727 } 728 #ifdef SMP 729 goto shootdown; 730 #else 731 goto done; 732 #endif 733 } 734 } 735 while ((sf = TAILQ_FIRST(&sf_buf_freelist)) == NULL) { 736 if (flags & SFB_NOWAIT) 737 goto done; 738 sf_buf_alloc_want++; 739 mbstat.sf_allocwait++; 740 error = msleep(&sf_buf_freelist, &sf_buf_lock, 741 (flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0); 742 sf_buf_alloc_want--; 743 744 /* 745 * If we got a signal, don't risk going back to sleep. 746 */ 747 if (error) 748 goto done; 749 } 750 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 751 if (sf->m != NULL) 752 LIST_REMOVE(sf, list_entry); 753 LIST_INSERT_HEAD(hash_list, sf, list_entry); 754 sf->ref_count = 1; 755 sf->m = m; 756 nsfbufsused++; 757 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 758 759 /* 760 * Update the sf_buf's virtual-to-physical mapping, flushing the 761 * virtual address from the TLB. Since the reference count for 762 * the sf_buf's old mapping was zero, that mapping is not 763 * currently in use. Consequently, there is no need to exchange 764 * the old and new PTEs atomically, even under PAE. 765 */ 766 ptep = vtopte(sf->kva); 767 opte = *ptep; 768 *ptep = VM_PAGE_TO_PHYS(m) | pgeflag | PG_RW | PG_V; 769 770 /* 771 * Avoid unnecessary TLB invalidations: If the sf_buf's old 772 * virtual-to-physical mapping was not used, then any processor 773 * that has invalidated the sf_buf's virtual address from its TLB 774 * since the last used mapping need not invalidate again. 775 */ 776 #ifdef SMP 777 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 778 sf->cpumask = 0; 779 shootdown: 780 sched_pin(); 781 cpumask = PCPU_GET(cpumask); 782 if ((sf->cpumask & cpumask) == 0) { 783 sf->cpumask |= cpumask; 784 invlpg(sf->kva); 785 } 786 if ((flags & SFB_CPUPRIVATE) == 0) { 787 other_cpus = PCPU_GET(other_cpus) & ~sf->cpumask; 788 if (other_cpus != 0) { 789 sf->cpumask |= other_cpus; 790 smp_masked_invlpg(other_cpus, sf->kva); 791 } 792 } 793 sched_unpin(); 794 #else 795 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 796 pmap_invalidate_page(kernel_pmap, sf->kva); 797 #endif 798 done: 799 mtx_unlock(&sf_buf_lock); 800 return (sf); 801 } 802 803 /* 804 * Remove a reference from the given sf_buf, adding it to the free 805 * list when its reference count reaches zero. A freed sf_buf still, 806 * however, retains its virtual-to-physical mapping until it is 807 * recycled or reactivated by sf_buf_alloc(9). 808 */ 809 void 810 sf_buf_free(struct sf_buf *sf) 811 { 812 813 mtx_lock(&sf_buf_lock); 814 sf->ref_count--; 815 if (sf->ref_count == 0) { 816 TAILQ_INSERT_TAIL(&sf_buf_freelist, sf, free_entry); 817 nsfbufsused--; 818 if (sf_buf_alloc_want > 0) 819 wakeup_one(&sf_buf_freelist); 820 } 821 mtx_unlock(&sf_buf_lock); 822 } 823 824 /* 825 * Software interrupt handler for queued VM system processing. 826 */ 827 void 828 swi_vm(void *dummy) 829 { 830 if (busdma_swi_pending != 0) 831 busdma_swi(); 832 } 833 834 /* 835 * Tell whether this address is in some physical memory region. 836 * Currently used by the kernel coredump code in order to avoid 837 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 838 * or other unpredictable behaviour. 839 */ 840 841 int 842 is_physical_memory(vm_paddr_t addr) 843 { 844 845 #ifdef DEV_ISA 846 /* The ISA ``memory hole''. */ 847 if (addr >= 0xa0000 && addr < 0x100000) 848 return 0; 849 #endif 850 851 /* 852 * stuff other tests for known memory-mapped devices (PCI?) 853 * here 854 */ 855 856 return 1; 857 } 858