xref: /freebsd/sys/i386/i386/vm_machdep.c (revision 93a065e7496dfbfbd0a5b0208ef763f37ea975c7)
1 /*-
2  * Copyright (c) 1982, 1986 The Regents of the University of California.
3  * Copyright (c) 1989, 1990 William Jolitz
4  * Copyright (c) 1994 John Dyson
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department, and William Jolitz.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the University of
22  *	California, Berkeley and its contributors.
23  * 4. Neither the name of the University nor the names of its contributors
24  *    may be used to endorse or promote products derived from this software
25  *    without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37  * SUCH DAMAGE.
38  *
39  *	from: @(#)vm_machdep.c	7.3 (Berkeley) 5/13/91
40  *	Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
41  */
42 
43 #include <sys/cdefs.h>
44 __FBSDID("$FreeBSD$");
45 
46 #include "opt_isa.h"
47 #include "opt_npx.h"
48 #include "opt_reset.h"
49 #include "opt_cpu.h"
50 #include "opt_xbox.h"
51 
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/bio.h>
55 #include <sys/buf.h>
56 #include <sys/kernel.h>
57 #include <sys/ktr.h>
58 #include <sys/lock.h>
59 #include <sys/malloc.h>
60 #include <sys/mbuf.h>
61 #include <sys/mutex.h>
62 #include <sys/pioctl.h>
63 #include <sys/proc.h>
64 #include <sys/sysent.h>
65 #include <sys/sf_buf.h>
66 #include <sys/smp.h>
67 #include <sys/sched.h>
68 #include <sys/sysctl.h>
69 #include <sys/unistd.h>
70 #include <sys/vnode.h>
71 #include <sys/vmmeter.h>
72 
73 #include <machine/cpu.h>
74 #include <machine/cputypes.h>
75 #include <machine/md_var.h>
76 #include <machine/pcb.h>
77 #include <machine/pcb_ext.h>
78 #include <machine/smp.h>
79 #include <machine/vm86.h>
80 
81 #ifdef CPU_ELAN
82 #include <machine/elan_mmcr.h>
83 #endif
84 
85 #include <vm/vm.h>
86 #include <vm/vm_extern.h>
87 #include <vm/vm_kern.h>
88 #include <vm/vm_page.h>
89 #include <vm/vm_map.h>
90 #include <vm/vm_param.h>
91 
92 #include <isa/isareg.h>
93 
94 #ifdef XBOX
95 #include <machine/xbox.h>
96 #endif
97 
98 #ifndef NSFBUFS
99 #define	NSFBUFS		(512 + maxusers * 16)
100 #endif
101 
102 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
103 #define CPU_ENABLE_SSE
104 #endif
105 
106 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread),
107     "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread.");
108 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb),
109     "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb.");
110 _Static_assert(__OFFSETOF_MONITORBUF == offsetof(struct pcpu, pc_monitorbuf),
111     "__OFFSETOF_MONINORBUF does not correspond with offset of pc_monitorbuf.");
112 
113 static void	cpu_reset_real(void);
114 #ifdef SMP
115 static void	cpu_reset_proxy(void);
116 static u_int	cpu_reset_proxyid;
117 static volatile u_int	cpu_reset_proxy_active;
118 #endif
119 
120 union savefpu *
121 get_pcb_user_save_td(struct thread *td)
122 {
123 	vm_offset_t p;
124 
125 	p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE -
126 	    roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN);
127 	KASSERT((p % XSAVE_AREA_ALIGN) == 0, ("Unaligned pcb_user_save area"));
128 	return ((union savefpu *)p);
129 }
130 
131 union savefpu *
132 get_pcb_user_save_pcb(struct pcb *pcb)
133 {
134 	vm_offset_t p;
135 
136 	p = (vm_offset_t)(pcb + 1);
137 	return ((union savefpu *)p);
138 }
139 
140 struct pcb *
141 get_pcb_td(struct thread *td)
142 {
143 	vm_offset_t p;
144 
145 	p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE -
146 	    roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN) -
147 	    sizeof(struct pcb);
148 	return ((struct pcb *)p);
149 }
150 
151 void *
152 alloc_fpusave(int flags)
153 {
154 	void *res;
155 #ifdef CPU_ENABLE_SSE
156 	struct savefpu_ymm *sf;
157 #endif
158 
159 	res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags);
160 #ifdef CPU_ENABLE_SSE
161 	if (use_xsave) {
162 		sf = (struct savefpu_ymm *)res;
163 		bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd));
164 		sf->sv_xstate.sx_hd.xstate_bv = xsave_mask;
165 	}
166 #endif
167 	return (res);
168 }
169 /*
170  * Finish a fork operation, with process p2 nearly set up.
171  * Copy and update the pcb, set up the stack so that the child
172  * ready to run and return to user mode.
173  */
174 void
175 cpu_fork(td1, p2, td2, flags)
176 	register struct thread *td1;
177 	register struct proc *p2;
178 	struct thread *td2;
179 	int flags;
180 {
181 	register struct proc *p1;
182 	struct pcb *pcb2;
183 	struct mdproc *mdp2;
184 
185 	p1 = td1->td_proc;
186 	if ((flags & RFPROC) == 0) {
187 		if ((flags & RFMEM) == 0) {
188 			/* unshare user LDT */
189 			struct mdproc *mdp1 = &p1->p_md;
190 			struct proc_ldt *pldt, *pldt1;
191 
192 			mtx_lock_spin(&dt_lock);
193 			if ((pldt1 = mdp1->md_ldt) != NULL &&
194 			    pldt1->ldt_refcnt > 1) {
195 				pldt = user_ldt_alloc(mdp1, pldt1->ldt_len);
196 				if (pldt == NULL)
197 					panic("could not copy LDT");
198 				mdp1->md_ldt = pldt;
199 				set_user_ldt(mdp1);
200 				user_ldt_deref(pldt1);
201 			} else
202 				mtx_unlock_spin(&dt_lock);
203 		}
204 		return;
205 	}
206 
207 	/* Ensure that td1's pcb is up to date. */
208 	if (td1 == curthread)
209 		td1->td_pcb->pcb_gs = rgs();
210 #ifdef DEV_NPX
211 	critical_enter();
212 	if (PCPU_GET(fpcurthread) == td1)
213 		npxsave(td1->td_pcb->pcb_save);
214 	critical_exit();
215 #endif
216 
217 	/* Point the pcb to the top of the stack */
218 	pcb2 = get_pcb_td(td2);
219 	td2->td_pcb = pcb2;
220 
221 	/* Copy td1's pcb */
222 	bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
223 
224 	/* Properly initialize pcb_save */
225 	pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
226 	bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2),
227 	    cpu_max_ext_state_size);
228 
229 	/* Point mdproc and then copy over td1's contents */
230 	mdp2 = &p2->p_md;
231 	bcopy(&p1->p_md, mdp2, sizeof(*mdp2));
232 
233 	/*
234 	 * Create a new fresh stack for the new process.
235 	 * Copy the trap frame for the return to user mode as if from a
236 	 * syscall.  This copies most of the user mode register values.
237 	 * The -16 is so we can expand the trapframe if we go to vm86.
238 	 */
239 	td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1;
240 	bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe));
241 
242 	td2->td_frame->tf_eax = 0;		/* Child returns zero */
243 	td2->td_frame->tf_eflags &= ~PSL_C;	/* success */
244 	td2->td_frame->tf_edx = 1;
245 
246 	/*
247 	 * If the parent process has the trap bit set (i.e. a debugger had
248 	 * single stepped the process to the system call), we need to clear
249 	 * the trap flag from the new frame unless the debugger had set PF_FORK
250 	 * on the parent.  Otherwise, the child will receive a (likely
251 	 * unexpected) SIGTRAP when it executes the first instruction after
252 	 * returning  to userland.
253 	 */
254 	if ((p1->p_pfsflags & PF_FORK) == 0)
255 		td2->td_frame->tf_eflags &= ~PSL_T;
256 
257 	/*
258 	 * Set registers for trampoline to user mode.  Leave space for the
259 	 * return address on stack.  These are the kernel mode register values.
260 	 */
261 #if defined(PAE) || defined(PAE_TABLES)
262 	pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt);
263 #else
264 	pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir);
265 #endif
266 	pcb2->pcb_edi = 0;
267 	pcb2->pcb_esi = (int)fork_return;	/* fork_trampoline argument */
268 	pcb2->pcb_ebp = 0;
269 	pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *);
270 	pcb2->pcb_ebx = (int)td2;		/* fork_trampoline argument */
271 	pcb2->pcb_eip = (int)fork_trampoline;
272 	/*-
273 	 * pcb2->pcb_dr*:	cloned above.
274 	 * pcb2->pcb_savefpu:	cloned above.
275 	 * pcb2->pcb_flags:	cloned above.
276 	 * pcb2->pcb_onfault:	cloned above (always NULL here?).
277 	 * pcb2->pcb_gs:	cloned above.
278 	 * pcb2->pcb_ext:	cleared below.
279 	 */
280 
281 	/*
282 	 * XXX don't copy the i/o pages.  this should probably be fixed.
283 	 */
284 	pcb2->pcb_ext = 0;
285 
286 	/* Copy the LDT, if necessary. */
287 	mtx_lock_spin(&dt_lock);
288 	if (mdp2->md_ldt != NULL) {
289 		if (flags & RFMEM) {
290 			mdp2->md_ldt->ldt_refcnt++;
291 		} else {
292 			mdp2->md_ldt = user_ldt_alloc(mdp2,
293 			    mdp2->md_ldt->ldt_len);
294 			if (mdp2->md_ldt == NULL)
295 				panic("could not copy LDT");
296 		}
297 	}
298 	mtx_unlock_spin(&dt_lock);
299 
300 	/* Setup to release spin count in fork_exit(). */
301 	td2->td_md.md_spinlock_count = 1;
302 	td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
303 
304 	/*
305 	 * Now, cpu_switch() can schedule the new process.
306 	 * pcb_esp is loaded pointing to the cpu_switch() stack frame
307 	 * containing the return address when exiting cpu_switch.
308 	 * This will normally be to fork_trampoline(), which will have
309 	 * %ebx loaded with the new proc's pointer.  fork_trampoline()
310 	 * will set up a stack to call fork_return(p, frame); to complete
311 	 * the return to user-mode.
312 	 */
313 }
314 
315 /*
316  * Intercept the return address from a freshly forked process that has NOT
317  * been scheduled yet.
318  *
319  * This is needed to make kernel threads stay in kernel mode.
320  */
321 void
322 cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg)
323 {
324 	/*
325 	 * Note that the trap frame follows the args, so the function
326 	 * is really called like this:  func(arg, frame);
327 	 */
328 	td->td_pcb->pcb_esi = (int) func;	/* function */
329 	td->td_pcb->pcb_ebx = (int) arg;	/* first arg */
330 }
331 
332 void
333 cpu_exit(struct thread *td)
334 {
335 
336 	/*
337 	 * If this process has a custom LDT, release it.  Reset pc->pcb_gs
338 	 * and %gs before we free it in case they refer to an LDT entry.
339 	 */
340 	mtx_lock_spin(&dt_lock);
341 	if (td->td_proc->p_md.md_ldt) {
342 		td->td_pcb->pcb_gs = _udatasel;
343 		load_gs(_udatasel);
344 		user_ldt_free(td);
345 	} else
346 		mtx_unlock_spin(&dt_lock);
347 }
348 
349 void
350 cpu_thread_exit(struct thread *td)
351 {
352 
353 #ifdef DEV_NPX
354 	critical_enter();
355 	if (td == PCPU_GET(fpcurthread))
356 		npxdrop();
357 	critical_exit();
358 #endif
359 
360 	/* Disable any hardware breakpoints. */
361 	if (td->td_pcb->pcb_flags & PCB_DBREGS) {
362 		reset_dbregs();
363 		td->td_pcb->pcb_flags &= ~PCB_DBREGS;
364 	}
365 }
366 
367 void
368 cpu_thread_clean(struct thread *td)
369 {
370 	struct pcb *pcb;
371 
372 	pcb = td->td_pcb;
373 	if (pcb->pcb_ext != NULL) {
374 		/* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */
375 		/*
376 		 * XXX do we need to move the TSS off the allocated pages
377 		 * before freeing them?  (not done here)
378 		 */
379 		kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext,
380 		    ctob(IOPAGES + 1));
381 		pcb->pcb_ext = NULL;
382 	}
383 }
384 
385 void
386 cpu_thread_swapin(struct thread *td)
387 {
388 }
389 
390 void
391 cpu_thread_swapout(struct thread *td)
392 {
393 }
394 
395 void
396 cpu_thread_alloc(struct thread *td)
397 {
398 	struct pcb *pcb;
399 #ifdef CPU_ENABLE_SSE
400 	struct xstate_hdr *xhdr;
401 #endif
402 
403 	td->td_pcb = pcb = get_pcb_td(td);
404 	td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1;
405 	pcb->pcb_ext = NULL;
406 	pcb->pcb_save = get_pcb_user_save_pcb(pcb);
407 #ifdef CPU_ENABLE_SSE
408 	if (use_xsave) {
409 		xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1);
410 		bzero(xhdr, sizeof(*xhdr));
411 		xhdr->xstate_bv = xsave_mask;
412 	}
413 #endif
414 }
415 
416 void
417 cpu_thread_free(struct thread *td)
418 {
419 
420 	cpu_thread_clean(td);
421 }
422 
423 void
424 cpu_set_syscall_retval(struct thread *td, int error)
425 {
426 
427 	switch (error) {
428 	case 0:
429 		td->td_frame->tf_eax = td->td_retval[0];
430 		td->td_frame->tf_edx = td->td_retval[1];
431 		td->td_frame->tf_eflags &= ~PSL_C;
432 		break;
433 
434 	case ERESTART:
435 		/*
436 		 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int
437 		 * 0x80 is 2 bytes. We saved this in tf_err.
438 		 */
439 		td->td_frame->tf_eip -= td->td_frame->tf_err;
440 		break;
441 
442 	case EJUSTRETURN:
443 		break;
444 
445 	default:
446 		td->td_frame->tf_eax = SV_ABI_ERRNO(td->td_proc, error);
447 		td->td_frame->tf_eflags |= PSL_C;
448 		break;
449 	}
450 }
451 
452 /*
453  * Initialize machine state, mostly pcb and trap frame for a new
454  * thread, about to return to userspace.  Put enough state in the new
455  * thread's PCB to get it to go back to the fork_return(), which
456  * finalizes the thread state and handles peculiarities of the first
457  * return to userspace for the new thread.
458  */
459 void
460 cpu_copy_thread(struct thread *td, struct thread *td0)
461 {
462 	struct pcb *pcb2;
463 
464 	/* Point the pcb to the top of the stack. */
465 	pcb2 = td->td_pcb;
466 
467 	/*
468 	 * Copy the upcall pcb.  This loads kernel regs.
469 	 * Those not loaded individually below get their default
470 	 * values here.
471 	 */
472 	bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
473 	pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE |
474 	    PCB_KERNNPX);
475 	pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
476 	bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save,
477 	    cpu_max_ext_state_size);
478 
479 	/*
480 	 * Create a new fresh stack for the new thread.
481 	 */
482 	bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe));
483 
484 	/* If the current thread has the trap bit set (i.e. a debugger had
485 	 * single stepped the process to the system call), we need to clear
486 	 * the trap flag from the new frame. Otherwise, the new thread will
487 	 * receive a (likely unexpected) SIGTRAP when it executes the first
488 	 * instruction after returning to userland.
489 	 */
490 	td->td_frame->tf_eflags &= ~PSL_T;
491 
492 	/*
493 	 * Set registers for trampoline to user mode.  Leave space for the
494 	 * return address on stack.  These are the kernel mode register values.
495 	 */
496 	pcb2->pcb_edi = 0;
497 	pcb2->pcb_esi = (int)fork_return;		    /* trampoline arg */
498 	pcb2->pcb_ebp = 0;
499 	pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */
500 	pcb2->pcb_ebx = (int)td;			    /* trampoline arg */
501 	pcb2->pcb_eip = (int)fork_trampoline;
502 	pcb2->pcb_gs = rgs();
503 	/*
504 	 * If we didn't copy the pcb, we'd need to do the following registers:
505 	 * pcb2->pcb_cr3:	cloned above.
506 	 * pcb2->pcb_dr*:	cloned above.
507 	 * pcb2->pcb_savefpu:	cloned above.
508 	 * pcb2->pcb_flags:	cloned above.
509 	 * pcb2->pcb_onfault:	cloned above (always NULL here?).
510 	 * pcb2->pcb_gs:	cloned above.
511 	 * pcb2->pcb_ext:	cleared below.
512 	 */
513 	pcb2->pcb_ext = NULL;
514 
515 	/* Setup to release spin count in fork_exit(). */
516 	td->td_md.md_spinlock_count = 1;
517 	td->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
518 }
519 
520 /*
521  * Set that machine state for performing an upcall that starts
522  * the entry function with the given argument.
523  */
524 void
525 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
526     stack_t *stack)
527 {
528 
529 	/*
530 	 * Do any extra cleaning that needs to be done.
531 	 * The thread may have optional components
532 	 * that are not present in a fresh thread.
533 	 * This may be a recycled thread so make it look
534 	 * as though it's newly allocated.
535 	 */
536 	cpu_thread_clean(td);
537 
538 	/*
539 	 * Set the trap frame to point at the beginning of the entry
540 	 * function.
541 	 */
542 	td->td_frame->tf_ebp = 0;
543 	td->td_frame->tf_esp =
544 	    (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4;
545 	td->td_frame->tf_eip = (int)entry;
546 
547 	/* Pass the argument to the entry point. */
548 	suword((void *)(td->td_frame->tf_esp + sizeof(void *)),
549 	    (int)arg);
550 }
551 
552 int
553 cpu_set_user_tls(struct thread *td, void *tls_base)
554 {
555 	struct segment_descriptor sd;
556 	uint32_t base;
557 
558 	/*
559 	 * Construct a descriptor and store it in the pcb for
560 	 * the next context switch.  Also store it in the gdt
561 	 * so that the load of tf_fs into %fs will activate it
562 	 * at return to userland.
563 	 */
564 	base = (uint32_t)tls_base;
565 	sd.sd_lobase = base & 0xffffff;
566 	sd.sd_hibase = (base >> 24) & 0xff;
567 	sd.sd_lolimit = 0xffff;	/* 4GB limit, wraps around */
568 	sd.sd_hilimit = 0xf;
569 	sd.sd_type  = SDT_MEMRWA;
570 	sd.sd_dpl   = SEL_UPL;
571 	sd.sd_p     = 1;
572 	sd.sd_xx    = 0;
573 	sd.sd_def32 = 1;
574 	sd.sd_gran  = 1;
575 	critical_enter();
576 	/* set %gs */
577 	td->td_pcb->pcb_gsd = sd;
578 	if (td == curthread) {
579 		PCPU_GET(fsgs_gdt)[1] = sd;
580 		load_gs(GSEL(GUGS_SEL, SEL_UPL));
581 	}
582 	critical_exit();
583 	return (0);
584 }
585 
586 /*
587  * Convert kernel VA to physical address
588  */
589 vm_paddr_t
590 kvtop(void *addr)
591 {
592 	vm_paddr_t pa;
593 
594 	pa = pmap_kextract((vm_offset_t)addr);
595 	if (pa == 0)
596 		panic("kvtop: zero page frame");
597 	return (pa);
598 }
599 
600 #ifdef SMP
601 static void
602 cpu_reset_proxy()
603 {
604 	cpuset_t tcrp;
605 
606 	cpu_reset_proxy_active = 1;
607 	while (cpu_reset_proxy_active == 1)
608 		;	/* Wait for other cpu to see that we've started */
609 	CPU_SETOF(cpu_reset_proxyid, &tcrp);
610 	stop_cpus(tcrp);
611 	printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid);
612 	DELAY(1000000);
613 	cpu_reset_real();
614 }
615 #endif
616 
617 void
618 cpu_reset()
619 {
620 #ifdef XBOX
621 	if (arch_i386_is_xbox) {
622 		/* Kick the PIC16L, it can reboot the box */
623 		pic16l_reboot();
624 		for (;;);
625 	}
626 #endif
627 
628 #ifdef SMP
629 	cpuset_t map;
630 	u_int cnt;
631 
632 	if (smp_started) {
633 		map = all_cpus;
634 		CPU_CLR(PCPU_GET(cpuid), &map);
635 		CPU_NAND(&map, &stopped_cpus);
636 		if (!CPU_EMPTY(&map)) {
637 			printf("cpu_reset: Stopping other CPUs\n");
638 			stop_cpus(map);
639 		}
640 
641 		if (PCPU_GET(cpuid) != 0) {
642 			cpu_reset_proxyid = PCPU_GET(cpuid);
643 			cpustop_restartfunc = cpu_reset_proxy;
644 			cpu_reset_proxy_active = 0;
645 			printf("cpu_reset: Restarting BSP\n");
646 
647 			/* Restart CPU #0. */
648 			/* XXX: restart_cpus(1 << 0); */
649 			CPU_SETOF(0, &started_cpus);
650 			wmb();
651 
652 			cnt = 0;
653 			while (cpu_reset_proxy_active == 0 && cnt < 10000000)
654 				cnt++;	/* Wait for BSP to announce restart */
655 			if (cpu_reset_proxy_active == 0)
656 				printf("cpu_reset: Failed to restart BSP\n");
657 			enable_intr();
658 			cpu_reset_proxy_active = 2;
659 
660 			while (1);
661 			/* NOTREACHED */
662 		}
663 
664 		DELAY(1000000);
665 	}
666 #endif
667 	cpu_reset_real();
668 	/* NOTREACHED */
669 }
670 
671 static void
672 cpu_reset_real()
673 {
674 	struct region_descriptor null_idt;
675 	int b;
676 
677 	disable_intr();
678 #ifdef CPU_ELAN
679 	if (elan_mmcr != NULL)
680 		elan_mmcr->RESCFG = 1;
681 #endif
682 
683 	if (cpu == CPU_GEODE1100) {
684 		/* Attempt Geode's own reset */
685 		outl(0xcf8, 0x80009044ul);
686 		outl(0xcfc, 0xf);
687 	}
688 
689 #if !defined(BROKEN_KEYBOARD_RESET)
690 	/*
691 	 * Attempt to do a CPU reset via the keyboard controller,
692 	 * do not turn off GateA20, as any machine that fails
693 	 * to do the reset here would then end up in no man's land.
694 	 */
695 	outb(IO_KBD + 4, 0xFE);
696 	DELAY(500000);	/* wait 0.5 sec to see if that did it */
697 #endif
698 
699 	/*
700 	 * Attempt to force a reset via the Reset Control register at
701 	 * I/O port 0xcf9.  Bit 2 forces a system reset when it
702 	 * transitions from 0 to 1.  Bit 1 selects the type of reset
703 	 * to attempt: 0 selects a "soft" reset, and 1 selects a
704 	 * "hard" reset.  We try a "hard" reset.  The first write sets
705 	 * bit 1 to select a "hard" reset and clears bit 2.  The
706 	 * second write forces a 0 -> 1 transition in bit 2 to trigger
707 	 * a reset.
708 	 */
709 	outb(0xcf9, 0x2);
710 	outb(0xcf9, 0x6);
711 	DELAY(500000);  /* wait 0.5 sec to see if that did it */
712 
713 	/*
714 	 * Attempt to force a reset via the Fast A20 and Init register
715 	 * at I/O port 0x92.  Bit 1 serves as an alternate A20 gate.
716 	 * Bit 0 asserts INIT# when set to 1.  We are careful to only
717 	 * preserve bit 1 while setting bit 0.  We also must clear bit
718 	 * 0 before setting it if it isn't already clear.
719 	 */
720 	b = inb(0x92);
721 	if (b != 0xff) {
722 		if ((b & 0x1) != 0)
723 			outb(0x92, b & 0xfe);
724 		outb(0x92, b | 0x1);
725 		DELAY(500000);  /* wait 0.5 sec to see if that did it */
726 	}
727 
728 	printf("No known reset method worked, attempting CPU shutdown\n");
729 	DELAY(1000000); /* wait 1 sec for printf to complete */
730 
731 	/* Wipe the IDT. */
732 	null_idt.rd_limit = 0;
733 	null_idt.rd_base = 0;
734 	lidt(&null_idt);
735 
736 	/* "good night, sweet prince .... <THUNK!>" */
737 	breakpoint();
738 
739 	/* NOTREACHED */
740 	while(1);
741 }
742 
743 /*
744  * Get an sf_buf from the freelist.  May block if none are available.
745  */
746 void
747 sf_buf_map(struct sf_buf *sf, int flags)
748 {
749 	pt_entry_t opte, *ptep;
750 
751 	/*
752 	 * Update the sf_buf's virtual-to-physical mapping, flushing the
753 	 * virtual address from the TLB.  Since the reference count for
754 	 * the sf_buf's old mapping was zero, that mapping is not
755 	 * currently in use.  Consequently, there is no need to exchange
756 	 * the old and new PTEs atomically, even under PAE.
757 	 */
758 	ptep = vtopte(sf->kva);
759 	opte = *ptep;
760 	*ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V |
761 	    pmap_cache_bits(sf->m->md.pat_mode, 0);
762 
763 	/*
764 	 * Avoid unnecessary TLB invalidations: If the sf_buf's old
765 	 * virtual-to-physical mapping was not used, then any processor
766 	 * that has invalidated the sf_buf's virtual address from its TLB
767 	 * since the last used mapping need not invalidate again.
768 	 */
769 #ifdef SMP
770 	if ((opte & (PG_V | PG_A)) ==  (PG_V | PG_A))
771 		CPU_ZERO(&sf->cpumask);
772 
773 	sf_buf_shootdown(sf, flags);
774 #else
775 	if ((opte & (PG_V | PG_A)) ==  (PG_V | PG_A))
776 		pmap_invalidate_page(kernel_pmap, sf->kva);
777 #endif
778 }
779 
780 #ifdef SMP
781 void
782 sf_buf_shootdown(struct sf_buf *sf, int flags)
783 {
784 	cpuset_t other_cpus;
785 	u_int cpuid;
786 
787 	sched_pin();
788 	cpuid = PCPU_GET(cpuid);
789 	if (!CPU_ISSET(cpuid, &sf->cpumask)) {
790 		CPU_SET(cpuid, &sf->cpumask);
791 		invlpg(sf->kva);
792 	}
793 	if ((flags & SFB_CPUPRIVATE) == 0) {
794 		other_cpus = all_cpus;
795 		CPU_CLR(cpuid, &other_cpus);
796 		CPU_NAND(&other_cpus, &sf->cpumask);
797 		if (!CPU_EMPTY(&other_cpus)) {
798 			CPU_OR(&sf->cpumask, &other_cpus);
799 			smp_masked_invlpg(other_cpus, sf->kva);
800 		}
801 	}
802 	sched_unpin();
803 }
804 #endif
805 
806 /*
807  * MD part of sf_buf_free().
808  */
809 int
810 sf_buf_unmap(struct sf_buf *sf)
811 {
812 
813 	return (0);
814 }
815 
816 static void
817 sf_buf_invalidate(struct sf_buf *sf)
818 {
819 	vm_page_t m = sf->m;
820 
821 	/*
822 	 * Use pmap_qenter to update the pte for
823 	 * existing mapping, in particular, the PAT
824 	 * settings are recalculated.
825 	 */
826 	pmap_qenter(sf->kva, &m, 1);
827 	pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE);
828 }
829 
830 /*
831  * Invalidate the cache lines that may belong to the page, if
832  * (possibly old) mapping of the page by sf buffer exists.  Returns
833  * TRUE when mapping was found and cache invalidated.
834  */
835 boolean_t
836 sf_buf_invalidate_cache(vm_page_t m)
837 {
838 
839 	return (sf_buf_process_page(m, sf_buf_invalidate));
840 }
841 
842 /*
843  * Software interrupt handler for queued VM system processing.
844  */
845 void
846 swi_vm(void *dummy)
847 {
848 	if (busdma_swi_pending != 0)
849 		busdma_swi();
850 }
851 
852 /*
853  * Tell whether this address is in some physical memory region.
854  * Currently used by the kernel coredump code in order to avoid
855  * dumping the ``ISA memory hole'' which could cause indefinite hangs,
856  * or other unpredictable behaviour.
857  */
858 
859 int
860 is_physical_memory(vm_paddr_t addr)
861 {
862 
863 #ifdef DEV_ISA
864 	/* The ISA ``memory hole''. */
865 	if (addr >= 0xa0000 && addr < 0x100000)
866 		return 0;
867 #endif
868 
869 	/*
870 	 * stuff other tests for known memory-mapped devices (PCI?)
871 	 * here
872 	 */
873 
874 	return 1;
875 }
876