1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/lock.h> 59 #include <sys/malloc.h> 60 #include <sys/mbuf.h> 61 #include <sys/mutex.h> 62 #include <sys/pioctl.h> 63 #include <sys/proc.h> 64 #include <sys/sysent.h> 65 #include <sys/sf_buf.h> 66 #include <sys/smp.h> 67 #include <sys/sched.h> 68 #include <sys/sysctl.h> 69 #include <sys/unistd.h> 70 #include <sys/vnode.h> 71 #include <sys/vmmeter.h> 72 73 #include <machine/cpu.h> 74 #include <machine/cputypes.h> 75 #include <machine/md_var.h> 76 #include <machine/pcb.h> 77 #include <machine/pcb_ext.h> 78 #include <machine/smp.h> 79 #include <machine/vm86.h> 80 81 #ifdef CPU_ELAN 82 #include <machine/elan_mmcr.h> 83 #endif 84 85 #include <vm/vm.h> 86 #include <vm/vm_extern.h> 87 #include <vm/vm_kern.h> 88 #include <vm/vm_page.h> 89 #include <vm/vm_map.h> 90 #include <vm/vm_param.h> 91 92 #ifdef PC98 93 #include <pc98/cbus/cbus.h> 94 #else 95 #include <isa/isareg.h> 96 #endif 97 98 #ifdef XBOX 99 #include <machine/xbox.h> 100 #endif 101 102 #ifndef NSFBUFS 103 #define NSFBUFS (512 + maxusers * 16) 104 #endif 105 106 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 107 #define CPU_ENABLE_SSE 108 #endif 109 110 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread), 111 "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread."); 112 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb), 113 "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb."); 114 _Static_assert(__OFFSETOF_MONITORBUF == offsetof(struct pcpu, pc_monitorbuf), 115 "__OFFSETOF_MONINORBUF does not correspond with offset of pc_monitorbuf."); 116 117 static void cpu_reset_real(void); 118 #ifdef SMP 119 static void cpu_reset_proxy(void); 120 static u_int cpu_reset_proxyid; 121 static volatile u_int cpu_reset_proxy_active; 122 #endif 123 124 union savefpu * 125 get_pcb_user_save_td(struct thread *td) 126 { 127 vm_offset_t p; 128 129 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 130 roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN); 131 KASSERT((p % XSAVE_AREA_ALIGN) == 0, ("Unaligned pcb_user_save area")); 132 return ((union savefpu *)p); 133 } 134 135 union savefpu * 136 get_pcb_user_save_pcb(struct pcb *pcb) 137 { 138 vm_offset_t p; 139 140 p = (vm_offset_t)(pcb + 1); 141 return ((union savefpu *)p); 142 } 143 144 struct pcb * 145 get_pcb_td(struct thread *td) 146 { 147 vm_offset_t p; 148 149 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 150 roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN) - 151 sizeof(struct pcb); 152 return ((struct pcb *)p); 153 } 154 155 void * 156 alloc_fpusave(int flags) 157 { 158 void *res; 159 #ifdef CPU_ENABLE_SSE 160 struct savefpu_ymm *sf; 161 #endif 162 163 res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags); 164 #ifdef CPU_ENABLE_SSE 165 if (use_xsave) { 166 sf = (struct savefpu_ymm *)res; 167 bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd)); 168 sf->sv_xstate.sx_hd.xstate_bv = xsave_mask; 169 } 170 #endif 171 return (res); 172 } 173 /* 174 * Finish a fork operation, with process p2 nearly set up. 175 * Copy and update the pcb, set up the stack so that the child 176 * ready to run and return to user mode. 177 */ 178 void 179 cpu_fork(td1, p2, td2, flags) 180 register struct thread *td1; 181 register struct proc *p2; 182 struct thread *td2; 183 int flags; 184 { 185 register struct proc *p1; 186 struct pcb *pcb2; 187 struct mdproc *mdp2; 188 189 p1 = td1->td_proc; 190 if ((flags & RFPROC) == 0) { 191 if ((flags & RFMEM) == 0) { 192 /* unshare user LDT */ 193 struct mdproc *mdp1 = &p1->p_md; 194 struct proc_ldt *pldt, *pldt1; 195 196 mtx_lock_spin(&dt_lock); 197 if ((pldt1 = mdp1->md_ldt) != NULL && 198 pldt1->ldt_refcnt > 1) { 199 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len); 200 if (pldt == NULL) 201 panic("could not copy LDT"); 202 mdp1->md_ldt = pldt; 203 set_user_ldt(mdp1); 204 user_ldt_deref(pldt1); 205 } else 206 mtx_unlock_spin(&dt_lock); 207 } 208 return; 209 } 210 211 /* Ensure that td1's pcb is up to date. */ 212 if (td1 == curthread) 213 td1->td_pcb->pcb_gs = rgs(); 214 #ifdef DEV_NPX 215 critical_enter(); 216 if (PCPU_GET(fpcurthread) == td1) 217 npxsave(td1->td_pcb->pcb_save); 218 critical_exit(); 219 #endif 220 221 /* Point the pcb to the top of the stack */ 222 pcb2 = get_pcb_td(td2); 223 td2->td_pcb = pcb2; 224 225 /* Copy td1's pcb */ 226 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 227 228 /* Properly initialize pcb_save */ 229 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 230 bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2), 231 cpu_max_ext_state_size); 232 233 /* Point mdproc and then copy over td1's contents */ 234 mdp2 = &p2->p_md; 235 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 236 237 /* 238 * Create a new fresh stack for the new process. 239 * Copy the trap frame for the return to user mode as if from a 240 * syscall. This copies most of the user mode register values. 241 * The -16 is so we can expand the trapframe if we go to vm86. 242 */ 243 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 244 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 245 246 td2->td_frame->tf_eax = 0; /* Child returns zero */ 247 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 248 td2->td_frame->tf_edx = 1; 249 250 /* 251 * If the parent process has the trap bit set (i.e. a debugger had 252 * single stepped the process to the system call), we need to clear 253 * the trap flag from the new frame unless the debugger had set PF_FORK 254 * on the parent. Otherwise, the child will receive a (likely 255 * unexpected) SIGTRAP when it executes the first instruction after 256 * returning to userland. 257 */ 258 if ((p1->p_pfsflags & PF_FORK) == 0) 259 td2->td_frame->tf_eflags &= ~PSL_T; 260 261 /* 262 * Set registers for trampoline to user mode. Leave space for the 263 * return address on stack. These are the kernel mode register values. 264 */ 265 #if defined(PAE) || defined(PAE_TABLES) 266 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 267 #else 268 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 269 #endif 270 pcb2->pcb_edi = 0; 271 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 272 pcb2->pcb_ebp = 0; 273 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 274 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 275 pcb2->pcb_eip = (int)fork_trampoline; 276 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 277 /*- 278 * pcb2->pcb_dr*: cloned above. 279 * pcb2->pcb_savefpu: cloned above. 280 * pcb2->pcb_flags: cloned above. 281 * pcb2->pcb_onfault: cloned above (always NULL here?). 282 * pcb2->pcb_gs: cloned above. 283 * pcb2->pcb_ext: cleared below. 284 */ 285 286 /* 287 * XXX don't copy the i/o pages. this should probably be fixed. 288 */ 289 pcb2->pcb_ext = 0; 290 291 /* Copy the LDT, if necessary. */ 292 mtx_lock_spin(&dt_lock); 293 if (mdp2->md_ldt != NULL) { 294 if (flags & RFMEM) { 295 mdp2->md_ldt->ldt_refcnt++; 296 } else { 297 mdp2->md_ldt = user_ldt_alloc(mdp2, 298 mdp2->md_ldt->ldt_len); 299 if (mdp2->md_ldt == NULL) 300 panic("could not copy LDT"); 301 } 302 } 303 mtx_unlock_spin(&dt_lock); 304 305 /* Setup to release spin count in fork_exit(). */ 306 td2->td_md.md_spinlock_count = 1; 307 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 308 309 /* 310 * Now, cpu_switch() can schedule the new process. 311 * pcb_esp is loaded pointing to the cpu_switch() stack frame 312 * containing the return address when exiting cpu_switch. 313 * This will normally be to fork_trampoline(), which will have 314 * %ebx loaded with the new proc's pointer. fork_trampoline() 315 * will set up a stack to call fork_return(p, frame); to complete 316 * the return to user-mode. 317 */ 318 } 319 320 /* 321 * Intercept the return address from a freshly forked process that has NOT 322 * been scheduled yet. 323 * 324 * This is needed to make kernel threads stay in kernel mode. 325 */ 326 void 327 cpu_set_fork_handler(td, func, arg) 328 struct thread *td; 329 void (*func)(void *); 330 void *arg; 331 { 332 /* 333 * Note that the trap frame follows the args, so the function 334 * is really called like this: func(arg, frame); 335 */ 336 td->td_pcb->pcb_esi = (int) func; /* function */ 337 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 338 } 339 340 void 341 cpu_exit(struct thread *td) 342 { 343 344 /* 345 * If this process has a custom LDT, release it. Reset pc->pcb_gs 346 * and %gs before we free it in case they refer to an LDT entry. 347 */ 348 mtx_lock_spin(&dt_lock); 349 if (td->td_proc->p_md.md_ldt) { 350 td->td_pcb->pcb_gs = _udatasel; 351 load_gs(_udatasel); 352 user_ldt_free(td); 353 } else 354 mtx_unlock_spin(&dt_lock); 355 } 356 357 void 358 cpu_thread_exit(struct thread *td) 359 { 360 361 #ifdef DEV_NPX 362 critical_enter(); 363 if (td == PCPU_GET(fpcurthread)) 364 npxdrop(); 365 critical_exit(); 366 #endif 367 368 /* Disable any hardware breakpoints. */ 369 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 370 reset_dbregs(); 371 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 372 } 373 } 374 375 void 376 cpu_thread_clean(struct thread *td) 377 { 378 struct pcb *pcb; 379 380 pcb = td->td_pcb; 381 if (pcb->pcb_ext != NULL) { 382 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 383 /* 384 * XXX do we need to move the TSS off the allocated pages 385 * before freeing them? (not done here) 386 */ 387 kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext, 388 ctob(IOPAGES + 1)); 389 pcb->pcb_ext = NULL; 390 } 391 } 392 393 void 394 cpu_thread_swapin(struct thread *td) 395 { 396 } 397 398 void 399 cpu_thread_swapout(struct thread *td) 400 { 401 } 402 403 void 404 cpu_thread_alloc(struct thread *td) 405 { 406 struct pcb *pcb; 407 #ifdef CPU_ENABLE_SSE 408 struct xstate_hdr *xhdr; 409 #endif 410 411 td->td_pcb = pcb = get_pcb_td(td); 412 td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1; 413 pcb->pcb_ext = NULL; 414 pcb->pcb_save = get_pcb_user_save_pcb(pcb); 415 #ifdef CPU_ENABLE_SSE 416 if (use_xsave) { 417 xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1); 418 bzero(xhdr, sizeof(*xhdr)); 419 xhdr->xstate_bv = xsave_mask; 420 } 421 #endif 422 } 423 424 void 425 cpu_thread_free(struct thread *td) 426 { 427 428 cpu_thread_clean(td); 429 } 430 431 void 432 cpu_set_syscall_retval(struct thread *td, int error) 433 { 434 435 switch (error) { 436 case 0: 437 td->td_frame->tf_eax = td->td_retval[0]; 438 td->td_frame->tf_edx = td->td_retval[1]; 439 td->td_frame->tf_eflags &= ~PSL_C; 440 break; 441 442 case ERESTART: 443 /* 444 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int 445 * 0x80 is 2 bytes. We saved this in tf_err. 446 */ 447 td->td_frame->tf_eip -= td->td_frame->tf_err; 448 break; 449 450 case EJUSTRETURN: 451 break; 452 453 default: 454 if (td->td_proc->p_sysent->sv_errsize) { 455 if (error >= td->td_proc->p_sysent->sv_errsize) 456 error = -1; /* XXX */ 457 else 458 error = td->td_proc->p_sysent->sv_errtbl[error]; 459 } 460 td->td_frame->tf_eax = error; 461 td->td_frame->tf_eflags |= PSL_C; 462 break; 463 } 464 } 465 466 /* 467 * Initialize machine state (pcb and trap frame) for a new thread about to 468 * upcall. Put enough state in the new thread's PCB to get it to go back 469 * userret(), where we can intercept it again to set the return (upcall) 470 * Address and stack, along with those from upcals that are from other sources 471 * such as those generated in thread_userret() itself. 472 */ 473 void 474 cpu_set_upcall(struct thread *td, struct thread *td0) 475 { 476 struct pcb *pcb2; 477 478 /* Point the pcb to the top of the stack. */ 479 pcb2 = td->td_pcb; 480 481 /* 482 * Copy the upcall pcb. This loads kernel regs. 483 * Those not loaded individually below get their default 484 * values here. 485 */ 486 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 487 pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE | 488 PCB_KERNNPX); 489 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 490 bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save, 491 cpu_max_ext_state_size); 492 493 /* 494 * Create a new fresh stack for the new thread. 495 */ 496 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 497 498 /* If the current thread has the trap bit set (i.e. a debugger had 499 * single stepped the process to the system call), we need to clear 500 * the trap flag from the new frame. Otherwise, the new thread will 501 * receive a (likely unexpected) SIGTRAP when it executes the first 502 * instruction after returning to userland. 503 */ 504 td->td_frame->tf_eflags &= ~PSL_T; 505 506 /* 507 * Set registers for trampoline to user mode. Leave space for the 508 * return address on stack. These are the kernel mode register values. 509 */ 510 pcb2->pcb_edi = 0; 511 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 512 pcb2->pcb_ebp = 0; 513 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 514 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 515 pcb2->pcb_eip = (int)fork_trampoline; 516 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 517 pcb2->pcb_gs = rgs(); 518 /* 519 * If we didn't copy the pcb, we'd need to do the following registers: 520 * pcb2->pcb_cr3: cloned above. 521 * pcb2->pcb_dr*: cloned above. 522 * pcb2->pcb_savefpu: cloned above. 523 * pcb2->pcb_flags: cloned above. 524 * pcb2->pcb_onfault: cloned above (always NULL here?). 525 * pcb2->pcb_gs: cloned above. 526 * pcb2->pcb_ext: cleared below. 527 */ 528 pcb2->pcb_ext = NULL; 529 530 /* Setup to release spin count in fork_exit(). */ 531 td->td_md.md_spinlock_count = 1; 532 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 533 } 534 535 /* 536 * Set that machine state for performing an upcall that has to 537 * be done in thread_userret() so that those upcalls generated 538 * in thread_userret() itself can be done as well. 539 */ 540 void 541 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 542 stack_t *stack) 543 { 544 545 /* 546 * Do any extra cleaning that needs to be done. 547 * The thread may have optional components 548 * that are not present in a fresh thread. 549 * This may be a recycled thread so make it look 550 * as though it's newly allocated. 551 */ 552 cpu_thread_clean(td); 553 554 /* 555 * Set the trap frame to point at the beginning of the uts 556 * function. 557 */ 558 td->td_frame->tf_ebp = 0; 559 td->td_frame->tf_esp = 560 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 561 td->td_frame->tf_eip = (int)entry; 562 563 /* 564 * Pass the address of the mailbox for this kse to the uts 565 * function as a parameter on the stack. 566 */ 567 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 568 (int)arg); 569 } 570 571 int 572 cpu_set_user_tls(struct thread *td, void *tls_base) 573 { 574 struct segment_descriptor sd; 575 uint32_t base; 576 577 /* 578 * Construct a descriptor and store it in the pcb for 579 * the next context switch. Also store it in the gdt 580 * so that the load of tf_fs into %fs will activate it 581 * at return to userland. 582 */ 583 base = (uint32_t)tls_base; 584 sd.sd_lobase = base & 0xffffff; 585 sd.sd_hibase = (base >> 24) & 0xff; 586 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 587 sd.sd_hilimit = 0xf; 588 sd.sd_type = SDT_MEMRWA; 589 sd.sd_dpl = SEL_UPL; 590 sd.sd_p = 1; 591 sd.sd_xx = 0; 592 sd.sd_def32 = 1; 593 sd.sd_gran = 1; 594 critical_enter(); 595 /* set %gs */ 596 td->td_pcb->pcb_gsd = sd; 597 if (td == curthread) { 598 PCPU_GET(fsgs_gdt)[1] = sd; 599 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 600 } 601 critical_exit(); 602 return (0); 603 } 604 605 /* 606 * Convert kernel VA to physical address 607 */ 608 vm_paddr_t 609 kvtop(void *addr) 610 { 611 vm_paddr_t pa; 612 613 pa = pmap_kextract((vm_offset_t)addr); 614 if (pa == 0) 615 panic("kvtop: zero page frame"); 616 return (pa); 617 } 618 619 #ifdef SMP 620 static void 621 cpu_reset_proxy() 622 { 623 cpuset_t tcrp; 624 625 cpu_reset_proxy_active = 1; 626 while (cpu_reset_proxy_active == 1) 627 ; /* Wait for other cpu to see that we've started */ 628 CPU_SETOF(cpu_reset_proxyid, &tcrp); 629 stop_cpus(tcrp); 630 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 631 DELAY(1000000); 632 cpu_reset_real(); 633 } 634 #endif 635 636 void 637 cpu_reset() 638 { 639 #ifdef XBOX 640 if (arch_i386_is_xbox) { 641 /* Kick the PIC16L, it can reboot the box */ 642 pic16l_reboot(); 643 for (;;); 644 } 645 #endif 646 647 #ifdef SMP 648 cpuset_t map; 649 u_int cnt; 650 651 if (smp_started) { 652 map = all_cpus; 653 CPU_CLR(PCPU_GET(cpuid), &map); 654 CPU_NAND(&map, &stopped_cpus); 655 if (!CPU_EMPTY(&map)) { 656 printf("cpu_reset: Stopping other CPUs\n"); 657 stop_cpus(map); 658 } 659 660 if (PCPU_GET(cpuid) != 0) { 661 cpu_reset_proxyid = PCPU_GET(cpuid); 662 cpustop_restartfunc = cpu_reset_proxy; 663 cpu_reset_proxy_active = 0; 664 printf("cpu_reset: Restarting BSP\n"); 665 666 /* Restart CPU #0. */ 667 /* XXX: restart_cpus(1 << 0); */ 668 CPU_SETOF(0, &started_cpus); 669 wmb(); 670 671 cnt = 0; 672 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 673 cnt++; /* Wait for BSP to announce restart */ 674 if (cpu_reset_proxy_active == 0) 675 printf("cpu_reset: Failed to restart BSP\n"); 676 enable_intr(); 677 cpu_reset_proxy_active = 2; 678 679 while (1); 680 /* NOTREACHED */ 681 } 682 683 DELAY(1000000); 684 } 685 #endif 686 cpu_reset_real(); 687 /* NOTREACHED */ 688 } 689 690 static void 691 cpu_reset_real() 692 { 693 struct region_descriptor null_idt; 694 #ifndef PC98 695 int b; 696 #endif 697 698 disable_intr(); 699 #ifdef CPU_ELAN 700 if (elan_mmcr != NULL) 701 elan_mmcr->RESCFG = 1; 702 #endif 703 704 if (cpu == CPU_GEODE1100) { 705 /* Attempt Geode's own reset */ 706 outl(0xcf8, 0x80009044ul); 707 outl(0xcfc, 0xf); 708 } 709 710 #ifdef PC98 711 /* 712 * Attempt to do a CPU reset via CPU reset port. 713 */ 714 if ((inb(0x35) & 0xa0) != 0xa0) { 715 outb(0x37, 0x0f); /* SHUT0 = 0. */ 716 outb(0x37, 0x0b); /* SHUT1 = 0. */ 717 } 718 outb(0xf0, 0x00); /* Reset. */ 719 #else 720 #if !defined(BROKEN_KEYBOARD_RESET) 721 /* 722 * Attempt to do a CPU reset via the keyboard controller, 723 * do not turn off GateA20, as any machine that fails 724 * to do the reset here would then end up in no man's land. 725 */ 726 outb(IO_KBD + 4, 0xFE); 727 DELAY(500000); /* wait 0.5 sec to see if that did it */ 728 #endif 729 730 /* 731 * Attempt to force a reset via the Reset Control register at 732 * I/O port 0xcf9. Bit 2 forces a system reset when it 733 * transitions from 0 to 1. Bit 1 selects the type of reset 734 * to attempt: 0 selects a "soft" reset, and 1 selects a 735 * "hard" reset. We try a "hard" reset. The first write sets 736 * bit 1 to select a "hard" reset and clears bit 2. The 737 * second write forces a 0 -> 1 transition in bit 2 to trigger 738 * a reset. 739 */ 740 outb(0xcf9, 0x2); 741 outb(0xcf9, 0x6); 742 DELAY(500000); /* wait 0.5 sec to see if that did it */ 743 744 /* 745 * Attempt to force a reset via the Fast A20 and Init register 746 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 747 * Bit 0 asserts INIT# when set to 1. We are careful to only 748 * preserve bit 1 while setting bit 0. We also must clear bit 749 * 0 before setting it if it isn't already clear. 750 */ 751 b = inb(0x92); 752 if (b != 0xff) { 753 if ((b & 0x1) != 0) 754 outb(0x92, b & 0xfe); 755 outb(0x92, b | 0x1); 756 DELAY(500000); /* wait 0.5 sec to see if that did it */ 757 } 758 #endif /* PC98 */ 759 760 printf("No known reset method worked, attempting CPU shutdown\n"); 761 DELAY(1000000); /* wait 1 sec for printf to complete */ 762 763 /* Wipe the IDT. */ 764 null_idt.rd_limit = 0; 765 null_idt.rd_base = 0; 766 lidt(&null_idt); 767 768 /* "good night, sweet prince .... <THUNK!>" */ 769 breakpoint(); 770 771 /* NOTREACHED */ 772 while(1); 773 } 774 775 /* 776 * Get an sf_buf from the freelist. May block if none are available. 777 */ 778 void 779 sf_buf_map(struct sf_buf *sf, int flags) 780 { 781 pt_entry_t opte, *ptep; 782 783 /* 784 * Update the sf_buf's virtual-to-physical mapping, flushing the 785 * virtual address from the TLB. Since the reference count for 786 * the sf_buf's old mapping was zero, that mapping is not 787 * currently in use. Consequently, there is no need to exchange 788 * the old and new PTEs atomically, even under PAE. 789 */ 790 ptep = vtopte(sf->kva); 791 opte = *ptep; 792 *ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V | 793 pmap_cache_bits(sf->m->md.pat_mode, 0); 794 795 /* 796 * Avoid unnecessary TLB invalidations: If the sf_buf's old 797 * virtual-to-physical mapping was not used, then any processor 798 * that has invalidated the sf_buf's virtual address from its TLB 799 * since the last used mapping need not invalidate again. 800 */ 801 #ifdef SMP 802 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 803 CPU_ZERO(&sf->cpumask); 804 805 sf_buf_shootdown(sf, flags); 806 #else 807 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 808 pmap_invalidate_page(kernel_pmap, sf->kva); 809 #endif 810 } 811 812 #ifdef SMP 813 void 814 sf_buf_shootdown(struct sf_buf *sf, int flags) 815 { 816 cpuset_t other_cpus; 817 u_int cpuid; 818 819 sched_pin(); 820 cpuid = PCPU_GET(cpuid); 821 if (!CPU_ISSET(cpuid, &sf->cpumask)) { 822 CPU_SET(cpuid, &sf->cpumask); 823 invlpg(sf->kva); 824 } 825 if ((flags & SFB_CPUPRIVATE) == 0) { 826 other_cpus = all_cpus; 827 CPU_CLR(cpuid, &other_cpus); 828 CPU_NAND(&other_cpus, &sf->cpumask); 829 if (!CPU_EMPTY(&other_cpus)) { 830 CPU_OR(&sf->cpumask, &other_cpus); 831 smp_masked_invlpg(other_cpus, sf->kva); 832 } 833 } 834 sched_unpin(); 835 } 836 #endif 837 838 /* 839 * MD part of sf_buf_free(). 840 */ 841 int 842 sf_buf_unmap(struct sf_buf *sf) 843 { 844 845 return (0); 846 } 847 848 static void 849 sf_buf_invalidate(struct sf_buf *sf) 850 { 851 vm_page_t m = sf->m; 852 853 /* 854 * Use pmap_qenter to update the pte for 855 * existing mapping, in particular, the PAT 856 * settings are recalculated. 857 */ 858 pmap_qenter(sf->kva, &m, 1); 859 pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE); 860 } 861 862 /* 863 * Invalidate the cache lines that may belong to the page, if 864 * (possibly old) mapping of the page by sf buffer exists. Returns 865 * TRUE when mapping was found and cache invalidated. 866 */ 867 boolean_t 868 sf_buf_invalidate_cache(vm_page_t m) 869 { 870 871 return (sf_buf_process_page(m, sf_buf_invalidate)); 872 } 873 874 /* 875 * Software interrupt handler for queued VM system processing. 876 */ 877 void 878 swi_vm(void *dummy) 879 { 880 if (busdma_swi_pending != 0) 881 busdma_swi(); 882 } 883 884 /* 885 * Tell whether this address is in some physical memory region. 886 * Currently used by the kernel coredump code in order to avoid 887 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 888 * or other unpredictable behaviour. 889 */ 890 891 int 892 is_physical_memory(vm_paddr_t addr) 893 { 894 895 #ifdef DEV_ISA 896 /* The ISA ``memory hole''. */ 897 if (addr >= 0xa0000 && addr < 0x100000) 898 return 0; 899 #endif 900 901 /* 902 * stuff other tests for known memory-mapped devices (PCI?) 903 * here 904 */ 905 906 return 1; 907 } 908