1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kse.h> 57 #include <sys/kernel.h> 58 #include <sys/ktr.h> 59 #include <sys/lock.h> 60 #include <sys/malloc.h> 61 #include <sys/mbuf.h> 62 #include <sys/mutex.h> 63 #include <sys/pioctl.h> 64 #include <sys/proc.h> 65 #include <sys/sf_buf.h> 66 #include <sys/smp.h> 67 #include <sys/sched.h> 68 #include <sys/sysctl.h> 69 #include <sys/unistd.h> 70 #include <sys/vnode.h> 71 #include <sys/vmmeter.h> 72 73 #include <machine/cpu.h> 74 #include <machine/cputypes.h> 75 #include <machine/md_var.h> 76 #include <machine/pcb.h> 77 #include <machine/pcb_ext.h> 78 #include <machine/smp.h> 79 #include <machine/vm86.h> 80 81 #ifdef CPU_ELAN 82 #include <machine/elan_mmcr.h> 83 #endif 84 85 #include <vm/vm.h> 86 #include <vm/vm_extern.h> 87 #include <vm/vm_kern.h> 88 #include <vm/vm_page.h> 89 #include <vm/vm_map.h> 90 #include <vm/vm_param.h> 91 92 #ifdef PC98 93 #include <pc98/cbus/cbus.h> 94 #else 95 #include <i386/isa/isa.h> 96 #endif 97 98 #ifdef XBOX 99 #include <machine/xbox.h> 100 #endif 101 102 #ifndef NSFBUFS 103 #define NSFBUFS (512 + maxusers * 16) 104 #endif 105 106 static void cpu_reset_real(void); 107 #ifdef SMP 108 static void cpu_reset_proxy(void); 109 static u_int cpu_reset_proxyid; 110 static volatile u_int cpu_reset_proxy_active; 111 #endif 112 static void sf_buf_init(void *arg); 113 SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL) 114 115 LIST_HEAD(sf_head, sf_buf); 116 117 /* 118 * A hash table of active sendfile(2) buffers 119 */ 120 static struct sf_head *sf_buf_active; 121 static u_long sf_buf_hashmask; 122 123 #define SF_BUF_HASH(m) (((m) - vm_page_array) & sf_buf_hashmask) 124 125 static TAILQ_HEAD(, sf_buf) sf_buf_freelist; 126 static u_int sf_buf_alloc_want; 127 128 /* 129 * A lock used to synchronize access to the hash table and free list 130 */ 131 static struct mtx sf_buf_lock; 132 133 extern int _ucodesel, _udatasel; 134 135 /* 136 * Finish a fork operation, with process p2 nearly set up. 137 * Copy and update the pcb, set up the stack so that the child 138 * ready to run and return to user mode. 139 */ 140 void 141 cpu_fork(td1, p2, td2, flags) 142 register struct thread *td1; 143 register struct proc *p2; 144 struct thread *td2; 145 int flags; 146 { 147 register struct proc *p1; 148 struct pcb *pcb2; 149 struct mdproc *mdp2; 150 #ifdef DEV_NPX 151 register_t savecrit; 152 #endif 153 154 p1 = td1->td_proc; 155 if ((flags & RFPROC) == 0) { 156 if ((flags & RFMEM) == 0) { 157 /* unshare user LDT */ 158 struct mdproc *mdp1 = &p1->p_md; 159 struct proc_ldt *pldt; 160 161 pldt = mdp1->md_ldt; 162 if (pldt && pldt->ldt_refcnt > 1) { 163 pldt = user_ldt_alloc(mdp1, pldt->ldt_len); 164 if (pldt == NULL) 165 panic("could not copy LDT"); 166 mdp1->md_ldt = pldt; 167 set_user_ldt(mdp1); 168 user_ldt_free(td1); 169 } 170 } 171 return; 172 } 173 174 /* Ensure that p1's pcb is up to date. */ 175 if (td1 == curthread) 176 td1->td_pcb->pcb_gs = rgs(); 177 #ifdef DEV_NPX 178 savecrit = intr_disable(); 179 if (PCPU_GET(fpcurthread) == td1) 180 npxsave(&td1->td_pcb->pcb_save); 181 intr_restore(savecrit); 182 #endif 183 184 /* Point the pcb to the top of the stack */ 185 pcb2 = (struct pcb *)(td2->td_kstack + 186 td2->td_kstack_pages * PAGE_SIZE) - 1; 187 td2->td_pcb = pcb2; 188 189 /* Copy p1's pcb */ 190 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 191 192 /* Point mdproc and then copy over td1's contents */ 193 mdp2 = &p2->p_md; 194 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 195 196 /* 197 * Create a new fresh stack for the new process. 198 * Copy the trap frame for the return to user mode as if from a 199 * syscall. This copies most of the user mode register values. 200 * The -16 is so we can expand the trapframe if we go to vm86. 201 */ 202 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 203 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 204 205 td2->td_frame->tf_eax = 0; /* Child returns zero */ 206 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 207 td2->td_frame->tf_edx = 1; 208 209 /* 210 * If the parent process has the trap bit set (i.e. a debugger had 211 * single stepped the process to the system call), we need to clear 212 * the trap flag from the new frame unless the debugger had set PF_FORK 213 * on the parent. Otherwise, the child will receive a (likely 214 * unexpected) SIGTRAP when it executes the first instruction after 215 * returning to userland. 216 */ 217 if ((p1->p_pfsflags & PF_FORK) == 0) 218 td2->td_frame->tf_eflags &= ~PSL_T; 219 220 /* 221 * Set registers for trampoline to user mode. Leave space for the 222 * return address on stack. These are the kernel mode register values. 223 */ 224 #ifdef PAE 225 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 226 #else 227 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 228 #endif 229 pcb2->pcb_edi = 0; 230 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 231 pcb2->pcb_ebp = 0; 232 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 233 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 234 pcb2->pcb_eip = (int)fork_trampoline; 235 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 236 /*- 237 * pcb2->pcb_dr*: cloned above. 238 * pcb2->pcb_savefpu: cloned above. 239 * pcb2->pcb_flags: cloned above. 240 * pcb2->pcb_onfault: cloned above (always NULL here?). 241 * pcb2->pcb_gs: cloned above. 242 * pcb2->pcb_ext: cleared below. 243 */ 244 245 /* 246 * XXX don't copy the i/o pages. this should probably be fixed. 247 */ 248 pcb2->pcb_ext = 0; 249 250 /* Copy the LDT, if necessary. */ 251 mtx_lock_spin(&sched_lock); 252 if (mdp2->md_ldt != NULL) { 253 if (flags & RFMEM) { 254 mdp2->md_ldt->ldt_refcnt++; 255 } else { 256 mdp2->md_ldt = user_ldt_alloc(mdp2, 257 mdp2->md_ldt->ldt_len); 258 if (mdp2->md_ldt == NULL) 259 panic("could not copy LDT"); 260 } 261 } 262 mtx_unlock_spin(&sched_lock); 263 264 /* Setup to release sched_lock in fork_exit(). */ 265 td2->td_md.md_spinlock_count = 1; 266 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 267 268 /* 269 * Now, cpu_switch() can schedule the new process. 270 * pcb_esp is loaded pointing to the cpu_switch() stack frame 271 * containing the return address when exiting cpu_switch. 272 * This will normally be to fork_trampoline(), which will have 273 * %ebx loaded with the new proc's pointer. fork_trampoline() 274 * will set up a stack to call fork_return(p, frame); to complete 275 * the return to user-mode. 276 */ 277 } 278 279 /* 280 * Intercept the return address from a freshly forked process that has NOT 281 * been scheduled yet. 282 * 283 * This is needed to make kernel threads stay in kernel mode. 284 */ 285 void 286 cpu_set_fork_handler(td, func, arg) 287 struct thread *td; 288 void (*func)(void *); 289 void *arg; 290 { 291 /* 292 * Note that the trap frame follows the args, so the function 293 * is really called like this: func(arg, frame); 294 */ 295 td->td_pcb->pcb_esi = (int) func; /* function */ 296 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 297 } 298 299 void 300 cpu_exit(struct thread *td) 301 { 302 303 /* 304 * If this process has a custom LDT, release it. Reset pc->pcb_gs 305 * and %gs before we free it in case they refer to an LDT entry. 306 */ 307 if (td->td_proc->p_md.md_ldt) { 308 td->td_pcb->pcb_gs = _udatasel; 309 load_gs(_udatasel); 310 user_ldt_free(td); 311 } 312 } 313 314 void 315 cpu_thread_exit(struct thread *td) 316 { 317 318 #ifdef DEV_NPX 319 if (td == PCPU_GET(fpcurthread)) 320 npxdrop(); 321 #endif 322 323 /* Disable any hardware breakpoints. */ 324 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 325 reset_dbregs(); 326 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 327 } 328 } 329 330 void 331 cpu_thread_clean(struct thread *td) 332 { 333 struct pcb *pcb; 334 335 pcb = td->td_pcb; 336 if (pcb->pcb_ext != NULL) { 337 /* XXXKSE XXXSMP not SMP SAFE.. what locks do we have? */ 338 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 339 /* 340 * XXX do we need to move the TSS off the allocated pages 341 * before freeing them? (not done here) 342 */ 343 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ext, 344 ctob(IOPAGES + 1)); 345 pcb->pcb_ext = NULL; 346 } 347 } 348 349 void 350 cpu_thread_swapin(struct thread *td) 351 { 352 } 353 354 void 355 cpu_thread_swapout(struct thread *td) 356 { 357 } 358 359 void 360 cpu_thread_setup(struct thread *td) 361 { 362 363 td->td_pcb = (struct pcb *)(td->td_kstack + 364 td->td_kstack_pages * PAGE_SIZE) - 1; 365 td->td_frame = (struct trapframe *)((caddr_t)td->td_pcb - 16) - 1; 366 td->td_pcb->pcb_ext = NULL; 367 } 368 369 /* 370 * Initialize machine state (pcb and trap frame) for a new thread about to 371 * upcall. Put enough state in the new thread's PCB to get it to go back 372 * userret(), where we can intercept it again to set the return (upcall) 373 * Address and stack, along with those from upcals that are from other sources 374 * such as those generated in thread_userret() itself. 375 */ 376 void 377 cpu_set_upcall(struct thread *td, struct thread *td0) 378 { 379 struct pcb *pcb2; 380 381 /* Point the pcb to the top of the stack. */ 382 pcb2 = td->td_pcb; 383 384 /* 385 * Copy the upcall pcb. This loads kernel regs. 386 * Those not loaded individually below get their default 387 * values here. 388 * 389 * XXXKSE It might be a good idea to simply skip this as 390 * the values of the other registers may be unimportant. 391 * This would remove any requirement for knowing the KSE 392 * at this time (see the matching comment below for 393 * more analysis) (need a good safe default). 394 */ 395 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 396 pcb2->pcb_flags &= ~(PCB_NPXTRAP|PCB_NPXINITDONE); 397 398 /* 399 * Create a new fresh stack for the new thread. 400 * The -16 is so we can expand the trapframe if we go to vm86. 401 * Don't forget to set this stack value into whatever supplies 402 * the address for the fault handlers. 403 * The contexts are filled in at the time we actually DO the 404 * upcall as only then do we know which KSE we got. 405 */ 406 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 407 408 /* 409 * Set registers for trampoline to user mode. Leave space for the 410 * return address on stack. These are the kernel mode register values. 411 */ 412 #ifdef PAE 413 pcb2->pcb_cr3 = vtophys(vmspace_pmap(td->td_proc->p_vmspace)->pm_pdpt); 414 #else 415 pcb2->pcb_cr3 = vtophys(vmspace_pmap(td->td_proc->p_vmspace)->pm_pdir); 416 #endif 417 pcb2->pcb_edi = 0; 418 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 419 pcb2->pcb_ebp = 0; 420 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 421 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 422 pcb2->pcb_eip = (int)fork_trampoline; 423 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 424 pcb2->pcb_gs = rgs(); 425 /* 426 * If we didn't copy the pcb, we'd need to do the following registers: 427 * pcb2->pcb_dr*: cloned above. 428 * pcb2->pcb_savefpu: cloned above. 429 * pcb2->pcb_flags: cloned above. 430 * pcb2->pcb_onfault: cloned above (always NULL here?). 431 * pcb2->pcb_gs: cloned above. XXXKSE ??? 432 * pcb2->pcb_ext: cleared below. 433 */ 434 pcb2->pcb_ext = NULL; 435 436 /* Setup to release sched_lock in fork_exit(). */ 437 td->td_md.md_spinlock_count = 1; 438 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 439 } 440 441 /* 442 * Set that machine state for performing an upcall that has to 443 * be done in thread_userret() so that those upcalls generated 444 * in thread_userret() itself can be done as well. 445 */ 446 void 447 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 448 stack_t *stack) 449 { 450 451 /* 452 * Do any extra cleaning that needs to be done. 453 * The thread may have optional components 454 * that are not present in a fresh thread. 455 * This may be a recycled thread so make it look 456 * as though it's newly allocated. 457 */ 458 cpu_thread_clean(td); 459 460 /* 461 * Set the trap frame to point at the beginning of the uts 462 * function. 463 */ 464 td->td_frame->tf_ebp = 0; 465 td->td_frame->tf_esp = 466 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 467 td->td_frame->tf_eip = (int)entry; 468 469 /* 470 * Pass the address of the mailbox for this kse to the uts 471 * function as a parameter on the stack. 472 */ 473 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 474 (int)arg); 475 } 476 477 int 478 cpu_set_user_tls(struct thread *td, void *tls_base) 479 { 480 struct segment_descriptor sd; 481 uint32_t base; 482 483 /* 484 * Construct a descriptor and store it in the pcb for 485 * the next context switch. Also store it in the gdt 486 * so that the load of tf_fs into %fs will activate it 487 * at return to userland. 488 */ 489 base = (uint32_t)tls_base; 490 sd.sd_lobase = base & 0xffffff; 491 sd.sd_hibase = (base >> 24) & 0xff; 492 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 493 sd.sd_hilimit = 0xf; 494 sd.sd_type = SDT_MEMRWA; 495 sd.sd_dpl = SEL_UPL; 496 sd.sd_p = 1; 497 sd.sd_xx = 0; 498 sd.sd_def32 = 1; 499 sd.sd_gran = 1; 500 critical_enter(); 501 /* set %gs */ 502 td->td_pcb->pcb_gsd = sd; 503 if (td == curthread) { 504 PCPU_GET(fsgs_gdt)[1] = sd; 505 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 506 } 507 critical_exit(); 508 return (0); 509 } 510 511 /* 512 * Convert kernel VA to physical address 513 */ 514 vm_paddr_t 515 kvtop(void *addr) 516 { 517 vm_paddr_t pa; 518 519 pa = pmap_kextract((vm_offset_t)addr); 520 if (pa == 0) 521 panic("kvtop: zero page frame"); 522 return (pa); 523 } 524 525 #ifdef SMP 526 static void 527 cpu_reset_proxy() 528 { 529 530 cpu_reset_proxy_active = 1; 531 while (cpu_reset_proxy_active == 1) 532 ; /* Wait for other cpu to see that we've started */ 533 stop_cpus((1<<cpu_reset_proxyid)); 534 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 535 DELAY(1000000); 536 cpu_reset_real(); 537 } 538 #endif 539 540 void 541 cpu_reset() 542 { 543 #ifdef XBOX 544 if (arch_i386_is_xbox) { 545 /* Kick the PIC16L, it can reboot the box */ 546 pic16l_reboot(); 547 for (;;); 548 } 549 #endif 550 551 #ifdef SMP 552 u_int cnt, map; 553 554 if (smp_active) { 555 map = PCPU_GET(other_cpus) & ~stopped_cpus; 556 if (map != 0) { 557 printf("cpu_reset: Stopping other CPUs\n"); 558 stop_cpus(map); 559 } 560 561 if (PCPU_GET(cpuid) != 0) { 562 cpu_reset_proxyid = PCPU_GET(cpuid); 563 cpustop_restartfunc = cpu_reset_proxy; 564 cpu_reset_proxy_active = 0; 565 printf("cpu_reset: Restarting BSP\n"); 566 567 /* Restart CPU #0. */ 568 /* XXX: restart_cpus(1 << 0); */ 569 atomic_store_rel_int(&started_cpus, (1 << 0)); 570 571 cnt = 0; 572 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 573 cnt++; /* Wait for BSP to announce restart */ 574 if (cpu_reset_proxy_active == 0) 575 printf("cpu_reset: Failed to restart BSP\n"); 576 enable_intr(); 577 cpu_reset_proxy_active = 2; 578 579 while (1); 580 /* NOTREACHED */ 581 } 582 583 DELAY(1000000); 584 } 585 #endif 586 cpu_reset_real(); 587 /* NOTREACHED */ 588 } 589 590 static void 591 cpu_reset_real() 592 { 593 #ifndef PC98 594 int b; 595 #endif 596 597 disable_intr(); 598 #ifdef CPU_ELAN 599 if (elan_mmcr != NULL) 600 elan_mmcr->RESCFG = 1; 601 #endif 602 603 if (cpu == CPU_GEODE1100) { 604 /* Attempt Geode's own reset */ 605 outl(0xcf8, 0x80009044ul); 606 outl(0xcfc, 0xf); 607 } 608 609 #ifdef PC98 610 /* 611 * Attempt to do a CPU reset via CPU reset port. 612 */ 613 if ((inb(0x35) & 0xa0) != 0xa0) { 614 outb(0x37, 0x0f); /* SHUT0 = 0. */ 615 outb(0x37, 0x0b); /* SHUT1 = 0. */ 616 } 617 outb(0xf0, 0x00); /* Reset. */ 618 #else 619 #if !defined(BROKEN_KEYBOARD_RESET) 620 /* 621 * Attempt to do a CPU reset via the keyboard controller, 622 * do not turn off GateA20, as any machine that fails 623 * to do the reset here would then end up in no man's land. 624 */ 625 outb(IO_KBD + 4, 0xFE); 626 DELAY(500000); /* wait 0.5 sec to see if that did it */ 627 #endif 628 /* Try the PCI reset */ 629 outb(0xcf9, 0x2); 630 outb(0xcf9, 0x6); 631 DELAY(500000); /* wait 0.5 sec to see if that did it */ 632 633 /* Try port 0x92 fast reset */ 634 b = inb(0x92); 635 /* Check the the hardware actually has the port in question */ 636 if (b != 0xff) { 637 if ((b & 0x1) != 0) 638 outb(0x92, b & 0xfe); 639 outb(0x92, b | 0x1); 640 DELAY(500000); /* wait 0.5 sec to see if that did it */ 641 } 642 #endif /* PC98 */ 643 644 printf("No known reset method did work, attempting CPU shutdown\n"); 645 DELAY(1000000); /* wait 1 sec for printf to complete */ 646 647 /* Force a shutdown by unmapping entire address space. */ 648 bzero((caddr_t)PTD, NBPTD); 649 650 /* "good night, sweet prince .... <THUNK!>" */ 651 invltlb(); 652 /* NOTREACHED */ 653 while(1); 654 } 655 656 /* 657 * Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-)) 658 */ 659 static void 660 sf_buf_init(void *arg) 661 { 662 struct sf_buf *sf_bufs; 663 vm_offset_t sf_base; 664 int i; 665 666 nsfbufs = NSFBUFS; 667 TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs); 668 669 sf_buf_active = hashinit(nsfbufs, M_TEMP, &sf_buf_hashmask); 670 TAILQ_INIT(&sf_buf_freelist); 671 sf_base = kmem_alloc_nofault(kernel_map, nsfbufs * PAGE_SIZE); 672 sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP, 673 M_NOWAIT | M_ZERO); 674 for (i = 0; i < nsfbufs; i++) { 675 sf_bufs[i].kva = sf_base + i * PAGE_SIZE; 676 TAILQ_INSERT_TAIL(&sf_buf_freelist, &sf_bufs[i], free_entry); 677 } 678 sf_buf_alloc_want = 0; 679 mtx_init(&sf_buf_lock, "sf_buf", NULL, MTX_DEF); 680 } 681 682 /* 683 * Get an sf_buf from the freelist. Will block if none are available. 684 */ 685 struct sf_buf * 686 sf_buf_alloc(struct vm_page *m, int flags) 687 { 688 pt_entry_t opte, *ptep; 689 struct sf_head *hash_list; 690 struct sf_buf *sf; 691 #ifdef SMP 692 cpumask_t cpumask, other_cpus; 693 #endif 694 int error; 695 696 KASSERT(curthread->td_pinned > 0 || (flags & SFB_CPUPRIVATE) == 0, 697 ("sf_buf_alloc(SFB_CPUPRIVATE): curthread not pinned")); 698 hash_list = &sf_buf_active[SF_BUF_HASH(m)]; 699 mtx_lock(&sf_buf_lock); 700 LIST_FOREACH(sf, hash_list, list_entry) { 701 if (sf->m == m) { 702 sf->ref_count++; 703 if (sf->ref_count == 1) { 704 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 705 nsfbufsused++; 706 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 707 } 708 #ifdef SMP 709 goto shootdown; 710 #else 711 goto done; 712 #endif 713 } 714 } 715 while ((sf = TAILQ_FIRST(&sf_buf_freelist)) == NULL) { 716 if (flags & SFB_NOWAIT) 717 goto done; 718 sf_buf_alloc_want++; 719 mbstat.sf_allocwait++; 720 error = msleep(&sf_buf_freelist, &sf_buf_lock, 721 (flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0); 722 sf_buf_alloc_want--; 723 724 /* 725 * If we got a signal, don't risk going back to sleep. 726 */ 727 if (error) 728 goto done; 729 } 730 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 731 if (sf->m != NULL) 732 LIST_REMOVE(sf, list_entry); 733 LIST_INSERT_HEAD(hash_list, sf, list_entry); 734 sf->ref_count = 1; 735 sf->m = m; 736 nsfbufsused++; 737 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 738 739 /* 740 * Update the sf_buf's virtual-to-physical mapping, flushing the 741 * virtual address from the TLB. Since the reference count for 742 * the sf_buf's old mapping was zero, that mapping is not 743 * currently in use. Consequently, there is no need to exchange 744 * the old and new PTEs atomically, even under PAE. 745 */ 746 ptep = vtopte(sf->kva); 747 opte = *ptep; 748 *ptep = VM_PAGE_TO_PHYS(m) | pgeflag | PG_RW | PG_V; 749 750 /* 751 * Avoid unnecessary TLB invalidations: If the sf_buf's old 752 * virtual-to-physical mapping was not used, then any processor 753 * that has invalidated the sf_buf's virtual address from its TLB 754 * since the last used mapping need not invalidate again. 755 */ 756 #ifdef SMP 757 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 758 sf->cpumask = 0; 759 shootdown: 760 sched_pin(); 761 cpumask = PCPU_GET(cpumask); 762 if ((sf->cpumask & cpumask) == 0) { 763 sf->cpumask |= cpumask; 764 invlpg(sf->kva); 765 } 766 if ((flags & SFB_CPUPRIVATE) == 0) { 767 other_cpus = PCPU_GET(other_cpus) & ~sf->cpumask; 768 if (other_cpus != 0) { 769 sf->cpumask |= other_cpus; 770 mtx_lock_spin(&smp_ipi_mtx); 771 smp_masked_invlpg(other_cpus, sf->kva); 772 mtx_unlock_spin(&smp_ipi_mtx); 773 } 774 } 775 sched_unpin(); 776 #else 777 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 778 pmap_invalidate_page(kernel_pmap, sf->kva); 779 #endif 780 done: 781 mtx_unlock(&sf_buf_lock); 782 return (sf); 783 } 784 785 /* 786 * Remove a reference from the given sf_buf, adding it to the free 787 * list when its reference count reaches zero. A freed sf_buf still, 788 * however, retains its virtual-to-physical mapping until it is 789 * recycled or reactivated by sf_buf_alloc(9). 790 */ 791 void 792 sf_buf_free(struct sf_buf *sf) 793 { 794 795 mtx_lock(&sf_buf_lock); 796 sf->ref_count--; 797 if (sf->ref_count == 0) { 798 TAILQ_INSERT_TAIL(&sf_buf_freelist, sf, free_entry); 799 nsfbufsused--; 800 if (sf_buf_alloc_want > 0) 801 wakeup_one(&sf_buf_freelist); 802 } 803 mtx_unlock(&sf_buf_lock); 804 } 805 806 /* 807 * Software interrupt handler for queued VM system processing. 808 */ 809 void 810 swi_vm(void *dummy) 811 { 812 if (busdma_swi_pending != 0) 813 busdma_swi(); 814 } 815 816 /* 817 * Tell whether this address is in some physical memory region. 818 * Currently used by the kernel coredump code in order to avoid 819 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 820 * or other unpredictable behaviour. 821 */ 822 823 int 824 is_physical_memory(vm_paddr_t addr) 825 { 826 827 #ifdef DEV_ISA 828 /* The ISA ``memory hole''. */ 829 if (addr >= 0xa0000 && addr < 0x100000) 830 return 0; 831 #endif 832 833 /* 834 * stuff other tests for known memory-mapped devices (PCI?) 835 * here 836 */ 837 838 return 1; 839 } 840