1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/lock.h> 59 #include <sys/malloc.h> 60 #include <sys/mbuf.h> 61 #include <sys/mutex.h> 62 #include <sys/pioctl.h> 63 #include <sys/proc.h> 64 #include <sys/sf_buf.h> 65 #include <sys/smp.h> 66 #include <sys/sched.h> 67 #include <sys/sysctl.h> 68 #include <sys/unistd.h> 69 #include <sys/vnode.h> 70 #include <sys/vmmeter.h> 71 72 #include <machine/cpu.h> 73 #include <machine/cputypes.h> 74 #include <machine/md_var.h> 75 #include <machine/pcb.h> 76 #include <machine/pcb_ext.h> 77 #include <machine/smp.h> 78 #include <machine/vm86.h> 79 80 #ifdef CPU_ELAN 81 #include <machine/elan_mmcr.h> 82 #endif 83 84 #include <vm/vm.h> 85 #include <vm/vm_extern.h> 86 #include <vm/vm_kern.h> 87 #include <vm/vm_page.h> 88 #include <vm/vm_map.h> 89 #include <vm/vm_param.h> 90 91 #ifdef XEN 92 #include <xen/hypervisor.h> 93 #endif 94 #ifdef PC98 95 #include <pc98/cbus/cbus.h> 96 #else 97 #include <i386/isa/isa.h> 98 #endif 99 100 #ifdef XBOX 101 #include <machine/xbox.h> 102 #endif 103 104 #ifndef NSFBUFS 105 #define NSFBUFS (512 + maxusers * 16) 106 #endif 107 108 static void cpu_reset_real(void); 109 #ifdef SMP 110 static void cpu_reset_proxy(void); 111 static u_int cpu_reset_proxyid; 112 static volatile u_int cpu_reset_proxy_active; 113 #endif 114 static void sf_buf_init(void *arg); 115 SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL); 116 117 LIST_HEAD(sf_head, sf_buf); 118 119 /* 120 * A hash table of active sendfile(2) buffers 121 */ 122 static struct sf_head *sf_buf_active; 123 static u_long sf_buf_hashmask; 124 125 #define SF_BUF_HASH(m) (((m) - vm_page_array) & sf_buf_hashmask) 126 127 static TAILQ_HEAD(, sf_buf) sf_buf_freelist; 128 static u_int sf_buf_alloc_want; 129 130 /* 131 * A lock used to synchronize access to the hash table and free list 132 */ 133 static struct mtx sf_buf_lock; 134 135 extern int _ucodesel, _udatasel; 136 137 /* 138 * Finish a fork operation, with process p2 nearly set up. 139 * Copy and update the pcb, set up the stack so that the child 140 * ready to run and return to user mode. 141 */ 142 void 143 cpu_fork(td1, p2, td2, flags) 144 register struct thread *td1; 145 register struct proc *p2; 146 struct thread *td2; 147 int flags; 148 { 149 register struct proc *p1; 150 struct pcb *pcb2; 151 struct mdproc *mdp2; 152 #ifdef DEV_NPX 153 register_t savecrit; 154 #endif 155 156 p1 = td1->td_proc; 157 if ((flags & RFPROC) == 0) { 158 if ((flags & RFMEM) == 0) { 159 /* unshare user LDT */ 160 struct mdproc *mdp1 = &p1->p_md; 161 struct proc_ldt *pldt, *pldt1; 162 163 mtx_lock_spin(&dt_lock); 164 if ((pldt1 = mdp1->md_ldt) != NULL && 165 pldt1->ldt_refcnt > 1) { 166 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len); 167 if (pldt == NULL) 168 panic("could not copy LDT"); 169 mdp1->md_ldt = pldt; 170 set_user_ldt(mdp1); 171 user_ldt_deref(pldt1); 172 } else 173 mtx_unlock_spin(&dt_lock); 174 } 175 return; 176 } 177 178 /* Ensure that p1's pcb is up to date. */ 179 if (td1 == curthread) 180 td1->td_pcb->pcb_gs = rgs(); 181 #ifdef DEV_NPX 182 savecrit = intr_disable(); 183 if (PCPU_GET(fpcurthread) == td1) 184 npxsave(&td1->td_pcb->pcb_save); 185 intr_restore(savecrit); 186 #endif 187 188 /* Point the pcb to the top of the stack */ 189 pcb2 = (struct pcb *)(td2->td_kstack + 190 td2->td_kstack_pages * PAGE_SIZE) - 1; 191 td2->td_pcb = pcb2; 192 193 /* Copy p1's pcb */ 194 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 195 196 /* Point mdproc and then copy over td1's contents */ 197 mdp2 = &p2->p_md; 198 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 199 200 /* 201 * Create a new fresh stack for the new process. 202 * Copy the trap frame for the return to user mode as if from a 203 * syscall. This copies most of the user mode register values. 204 * The -16 is so we can expand the trapframe if we go to vm86. 205 */ 206 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 207 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 208 209 td2->td_frame->tf_eax = 0; /* Child returns zero */ 210 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 211 td2->td_frame->tf_edx = 1; 212 213 /* 214 * If the parent process has the trap bit set (i.e. a debugger had 215 * single stepped the process to the system call), we need to clear 216 * the trap flag from the new frame unless the debugger had set PF_FORK 217 * on the parent. Otherwise, the child will receive a (likely 218 * unexpected) SIGTRAP when it executes the first instruction after 219 * returning to userland. 220 */ 221 if ((p1->p_pfsflags & PF_FORK) == 0) 222 td2->td_frame->tf_eflags &= ~PSL_T; 223 224 /* 225 * Set registers for trampoline to user mode. Leave space for the 226 * return address on stack. These are the kernel mode register values. 227 */ 228 #ifdef PAE 229 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 230 #else 231 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 232 #endif 233 pcb2->pcb_edi = 0; 234 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 235 pcb2->pcb_ebp = 0; 236 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 237 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 238 pcb2->pcb_eip = (int)fork_trampoline; 239 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 240 /*- 241 * pcb2->pcb_dr*: cloned above. 242 * pcb2->pcb_savefpu: cloned above. 243 * pcb2->pcb_flags: cloned above. 244 * pcb2->pcb_onfault: cloned above (always NULL here?). 245 * pcb2->pcb_gs: cloned above. 246 * pcb2->pcb_ext: cleared below. 247 */ 248 249 /* 250 * XXX don't copy the i/o pages. this should probably be fixed. 251 */ 252 pcb2->pcb_ext = 0; 253 254 /* Copy the LDT, if necessary. */ 255 mtx_lock_spin(&dt_lock); 256 if (mdp2->md_ldt != NULL) { 257 if (flags & RFMEM) { 258 mdp2->md_ldt->ldt_refcnt++; 259 } else { 260 mdp2->md_ldt = user_ldt_alloc(mdp2, 261 mdp2->md_ldt->ldt_len); 262 if (mdp2->md_ldt == NULL) 263 panic("could not copy LDT"); 264 } 265 } 266 mtx_unlock_spin(&dt_lock); 267 268 /* Setup to release spin count in fork_exit(). */ 269 td2->td_md.md_spinlock_count = 1; 270 /* 271 * XXX XEN need to check on PSL_USER is handled 272 */ 273 #ifdef XEN 274 td2->td_md.md_saved_flags = 0; 275 #else 276 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 277 #endif 278 /* 279 * Now, cpu_switch() can schedule the new process. 280 * pcb_esp is loaded pointing to the cpu_switch() stack frame 281 * containing the return address when exiting cpu_switch. 282 * This will normally be to fork_trampoline(), which will have 283 * %ebx loaded with the new proc's pointer. fork_trampoline() 284 * will set up a stack to call fork_return(p, frame); to complete 285 * the return to user-mode. 286 */ 287 } 288 289 /* 290 * Intercept the return address from a freshly forked process that has NOT 291 * been scheduled yet. 292 * 293 * This is needed to make kernel threads stay in kernel mode. 294 */ 295 void 296 cpu_set_fork_handler(td, func, arg) 297 struct thread *td; 298 void (*func)(void *); 299 void *arg; 300 { 301 /* 302 * Note that the trap frame follows the args, so the function 303 * is really called like this: func(arg, frame); 304 */ 305 td->td_pcb->pcb_esi = (int) func; /* function */ 306 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 307 } 308 309 void 310 cpu_exit(struct thread *td) 311 { 312 313 /* 314 * If this process has a custom LDT, release it. Reset pc->pcb_gs 315 * and %gs before we free it in case they refer to an LDT entry. 316 */ 317 mtx_lock_spin(&dt_lock); 318 if (td->td_proc->p_md.md_ldt) { 319 td->td_pcb->pcb_gs = _udatasel; 320 load_gs(_udatasel); 321 user_ldt_free(td); 322 } else 323 mtx_unlock_spin(&dt_lock); 324 } 325 326 void 327 cpu_thread_exit(struct thread *td) 328 { 329 330 #ifdef DEV_NPX 331 if (td == PCPU_GET(fpcurthread)) 332 npxdrop(); 333 #endif 334 335 /* Disable any hardware breakpoints. */ 336 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 337 reset_dbregs(); 338 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 339 } 340 } 341 342 void 343 cpu_thread_clean(struct thread *td) 344 { 345 struct pcb *pcb; 346 347 pcb = td->td_pcb; 348 if (pcb->pcb_ext != NULL) { 349 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 350 /* 351 * XXX do we need to move the TSS off the allocated pages 352 * before freeing them? (not done here) 353 */ 354 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ext, 355 ctob(IOPAGES + 1)); 356 pcb->pcb_ext = NULL; 357 } 358 } 359 360 void 361 cpu_thread_swapin(struct thread *td) 362 { 363 } 364 365 void 366 cpu_thread_swapout(struct thread *td) 367 { 368 } 369 370 void 371 cpu_thread_alloc(struct thread *td) 372 { 373 374 td->td_pcb = (struct pcb *)(td->td_kstack + 375 td->td_kstack_pages * PAGE_SIZE) - 1; 376 td->td_frame = (struct trapframe *)((caddr_t)td->td_pcb - 16) - 1; 377 td->td_pcb->pcb_ext = NULL; 378 } 379 380 void 381 cpu_thread_free(struct thread *td) 382 { 383 384 cpu_thread_clean(td); 385 } 386 387 /* 388 * Initialize machine state (pcb and trap frame) for a new thread about to 389 * upcall. Put enough state in the new thread's PCB to get it to go back 390 * userret(), where we can intercept it again to set the return (upcall) 391 * Address and stack, along with those from upcals that are from other sources 392 * such as those generated in thread_userret() itself. 393 */ 394 void 395 cpu_set_upcall(struct thread *td, struct thread *td0) 396 { 397 struct pcb *pcb2; 398 399 /* Point the pcb to the top of the stack. */ 400 pcb2 = td->td_pcb; 401 402 /* 403 * Copy the upcall pcb. This loads kernel regs. 404 * Those not loaded individually below get their default 405 * values here. 406 */ 407 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 408 pcb2->pcb_flags &= ~(PCB_NPXTRAP|PCB_NPXINITDONE); 409 410 /* 411 * Create a new fresh stack for the new thread. 412 */ 413 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 414 415 /* If the current thread has the trap bit set (i.e. a debugger had 416 * single stepped the process to the system call), we need to clear 417 * the trap flag from the new frame. Otherwise, the new thread will 418 * receive a (likely unexpected) SIGTRAP when it executes the first 419 * instruction after returning to userland. 420 */ 421 td->td_frame->tf_eflags &= ~PSL_T; 422 423 /* 424 * Set registers for trampoline to user mode. Leave space for the 425 * return address on stack. These are the kernel mode register values. 426 */ 427 pcb2->pcb_edi = 0; 428 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 429 pcb2->pcb_ebp = 0; 430 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 431 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 432 pcb2->pcb_eip = (int)fork_trampoline; 433 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 434 pcb2->pcb_gs = rgs(); 435 /* 436 * If we didn't copy the pcb, we'd need to do the following registers: 437 * pcb2->pcb_cr3: cloned above. 438 * pcb2->pcb_dr*: cloned above. 439 * pcb2->pcb_savefpu: cloned above. 440 * pcb2->pcb_flags: cloned above. 441 * pcb2->pcb_onfault: cloned above (always NULL here?). 442 * pcb2->pcb_gs: cloned above. 443 * pcb2->pcb_ext: cleared below. 444 */ 445 pcb2->pcb_ext = NULL; 446 447 /* Setup to release spin count in fork_exit(). */ 448 td->td_md.md_spinlock_count = 1; 449 #ifdef XEN 450 td->td_md.md_saved_flags = 0; 451 #else 452 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 453 #endif 454 } 455 456 /* 457 * Set that machine state for performing an upcall that has to 458 * be done in thread_userret() so that those upcalls generated 459 * in thread_userret() itself can be done as well. 460 */ 461 void 462 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 463 stack_t *stack) 464 { 465 466 /* 467 * Do any extra cleaning that needs to be done. 468 * The thread may have optional components 469 * that are not present in a fresh thread. 470 * This may be a recycled thread so make it look 471 * as though it's newly allocated. 472 */ 473 cpu_thread_clean(td); 474 475 /* 476 * Set the trap frame to point at the beginning of the uts 477 * function. 478 */ 479 td->td_frame->tf_ebp = 0; 480 td->td_frame->tf_esp = 481 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 482 td->td_frame->tf_eip = (int)entry; 483 484 /* 485 * Pass the address of the mailbox for this kse to the uts 486 * function as a parameter on the stack. 487 */ 488 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 489 (int)arg); 490 } 491 492 int 493 cpu_set_user_tls(struct thread *td, void *tls_base) 494 { 495 struct segment_descriptor sd; 496 uint32_t base; 497 498 /* 499 * Construct a descriptor and store it in the pcb for 500 * the next context switch. Also store it in the gdt 501 * so that the load of tf_fs into %fs will activate it 502 * at return to userland. 503 */ 504 base = (uint32_t)tls_base; 505 sd.sd_lobase = base & 0xffffff; 506 sd.sd_hibase = (base >> 24) & 0xff; 507 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 508 sd.sd_hilimit = 0xf; 509 sd.sd_type = SDT_MEMRWA; 510 sd.sd_dpl = SEL_UPL; 511 sd.sd_p = 1; 512 sd.sd_xx = 0; 513 sd.sd_def32 = 1; 514 sd.sd_gran = 1; 515 critical_enter(); 516 /* set %gs */ 517 td->td_pcb->pcb_gsd = sd; 518 if (td == curthread) { 519 PCPU_GET(fsgs_gdt)[1] = sd; 520 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 521 } 522 critical_exit(); 523 return (0); 524 } 525 526 /* 527 * Convert kernel VA to physical address 528 */ 529 vm_paddr_t 530 kvtop(void *addr) 531 { 532 vm_paddr_t pa; 533 534 pa = pmap_kextract((vm_offset_t)addr); 535 if (pa == 0) 536 panic("kvtop: zero page frame"); 537 return (pa); 538 } 539 540 #ifdef SMP 541 static void 542 cpu_reset_proxy() 543 { 544 545 cpu_reset_proxy_active = 1; 546 while (cpu_reset_proxy_active == 1) 547 ; /* Wait for other cpu to see that we've started */ 548 stop_cpus((1<<cpu_reset_proxyid)); 549 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 550 DELAY(1000000); 551 cpu_reset_real(); 552 } 553 #endif 554 555 void 556 cpu_reset() 557 { 558 #ifdef XBOX 559 if (arch_i386_is_xbox) { 560 /* Kick the PIC16L, it can reboot the box */ 561 pic16l_reboot(); 562 for (;;); 563 } 564 #endif 565 566 #ifdef SMP 567 u_int cnt, map; 568 569 if (smp_active) { 570 map = PCPU_GET(other_cpus) & ~stopped_cpus; 571 if (map != 0) { 572 printf("cpu_reset: Stopping other CPUs\n"); 573 stop_cpus(map); 574 } 575 576 if (PCPU_GET(cpuid) != 0) { 577 cpu_reset_proxyid = PCPU_GET(cpuid); 578 cpustop_restartfunc = cpu_reset_proxy; 579 cpu_reset_proxy_active = 0; 580 printf("cpu_reset: Restarting BSP\n"); 581 582 /* Restart CPU #0. */ 583 /* XXX: restart_cpus(1 << 0); */ 584 atomic_store_rel_int(&started_cpus, (1 << 0)); 585 586 cnt = 0; 587 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 588 cnt++; /* Wait for BSP to announce restart */ 589 if (cpu_reset_proxy_active == 0) 590 printf("cpu_reset: Failed to restart BSP\n"); 591 enable_intr(); 592 cpu_reset_proxy_active = 2; 593 594 while (1); 595 /* NOTREACHED */ 596 } 597 598 DELAY(1000000); 599 } 600 #endif 601 cpu_reset_real(); 602 /* NOTREACHED */ 603 } 604 605 static void 606 cpu_reset_real() 607 { 608 struct region_descriptor null_idt; 609 #ifndef PC98 610 int b; 611 #endif 612 613 disable_intr(); 614 #ifdef XEN 615 if (smp_processor_id() == 0) 616 HYPERVISOR_shutdown(SHUTDOWN_reboot); 617 else 618 HYPERVISOR_shutdown(SHUTDOWN_poweroff); 619 #endif 620 #ifdef CPU_ELAN 621 if (elan_mmcr != NULL) 622 elan_mmcr->RESCFG = 1; 623 #endif 624 625 if (cpu == CPU_GEODE1100) { 626 /* Attempt Geode's own reset */ 627 outl(0xcf8, 0x80009044ul); 628 outl(0xcfc, 0xf); 629 } 630 631 #ifdef PC98 632 /* 633 * Attempt to do a CPU reset via CPU reset port. 634 */ 635 if ((inb(0x35) & 0xa0) != 0xa0) { 636 outb(0x37, 0x0f); /* SHUT0 = 0. */ 637 outb(0x37, 0x0b); /* SHUT1 = 0. */ 638 } 639 outb(0xf0, 0x00); /* Reset. */ 640 #else 641 #if !defined(BROKEN_KEYBOARD_RESET) 642 /* 643 * Attempt to do a CPU reset via the keyboard controller, 644 * do not turn off GateA20, as any machine that fails 645 * to do the reset here would then end up in no man's land. 646 */ 647 outb(IO_KBD + 4, 0xFE); 648 DELAY(500000); /* wait 0.5 sec to see if that did it */ 649 #endif 650 651 /* 652 * Attempt to force a reset via the Reset Control register at 653 * I/O port 0xcf9. Bit 2 forces a system reset when it 654 * transitions from 0 to 1. Bit 1 selects the type of reset 655 * to attempt: 0 selects a "soft" reset, and 1 selects a 656 * "hard" reset. We try a "hard" reset. The first write sets 657 * bit 1 to select a "hard" reset and clears bit 2. The 658 * second write forces a 0 -> 1 transition in bit 2 to trigger 659 * a reset. 660 */ 661 outb(0xcf9, 0x2); 662 outb(0xcf9, 0x6); 663 DELAY(500000); /* wait 0.5 sec to see if that did it */ 664 665 /* 666 * Attempt to force a reset via the Fast A20 and Init register 667 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 668 * Bit 0 asserts INIT# when set to 1. We are careful to only 669 * preserve bit 1 while setting bit 0. We also must clear bit 670 * 0 before setting it if it isn't already clear. 671 */ 672 b = inb(0x92); 673 if (b != 0xff) { 674 if ((b & 0x1) != 0) 675 outb(0x92, b & 0xfe); 676 outb(0x92, b | 0x1); 677 DELAY(500000); /* wait 0.5 sec to see if that did it */ 678 } 679 #endif /* PC98 */ 680 681 printf("No known reset method worked, attempting CPU shutdown\n"); 682 DELAY(1000000); /* wait 1 sec for printf to complete */ 683 684 /* Wipe the IDT. */ 685 null_idt.rd_limit = 0; 686 null_idt.rd_base = 0; 687 lidt(&null_idt); 688 689 /* "good night, sweet prince .... <THUNK!>" */ 690 breakpoint(); 691 692 /* NOTREACHED */ 693 while(1); 694 } 695 696 /* 697 * Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-)) 698 */ 699 static void 700 sf_buf_init(void *arg) 701 { 702 struct sf_buf *sf_bufs; 703 vm_offset_t sf_base; 704 int i; 705 706 nsfbufs = NSFBUFS; 707 TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs); 708 709 sf_buf_active = hashinit(nsfbufs, M_TEMP, &sf_buf_hashmask); 710 TAILQ_INIT(&sf_buf_freelist); 711 sf_base = kmem_alloc_nofault(kernel_map, nsfbufs * PAGE_SIZE); 712 sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP, 713 M_NOWAIT | M_ZERO); 714 for (i = 0; i < nsfbufs; i++) { 715 sf_bufs[i].kva = sf_base + i * PAGE_SIZE; 716 TAILQ_INSERT_TAIL(&sf_buf_freelist, &sf_bufs[i], free_entry); 717 } 718 sf_buf_alloc_want = 0; 719 mtx_init(&sf_buf_lock, "sf_buf", NULL, MTX_DEF); 720 } 721 722 /* 723 * Invalidate the cache lines that may belong to the page, if 724 * (possibly old) mapping of the page by sf buffer exists. Returns 725 * TRUE when mapping was found and cache invalidated. 726 */ 727 boolean_t 728 sf_buf_invalidate_cache(vm_page_t m) 729 { 730 struct sf_head *hash_list; 731 struct sf_buf *sf; 732 boolean_t ret; 733 734 hash_list = &sf_buf_active[SF_BUF_HASH(m)]; 735 ret = FALSE; 736 mtx_lock(&sf_buf_lock); 737 LIST_FOREACH(sf, hash_list, list_entry) { 738 if (sf->m == m) { 739 /* 740 * Use pmap_qenter to update the pte for 741 * existing mapping, in particular, the PAT 742 * settings are recalculated. 743 */ 744 pmap_qenter(sf->kva, &m, 1); 745 pmap_invalidate_cache_range(sf->kva, sf->kva + 746 PAGE_SIZE); 747 ret = TRUE; 748 break; 749 } 750 } 751 mtx_unlock(&sf_buf_lock); 752 return (ret); 753 } 754 755 /* 756 * Get an sf_buf from the freelist. May block if none are available. 757 */ 758 struct sf_buf * 759 sf_buf_alloc(struct vm_page *m, int flags) 760 { 761 pt_entry_t opte, *ptep; 762 struct sf_head *hash_list; 763 struct sf_buf *sf; 764 #ifdef SMP 765 cpumask_t cpumask, other_cpus; 766 #endif 767 int error; 768 769 KASSERT(curthread->td_pinned > 0 || (flags & SFB_CPUPRIVATE) == 0, 770 ("sf_buf_alloc(SFB_CPUPRIVATE): curthread not pinned")); 771 hash_list = &sf_buf_active[SF_BUF_HASH(m)]; 772 mtx_lock(&sf_buf_lock); 773 LIST_FOREACH(sf, hash_list, list_entry) { 774 if (sf->m == m) { 775 sf->ref_count++; 776 if (sf->ref_count == 1) { 777 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 778 nsfbufsused++; 779 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 780 } 781 #ifdef SMP 782 goto shootdown; 783 #else 784 goto done; 785 #endif 786 } 787 } 788 while ((sf = TAILQ_FIRST(&sf_buf_freelist)) == NULL) { 789 if (flags & SFB_NOWAIT) 790 goto done; 791 sf_buf_alloc_want++; 792 mbstat.sf_allocwait++; 793 error = msleep(&sf_buf_freelist, &sf_buf_lock, 794 (flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0); 795 sf_buf_alloc_want--; 796 797 /* 798 * If we got a signal, don't risk going back to sleep. 799 */ 800 if (error) 801 goto done; 802 } 803 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 804 if (sf->m != NULL) 805 LIST_REMOVE(sf, list_entry); 806 LIST_INSERT_HEAD(hash_list, sf, list_entry); 807 sf->ref_count = 1; 808 sf->m = m; 809 nsfbufsused++; 810 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 811 812 /* 813 * Update the sf_buf's virtual-to-physical mapping, flushing the 814 * virtual address from the TLB. Since the reference count for 815 * the sf_buf's old mapping was zero, that mapping is not 816 * currently in use. Consequently, there is no need to exchange 817 * the old and new PTEs atomically, even under PAE. 818 */ 819 ptep = vtopte(sf->kva); 820 opte = *ptep; 821 #ifdef XEN 822 PT_SET_MA(sf->kva, xpmap_ptom(VM_PAGE_TO_PHYS(m)) | pgeflag 823 | PG_RW | PG_V | pmap_cache_bits(m->md.pat_mode, 0)); 824 #else 825 *ptep = VM_PAGE_TO_PHYS(m) | pgeflag | PG_RW | PG_V | 826 pmap_cache_bits(m->md.pat_mode, 0); 827 #endif 828 829 /* 830 * Avoid unnecessary TLB invalidations: If the sf_buf's old 831 * virtual-to-physical mapping was not used, then any processor 832 * that has invalidated the sf_buf's virtual address from its TLB 833 * since the last used mapping need not invalidate again. 834 */ 835 #ifdef SMP 836 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 837 sf->cpumask = 0; 838 shootdown: 839 sched_pin(); 840 cpumask = PCPU_GET(cpumask); 841 if ((sf->cpumask & cpumask) == 0) { 842 sf->cpumask |= cpumask; 843 invlpg(sf->kva); 844 } 845 if ((flags & SFB_CPUPRIVATE) == 0) { 846 other_cpus = PCPU_GET(other_cpus) & ~sf->cpumask; 847 if (other_cpus != 0) { 848 sf->cpumask |= other_cpus; 849 smp_masked_invlpg(other_cpus, sf->kva); 850 } 851 } 852 sched_unpin(); 853 #else 854 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 855 pmap_invalidate_page(kernel_pmap, sf->kva); 856 #endif 857 done: 858 mtx_unlock(&sf_buf_lock); 859 return (sf); 860 } 861 862 /* 863 * Remove a reference from the given sf_buf, adding it to the free 864 * list when its reference count reaches zero. A freed sf_buf still, 865 * however, retains its virtual-to-physical mapping until it is 866 * recycled or reactivated by sf_buf_alloc(9). 867 */ 868 void 869 sf_buf_free(struct sf_buf *sf) 870 { 871 872 mtx_lock(&sf_buf_lock); 873 sf->ref_count--; 874 if (sf->ref_count == 0) { 875 TAILQ_INSERT_TAIL(&sf_buf_freelist, sf, free_entry); 876 nsfbufsused--; 877 #ifdef XEN 878 /* 879 * Xen doesn't like having dangling R/W mappings 880 */ 881 pmap_qremove(sf->kva, 1); 882 sf->m = NULL; 883 LIST_REMOVE(sf, list_entry); 884 #endif 885 if (sf_buf_alloc_want > 0) 886 wakeup_one(&sf_buf_freelist); 887 } 888 mtx_unlock(&sf_buf_lock); 889 } 890 891 /* 892 * Software interrupt handler for queued VM system processing. 893 */ 894 void 895 swi_vm(void *dummy) 896 { 897 if (busdma_swi_pending != 0) 898 busdma_swi(); 899 } 900 901 /* 902 * Tell whether this address is in some physical memory region. 903 * Currently used by the kernel coredump code in order to avoid 904 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 905 * or other unpredictable behaviour. 906 */ 907 908 int 909 is_physical_memory(vm_paddr_t addr) 910 { 911 912 #ifdef DEV_ISA 913 /* The ISA ``memory hole''. */ 914 if (addr >= 0xa0000 && addr < 0x100000) 915 return 0; 916 #endif 917 918 /* 919 * stuff other tests for known memory-mapped devices (PCI?) 920 * here 921 */ 922 923 return 1; 924 } 925