1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/lock.h> 59 #include <sys/malloc.h> 60 #include <sys/mbuf.h> 61 #include <sys/mutex.h> 62 #include <sys/pioctl.h> 63 #include <sys/proc.h> 64 #include <sys/sysent.h> 65 #include <sys/sf_buf.h> 66 #include <sys/smp.h> 67 #include <sys/sched.h> 68 #include <sys/sysctl.h> 69 #include <sys/unistd.h> 70 #include <sys/vnode.h> 71 #include <sys/vmmeter.h> 72 73 #include <machine/cpu.h> 74 #include <machine/cputypes.h> 75 #include <machine/md_var.h> 76 #include <machine/pcb.h> 77 #include <machine/pcb_ext.h> 78 #include <machine/smp.h> 79 #include <machine/vm86.h> 80 81 #ifdef CPU_ELAN 82 #include <machine/elan_mmcr.h> 83 #endif 84 85 #include <vm/vm.h> 86 #include <vm/vm_extern.h> 87 #include <vm/vm_kern.h> 88 #include <vm/vm_page.h> 89 #include <vm/vm_map.h> 90 #include <vm/vm_param.h> 91 92 #include <isa/isareg.h> 93 94 #ifdef XBOX 95 #include <machine/xbox.h> 96 #endif 97 98 #ifndef NSFBUFS 99 #define NSFBUFS (512 + maxusers * 16) 100 #endif 101 102 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread), 103 "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread."); 104 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb), 105 "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb."); 106 _Static_assert(__OFFSETOF_MONITORBUF == offsetof(struct pcpu, pc_monitorbuf), 107 "__OFFSETOF_MONINORBUF does not correspond with offset of pc_monitorbuf."); 108 109 static void cpu_reset_real(void); 110 #ifdef SMP 111 static void cpu_reset_proxy(void); 112 static u_int cpu_reset_proxyid; 113 static volatile u_int cpu_reset_proxy_active; 114 #endif 115 116 union savefpu * 117 get_pcb_user_save_td(struct thread *td) 118 { 119 vm_offset_t p; 120 121 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 122 roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN); 123 KASSERT((p % XSAVE_AREA_ALIGN) == 0, ("Unaligned pcb_user_save area")); 124 return ((union savefpu *)p); 125 } 126 127 union savefpu * 128 get_pcb_user_save_pcb(struct pcb *pcb) 129 { 130 vm_offset_t p; 131 132 p = (vm_offset_t)(pcb + 1); 133 return ((union savefpu *)p); 134 } 135 136 struct pcb * 137 get_pcb_td(struct thread *td) 138 { 139 vm_offset_t p; 140 141 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 142 roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN) - 143 sizeof(struct pcb); 144 return ((struct pcb *)p); 145 } 146 147 void * 148 alloc_fpusave(int flags) 149 { 150 void *res; 151 struct savefpu_ymm *sf; 152 153 res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags); 154 if (use_xsave) { 155 sf = (struct savefpu_ymm *)res; 156 bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd)); 157 sf->sv_xstate.sx_hd.xstate_bv = xsave_mask; 158 } 159 return (res); 160 } 161 /* 162 * Finish a fork operation, with process p2 nearly set up. 163 * Copy and update the pcb, set up the stack so that the child 164 * ready to run and return to user mode. 165 */ 166 void 167 cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags) 168 { 169 register struct proc *p1; 170 struct pcb *pcb2; 171 struct mdproc *mdp2; 172 173 p1 = td1->td_proc; 174 if ((flags & RFPROC) == 0) { 175 if ((flags & RFMEM) == 0) { 176 /* unshare user LDT */ 177 struct mdproc *mdp1 = &p1->p_md; 178 struct proc_ldt *pldt, *pldt1; 179 180 mtx_lock_spin(&dt_lock); 181 if ((pldt1 = mdp1->md_ldt) != NULL && 182 pldt1->ldt_refcnt > 1) { 183 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len); 184 if (pldt == NULL) 185 panic("could not copy LDT"); 186 mdp1->md_ldt = pldt; 187 set_user_ldt(mdp1); 188 user_ldt_deref(pldt1); 189 } else 190 mtx_unlock_spin(&dt_lock); 191 } 192 return; 193 } 194 195 /* Ensure that td1's pcb is up to date. */ 196 if (td1 == curthread) 197 td1->td_pcb->pcb_gs = rgs(); 198 critical_enter(); 199 if (PCPU_GET(fpcurthread) == td1) 200 npxsave(td1->td_pcb->pcb_save); 201 critical_exit(); 202 203 /* Point the pcb to the top of the stack */ 204 pcb2 = get_pcb_td(td2); 205 td2->td_pcb = pcb2; 206 207 /* Copy td1's pcb */ 208 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 209 210 /* Properly initialize pcb_save */ 211 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 212 bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2), 213 cpu_max_ext_state_size); 214 215 /* Point mdproc and then copy over td1's contents */ 216 mdp2 = &p2->p_md; 217 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 218 219 /* 220 * Create a new fresh stack for the new process. 221 * Copy the trap frame for the return to user mode as if from a 222 * syscall. This copies most of the user mode register values. 223 * The -16 is so we can expand the trapframe if we go to vm86. 224 */ 225 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 226 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 227 228 td2->td_frame->tf_eax = 0; /* Child returns zero */ 229 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 230 td2->td_frame->tf_edx = 1; 231 232 /* 233 * If the parent process has the trap bit set (i.e. a debugger had 234 * single stepped the process to the system call), we need to clear 235 * the trap flag from the new frame unless the debugger had set PF_FORK 236 * on the parent. Otherwise, the child will receive a (likely 237 * unexpected) SIGTRAP when it executes the first instruction after 238 * returning to userland. 239 */ 240 if ((p1->p_pfsflags & PF_FORK) == 0) 241 td2->td_frame->tf_eflags &= ~PSL_T; 242 243 /* 244 * Set registers for trampoline to user mode. Leave space for the 245 * return address on stack. These are the kernel mode register values. 246 */ 247 #if defined(PAE) || defined(PAE_TABLES) 248 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 249 #else 250 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 251 #endif 252 pcb2->pcb_edi = 0; 253 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 254 pcb2->pcb_ebp = 0; 255 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 256 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 257 pcb2->pcb_eip = (int)fork_trampoline; 258 /*- 259 * pcb2->pcb_dr*: cloned above. 260 * pcb2->pcb_savefpu: cloned above. 261 * pcb2->pcb_flags: cloned above. 262 * pcb2->pcb_onfault: cloned above (always NULL here?). 263 * pcb2->pcb_gs: cloned above. 264 * pcb2->pcb_ext: cleared below. 265 */ 266 267 /* 268 * XXX don't copy the i/o pages. this should probably be fixed. 269 */ 270 pcb2->pcb_ext = 0; 271 272 /* Copy the LDT, if necessary. */ 273 mtx_lock_spin(&dt_lock); 274 if (mdp2->md_ldt != NULL) { 275 if (flags & RFMEM) { 276 mdp2->md_ldt->ldt_refcnt++; 277 } else { 278 mdp2->md_ldt = user_ldt_alloc(mdp2, 279 mdp2->md_ldt->ldt_len); 280 if (mdp2->md_ldt == NULL) 281 panic("could not copy LDT"); 282 } 283 } 284 mtx_unlock_spin(&dt_lock); 285 286 /* Setup to release spin count in fork_exit(). */ 287 td2->td_md.md_spinlock_count = 1; 288 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 289 290 /* 291 * Now, cpu_switch() can schedule the new process. 292 * pcb_esp is loaded pointing to the cpu_switch() stack frame 293 * containing the return address when exiting cpu_switch. 294 * This will normally be to fork_trampoline(), which will have 295 * %ebx loaded with the new proc's pointer. fork_trampoline() 296 * will set up a stack to call fork_return(p, frame); to complete 297 * the return to user-mode. 298 */ 299 } 300 301 /* 302 * Intercept the return address from a freshly forked process that has NOT 303 * been scheduled yet. 304 * 305 * This is needed to make kernel threads stay in kernel mode. 306 */ 307 void 308 cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg) 309 { 310 /* 311 * Note that the trap frame follows the args, so the function 312 * is really called like this: func(arg, frame); 313 */ 314 td->td_pcb->pcb_esi = (int) func; /* function */ 315 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 316 } 317 318 void 319 cpu_exit(struct thread *td) 320 { 321 322 /* 323 * If this process has a custom LDT, release it. Reset pc->pcb_gs 324 * and %gs before we free it in case they refer to an LDT entry. 325 */ 326 mtx_lock_spin(&dt_lock); 327 if (td->td_proc->p_md.md_ldt) { 328 td->td_pcb->pcb_gs = _udatasel; 329 load_gs(_udatasel); 330 user_ldt_free(td); 331 } else 332 mtx_unlock_spin(&dt_lock); 333 } 334 335 void 336 cpu_thread_exit(struct thread *td) 337 { 338 339 critical_enter(); 340 if (td == PCPU_GET(fpcurthread)) 341 npxdrop(); 342 critical_exit(); 343 344 /* Disable any hardware breakpoints. */ 345 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 346 reset_dbregs(); 347 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 348 } 349 } 350 351 void 352 cpu_thread_clean(struct thread *td) 353 { 354 struct pcb *pcb; 355 356 pcb = td->td_pcb; 357 if (pcb->pcb_ext != NULL) { 358 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 359 /* 360 * XXX do we need to move the TSS off the allocated pages 361 * before freeing them? (not done here) 362 */ 363 kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext, 364 ctob(IOPAGES + 1)); 365 pcb->pcb_ext = NULL; 366 } 367 } 368 369 void 370 cpu_thread_swapin(struct thread *td) 371 { 372 } 373 374 void 375 cpu_thread_swapout(struct thread *td) 376 { 377 } 378 379 void 380 cpu_thread_alloc(struct thread *td) 381 { 382 struct pcb *pcb; 383 struct xstate_hdr *xhdr; 384 385 td->td_pcb = pcb = get_pcb_td(td); 386 td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1; 387 pcb->pcb_ext = NULL; 388 pcb->pcb_save = get_pcb_user_save_pcb(pcb); 389 if (use_xsave) { 390 xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1); 391 bzero(xhdr, sizeof(*xhdr)); 392 xhdr->xstate_bv = xsave_mask; 393 } 394 } 395 396 void 397 cpu_thread_free(struct thread *td) 398 { 399 400 cpu_thread_clean(td); 401 } 402 403 void 404 cpu_set_syscall_retval(struct thread *td, int error) 405 { 406 407 switch (error) { 408 case 0: 409 td->td_frame->tf_eax = td->td_retval[0]; 410 td->td_frame->tf_edx = td->td_retval[1]; 411 td->td_frame->tf_eflags &= ~PSL_C; 412 break; 413 414 case ERESTART: 415 /* 416 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int 417 * 0x80 is 2 bytes. We saved this in tf_err. 418 */ 419 td->td_frame->tf_eip -= td->td_frame->tf_err; 420 break; 421 422 case EJUSTRETURN: 423 break; 424 425 default: 426 td->td_frame->tf_eax = SV_ABI_ERRNO(td->td_proc, error); 427 td->td_frame->tf_eflags |= PSL_C; 428 break; 429 } 430 } 431 432 /* 433 * Initialize machine state, mostly pcb and trap frame for a new 434 * thread, about to return to userspace. Put enough state in the new 435 * thread's PCB to get it to go back to the fork_return(), which 436 * finalizes the thread state and handles peculiarities of the first 437 * return to userspace for the new thread. 438 */ 439 void 440 cpu_copy_thread(struct thread *td, struct thread *td0) 441 { 442 struct pcb *pcb2; 443 444 /* Point the pcb to the top of the stack. */ 445 pcb2 = td->td_pcb; 446 447 /* 448 * Copy the upcall pcb. This loads kernel regs. 449 * Those not loaded individually below get their default 450 * values here. 451 */ 452 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 453 pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE | 454 PCB_KERNNPX); 455 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2); 456 bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save, 457 cpu_max_ext_state_size); 458 459 /* 460 * Create a new fresh stack for the new thread. 461 */ 462 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 463 464 /* If the current thread has the trap bit set (i.e. a debugger had 465 * single stepped the process to the system call), we need to clear 466 * the trap flag from the new frame. Otherwise, the new thread will 467 * receive a (likely unexpected) SIGTRAP when it executes the first 468 * instruction after returning to userland. 469 */ 470 td->td_frame->tf_eflags &= ~PSL_T; 471 472 /* 473 * Set registers for trampoline to user mode. Leave space for the 474 * return address on stack. These are the kernel mode register values. 475 */ 476 pcb2->pcb_edi = 0; 477 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 478 pcb2->pcb_ebp = 0; 479 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 480 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 481 pcb2->pcb_eip = (int)fork_trampoline; 482 pcb2->pcb_gs = rgs(); 483 /* 484 * If we didn't copy the pcb, we'd need to do the following registers: 485 * pcb2->pcb_cr3: cloned above. 486 * pcb2->pcb_dr*: cloned above. 487 * pcb2->pcb_savefpu: cloned above. 488 * pcb2->pcb_flags: cloned above. 489 * pcb2->pcb_onfault: cloned above (always NULL here?). 490 * pcb2->pcb_gs: cloned above. 491 * pcb2->pcb_ext: cleared below. 492 */ 493 pcb2->pcb_ext = NULL; 494 495 /* Setup to release spin count in fork_exit(). */ 496 td->td_md.md_spinlock_count = 1; 497 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 498 } 499 500 /* 501 * Set that machine state for performing an upcall that starts 502 * the entry function with the given argument. 503 */ 504 void 505 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg, 506 stack_t *stack) 507 { 508 509 /* 510 * Do any extra cleaning that needs to be done. 511 * The thread may have optional components 512 * that are not present in a fresh thread. 513 * This may be a recycled thread so make it look 514 * as though it's newly allocated. 515 */ 516 cpu_thread_clean(td); 517 518 /* 519 * Set the trap frame to point at the beginning of the entry 520 * function. 521 */ 522 td->td_frame->tf_ebp = 0; 523 td->td_frame->tf_esp = 524 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 525 td->td_frame->tf_eip = (int)entry; 526 527 /* Pass the argument to the entry point. */ 528 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 529 (int)arg); 530 } 531 532 int 533 cpu_set_user_tls(struct thread *td, void *tls_base) 534 { 535 struct segment_descriptor sd; 536 uint32_t base; 537 538 /* 539 * Construct a descriptor and store it in the pcb for 540 * the next context switch. Also store it in the gdt 541 * so that the load of tf_fs into %fs will activate it 542 * at return to userland. 543 */ 544 base = (uint32_t)tls_base; 545 sd.sd_lobase = base & 0xffffff; 546 sd.sd_hibase = (base >> 24) & 0xff; 547 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 548 sd.sd_hilimit = 0xf; 549 sd.sd_type = SDT_MEMRWA; 550 sd.sd_dpl = SEL_UPL; 551 sd.sd_p = 1; 552 sd.sd_xx = 0; 553 sd.sd_def32 = 1; 554 sd.sd_gran = 1; 555 critical_enter(); 556 /* set %gs */ 557 td->td_pcb->pcb_gsd = sd; 558 if (td == curthread) { 559 PCPU_GET(fsgs_gdt)[1] = sd; 560 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 561 } 562 critical_exit(); 563 return (0); 564 } 565 566 /* 567 * Convert kernel VA to physical address 568 */ 569 vm_paddr_t 570 kvtop(void *addr) 571 { 572 vm_paddr_t pa; 573 574 pa = pmap_kextract((vm_offset_t)addr); 575 if (pa == 0) 576 panic("kvtop: zero page frame"); 577 return (pa); 578 } 579 580 #ifdef SMP 581 static void 582 cpu_reset_proxy() 583 { 584 cpuset_t tcrp; 585 586 cpu_reset_proxy_active = 1; 587 while (cpu_reset_proxy_active == 1) 588 ; /* Wait for other cpu to see that we've started */ 589 CPU_SETOF(cpu_reset_proxyid, &tcrp); 590 stop_cpus(tcrp); 591 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 592 DELAY(1000000); 593 cpu_reset_real(); 594 } 595 #endif 596 597 void 598 cpu_reset() 599 { 600 #ifdef XBOX 601 if (arch_i386_is_xbox) { 602 /* Kick the PIC16L, it can reboot the box */ 603 pic16l_reboot(); 604 for (;;); 605 } 606 #endif 607 608 #ifdef SMP 609 cpuset_t map; 610 u_int cnt; 611 612 if (smp_started) { 613 map = all_cpus; 614 CPU_CLR(PCPU_GET(cpuid), &map); 615 CPU_NAND(&map, &stopped_cpus); 616 if (!CPU_EMPTY(&map)) { 617 printf("cpu_reset: Stopping other CPUs\n"); 618 stop_cpus(map); 619 } 620 621 if (PCPU_GET(cpuid) != 0) { 622 cpu_reset_proxyid = PCPU_GET(cpuid); 623 cpustop_restartfunc = cpu_reset_proxy; 624 cpu_reset_proxy_active = 0; 625 printf("cpu_reset: Restarting BSP\n"); 626 627 /* Restart CPU #0. */ 628 /* XXX: restart_cpus(1 << 0); */ 629 CPU_SETOF(0, &started_cpus); 630 wmb(); 631 632 cnt = 0; 633 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 634 cnt++; /* Wait for BSP to announce restart */ 635 if (cpu_reset_proxy_active == 0) 636 printf("cpu_reset: Failed to restart BSP\n"); 637 enable_intr(); 638 cpu_reset_proxy_active = 2; 639 640 while (1); 641 /* NOTREACHED */ 642 } 643 644 DELAY(1000000); 645 } 646 #endif 647 cpu_reset_real(); 648 /* NOTREACHED */ 649 } 650 651 static void 652 cpu_reset_real() 653 { 654 struct region_descriptor null_idt; 655 int b; 656 657 disable_intr(); 658 #ifdef CPU_ELAN 659 if (elan_mmcr != NULL) 660 elan_mmcr->RESCFG = 1; 661 #endif 662 663 if (cpu == CPU_GEODE1100) { 664 /* Attempt Geode's own reset */ 665 outl(0xcf8, 0x80009044ul); 666 outl(0xcfc, 0xf); 667 } 668 669 #if !defined(BROKEN_KEYBOARD_RESET) 670 /* 671 * Attempt to do a CPU reset via the keyboard controller, 672 * do not turn off GateA20, as any machine that fails 673 * to do the reset here would then end up in no man's land. 674 */ 675 outb(IO_KBD + 4, 0xFE); 676 DELAY(500000); /* wait 0.5 sec to see if that did it */ 677 #endif 678 679 /* 680 * Attempt to force a reset via the Reset Control register at 681 * I/O port 0xcf9. Bit 2 forces a system reset when it 682 * transitions from 0 to 1. Bit 1 selects the type of reset 683 * to attempt: 0 selects a "soft" reset, and 1 selects a 684 * "hard" reset. We try a "hard" reset. The first write sets 685 * bit 1 to select a "hard" reset and clears bit 2. The 686 * second write forces a 0 -> 1 transition in bit 2 to trigger 687 * a reset. 688 */ 689 outb(0xcf9, 0x2); 690 outb(0xcf9, 0x6); 691 DELAY(500000); /* wait 0.5 sec to see if that did it */ 692 693 /* 694 * Attempt to force a reset via the Fast A20 and Init register 695 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 696 * Bit 0 asserts INIT# when set to 1. We are careful to only 697 * preserve bit 1 while setting bit 0. We also must clear bit 698 * 0 before setting it if it isn't already clear. 699 */ 700 b = inb(0x92); 701 if (b != 0xff) { 702 if ((b & 0x1) != 0) 703 outb(0x92, b & 0xfe); 704 outb(0x92, b | 0x1); 705 DELAY(500000); /* wait 0.5 sec to see if that did it */ 706 } 707 708 printf("No known reset method worked, attempting CPU shutdown\n"); 709 DELAY(1000000); /* wait 1 sec for printf to complete */ 710 711 /* Wipe the IDT. */ 712 null_idt.rd_limit = 0; 713 null_idt.rd_base = 0; 714 lidt(&null_idt); 715 716 /* "good night, sweet prince .... <THUNK!>" */ 717 breakpoint(); 718 719 /* NOTREACHED */ 720 while(1); 721 } 722 723 /* 724 * Get an sf_buf from the freelist. May block if none are available. 725 */ 726 void 727 sf_buf_map(struct sf_buf *sf, int flags) 728 { 729 pt_entry_t opte, *ptep; 730 731 /* 732 * Update the sf_buf's virtual-to-physical mapping, flushing the 733 * virtual address from the TLB. Since the reference count for 734 * the sf_buf's old mapping was zero, that mapping is not 735 * currently in use. Consequently, there is no need to exchange 736 * the old and new PTEs atomically, even under PAE. 737 */ 738 ptep = vtopte(sf->kva); 739 opte = *ptep; 740 *ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V | 741 pmap_cache_bits(sf->m->md.pat_mode, 0); 742 743 /* 744 * Avoid unnecessary TLB invalidations: If the sf_buf's old 745 * virtual-to-physical mapping was not used, then any processor 746 * that has invalidated the sf_buf's virtual address from its TLB 747 * since the last used mapping need not invalidate again. 748 */ 749 #ifdef SMP 750 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 751 CPU_ZERO(&sf->cpumask); 752 753 sf_buf_shootdown(sf, flags); 754 #else 755 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 756 pmap_invalidate_page(kernel_pmap, sf->kva); 757 #endif 758 } 759 760 #ifdef SMP 761 void 762 sf_buf_shootdown(struct sf_buf *sf, int flags) 763 { 764 cpuset_t other_cpus; 765 u_int cpuid; 766 767 sched_pin(); 768 cpuid = PCPU_GET(cpuid); 769 if (!CPU_ISSET(cpuid, &sf->cpumask)) { 770 CPU_SET(cpuid, &sf->cpumask); 771 invlpg(sf->kva); 772 } 773 if ((flags & SFB_CPUPRIVATE) == 0) { 774 other_cpus = all_cpus; 775 CPU_CLR(cpuid, &other_cpus); 776 CPU_NAND(&other_cpus, &sf->cpumask); 777 if (!CPU_EMPTY(&other_cpus)) { 778 CPU_OR(&sf->cpumask, &other_cpus); 779 smp_masked_invlpg(other_cpus, sf->kva); 780 } 781 } 782 sched_unpin(); 783 } 784 #endif 785 786 /* 787 * MD part of sf_buf_free(). 788 */ 789 int 790 sf_buf_unmap(struct sf_buf *sf) 791 { 792 793 return (0); 794 } 795 796 static void 797 sf_buf_invalidate(struct sf_buf *sf) 798 { 799 vm_page_t m = sf->m; 800 801 /* 802 * Use pmap_qenter to update the pte for 803 * existing mapping, in particular, the PAT 804 * settings are recalculated. 805 */ 806 pmap_qenter(sf->kva, &m, 1); 807 pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE); 808 } 809 810 /* 811 * Invalidate the cache lines that may belong to the page, if 812 * (possibly old) mapping of the page by sf buffer exists. Returns 813 * TRUE when mapping was found and cache invalidated. 814 */ 815 boolean_t 816 sf_buf_invalidate_cache(vm_page_t m) 817 { 818 819 return (sf_buf_process_page(m, sf_buf_invalidate)); 820 } 821 822 /* 823 * Software interrupt handler for queued VM system processing. 824 */ 825 void 826 swi_vm(void *dummy) 827 { 828 if (busdma_swi_pending != 0) 829 busdma_swi(); 830 } 831 832 /* 833 * Tell whether this address is in some physical memory region. 834 * Currently used by the kernel coredump code in order to avoid 835 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 836 * or other unpredictable behaviour. 837 */ 838 839 int 840 is_physical_memory(vm_paddr_t addr) 841 { 842 843 #ifdef DEV_ISA 844 /* The ISA ``memory hole''. */ 845 if (addr >= 0xa0000 && addr < 0x100000) 846 return 0; 847 #endif 848 849 /* 850 * stuff other tests for known memory-mapped devices (PCI?) 851 * here 852 */ 853 854 return 1; 855 } 856