1 /*- 2 * Copyright (c) 1982, 1986 The Regents of the University of California. 3 * Copyright (c) 1989, 1990 William Jolitz 4 * Copyright (c) 1994 John Dyson 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department, and William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ 41 */ 42 43 #include <sys/cdefs.h> 44 __FBSDID("$FreeBSD$"); 45 46 #include "opt_isa.h" 47 #include "opt_npx.h" 48 #include "opt_reset.h" 49 #include "opt_cpu.h" 50 #include "opt_xbox.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/bio.h> 55 #include <sys/buf.h> 56 #include <sys/kernel.h> 57 #include <sys/ktr.h> 58 #include <sys/lock.h> 59 #include <sys/malloc.h> 60 #include <sys/mbuf.h> 61 #include <sys/mutex.h> 62 #include <sys/pioctl.h> 63 #include <sys/proc.h> 64 #include <sys/sf_buf.h> 65 #include <sys/smp.h> 66 #include <sys/sched.h> 67 #include <sys/sysctl.h> 68 #include <sys/unistd.h> 69 #include <sys/vnode.h> 70 #include <sys/vmmeter.h> 71 72 #include <machine/cpu.h> 73 #include <machine/cputypes.h> 74 #include <machine/md_var.h> 75 #include <machine/pcb.h> 76 #include <machine/pcb_ext.h> 77 #include <machine/smp.h> 78 #include <machine/vm86.h> 79 80 #ifdef CPU_ELAN 81 #include <machine/elan_mmcr.h> 82 #endif 83 84 #include <vm/vm.h> 85 #include <vm/vm_extern.h> 86 #include <vm/vm_kern.h> 87 #include <vm/vm_page.h> 88 #include <vm/vm_map.h> 89 #include <vm/vm_param.h> 90 91 #ifdef PC98 92 #include <pc98/cbus/cbus.h> 93 #else 94 #include <i386/isa/isa.h> 95 #endif 96 97 #ifdef XBOX 98 #include <machine/xbox.h> 99 #endif 100 101 #ifndef NSFBUFS 102 #define NSFBUFS (512 + maxusers * 16) 103 #endif 104 105 static void cpu_reset_real(void); 106 #ifdef SMP 107 static void cpu_reset_proxy(void); 108 static u_int cpu_reset_proxyid; 109 static volatile u_int cpu_reset_proxy_active; 110 #endif 111 static void sf_buf_init(void *arg); 112 SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL); 113 114 LIST_HEAD(sf_head, sf_buf); 115 116 /* 117 * A hash table of active sendfile(2) buffers 118 */ 119 static struct sf_head *sf_buf_active; 120 static u_long sf_buf_hashmask; 121 122 #define SF_BUF_HASH(m) (((m) - vm_page_array) & sf_buf_hashmask) 123 124 static TAILQ_HEAD(, sf_buf) sf_buf_freelist; 125 static u_int sf_buf_alloc_want; 126 127 /* 128 * A lock used to synchronize access to the hash table and free list 129 */ 130 static struct mtx sf_buf_lock; 131 132 extern int _ucodesel, _udatasel; 133 134 /* 135 * Finish a fork operation, with process p2 nearly set up. 136 * Copy and update the pcb, set up the stack so that the child 137 * ready to run and return to user mode. 138 */ 139 void 140 cpu_fork(td1, p2, td2, flags) 141 register struct thread *td1; 142 register struct proc *p2; 143 struct thread *td2; 144 int flags; 145 { 146 register struct proc *p1; 147 struct pcb *pcb2; 148 struct mdproc *mdp2; 149 #ifdef DEV_NPX 150 register_t savecrit; 151 #endif 152 153 p1 = td1->td_proc; 154 if ((flags & RFPROC) == 0) { 155 if ((flags & RFMEM) == 0) { 156 /* unshare user LDT */ 157 struct mdproc *mdp1 = &p1->p_md; 158 struct proc_ldt *pldt; 159 160 mtx_lock_spin(&dt_lock); 161 if ((pldt = mdp1->md_ldt) != NULL && 162 pldt->ldt_refcnt > 1) { 163 pldt = user_ldt_alloc(mdp1, pldt->ldt_len); 164 if (pldt == NULL) 165 panic("could not copy LDT"); 166 mdp1->md_ldt = pldt; 167 set_user_ldt(mdp1); 168 user_ldt_free(td1); 169 } else 170 mtx_unlock_spin(&dt_lock); 171 } 172 return; 173 } 174 175 /* Ensure that p1's pcb is up to date. */ 176 if (td1 == curthread) 177 td1->td_pcb->pcb_gs = rgs(); 178 #ifdef DEV_NPX 179 savecrit = intr_disable(); 180 if (PCPU_GET(fpcurthread) == td1) 181 npxsave(&td1->td_pcb->pcb_save); 182 intr_restore(savecrit); 183 #endif 184 185 /* Point the pcb to the top of the stack */ 186 pcb2 = (struct pcb *)(td2->td_kstack + 187 td2->td_kstack_pages * PAGE_SIZE) - 1; 188 td2->td_pcb = pcb2; 189 190 /* Copy p1's pcb */ 191 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); 192 193 /* Point mdproc and then copy over td1's contents */ 194 mdp2 = &p2->p_md; 195 bcopy(&p1->p_md, mdp2, sizeof(*mdp2)); 196 197 /* 198 * Create a new fresh stack for the new process. 199 * Copy the trap frame for the return to user mode as if from a 200 * syscall. This copies most of the user mode register values. 201 * The -16 is so we can expand the trapframe if we go to vm86. 202 */ 203 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1; 204 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe)); 205 206 td2->td_frame->tf_eax = 0; /* Child returns zero */ 207 td2->td_frame->tf_eflags &= ~PSL_C; /* success */ 208 td2->td_frame->tf_edx = 1; 209 210 /* 211 * If the parent process has the trap bit set (i.e. a debugger had 212 * single stepped the process to the system call), we need to clear 213 * the trap flag from the new frame unless the debugger had set PF_FORK 214 * on the parent. Otherwise, the child will receive a (likely 215 * unexpected) SIGTRAP when it executes the first instruction after 216 * returning to userland. 217 */ 218 if ((p1->p_pfsflags & PF_FORK) == 0) 219 td2->td_frame->tf_eflags &= ~PSL_T; 220 221 /* 222 * Set registers for trampoline to user mode. Leave space for the 223 * return address on stack. These are the kernel mode register values. 224 */ 225 #ifdef PAE 226 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt); 227 #else 228 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir); 229 #endif 230 pcb2->pcb_edi = 0; 231 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */ 232 pcb2->pcb_ebp = 0; 233 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *); 234 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */ 235 pcb2->pcb_eip = (int)fork_trampoline; 236 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */ 237 /*- 238 * pcb2->pcb_dr*: cloned above. 239 * pcb2->pcb_savefpu: cloned above. 240 * pcb2->pcb_flags: cloned above. 241 * pcb2->pcb_onfault: cloned above (always NULL here?). 242 * pcb2->pcb_gs: cloned above. 243 * pcb2->pcb_ext: cleared below. 244 */ 245 246 /* 247 * XXX don't copy the i/o pages. this should probably be fixed. 248 */ 249 pcb2->pcb_ext = 0; 250 251 /* Copy the LDT, if necessary. */ 252 mtx_lock_spin(&dt_lock); 253 if (mdp2->md_ldt != NULL) { 254 if (flags & RFMEM) { 255 mdp2->md_ldt->ldt_refcnt++; 256 } else { 257 mdp2->md_ldt = user_ldt_alloc(mdp2, 258 mdp2->md_ldt->ldt_len); 259 if (mdp2->md_ldt == NULL) 260 panic("could not copy LDT"); 261 } 262 } 263 mtx_unlock_spin(&dt_lock); 264 265 /* Setup to release spin count in fork_exit(). */ 266 td2->td_md.md_spinlock_count = 1; 267 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 268 269 /* 270 * Now, cpu_switch() can schedule the new process. 271 * pcb_esp is loaded pointing to the cpu_switch() stack frame 272 * containing the return address when exiting cpu_switch. 273 * This will normally be to fork_trampoline(), which will have 274 * %ebx loaded with the new proc's pointer. fork_trampoline() 275 * will set up a stack to call fork_return(p, frame); to complete 276 * the return to user-mode. 277 */ 278 } 279 280 /* 281 * Intercept the return address from a freshly forked process that has NOT 282 * been scheduled yet. 283 * 284 * This is needed to make kernel threads stay in kernel mode. 285 */ 286 void 287 cpu_set_fork_handler(td, func, arg) 288 struct thread *td; 289 void (*func)(void *); 290 void *arg; 291 { 292 /* 293 * Note that the trap frame follows the args, so the function 294 * is really called like this: func(arg, frame); 295 */ 296 td->td_pcb->pcb_esi = (int) func; /* function */ 297 td->td_pcb->pcb_ebx = (int) arg; /* first arg */ 298 } 299 300 void 301 cpu_exit(struct thread *td) 302 { 303 304 /* 305 * If this process has a custom LDT, release it. Reset pc->pcb_gs 306 * and %gs before we free it in case they refer to an LDT entry. 307 */ 308 mtx_lock_spin(&dt_lock); 309 if (td->td_proc->p_md.md_ldt) { 310 td->td_pcb->pcb_gs = _udatasel; 311 load_gs(_udatasel); 312 user_ldt_free(td); 313 } else 314 mtx_unlock_spin(&dt_lock); 315 } 316 317 void 318 cpu_thread_exit(struct thread *td) 319 { 320 321 #ifdef DEV_NPX 322 if (td == PCPU_GET(fpcurthread)) 323 npxdrop(); 324 #endif 325 326 /* Disable any hardware breakpoints. */ 327 if (td->td_pcb->pcb_flags & PCB_DBREGS) { 328 reset_dbregs(); 329 td->td_pcb->pcb_flags &= ~PCB_DBREGS; 330 } 331 } 332 333 void 334 cpu_thread_clean(struct thread *td) 335 { 336 struct pcb *pcb; 337 338 pcb = td->td_pcb; 339 if (pcb->pcb_ext != NULL) { 340 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */ 341 /* 342 * XXX do we need to move the TSS off the allocated pages 343 * before freeing them? (not done here) 344 */ 345 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ext, 346 ctob(IOPAGES + 1)); 347 pcb->pcb_ext = NULL; 348 } 349 } 350 351 void 352 cpu_thread_swapin(struct thread *td) 353 { 354 } 355 356 void 357 cpu_thread_swapout(struct thread *td) 358 { 359 } 360 361 void 362 cpu_thread_alloc(struct thread *td) 363 { 364 365 td->td_pcb = (struct pcb *)(td->td_kstack + 366 td->td_kstack_pages * PAGE_SIZE) - 1; 367 td->td_frame = (struct trapframe *)((caddr_t)td->td_pcb - 16) - 1; 368 td->td_pcb->pcb_ext = NULL; 369 } 370 371 void 372 cpu_thread_free(struct thread *td) 373 { 374 375 cpu_thread_clean(td); 376 } 377 378 /* 379 * Initialize machine state (pcb and trap frame) for a new thread about to 380 * upcall. Put enough state in the new thread's PCB to get it to go back 381 * userret(), where we can intercept it again to set the return (upcall) 382 * Address and stack, along with those from upcals that are from other sources 383 * such as those generated in thread_userret() itself. 384 */ 385 void 386 cpu_set_upcall(struct thread *td, struct thread *td0) 387 { 388 struct pcb *pcb2; 389 390 /* Point the pcb to the top of the stack. */ 391 pcb2 = td->td_pcb; 392 393 /* 394 * Copy the upcall pcb. This loads kernel regs. 395 * Those not loaded individually below get their default 396 * values here. 397 */ 398 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 399 pcb2->pcb_flags &= ~(PCB_NPXTRAP|PCB_NPXINITDONE); 400 401 /* 402 * Create a new fresh stack for the new thread. 403 */ 404 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe)); 405 406 /* 407 * Set registers for trampoline to user mode. Leave space for the 408 * return address on stack. These are the kernel mode register values. 409 */ 410 #ifdef PAE 411 pcb2->pcb_cr3 = vtophys(vmspace_pmap(td->td_proc->p_vmspace)->pm_pdpt); 412 #else 413 pcb2->pcb_cr3 = vtophys(vmspace_pmap(td->td_proc->p_vmspace)->pm_pdir); 414 #endif 415 pcb2->pcb_edi = 0; 416 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */ 417 pcb2->pcb_ebp = 0; 418 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */ 419 pcb2->pcb_ebx = (int)td; /* trampoline arg */ 420 pcb2->pcb_eip = (int)fork_trampoline; 421 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */ 422 pcb2->pcb_gs = rgs(); 423 /* 424 * If we didn't copy the pcb, we'd need to do the following registers: 425 * pcb2->pcb_dr*: cloned above. 426 * pcb2->pcb_savefpu: cloned above. 427 * pcb2->pcb_flags: cloned above. 428 * pcb2->pcb_onfault: cloned above (always NULL here?). 429 * pcb2->pcb_gs: cloned above. 430 * pcb2->pcb_ext: cleared below. 431 */ 432 pcb2->pcb_ext = NULL; 433 434 /* Setup to release spin count in fork_exit(). */ 435 td->td_md.md_spinlock_count = 1; 436 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I; 437 } 438 439 /* 440 * Set that machine state for performing an upcall that has to 441 * be done in thread_userret() so that those upcalls generated 442 * in thread_userret() itself can be done as well. 443 */ 444 void 445 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg, 446 stack_t *stack) 447 { 448 449 /* 450 * Do any extra cleaning that needs to be done. 451 * The thread may have optional components 452 * that are not present in a fresh thread. 453 * This may be a recycled thread so make it look 454 * as though it's newly allocated. 455 */ 456 cpu_thread_clean(td); 457 458 /* 459 * Set the trap frame to point at the beginning of the uts 460 * function. 461 */ 462 td->td_frame->tf_ebp = 0; 463 td->td_frame->tf_esp = 464 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4; 465 td->td_frame->tf_eip = (int)entry; 466 467 /* 468 * Pass the address of the mailbox for this kse to the uts 469 * function as a parameter on the stack. 470 */ 471 suword((void *)(td->td_frame->tf_esp + sizeof(void *)), 472 (int)arg); 473 } 474 475 int 476 cpu_set_user_tls(struct thread *td, void *tls_base) 477 { 478 struct segment_descriptor sd; 479 uint32_t base; 480 481 /* 482 * Construct a descriptor and store it in the pcb for 483 * the next context switch. Also store it in the gdt 484 * so that the load of tf_fs into %fs will activate it 485 * at return to userland. 486 */ 487 base = (uint32_t)tls_base; 488 sd.sd_lobase = base & 0xffffff; 489 sd.sd_hibase = (base >> 24) & 0xff; 490 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */ 491 sd.sd_hilimit = 0xf; 492 sd.sd_type = SDT_MEMRWA; 493 sd.sd_dpl = SEL_UPL; 494 sd.sd_p = 1; 495 sd.sd_xx = 0; 496 sd.sd_def32 = 1; 497 sd.sd_gran = 1; 498 critical_enter(); 499 /* set %gs */ 500 td->td_pcb->pcb_gsd = sd; 501 if (td == curthread) { 502 PCPU_GET(fsgs_gdt)[1] = sd; 503 load_gs(GSEL(GUGS_SEL, SEL_UPL)); 504 } 505 critical_exit(); 506 return (0); 507 } 508 509 /* 510 * Convert kernel VA to physical address 511 */ 512 vm_paddr_t 513 kvtop(void *addr) 514 { 515 vm_paddr_t pa; 516 517 pa = pmap_kextract((vm_offset_t)addr); 518 if (pa == 0) 519 panic("kvtop: zero page frame"); 520 return (pa); 521 } 522 523 #ifdef SMP 524 static void 525 cpu_reset_proxy() 526 { 527 528 cpu_reset_proxy_active = 1; 529 while (cpu_reset_proxy_active == 1) 530 ; /* Wait for other cpu to see that we've started */ 531 stop_cpus((1<<cpu_reset_proxyid)); 532 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid); 533 DELAY(1000000); 534 cpu_reset_real(); 535 } 536 #endif 537 538 void 539 cpu_reset() 540 { 541 #ifdef XBOX 542 if (arch_i386_is_xbox) { 543 /* Kick the PIC16L, it can reboot the box */ 544 pic16l_reboot(); 545 for (;;); 546 } 547 #endif 548 549 #ifdef SMP 550 u_int cnt, map; 551 552 if (smp_active) { 553 map = PCPU_GET(other_cpus) & ~stopped_cpus; 554 if (map != 0) { 555 printf("cpu_reset: Stopping other CPUs\n"); 556 stop_cpus(map); 557 } 558 559 if (PCPU_GET(cpuid) != 0) { 560 cpu_reset_proxyid = PCPU_GET(cpuid); 561 cpustop_restartfunc = cpu_reset_proxy; 562 cpu_reset_proxy_active = 0; 563 printf("cpu_reset: Restarting BSP\n"); 564 565 /* Restart CPU #0. */ 566 /* XXX: restart_cpus(1 << 0); */ 567 atomic_store_rel_int(&started_cpus, (1 << 0)); 568 569 cnt = 0; 570 while (cpu_reset_proxy_active == 0 && cnt < 10000000) 571 cnt++; /* Wait for BSP to announce restart */ 572 if (cpu_reset_proxy_active == 0) 573 printf("cpu_reset: Failed to restart BSP\n"); 574 enable_intr(); 575 cpu_reset_proxy_active = 2; 576 577 while (1); 578 /* NOTREACHED */ 579 } 580 581 DELAY(1000000); 582 } 583 #endif 584 cpu_reset_real(); 585 /* NOTREACHED */ 586 } 587 588 static void 589 cpu_reset_real() 590 { 591 struct region_descriptor null_idt; 592 #ifndef PC98 593 int b; 594 #endif 595 596 disable_intr(); 597 #ifdef CPU_ELAN 598 if (elan_mmcr != NULL) 599 elan_mmcr->RESCFG = 1; 600 #endif 601 602 if (cpu == CPU_GEODE1100) { 603 /* Attempt Geode's own reset */ 604 outl(0xcf8, 0x80009044ul); 605 outl(0xcfc, 0xf); 606 } 607 608 #ifdef PC98 609 /* 610 * Attempt to do a CPU reset via CPU reset port. 611 */ 612 if ((inb(0x35) & 0xa0) != 0xa0) { 613 outb(0x37, 0x0f); /* SHUT0 = 0. */ 614 outb(0x37, 0x0b); /* SHUT1 = 0. */ 615 } 616 outb(0xf0, 0x00); /* Reset. */ 617 #else 618 #if !defined(BROKEN_KEYBOARD_RESET) 619 /* 620 * Attempt to do a CPU reset via the keyboard controller, 621 * do not turn off GateA20, as any machine that fails 622 * to do the reset here would then end up in no man's land. 623 */ 624 outb(IO_KBD + 4, 0xFE); 625 DELAY(500000); /* wait 0.5 sec to see if that did it */ 626 #endif 627 628 /* 629 * Attempt to force a reset via the Reset Control register at 630 * I/O port 0xcf9. Bit 2 forces a system reset when it is 631 * written as 1. Bit 1 selects the type of reset to attempt: 632 * 0 selects a "soft" reset, and 1 selects a "hard" reset. We 633 * try to do a "soft" reset first, and then a "hard" reset. 634 */ 635 outb(0xcf9, 0x2); 636 outb(0xcf9, 0x6); 637 DELAY(500000); /* wait 0.5 sec to see if that did it */ 638 639 /* 640 * Attempt to force a reset via the Fast A20 and Init register 641 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate. 642 * Bit 0 asserts INIT# when set to 1. We are careful to only 643 * preserve bit 1 while setting bit 0. We also must clear bit 644 * 0 before setting it if it isn't already clear. 645 */ 646 b = inb(0x92); 647 if (b != 0xff) { 648 if ((b & 0x1) != 0) 649 outb(0x92, b & 0xfe); 650 outb(0x92, b | 0x1); 651 DELAY(500000); /* wait 0.5 sec to see if that did it */ 652 } 653 #endif /* PC98 */ 654 655 printf("No known reset method worked, attempting CPU shutdown\n"); 656 DELAY(1000000); /* wait 1 sec for printf to complete */ 657 658 /* Wipe the IDT. */ 659 null_idt.rd_limit = 0; 660 null_idt.rd_base = 0; 661 lidt(&null_idt); 662 663 /* "good night, sweet prince .... <THUNK!>" */ 664 breakpoint(); 665 666 /* NOTREACHED */ 667 while(1); 668 } 669 670 /* 671 * Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-)) 672 */ 673 static void 674 sf_buf_init(void *arg) 675 { 676 struct sf_buf *sf_bufs; 677 vm_offset_t sf_base; 678 int i; 679 680 nsfbufs = NSFBUFS; 681 TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs); 682 683 sf_buf_active = hashinit(nsfbufs, M_TEMP, &sf_buf_hashmask); 684 TAILQ_INIT(&sf_buf_freelist); 685 sf_base = kmem_alloc_nofault(kernel_map, nsfbufs * PAGE_SIZE); 686 sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP, 687 M_NOWAIT | M_ZERO); 688 for (i = 0; i < nsfbufs; i++) { 689 sf_bufs[i].kva = sf_base + i * PAGE_SIZE; 690 TAILQ_INSERT_TAIL(&sf_buf_freelist, &sf_bufs[i], free_entry); 691 } 692 sf_buf_alloc_want = 0; 693 mtx_init(&sf_buf_lock, "sf_buf", NULL, MTX_DEF); 694 } 695 696 /* 697 * Get an sf_buf from the freelist. May block if none are available. 698 */ 699 struct sf_buf * 700 sf_buf_alloc(struct vm_page *m, int flags) 701 { 702 pt_entry_t opte, *ptep; 703 struct sf_head *hash_list; 704 struct sf_buf *sf; 705 #ifdef SMP 706 cpumask_t cpumask, other_cpus; 707 #endif 708 int error; 709 710 KASSERT(curthread->td_pinned > 0 || (flags & SFB_CPUPRIVATE) == 0, 711 ("sf_buf_alloc(SFB_CPUPRIVATE): curthread not pinned")); 712 hash_list = &sf_buf_active[SF_BUF_HASH(m)]; 713 mtx_lock(&sf_buf_lock); 714 LIST_FOREACH(sf, hash_list, list_entry) { 715 if (sf->m == m) { 716 sf->ref_count++; 717 if (sf->ref_count == 1) { 718 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 719 nsfbufsused++; 720 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 721 } 722 #ifdef SMP 723 goto shootdown; 724 #else 725 goto done; 726 #endif 727 } 728 } 729 while ((sf = TAILQ_FIRST(&sf_buf_freelist)) == NULL) { 730 if (flags & SFB_NOWAIT) 731 goto done; 732 sf_buf_alloc_want++; 733 mbstat.sf_allocwait++; 734 error = msleep(&sf_buf_freelist, &sf_buf_lock, 735 (flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0); 736 sf_buf_alloc_want--; 737 738 /* 739 * If we got a signal, don't risk going back to sleep. 740 */ 741 if (error) 742 goto done; 743 } 744 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry); 745 if (sf->m != NULL) 746 LIST_REMOVE(sf, list_entry); 747 LIST_INSERT_HEAD(hash_list, sf, list_entry); 748 sf->ref_count = 1; 749 sf->m = m; 750 nsfbufsused++; 751 nsfbufspeak = imax(nsfbufspeak, nsfbufsused); 752 753 /* 754 * Update the sf_buf's virtual-to-physical mapping, flushing the 755 * virtual address from the TLB. Since the reference count for 756 * the sf_buf's old mapping was zero, that mapping is not 757 * currently in use. Consequently, there is no need to exchange 758 * the old and new PTEs atomically, even under PAE. 759 */ 760 ptep = vtopte(sf->kva); 761 opte = *ptep; 762 *ptep = VM_PAGE_TO_PHYS(m) | pgeflag | PG_RW | PG_V; 763 764 /* 765 * Avoid unnecessary TLB invalidations: If the sf_buf's old 766 * virtual-to-physical mapping was not used, then any processor 767 * that has invalidated the sf_buf's virtual address from its TLB 768 * since the last used mapping need not invalidate again. 769 */ 770 #ifdef SMP 771 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 772 sf->cpumask = 0; 773 shootdown: 774 sched_pin(); 775 cpumask = PCPU_GET(cpumask); 776 if ((sf->cpumask & cpumask) == 0) { 777 sf->cpumask |= cpumask; 778 invlpg(sf->kva); 779 } 780 if ((flags & SFB_CPUPRIVATE) == 0) { 781 other_cpus = PCPU_GET(other_cpus) & ~sf->cpumask; 782 if (other_cpus != 0) { 783 sf->cpumask |= other_cpus; 784 smp_masked_invlpg(other_cpus, sf->kva); 785 } 786 } 787 sched_unpin(); 788 #else 789 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A)) 790 pmap_invalidate_page(kernel_pmap, sf->kva); 791 #endif 792 done: 793 mtx_unlock(&sf_buf_lock); 794 return (sf); 795 } 796 797 /* 798 * Remove a reference from the given sf_buf, adding it to the free 799 * list when its reference count reaches zero. A freed sf_buf still, 800 * however, retains its virtual-to-physical mapping until it is 801 * recycled or reactivated by sf_buf_alloc(9). 802 */ 803 void 804 sf_buf_free(struct sf_buf *sf) 805 { 806 807 mtx_lock(&sf_buf_lock); 808 sf->ref_count--; 809 if (sf->ref_count == 0) { 810 TAILQ_INSERT_TAIL(&sf_buf_freelist, sf, free_entry); 811 nsfbufsused--; 812 if (sf_buf_alloc_want > 0) 813 wakeup_one(&sf_buf_freelist); 814 } 815 mtx_unlock(&sf_buf_lock); 816 } 817 818 /* 819 * Software interrupt handler for queued VM system processing. 820 */ 821 void 822 swi_vm(void *dummy) 823 { 824 if (busdma_swi_pending != 0) 825 busdma_swi(); 826 } 827 828 /* 829 * Tell whether this address is in some physical memory region. 830 * Currently used by the kernel coredump code in order to avoid 831 * dumping the ``ISA memory hole'' which could cause indefinite hangs, 832 * or other unpredictable behaviour. 833 */ 834 835 int 836 is_physical_memory(vm_paddr_t addr) 837 { 838 839 #ifdef DEV_ISA 840 /* The ISA ``memory hole''. */ 841 if (addr >= 0xa0000 && addr < 0x100000) 842 return 0; 843 #endif 844 845 /* 846 * stuff other tests for known memory-mapped devices (PCI?) 847 * here 848 */ 849 850 return 1; 851 } 852