xref: /freebsd/sys/i386/i386/vm_machdep.c (revision 273c26a3c3bea87a241d6879abd4f991db180bf0)
1 /*-
2  * Copyright (c) 1982, 1986 The Regents of the University of California.
3  * Copyright (c) 1989, 1990 William Jolitz
4  * Copyright (c) 1994 John Dyson
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department, and William Jolitz.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the University of
22  *	California, Berkeley and its contributors.
23  * 4. Neither the name of the University nor the names of its contributors
24  *    may be used to endorse or promote products derived from this software
25  *    without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37  * SUCH DAMAGE.
38  *
39  *	from: @(#)vm_machdep.c	7.3 (Berkeley) 5/13/91
40  *	Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
41  */
42 
43 #include <sys/cdefs.h>
44 __FBSDID("$FreeBSD$");
45 
46 #include "opt_isa.h"
47 #include "opt_npx.h"
48 #include "opt_reset.h"
49 #include "opt_cpu.h"
50 #include "opt_xbox.h"
51 
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/bio.h>
55 #include <sys/buf.h>
56 #include <sys/kernel.h>
57 #include <sys/ktr.h>
58 #include <sys/lock.h>
59 #include <sys/malloc.h>
60 #include <sys/mbuf.h>
61 #include <sys/mutex.h>
62 #include <sys/pioctl.h>
63 #include <sys/proc.h>
64 #include <sys/sysent.h>
65 #include <sys/sf_buf.h>
66 #include <sys/smp.h>
67 #include <sys/sched.h>
68 #include <sys/sysctl.h>
69 #include <sys/unistd.h>
70 #include <sys/vnode.h>
71 #include <sys/vmmeter.h>
72 
73 #include <machine/cpu.h>
74 #include <machine/cputypes.h>
75 #include <machine/md_var.h>
76 #include <machine/pcb.h>
77 #include <machine/pcb_ext.h>
78 #include <machine/smp.h>
79 #include <machine/vm86.h>
80 
81 #ifdef CPU_ELAN
82 #include <machine/elan_mmcr.h>
83 #endif
84 
85 #include <vm/vm.h>
86 #include <vm/vm_extern.h>
87 #include <vm/vm_kern.h>
88 #include <vm/vm_page.h>
89 #include <vm/vm_map.h>
90 #include <vm/vm_param.h>
91 
92 #ifdef PC98
93 #include <pc98/cbus/cbus.h>
94 #else
95 #include <isa/isareg.h>
96 #endif
97 
98 #ifdef XBOX
99 #include <machine/xbox.h>
100 #endif
101 
102 #ifndef NSFBUFS
103 #define	NSFBUFS		(512 + maxusers * 16)
104 #endif
105 
106 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
107 #define CPU_ENABLE_SSE
108 #endif
109 
110 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread),
111     "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread.");
112 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb),
113     "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb.");
114 _Static_assert(__OFFSETOF_MONITORBUF == offsetof(struct pcpu, pc_monitorbuf),
115     "__OFFSETOF_MONINORBUF does not correspond with offset of pc_monitorbuf.");
116 
117 static void	cpu_reset_real(void);
118 #ifdef SMP
119 static void	cpu_reset_proxy(void);
120 static u_int	cpu_reset_proxyid;
121 static volatile u_int	cpu_reset_proxy_active;
122 #endif
123 
124 union savefpu *
125 get_pcb_user_save_td(struct thread *td)
126 {
127 	vm_offset_t p;
128 
129 	p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE -
130 	    roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN);
131 	KASSERT((p % XSAVE_AREA_ALIGN) == 0, ("Unaligned pcb_user_save area"));
132 	return ((union savefpu *)p);
133 }
134 
135 union savefpu *
136 get_pcb_user_save_pcb(struct pcb *pcb)
137 {
138 	vm_offset_t p;
139 
140 	p = (vm_offset_t)(pcb + 1);
141 	return ((union savefpu *)p);
142 }
143 
144 struct pcb *
145 get_pcb_td(struct thread *td)
146 {
147 	vm_offset_t p;
148 
149 	p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE -
150 	    roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN) -
151 	    sizeof(struct pcb);
152 	return ((struct pcb *)p);
153 }
154 
155 void *
156 alloc_fpusave(int flags)
157 {
158 	void *res;
159 #ifdef CPU_ENABLE_SSE
160 	struct savefpu_ymm *sf;
161 #endif
162 
163 	res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags);
164 #ifdef CPU_ENABLE_SSE
165 	if (use_xsave) {
166 		sf = (struct savefpu_ymm *)res;
167 		bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd));
168 		sf->sv_xstate.sx_hd.xstate_bv = xsave_mask;
169 	}
170 #endif
171 	return (res);
172 }
173 /*
174  * Finish a fork operation, with process p2 nearly set up.
175  * Copy and update the pcb, set up the stack so that the child
176  * ready to run and return to user mode.
177  */
178 void
179 cpu_fork(td1, p2, td2, flags)
180 	register struct thread *td1;
181 	register struct proc *p2;
182 	struct thread *td2;
183 	int flags;
184 {
185 	register struct proc *p1;
186 	struct pcb *pcb2;
187 	struct mdproc *mdp2;
188 
189 	p1 = td1->td_proc;
190 	if ((flags & RFPROC) == 0) {
191 		if ((flags & RFMEM) == 0) {
192 			/* unshare user LDT */
193 			struct mdproc *mdp1 = &p1->p_md;
194 			struct proc_ldt *pldt, *pldt1;
195 
196 			mtx_lock_spin(&dt_lock);
197 			if ((pldt1 = mdp1->md_ldt) != NULL &&
198 			    pldt1->ldt_refcnt > 1) {
199 				pldt = user_ldt_alloc(mdp1, pldt1->ldt_len);
200 				if (pldt == NULL)
201 					panic("could not copy LDT");
202 				mdp1->md_ldt = pldt;
203 				set_user_ldt(mdp1);
204 				user_ldt_deref(pldt1);
205 			} else
206 				mtx_unlock_spin(&dt_lock);
207 		}
208 		return;
209 	}
210 
211 	/* Ensure that td1's pcb is up to date. */
212 	if (td1 == curthread)
213 		td1->td_pcb->pcb_gs = rgs();
214 #ifdef DEV_NPX
215 	critical_enter();
216 	if (PCPU_GET(fpcurthread) == td1)
217 		npxsave(td1->td_pcb->pcb_save);
218 	critical_exit();
219 #endif
220 
221 	/* Point the pcb to the top of the stack */
222 	pcb2 = get_pcb_td(td2);
223 	td2->td_pcb = pcb2;
224 
225 	/* Copy td1's pcb */
226 	bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
227 
228 	/* Properly initialize pcb_save */
229 	pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
230 	bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2),
231 	    cpu_max_ext_state_size);
232 
233 	/* Point mdproc and then copy over td1's contents */
234 	mdp2 = &p2->p_md;
235 	bcopy(&p1->p_md, mdp2, sizeof(*mdp2));
236 
237 	/*
238 	 * Create a new fresh stack for the new process.
239 	 * Copy the trap frame for the return to user mode as if from a
240 	 * syscall.  This copies most of the user mode register values.
241 	 * The -16 is so we can expand the trapframe if we go to vm86.
242 	 */
243 	td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1;
244 	bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe));
245 
246 	td2->td_frame->tf_eax = 0;		/* Child returns zero */
247 	td2->td_frame->tf_eflags &= ~PSL_C;	/* success */
248 	td2->td_frame->tf_edx = 1;
249 
250 	/*
251 	 * If the parent process has the trap bit set (i.e. a debugger had
252 	 * single stepped the process to the system call), we need to clear
253 	 * the trap flag from the new frame unless the debugger had set PF_FORK
254 	 * on the parent.  Otherwise, the child will receive a (likely
255 	 * unexpected) SIGTRAP when it executes the first instruction after
256 	 * returning  to userland.
257 	 */
258 	if ((p1->p_pfsflags & PF_FORK) == 0)
259 		td2->td_frame->tf_eflags &= ~PSL_T;
260 
261 	/*
262 	 * Set registers for trampoline to user mode.  Leave space for the
263 	 * return address on stack.  These are the kernel mode register values.
264 	 */
265 #if defined(PAE) || defined(PAE_TABLES)
266 	pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt);
267 #else
268 	pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir);
269 #endif
270 	pcb2->pcb_edi = 0;
271 	pcb2->pcb_esi = (int)fork_return;	/* fork_trampoline argument */
272 	pcb2->pcb_ebp = 0;
273 	pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *);
274 	pcb2->pcb_ebx = (int)td2;		/* fork_trampoline argument */
275 	pcb2->pcb_eip = (int)fork_trampoline;
276 	/*-
277 	 * pcb2->pcb_dr*:	cloned above.
278 	 * pcb2->pcb_savefpu:	cloned above.
279 	 * pcb2->pcb_flags:	cloned above.
280 	 * pcb2->pcb_onfault:	cloned above (always NULL here?).
281 	 * pcb2->pcb_gs:	cloned above.
282 	 * pcb2->pcb_ext:	cleared below.
283 	 */
284 
285 	/*
286 	 * XXX don't copy the i/o pages.  this should probably be fixed.
287 	 */
288 	pcb2->pcb_ext = 0;
289 
290 	/* Copy the LDT, if necessary. */
291 	mtx_lock_spin(&dt_lock);
292 	if (mdp2->md_ldt != NULL) {
293 		if (flags & RFMEM) {
294 			mdp2->md_ldt->ldt_refcnt++;
295 		} else {
296 			mdp2->md_ldt = user_ldt_alloc(mdp2,
297 			    mdp2->md_ldt->ldt_len);
298 			if (mdp2->md_ldt == NULL)
299 				panic("could not copy LDT");
300 		}
301 	}
302 	mtx_unlock_spin(&dt_lock);
303 
304 	/* Setup to release spin count in fork_exit(). */
305 	td2->td_md.md_spinlock_count = 1;
306 	td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
307 
308 	/*
309 	 * Now, cpu_switch() can schedule the new process.
310 	 * pcb_esp is loaded pointing to the cpu_switch() stack frame
311 	 * containing the return address when exiting cpu_switch.
312 	 * This will normally be to fork_trampoline(), which will have
313 	 * %ebx loaded with the new proc's pointer.  fork_trampoline()
314 	 * will set up a stack to call fork_return(p, frame); to complete
315 	 * the return to user-mode.
316 	 */
317 }
318 
319 /*
320  * Intercept the return address from a freshly forked process that has NOT
321  * been scheduled yet.
322  *
323  * This is needed to make kernel threads stay in kernel mode.
324  */
325 void
326 cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg)
327 {
328 	/*
329 	 * Note that the trap frame follows the args, so the function
330 	 * is really called like this:  func(arg, frame);
331 	 */
332 	td->td_pcb->pcb_esi = (int) func;	/* function */
333 	td->td_pcb->pcb_ebx = (int) arg;	/* first arg */
334 }
335 
336 void
337 cpu_exit(struct thread *td)
338 {
339 
340 	/*
341 	 * If this process has a custom LDT, release it.  Reset pc->pcb_gs
342 	 * and %gs before we free it in case they refer to an LDT entry.
343 	 */
344 	mtx_lock_spin(&dt_lock);
345 	if (td->td_proc->p_md.md_ldt) {
346 		td->td_pcb->pcb_gs = _udatasel;
347 		load_gs(_udatasel);
348 		user_ldt_free(td);
349 	} else
350 		mtx_unlock_spin(&dt_lock);
351 }
352 
353 void
354 cpu_thread_exit(struct thread *td)
355 {
356 
357 #ifdef DEV_NPX
358 	critical_enter();
359 	if (td == PCPU_GET(fpcurthread))
360 		npxdrop();
361 	critical_exit();
362 #endif
363 
364 	/* Disable any hardware breakpoints. */
365 	if (td->td_pcb->pcb_flags & PCB_DBREGS) {
366 		reset_dbregs();
367 		td->td_pcb->pcb_flags &= ~PCB_DBREGS;
368 	}
369 }
370 
371 void
372 cpu_thread_clean(struct thread *td)
373 {
374 	struct pcb *pcb;
375 
376 	pcb = td->td_pcb;
377 	if (pcb->pcb_ext != NULL) {
378 		/* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */
379 		/*
380 		 * XXX do we need to move the TSS off the allocated pages
381 		 * before freeing them?  (not done here)
382 		 */
383 		kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext,
384 		    ctob(IOPAGES + 1));
385 		pcb->pcb_ext = NULL;
386 	}
387 }
388 
389 void
390 cpu_thread_swapin(struct thread *td)
391 {
392 }
393 
394 void
395 cpu_thread_swapout(struct thread *td)
396 {
397 }
398 
399 void
400 cpu_thread_alloc(struct thread *td)
401 {
402 	struct pcb *pcb;
403 #ifdef CPU_ENABLE_SSE
404 	struct xstate_hdr *xhdr;
405 #endif
406 
407 	td->td_pcb = pcb = get_pcb_td(td);
408 	td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1;
409 	pcb->pcb_ext = NULL;
410 	pcb->pcb_save = get_pcb_user_save_pcb(pcb);
411 #ifdef CPU_ENABLE_SSE
412 	if (use_xsave) {
413 		xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1);
414 		bzero(xhdr, sizeof(*xhdr));
415 		xhdr->xstate_bv = xsave_mask;
416 	}
417 #endif
418 }
419 
420 void
421 cpu_thread_free(struct thread *td)
422 {
423 
424 	cpu_thread_clean(td);
425 }
426 
427 void
428 cpu_set_syscall_retval(struct thread *td, int error)
429 {
430 
431 	switch (error) {
432 	case 0:
433 		td->td_frame->tf_eax = td->td_retval[0];
434 		td->td_frame->tf_edx = td->td_retval[1];
435 		td->td_frame->tf_eflags &= ~PSL_C;
436 		break;
437 
438 	case ERESTART:
439 		/*
440 		 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int
441 		 * 0x80 is 2 bytes. We saved this in tf_err.
442 		 */
443 		td->td_frame->tf_eip -= td->td_frame->tf_err;
444 		break;
445 
446 	case EJUSTRETURN:
447 		break;
448 
449 	default:
450 		td->td_frame->tf_eax = SV_ABI_ERRNO(td->td_proc, error);
451 		td->td_frame->tf_eflags |= PSL_C;
452 		break;
453 	}
454 }
455 
456 /*
457  * Initialize machine state, mostly pcb and trap frame for a new
458  * thread, about to return to userspace.  Put enough state in the new
459  * thread's PCB to get it to go back to the fork_return(), which
460  * finalizes the thread state and handles peculiarities of the first
461  * return to userspace for the new thread.
462  */
463 void
464 cpu_copy_thread(struct thread *td, struct thread *td0)
465 {
466 	struct pcb *pcb2;
467 
468 	/* Point the pcb to the top of the stack. */
469 	pcb2 = td->td_pcb;
470 
471 	/*
472 	 * Copy the upcall pcb.  This loads kernel regs.
473 	 * Those not loaded individually below get their default
474 	 * values here.
475 	 */
476 	bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
477 	pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE |
478 	    PCB_KERNNPX);
479 	pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
480 	bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save,
481 	    cpu_max_ext_state_size);
482 
483 	/*
484 	 * Create a new fresh stack for the new thread.
485 	 */
486 	bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe));
487 
488 	/* If the current thread has the trap bit set (i.e. a debugger had
489 	 * single stepped the process to the system call), we need to clear
490 	 * the trap flag from the new frame. Otherwise, the new thread will
491 	 * receive a (likely unexpected) SIGTRAP when it executes the first
492 	 * instruction after returning to userland.
493 	 */
494 	td->td_frame->tf_eflags &= ~PSL_T;
495 
496 	/*
497 	 * Set registers for trampoline to user mode.  Leave space for the
498 	 * return address on stack.  These are the kernel mode register values.
499 	 */
500 	pcb2->pcb_edi = 0;
501 	pcb2->pcb_esi = (int)fork_return;		    /* trampoline arg */
502 	pcb2->pcb_ebp = 0;
503 	pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */
504 	pcb2->pcb_ebx = (int)td;			    /* trampoline arg */
505 	pcb2->pcb_eip = (int)fork_trampoline;
506 	pcb2->pcb_gs = rgs();
507 	/*
508 	 * If we didn't copy the pcb, we'd need to do the following registers:
509 	 * pcb2->pcb_cr3:	cloned above.
510 	 * pcb2->pcb_dr*:	cloned above.
511 	 * pcb2->pcb_savefpu:	cloned above.
512 	 * pcb2->pcb_flags:	cloned above.
513 	 * pcb2->pcb_onfault:	cloned above (always NULL here?).
514 	 * pcb2->pcb_gs:	cloned above.
515 	 * pcb2->pcb_ext:	cleared below.
516 	 */
517 	pcb2->pcb_ext = NULL;
518 
519 	/* Setup to release spin count in fork_exit(). */
520 	td->td_md.md_spinlock_count = 1;
521 	td->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
522 }
523 
524 /*
525  * Set that machine state for performing an upcall that starts
526  * the entry function with the given argument.
527  */
528 void
529 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
530     stack_t *stack)
531 {
532 
533 	/*
534 	 * Do any extra cleaning that needs to be done.
535 	 * The thread may have optional components
536 	 * that are not present in a fresh thread.
537 	 * This may be a recycled thread so make it look
538 	 * as though it's newly allocated.
539 	 */
540 	cpu_thread_clean(td);
541 
542 	/*
543 	 * Set the trap frame to point at the beginning of the entry
544 	 * function.
545 	 */
546 	td->td_frame->tf_ebp = 0;
547 	td->td_frame->tf_esp =
548 	    (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4;
549 	td->td_frame->tf_eip = (int)entry;
550 
551 	/* Pass the argument to the entry point. */
552 	suword((void *)(td->td_frame->tf_esp + sizeof(void *)),
553 	    (int)arg);
554 }
555 
556 int
557 cpu_set_user_tls(struct thread *td, void *tls_base)
558 {
559 	struct segment_descriptor sd;
560 	uint32_t base;
561 
562 	/*
563 	 * Construct a descriptor and store it in the pcb for
564 	 * the next context switch.  Also store it in the gdt
565 	 * so that the load of tf_fs into %fs will activate it
566 	 * at return to userland.
567 	 */
568 	base = (uint32_t)tls_base;
569 	sd.sd_lobase = base & 0xffffff;
570 	sd.sd_hibase = (base >> 24) & 0xff;
571 	sd.sd_lolimit = 0xffff;	/* 4GB limit, wraps around */
572 	sd.sd_hilimit = 0xf;
573 	sd.sd_type  = SDT_MEMRWA;
574 	sd.sd_dpl   = SEL_UPL;
575 	sd.sd_p     = 1;
576 	sd.sd_xx    = 0;
577 	sd.sd_def32 = 1;
578 	sd.sd_gran  = 1;
579 	critical_enter();
580 	/* set %gs */
581 	td->td_pcb->pcb_gsd = sd;
582 	if (td == curthread) {
583 		PCPU_GET(fsgs_gdt)[1] = sd;
584 		load_gs(GSEL(GUGS_SEL, SEL_UPL));
585 	}
586 	critical_exit();
587 	return (0);
588 }
589 
590 /*
591  * Convert kernel VA to physical address
592  */
593 vm_paddr_t
594 kvtop(void *addr)
595 {
596 	vm_paddr_t pa;
597 
598 	pa = pmap_kextract((vm_offset_t)addr);
599 	if (pa == 0)
600 		panic("kvtop: zero page frame");
601 	return (pa);
602 }
603 
604 #ifdef SMP
605 static void
606 cpu_reset_proxy()
607 {
608 	cpuset_t tcrp;
609 
610 	cpu_reset_proxy_active = 1;
611 	while (cpu_reset_proxy_active == 1)
612 		;	/* Wait for other cpu to see that we've started */
613 	CPU_SETOF(cpu_reset_proxyid, &tcrp);
614 	stop_cpus(tcrp);
615 	printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid);
616 	DELAY(1000000);
617 	cpu_reset_real();
618 }
619 #endif
620 
621 void
622 cpu_reset()
623 {
624 #ifdef XBOX
625 	if (arch_i386_is_xbox) {
626 		/* Kick the PIC16L, it can reboot the box */
627 		pic16l_reboot();
628 		for (;;);
629 	}
630 #endif
631 
632 #ifdef SMP
633 	cpuset_t map;
634 	u_int cnt;
635 
636 	if (smp_started) {
637 		map = all_cpus;
638 		CPU_CLR(PCPU_GET(cpuid), &map);
639 		CPU_NAND(&map, &stopped_cpus);
640 		if (!CPU_EMPTY(&map)) {
641 			printf("cpu_reset: Stopping other CPUs\n");
642 			stop_cpus(map);
643 		}
644 
645 		if (PCPU_GET(cpuid) != 0) {
646 			cpu_reset_proxyid = PCPU_GET(cpuid);
647 			cpustop_restartfunc = cpu_reset_proxy;
648 			cpu_reset_proxy_active = 0;
649 			printf("cpu_reset: Restarting BSP\n");
650 
651 			/* Restart CPU #0. */
652 			/* XXX: restart_cpus(1 << 0); */
653 			CPU_SETOF(0, &started_cpus);
654 			wmb();
655 
656 			cnt = 0;
657 			while (cpu_reset_proxy_active == 0 && cnt < 10000000)
658 				cnt++;	/* Wait for BSP to announce restart */
659 			if (cpu_reset_proxy_active == 0)
660 				printf("cpu_reset: Failed to restart BSP\n");
661 			enable_intr();
662 			cpu_reset_proxy_active = 2;
663 
664 			while (1);
665 			/* NOTREACHED */
666 		}
667 
668 		DELAY(1000000);
669 	}
670 #endif
671 	cpu_reset_real();
672 	/* NOTREACHED */
673 }
674 
675 static void
676 cpu_reset_real()
677 {
678 	struct region_descriptor null_idt;
679 #ifndef PC98
680 	int b;
681 #endif
682 
683 	disable_intr();
684 #ifdef CPU_ELAN
685 	if (elan_mmcr != NULL)
686 		elan_mmcr->RESCFG = 1;
687 #endif
688 
689 	if (cpu == CPU_GEODE1100) {
690 		/* Attempt Geode's own reset */
691 		outl(0xcf8, 0x80009044ul);
692 		outl(0xcfc, 0xf);
693 	}
694 
695 #ifdef PC98
696 	/*
697 	 * Attempt to do a CPU reset via CPU reset port.
698 	 */
699 	if ((inb(0x35) & 0xa0) != 0xa0) {
700 		outb(0x37, 0x0f);		/* SHUT0 = 0. */
701 		outb(0x37, 0x0b);		/* SHUT1 = 0. */
702 	}
703 	outb(0xf0, 0x00);		/* Reset. */
704 #else
705 #if !defined(BROKEN_KEYBOARD_RESET)
706 	/*
707 	 * Attempt to do a CPU reset via the keyboard controller,
708 	 * do not turn off GateA20, as any machine that fails
709 	 * to do the reset here would then end up in no man's land.
710 	 */
711 	outb(IO_KBD + 4, 0xFE);
712 	DELAY(500000);	/* wait 0.5 sec to see if that did it */
713 #endif
714 
715 	/*
716 	 * Attempt to force a reset via the Reset Control register at
717 	 * I/O port 0xcf9.  Bit 2 forces a system reset when it
718 	 * transitions from 0 to 1.  Bit 1 selects the type of reset
719 	 * to attempt: 0 selects a "soft" reset, and 1 selects a
720 	 * "hard" reset.  We try a "hard" reset.  The first write sets
721 	 * bit 1 to select a "hard" reset and clears bit 2.  The
722 	 * second write forces a 0 -> 1 transition in bit 2 to trigger
723 	 * a reset.
724 	 */
725 	outb(0xcf9, 0x2);
726 	outb(0xcf9, 0x6);
727 	DELAY(500000);  /* wait 0.5 sec to see if that did it */
728 
729 	/*
730 	 * Attempt to force a reset via the Fast A20 and Init register
731 	 * at I/O port 0x92.  Bit 1 serves as an alternate A20 gate.
732 	 * Bit 0 asserts INIT# when set to 1.  We are careful to only
733 	 * preserve bit 1 while setting bit 0.  We also must clear bit
734 	 * 0 before setting it if it isn't already clear.
735 	 */
736 	b = inb(0x92);
737 	if (b != 0xff) {
738 		if ((b & 0x1) != 0)
739 			outb(0x92, b & 0xfe);
740 		outb(0x92, b | 0x1);
741 		DELAY(500000);  /* wait 0.5 sec to see if that did it */
742 	}
743 #endif /* PC98 */
744 
745 	printf("No known reset method worked, attempting CPU shutdown\n");
746 	DELAY(1000000); /* wait 1 sec for printf to complete */
747 
748 	/* Wipe the IDT. */
749 	null_idt.rd_limit = 0;
750 	null_idt.rd_base = 0;
751 	lidt(&null_idt);
752 
753 	/* "good night, sweet prince .... <THUNK!>" */
754 	breakpoint();
755 
756 	/* NOTREACHED */
757 	while(1);
758 }
759 
760 /*
761  * Get an sf_buf from the freelist.  May block if none are available.
762  */
763 void
764 sf_buf_map(struct sf_buf *sf, int flags)
765 {
766 	pt_entry_t opte, *ptep;
767 
768 	/*
769 	 * Update the sf_buf's virtual-to-physical mapping, flushing the
770 	 * virtual address from the TLB.  Since the reference count for
771 	 * the sf_buf's old mapping was zero, that mapping is not
772 	 * currently in use.  Consequently, there is no need to exchange
773 	 * the old and new PTEs atomically, even under PAE.
774 	 */
775 	ptep = vtopte(sf->kva);
776 	opte = *ptep;
777 	*ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V |
778 	    pmap_cache_bits(sf->m->md.pat_mode, 0);
779 
780 	/*
781 	 * Avoid unnecessary TLB invalidations: If the sf_buf's old
782 	 * virtual-to-physical mapping was not used, then any processor
783 	 * that has invalidated the sf_buf's virtual address from its TLB
784 	 * since the last used mapping need not invalidate again.
785 	 */
786 #ifdef SMP
787 	if ((opte & (PG_V | PG_A)) ==  (PG_V | PG_A))
788 		CPU_ZERO(&sf->cpumask);
789 
790 	sf_buf_shootdown(sf, flags);
791 #else
792 	if ((opte & (PG_V | PG_A)) ==  (PG_V | PG_A))
793 		pmap_invalidate_page(kernel_pmap, sf->kva);
794 #endif
795 }
796 
797 #ifdef SMP
798 void
799 sf_buf_shootdown(struct sf_buf *sf, int flags)
800 {
801 	cpuset_t other_cpus;
802 	u_int cpuid;
803 
804 	sched_pin();
805 	cpuid = PCPU_GET(cpuid);
806 	if (!CPU_ISSET(cpuid, &sf->cpumask)) {
807 		CPU_SET(cpuid, &sf->cpumask);
808 		invlpg(sf->kva);
809 	}
810 	if ((flags & SFB_CPUPRIVATE) == 0) {
811 		other_cpus = all_cpus;
812 		CPU_CLR(cpuid, &other_cpus);
813 		CPU_NAND(&other_cpus, &sf->cpumask);
814 		if (!CPU_EMPTY(&other_cpus)) {
815 			CPU_OR(&sf->cpumask, &other_cpus);
816 			smp_masked_invlpg(other_cpus, sf->kva);
817 		}
818 	}
819 	sched_unpin();
820 }
821 #endif
822 
823 /*
824  * MD part of sf_buf_free().
825  */
826 int
827 sf_buf_unmap(struct sf_buf *sf)
828 {
829 
830 	return (0);
831 }
832 
833 static void
834 sf_buf_invalidate(struct sf_buf *sf)
835 {
836 	vm_page_t m = sf->m;
837 
838 	/*
839 	 * Use pmap_qenter to update the pte for
840 	 * existing mapping, in particular, the PAT
841 	 * settings are recalculated.
842 	 */
843 	pmap_qenter(sf->kva, &m, 1);
844 	pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE);
845 }
846 
847 /*
848  * Invalidate the cache lines that may belong to the page, if
849  * (possibly old) mapping of the page by sf buffer exists.  Returns
850  * TRUE when mapping was found and cache invalidated.
851  */
852 boolean_t
853 sf_buf_invalidate_cache(vm_page_t m)
854 {
855 
856 	return (sf_buf_process_page(m, sf_buf_invalidate));
857 }
858 
859 /*
860  * Software interrupt handler for queued VM system processing.
861  */
862 void
863 swi_vm(void *dummy)
864 {
865 	if (busdma_swi_pending != 0)
866 		busdma_swi();
867 }
868 
869 /*
870  * Tell whether this address is in some physical memory region.
871  * Currently used by the kernel coredump code in order to avoid
872  * dumping the ``ISA memory hole'' which could cause indefinite hangs,
873  * or other unpredictable behaviour.
874  */
875 
876 int
877 is_physical_memory(vm_paddr_t addr)
878 {
879 
880 #ifdef DEV_ISA
881 	/* The ISA ``memory hole''. */
882 	if (addr >= 0xa0000 && addr < 0x100000)
883 		return 0;
884 #endif
885 
886 	/*
887 	 * stuff other tests for known memory-mapped devices (PCI?)
888 	 * here
889 	 */
890 
891 	return 1;
892 }
893