1/*- 2 * Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org> 3 * Copyright (c) 2001-2012 Mitsuru IWASAKI <iwasaki@jp.freebsd.org> 4 * Copyright (c) 2003 Peter Wemm 5 * Copyright (c) 2008-2012 Jung-uk Kim <jkim@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32#include <machine/asmacros.h> 33#include <machine/ppireg.h> 34#include <machine/specialreg.h> 35#include <machine/timerreg.h> 36 37#include "assym.s" 38 39/* 40 * Resume entry point. The BIOS enters here in real mode after POST with 41 * CS set to the page where we stored this code. It should configure the 42 * segment registers with a flat 4 GB address space and EFLAGS.IF = 0. 43 * Depending on the previous sleep state, we may need to initialize more 44 * of the system (i.e., S3 suspend-to-RAM vs. S4 suspend-to-disk). 45 */ 46 47 .data /* So we can modify it */ 48 49 ALIGN_TEXT 50 .code16 51wakeup_start: 52 /* 53 * Set up segment registers for real mode, a small stack for 54 * any calls we make, and clear any flags. 55 */ 56 cli /* make sure no interrupts */ 57 mov %cs, %ax /* copy %cs to %ds. Remember these */ 58 mov %ax, %ds /* are offsets rather than selectors */ 59 mov %ax, %ss 60 movw $PAGE_SIZE, %sp 61 xorw %ax, %ax 62 pushw %ax 63 popfw 64 65 /* To debug resume hangs, beep the speaker if the user requested. */ 66 testb $~0, resume_beep - wakeup_start 67 jz 1f 68 movb $0, resume_beep - wakeup_start 69 70 /* Set PIC timer2 to beep. */ 71 movb $(TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT), %al 72 outb %al, $TIMER_MODE 73 74 /* Turn on speaker. */ 75 inb $IO_PPI, %al 76 orb $PIT_SPKR, %al 77 outb %al, $IO_PPI 78 79 /* Set frequency. */ 80 movw $0x4c0, %ax 81 outb %al, $TIMER_CNTR2 82 shrw $8, %ax 83 outb %al, $TIMER_CNTR2 841: 85 86 /* Re-initialize video BIOS if the reset_video tunable is set. */ 87 testb $~0, reset_video - wakeup_start 88 jz 1f 89 movb $0, reset_video - wakeup_start 90 lcall $0xc000, $3 91 92 /* When we reach here, int 0x10 should be ready. Hide cursor. */ 93 movb $0x01, %ah 94 movb $0x20, %ch 95 int $0x10 96 97 /* Re-start in case the previous BIOS call clobbers them. */ 98 jmp wakeup_start 991: 100 101 /* 102 * Find relocation base and patch the gdt descript and ljmp targets 103 */ 104 xorl %ebx, %ebx 105 mov %cs, %bx 106 sall $4, %ebx /* %ebx is now our relocation base */ 107 108 /* 109 * Load the descriptor table pointer. We'll need it when running 110 * in 16-bit protected mode. 111 */ 112 lgdtl bootgdtdesc - wakeup_start 113 114 /* Enable protected mode */ 115 movl $CR0_PE, %eax 116 mov %eax, %cr0 117 118 /* 119 * Now execute a far jump to turn on protected mode. This 120 * causes the segment registers to turn into selectors and causes 121 * %cs to be loaded from the gdt. 122 * 123 * The following instruction is: 124 * ljmpl $bootcode32 - bootgdt, $wakeup_32 - wakeup_start 125 * but gas cannot assemble that. And besides, we patch the targets 126 * in early startup and its a little clearer what we are patching. 127 */ 128wakeup_sw32: 129 .byte 0x66 /* size override to 32 bits */ 130 .byte 0xea /* opcode for far jump */ 131 .long wakeup_32 - wakeup_start /* offset in segment */ 132 .word bootcode32 - bootgdt /* index in gdt for 32 bit code */ 133 134 /* 135 * At this point, we are running in 32 bit legacy protected mode. 136 */ 137 ALIGN_TEXT 138 .code32 139wakeup_32: 140 141 mov $bootdata32 - bootgdt, %eax 142 mov %ax, %ds 143 144 /* Get PCB and return address. */ 145 movl wakeup_pcb - wakeup_start(%ebx), %ecx 146 movl wakeup_ret - wakeup_start(%ebx), %edx 147 148 /* Restore CR4 and CR3. */ 149 movl wakeup_cr4 - wakeup_start(%ebx), %eax 150 mov %eax, %cr4 151 movl wakeup_cr3 - wakeup_start(%ebx), %eax 152 mov %eax, %cr3 153 154 /* Enable paging. */ 155 mov %cr0, %eax 156 orl $CR0_PG, %eax 157 mov %eax, %cr0 158 159 jmp 1f 1601: 161 /* Jump to return address. */ 162 jmp *%edx 163 164 .data 165 166resume_beep: 167 .byte 0 168reset_video: 169 .byte 0 170 171 ALIGN_DATA 172bootgdt: 173 .long 0x00000000 174 .long 0x00000000 175 176bootcode32: 177 .long 0x0000ffff 178 .long 0x00cf9b00 179 180bootdata32: 181 .long 0x0000ffff 182 .long 0x00cf9300 183bootgdtend: 184 185bootgdtdesc: 186 .word bootgdtend - bootgdt /* Length */ 187 .long bootgdt - wakeup_start /* Offset plus %ds << 4 */ 188 189 ALIGN_DATA 190wakeup_cr4: 191 .long 0 192wakeup_cr3: 193 .long 0 194wakeup_pcb: 195 .long 0 196wakeup_ret: 197 .long 0 198wakeup_gdt: /* not used */ 199 .word 0 200 .long 0 201dummy: 202