1*2e36db14SWarner Losh 2*2e36db14SWarner Losh* Multi purpose pin (MPP) configuration. 3*2e36db14SWarner Losh 4*2e36db14SWarner LoshRequired properties: 5*2e36db14SWarner Losh 6*2e36db14SWarner Losh- pin-map : array of pin configurations. Each pin is defined by 2 cells, 7*2e36db14SWarner Losh respectively: <pin> <function>. Pins not specified in the pin-map property 8*2e36db14SWarner Losh are assumed to have default value of <function> = 0, which means GPIO. 9*2e36db14SWarner Losh 10*2e36db14SWarner Losh - pin : pin number. 11*2e36db14SWarner Losh 12*2e36db14SWarner Losh - function : function ID of the pin according to the assignment tables in 13*2e36db14SWarner Losh User Manual. Each pin can have many possible functions depending on the 14*2e36db14SWarner Losh MPP unit incarnation. 15*2e36db14SWarner Losh 16*2e36db14SWarner Losh- pin-count: number of the physical MPP connections on the SOC (depending on 17*2e36db14SWarner Losh the model it can be 24-50, or possibly else in future devices). 18*2e36db14SWarner Losh 19*2e36db14SWarner LoshExample: 20*2e36db14SWarner Losh 21*2e36db14SWarner Losh mpp@10000 { 22*2e36db14SWarner Losh #pin-cells = <2>; 23*2e36db14SWarner Losh compatible = "mrvl,mpp"; 24*2e36db14SWarner Losh reg = <0x10000 0x34>; 25*2e36db14SWarner Losh pin-count= <50>; 26*2e36db14SWarner Losh pin-map = < 27*2e36db14SWarner Losh 0 1 /* MPP[0]: NF_IO[2] */ 28*2e36db14SWarner Losh 1 1 /* MPP[1]: NF_IO[3] */ 29*2e36db14SWarner Losh 2 1 /* MPP[2]: NF_IO[4] */ 30*2e36db14SWarner Losh 3 1 /* MPP[3]: NF_IO[5] */ 31*2e36db14SWarner Losh 4 1 /* MPP[4]: NF_IO[6] */ 32*2e36db14SWarner Losh 5 1 /* MPP[5]: NF_IO[7] */ 33*2e36db14SWarner Losh 6 1 /* MPP[6]: SYSRST_OUTn */ 34*2e36db14SWarner Losh 7 2 /* MPP[7]: SPI_SCn */ 35*2e36db14SWarner Losh 8 1 /* MPP[8]: TW_SDA */ 36*2e36db14SWarner Losh 9 1 /* MPP[9]: TW_SCK */ 37*2e36db14SWarner Losh 10 3 /* MPP[10]: UA0_TXD */ 38*2e36db14SWarner Losh 11 3 /* MPP[11]: UA0_RXD */ 39*2e36db14SWarner Losh 12 1 /* MPP[12]: SD_CLK */ 40*2e36db14SWarner Losh 13 1 /* MPP[13]: SD_CMD */ 41*2e36db14SWarner Losh 14 1 /* MPP[14]: SD_D[0] */ 42*2e36db14SWarner Losh 15 1 /* MPP[15]: SD_D[1] */ 43*2e36db14SWarner Losh 16 1 /* MPP[16]: SD_D[2] */ 44*2e36db14SWarner Losh 17 1 /* MPP[17]: SD_D[3] */ 45*2e36db14SWarner Losh 18 1 /* MPP[18]: NF_IO[0] */ 46*2e36db14SWarner Losh 19 1 /* MPP[19]: NF_IO[1] */ 47*2e36db14SWarner Losh 20 5 /* MPP[20]: SATA1_AC */ 48*2e36db14SWarner Losh 21 5 >; /* MPP[21]: SATA0_AC */ 49*2e36db14SWarner Losh }; 50