1/*- 2 * Copyright (c) 2016 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27/dts-v1/; 28/include/ "zynq-7000.dtsi" 29 30/ { 31 model = "zedboard"; 32 compatible = "digilent,zedboard", "xlnx,zynq-7000"; 33 34 memory { 35 // First megabyte isn't accessible by all interconnect masters. 36 device_type = "memory"; 37 reg = <0x100000 0x1ff00000>; /* 511MB RAM at 0x100000 */ 38 }; 39 40 chosen { 41 stdin = &uart1; 42 stdout = &uart1; 43 }; 44}; 45 46&slcr { 47 clock-frequency = <33333333>; // 33Mhz PS_CLK 48}; 49 50&global_timer { 51 clock-frequency = <333333333>; // 333Mhz 52}; 53 54&uart1 { 55 status = "okay"; 56}; 57 58ð0 { 59 status = "okay"; 60}; 61 62&qspi0 { 63 status = "okay"; 64 65 flash0 { 66 compatible = "st,m25p", "s25fl128"; 67 spi-chipselect = <0>; 68 }; 69}; 70 71&sdhci0 { 72 status = "okay"; 73}; 74 75&ehci0 { 76 status = "okay"; 77 phy_vbus_ext; 78}; 79 80