xref: /freebsd/sys/dts/arm/ufw.dts (revision 7899f917b1c0ea178f1d2be0cfb452086d079d23)
1/*-
2 * Copyright (c) 2016, 2017 Rubicon Communications, LLC (Netgate)
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 */
27
28/dts-v1/;
29
30#include "am33xx.dtsi"
31
32/ {
33	model = "AM335x uFW";
34	compatible = "ti,am335x-ufw", "ti,am335x-ubmc", "ti,am33xx";
35
36	memory {
37		device_type = "memory";
38		reg = <0x80000000 0x10000000>; /* 256 MB */
39	};
40
41	vmmcsd_fixed: fixedregulator@0 {
42		compatible = "regulator-fixed";
43		regulator-name = "vmmcsd_fixed";
44		regulator-min-microvolt = <3300000>;
45		regulator-max-microvolt = <3300000>;
46	};
47};
48
49&am33xx_pinmux {
50	pinctrl-names = "default";
51	pinctrl-0 = <&clkout2_pin>;
52
53	i2c0_pins: pinmux_i2c0_pins {
54		pinctrl-single,pins = <
55			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
56			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
57		>;
58	};
59
60	i2c1_pins: pinmux_i2c1_pins {
61		pinctrl-single,pins = <
62			AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart0_ctsn.i2c1_sda */
63			AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart0_rtsn.i2c1_scl */
64		>;
65	};
66
67	uart0_pins: pinmux_uart0_pins {
68		pinctrl-single,pins = <
69			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
70			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
71		>;
72	};
73
74	clkout2_pin: pinmux_clkout2_pin {
75		pinctrl-single,pins = <
76			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
77		>;
78	};
79
80	cpsw_default: cpsw_default {
81		pinctrl-single,pins = <
82			/* Slave 1 */
83			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii_1_txen */
84			AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxdv.rgmii_1_rxdv */
85			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii_1_txd3 */
86			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii_1_txd2 */
87			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii_1_txd1 */
88			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii_1_txd0 */
89			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii_1_txclk */
90			AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxclk.rgmii_1_rxclk */
91			AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxd3.rgmii_1_rxd3 */
92			AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxd2.rgmii_1_rxd2 */
93			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxd1.rgmii_1_rxd1 */
94			AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxd0.rgmii_1_rxd0 */
95
96			/* Slave 2 */
97			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a0.rgmii_2_txen */
98			AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a1.rgmii_2_rxdv */
99			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a2.rgmii_2_txd3 */
100			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a3.rgmii_2_txd2 */
101			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a4.rgmii_2_txd1 */
102			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a5.rgmii_2_txd0 */
103			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a6.rgmii_2_txclk */
104			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a7.rgmii_2_rxclk */
105			AM33XX_IOPAD(0x860, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a8.rgmii_2_rxd3 */
106			AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a9.rgmii_2_rxd2 */
107			AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a10.rgmii_2_rxd1 */
108			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a11.rgmii_2_rxd0 */
109		>;
110	};
111
112	cpsw_sleep: cpsw_sleep {
113		pinctrl-single,pins = <
114			/* Slave 1 reset value */
115			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
116			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
117			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
118			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
119			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
120			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
121			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
122			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
123			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
124			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
125			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
126			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
127
128			/* Slave 2 reset value */
129			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
130			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
131			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
132			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
133			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
134			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
135			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
136			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
137			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
138			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
139			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
140			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
141		>;
142	};
143
144	davinci_mdio_default: davinci_mdio_default {
145		pinctrl-single,pins = <
146			/* MDIO */
147			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
148			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
149		>;
150	};
151
152	davinci_mdio_sleep: davinci_mdio_sleep {
153		pinctrl-single,pins = <
154			/* MDIO reset value */
155			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
156			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
157		>;
158	};
159
160	mmc1_pins: pinmux_mmc1_pins {
161		pinctrl-single,pins = <
162			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
163			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
164			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
165			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
166			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
167			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
168			AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* spi0_cs1.mmc0_cd */
169		>;
170	};
171
172	emmc_pins: pinmux_emmc_pins {
173		pinctrl-single,pins = <
174			AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp0_fsx.mmc1_cd */
175			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
176			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
177			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
178			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
179			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
180			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
181			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
182			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
183			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
184			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
185		>;
186	};
187};
188
189&uart0 {
190	pinctrl-names = "default";
191	pinctrl-0 = <&uart0_pins>;
192
193	status = "okay";
194};
195
196&usb {
197	status = "okay";
198};
199
200&usb_ctrl_mod {
201	status = "okay";
202};
203
204&usb0_phy {
205	status = "okay";
206};
207
208&usb1_phy {
209	status = "okay";
210};
211
212&usb0 {
213	status = "okay";
214	dr_mode = "host";
215};
216
217&usb1 {
218	status = "okay";
219	dr_mode = "host";
220};
221
222&cppi41dma  {
223	status = "okay";
224};
225
226&cpsw_emac0 {
227	phy_id = <&davinci_mdio>, <1>;
228	phy-mode = "rgmii";
229	dual_emac_res_vlan = <4071>;
230};
231
232&cpsw_emac1 {
233	phy_id = <&davinci_mdio>, <2>;
234	phy-mode = "rgmii";
235	dual_emac_res_vlan = <4072>;
236};
237
238&mac {
239	pinctrl-names = "default", "sleep";
240	pinctrl-0 = <&cpsw_default>;
241	pinctrl-1 = <&cpsw_sleep>;
242	active_slave = <1>;
243	status = "okay";
244	dual_emac;
245	txen-skew-ps = <0>;
246	rxdv-skew-ps = <1400>;
247	rxd0-skew-ps = <1400>;
248	rxd1-skew-ps = <1400>;
249	rxd2-skew-ps = <1400>;
250	rxd3-skew-ps = <1400>;
251	txd0-skew-ps = <0>;
252	txd1-skew-ps = <0>;
253	txd2-skew-ps = <0>;
254	txd3-skew-ps = <0>;
255	rxc-skew-ps = <4400>;
256	txc-skew-ps = <6200>;
257};
258
259&davinci_mdio {
260	pinctrl-names = "default", "sleep";
261	pinctrl-0 = <&davinci_mdio_default>;
262	pinctrl-1 = <&davinci_mdio_sleep>;
263	status = "okay";
264};
265
266&aes {
267	status = "okay";
268};
269
270&sham {
271	status = "okay";
272};
273
274&mmc1 {
275	vmmc-supply = <&vmmcsd_fixed>;
276	pinctrl-names = "default";
277	pinctrl-0 = <&mmc1_pins>;
278	bus-width = <4>;
279	non-removable;
280	wp-disable;
281	status = "okay";
282};
283
284&mmc2 {
285	vmmc-supply = <&vmmcsd_fixed>;
286	pinctrl-names = "default";
287	pinctrl-0 = <&emmc_pins>;
288	bus-width = <8>;
289	ti,dual-volt;
290	non-removable;
291	status = "okay";
292};
293
294&i2c0 {
295	pinctrl-names = "default";
296	pinctrl-0 = <&i2c0_pins>;
297
298	status = "okay";
299	clock-frequency = <400000>;
300
301	baseboard_eeprom: baseboard_eeprom@50 {
302		compatible = "atmel,24c02";
303		reg = <0x50>;
304
305		#address-cells = <1>;
306		#size-cells = <1>;
307		baseboard_data: baseboard_data@0 {
308			reg = <0 0x100>;
309		};
310	};
311};
312
313&i2c1 {
314	pinctrl-names = "default";
315	pinctrl-0 = <&i2c1_pins>;
316
317	status = "okay";
318};
319