1 /****************************************************************************** 2 * xen_intr.c 3 * 4 * Xen event and interrupt services for x86 HVM guests. 5 * 6 * Copyright (c) 2002-2005, K A Fraser 7 * Copyright (c) 2005, Intel Corporation <xiaofeng.ling@intel.com> 8 * Copyright (c) 2012, Spectra Logic Corporation 9 * Copyright © 2021-2023, Elliott Mitchell 10 * 11 * This file may be distributed separately from the Linux kernel, or 12 * incorporated into other software packages, subject to the following license: 13 * 14 * Permission is hereby granted, free of charge, to any person obtaining a copy 15 * of this source file (the "Software"), to deal in the Software without 16 * restriction, including without limitation the rights to use, copy, modify, 17 * merge, publish, distribute, sublicense, and/or sell copies of the Software, 18 * and to permit persons to whom the Software is furnished to do so, subject to 19 * the following conditions: 20 * 21 * The above copyright notice and this permission notice shall be included in 22 * all copies or substantial portions of the Software. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 27 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 28 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 29 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 30 * IN THE SOFTWARE. 31 */ 32 33 #include <sys/cdefs.h> 34 #include "opt_ddb.h" 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/limits.h> 41 #include <sys/lock.h> 42 #include <sys/mutex.h> 43 #include <sys/interrupt.h> 44 #include <sys/pcpu.h> 45 #include <sys/proc.h> 46 #include <sys/smp.h> 47 #include <sys/refcount.h> 48 49 #include <vm/vm.h> 50 #include <vm/pmap.h> 51 52 #include <machine/smp.h> 53 #include <machine/stdarg.h> 54 55 #include <xen/xen-os.h> 56 #include <xen/hypervisor.h> 57 #include <xen/xen_intr.h> 58 #include <xen/evtchn/evtchnvar.h> 59 60 #include <dev/xen/xenpci/xenpcivar.h> 61 #include <dev/pci/pcivar.h> 62 #include <machine/xen/arch-intr.h> 63 64 #ifdef DDB 65 #include <ddb/ddb.h> 66 #endif 67 68 /** 69 * Per-cpu event channel processing state. 70 */ 71 struct xen_intr_pcpu_data { 72 /** 73 * The last event channel bitmap section (level one bit) processed. 74 * This is used to ensure we scan all ports before 75 * servicing an already servied port again. 76 */ 77 u_int last_processed_l1i; 78 79 /** 80 * The last event channel processed within the event channel 81 * bitmap being scanned. 82 */ 83 u_int last_processed_l2i; 84 85 /** 86 * A bitmap of ports that can be serviced from this CPU. 87 * A set bit means interrupt handling is enabled. 88 */ 89 u_long evtchn_enabled[sizeof(u_long) * 8]; 90 }; 91 92 /* 93 * Start the scan at port 0 by initializing the last scanned 94 * location as the highest numbered event channel port. 95 */ 96 DPCPU_DEFINE_STATIC(struct xen_intr_pcpu_data, xen_intr_pcpu) = { 97 .last_processed_l1i = LONG_BIT - 1, 98 .last_processed_l2i = LONG_BIT - 1 99 }; 100 101 DPCPU_DECLARE(struct vcpu_info *, vcpu_info); 102 103 #define INVALID_EVTCHN (~(evtchn_port_t)0) /* Invalid event channel */ 104 #define is_valid_evtchn(x) ((uintmax_t)(x) < NR_EVENT_CHANNELS) 105 106 /* 107 * Lock for interrupt core data. 108 * 109 * Modifying xen_intr_port_to_isrc[], or isrc->xi_port (implies the former) 110 * requires this lock be held. Any time this lock is not held, the condition 111 * `!xen_intr_port_to_isrc[i] || (xen_intr_port_to_isrc[i]->ix_port == i)` 112 * MUST be true for all values of i which are valid indicies of the array. 113 * 114 * Acquire/release operations for isrc->xi_refcount require this lock be held. 115 */ 116 static struct mtx xen_intr_isrc_lock; 117 static struct xenisrc *xen_intr_port_to_isrc[NR_EVENT_CHANNELS]; 118 119 /*------------------------- Private Functions --------------------------------*/ 120 121 /** 122 * Retrieve a handle for a Xen interrupt source. 123 * 124 * \param isrc A valid Xen interrupt source structure. 125 * 126 * \returns A handle suitable for use with xen_intr_isrc_from_handle() 127 * to retrieve the original Xen interrupt source structure. 128 */ 129 130 static inline xen_intr_handle_t 131 xen_intr_handle_from_isrc(struct xenisrc *isrc) 132 { 133 return (isrc); 134 } 135 136 /** 137 * Lookup a Xen interrupt source object given an interrupt binding handle. 138 * 139 * \param handle A handle initialized by a previous call to 140 * xen_intr_bind_isrc(). 141 * 142 * \returns A pointer to the Xen interrupt source object associated 143 * with the given interrupt handle. NULL if no association 144 * currently exists. 145 */ 146 static inline struct xenisrc * 147 xen_intr_isrc_from_handle(xen_intr_handle_t handle) 148 { 149 return ((struct xenisrc *)handle); 150 } 151 152 /** 153 * Disable signal delivery for an event channel port on the 154 * specified CPU. 155 * 156 * \param port The event channel port to mask. 157 * 158 * This API is used to manage the port<=>CPU binding of event 159 * channel handlers. 160 * 161 * \note This operation does not preclude reception of an event 162 * for this event channel on another CPU. To mask the 163 * event channel globally, use evtchn_mask(). 164 */ 165 static inline void 166 evtchn_cpu_mask_port(u_int cpu, evtchn_port_t port) 167 { 168 struct xen_intr_pcpu_data *pcpu; 169 170 pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu); 171 xen_clear_bit(port, pcpu->evtchn_enabled); 172 } 173 174 /** 175 * Enable signal delivery for an event channel port on the 176 * specified CPU. 177 * 178 * \param port The event channel port to unmask. 179 * 180 * This API is used to manage the port<=>CPU binding of event 181 * channel handlers. 182 * 183 * \note This operation does not guarantee that event delivery 184 * is enabled for this event channel port. The port must 185 * also be globally enabled. See evtchn_unmask(). 186 */ 187 static inline void 188 evtchn_cpu_unmask_port(u_int cpu, evtchn_port_t port) 189 { 190 struct xen_intr_pcpu_data *pcpu; 191 192 pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu); 193 xen_set_bit(port, pcpu->evtchn_enabled); 194 } 195 196 /** 197 * Attempt to free an active Xen interrupt source object. 198 * 199 * \param isrc The interrupt source object to release. 200 * 201 * \returns EBUSY if the source is still in use, otherwise 0. 202 */ 203 static int 204 xen_intr_release_isrc(struct xenisrc *isrc) 205 { 206 207 mtx_lock(&xen_intr_isrc_lock); 208 if (is_valid_evtchn(isrc->xi_port)) { 209 evtchn_mask_port(isrc->xi_port); 210 evtchn_clear_port(isrc->xi_port); 211 212 /* Rebind port to CPU 0. */ 213 evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port); 214 evtchn_cpu_unmask_port(0, isrc->xi_port); 215 216 if (isrc->xi_close != 0) { 217 struct evtchn_close close = { .port = isrc->xi_port }; 218 219 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close)) 220 panic("EVTCHNOP_close failed"); 221 } 222 223 xen_intr_port_to_isrc[isrc->xi_port] = NULL; 224 } 225 /* not reachable from xen_intr_port_to_isrc[], unlock */ 226 mtx_unlock(&xen_intr_isrc_lock); 227 228 xen_arch_intr_release(isrc); 229 return (0); 230 } 231 232 /** 233 * Associate an interrupt handler with an already allocated local Xen 234 * event channel port. 235 * 236 * \param isrcp The returned Xen interrupt object associated with 237 * the specified local port. 238 * \param local_port The event channel to bind. 239 * \param type The event channel type of local_port. 240 * \param intr_owner The device making this bind request. 241 * \param filter An interrupt filter handler. Specify NULL 242 * to always dispatch to the ithread handler. 243 * \param handler An interrupt ithread handler. Optional (can 244 * specify NULL) if all necessary event actions 245 * are performed by filter. 246 * \param arg Argument to present to both filter and handler. 247 * \param irqflags Interrupt handler flags. See sys/bus.h. 248 * \param handlep Pointer to an opaque handle used to manage this 249 * registration. 250 * 251 * \returns 0 on success, otherwise an errno. 252 */ 253 static int 254 xen_intr_bind_isrc(struct xenisrc **isrcp, evtchn_port_t local_port, 255 enum evtchn_type type, const char *intr_owner, driver_filter_t filter, 256 driver_intr_t handler, void *arg, enum intr_type flags, 257 xen_intr_handle_t *const port_handlep) 258 { 259 struct xenisrc *isrc; 260 int error; 261 262 *isrcp = NULL; 263 if (port_handlep == NULL) { 264 printf("%s: %s: Bad event handle\n", intr_owner, __func__); 265 return (EINVAL); 266 } 267 *port_handlep = NULL; 268 269 isrc = xen_arch_intr_alloc(); 270 if (isrc == NULL) 271 return (ENOSPC); 272 273 isrc->xi_cookie = NULL; 274 isrc->xi_type = type; 275 isrc->xi_port = local_port; 276 isrc->xi_close = false; 277 isrc->xi_cpu = 0; 278 refcount_init(&isrc->xi_refcount, 1); 279 mtx_lock(&xen_intr_isrc_lock); 280 xen_intr_port_to_isrc[isrc->xi_port] = isrc; 281 mtx_unlock(&xen_intr_isrc_lock); 282 283 #ifdef SMP 284 if (type == EVTCHN_TYPE_PORT) { 285 /* 286 * By default all interrupts are assigned to vCPU#0 287 * unless specified otherwise, so shuffle them to balance 288 * the interrupt load. 289 */ 290 xen_intr_assign_cpu(isrc, xen_arch_intr_next_cpu(isrc)); 291 } 292 #endif 293 294 /* 295 * If a filter or handler function is provided, add it to the event. 296 * Otherwise the event channel is left masked and without a handler, 297 * the caller is in charge of setting that up. 298 */ 299 if (filter != NULL || handler != NULL) { 300 error = xen_intr_add_handler(intr_owner, filter, handler, arg, 301 flags, xen_intr_handle_from_isrc(isrc)); 302 if (error != 0) { 303 xen_intr_release_isrc(isrc); 304 return (error); 305 } 306 } 307 308 *isrcp = isrc; 309 /* Assign the opaque handler */ 310 *port_handlep = xen_intr_handle_from_isrc(isrc); 311 return (0); 312 } 313 314 /** 315 * Determine the event channel ports at the given section of the 316 * event port bitmap which have pending events for the given cpu. 317 * 318 * \param pcpu The Xen interrupt pcpu data for the cpu being queried. 319 * \param sh The Xen shared info area. 320 * \param idx The index of the section of the event channel bitmap to 321 * inspect. 322 * 323 * \returns A u_long with bits set for every event channel with pending 324 * events. 325 */ 326 static inline u_long 327 xen_intr_active_ports(const struct xen_intr_pcpu_data *const pcpu, 328 const u_int idx) 329 { 330 volatile const shared_info_t *const sh = HYPERVISOR_shared_info; 331 332 CTASSERT(sizeof(sh->evtchn_mask[0]) == sizeof(sh->evtchn_pending[0])); 333 CTASSERT(sizeof(sh->evtchn_mask[0]) == sizeof(pcpu->evtchn_enabled[0])); 334 CTASSERT(sizeof(sh->evtchn_mask) == sizeof(sh->evtchn_pending)); 335 CTASSERT(sizeof(sh->evtchn_mask) == sizeof(pcpu->evtchn_enabled)); 336 return (sh->evtchn_pending[idx] 337 & ~sh->evtchn_mask[idx] 338 & pcpu->evtchn_enabled[idx]); 339 } 340 341 /** 342 * Interrupt handler for processing all Xen event channel events. 343 * 344 * \param trap_frame The trap frame context for the current interrupt. 345 */ 346 int 347 xen_intr_handle_upcall(void *unused __unused) 348 { 349 struct trapframe *trap_frame = curthread->td_intr_frame; 350 u_int l1i, l2i, port, cpu __diagused; 351 u_long masked_l1, masked_l2; 352 struct xenisrc *isrc; 353 vcpu_info_t *v; 354 struct xen_intr_pcpu_data *pc; 355 u_long l1, l2; 356 357 /* We must remain on the same vCPU during this function */ 358 CRITICAL_ASSERT(curthread); 359 360 cpu = PCPU_GET(cpuid); 361 pc = DPCPU_PTR(xen_intr_pcpu); 362 v = DPCPU_GET(vcpu_info); 363 364 if (!xen_has_percpu_evtchn()) { 365 KASSERT((cpu == 0), ("Fired PCI event callback on wrong CPU")); 366 } 367 368 v->evtchn_upcall_pending = 0; 369 /* No need for a barrier on x86 -- XCHG is a barrier on x86. */ 370 #if !defined(__amd64__) && !defined(__i386__) 371 /* Clear master flag /before/ clearing selector flag. */ 372 wmb(); 373 #endif 374 l1 = atomic_readandclear_long(&v->evtchn_pending_sel); 375 376 l1i = pc->last_processed_l1i; 377 l2i = pc->last_processed_l2i; 378 379 while (l1 != 0) { 380 l1i = (l1i + 1) % LONG_BIT; 381 masked_l1 = l1 & ((~0UL) << l1i); 382 383 if (masked_l1 == 0) { 384 /* 385 * if we masked out all events, wrap around 386 * to the beginning. 387 */ 388 l1i = LONG_BIT - 1; 389 l2i = LONG_BIT - 1; 390 continue; 391 } 392 l1i = ffsl(masked_l1) - 1; 393 394 do { 395 l2 = xen_intr_active_ports(pc, l1i); 396 397 l2i = (l2i + 1) % LONG_BIT; 398 masked_l2 = l2 & ((~0UL) << l2i); 399 400 if (masked_l2 == 0) { 401 /* if we masked out all events, move on */ 402 l2i = LONG_BIT - 1; 403 break; 404 } 405 l2i = ffsl(masked_l2) - 1; 406 407 /* process port */ 408 port = (l1i * LONG_BIT) + l2i; 409 evtchn_clear_port(port); 410 411 isrc = xen_intr_port_to_isrc[port]; 412 if (__predict_false(isrc == NULL)) 413 continue; 414 415 /* Make sure we are firing on the right vCPU */ 416 KASSERT((isrc->xi_cpu == PCPU_GET(cpuid)), 417 ("Received unexpected event on vCPU#%u, event bound to vCPU#%u", 418 PCPU_GET(cpuid), isrc->xi_cpu)); 419 420 xen_arch_intr_execute_handlers(isrc, trap_frame); 421 422 /* 423 * If this is the final port processed, 424 * we'll pick up here+1 next time. 425 */ 426 pc->last_processed_l1i = l1i; 427 pc->last_processed_l2i = l2i; 428 429 } while (l2i != LONG_BIT - 1); 430 431 l2 = xen_intr_active_ports(pc, l1i); 432 if (l2 == 0) { 433 /* 434 * We handled all ports, so we can clear the 435 * selector bit. 436 */ 437 l1 &= ~(1UL << l1i); 438 } 439 } 440 441 return (FILTER_HANDLED); 442 } 443 444 static int 445 xen_intr_init(void *dummy __unused) 446 { 447 shared_info_t *s = HYPERVISOR_shared_info; 448 struct xen_intr_pcpu_data *pcpu; 449 int i; 450 451 if (!xen_domain()) 452 return (0); 453 454 _Static_assert(is_valid_evtchn(0), 455 "is_valid_evtchn(0) fails (unused by Xen, but valid by interface"); 456 _Static_assert(is_valid_evtchn(NR_EVENT_CHANNELS - 1), 457 "is_valid_evtchn(max) fails (is a valid channel)"); 458 _Static_assert(!is_valid_evtchn(NR_EVENT_CHANNELS), 459 "is_valid_evtchn(>max) fails (NOT a valid channel)"); 460 _Static_assert(!is_valid_evtchn(~(evtchn_port_t)0), 461 "is_valid_evtchn(maxint) fails (overflow?)"); 462 _Static_assert(!is_valid_evtchn(INVALID_EVTCHN), 463 "is_valid_evtchn(INVALID_EVTCHN) fails (must be invalid!)"); 464 _Static_assert(!is_valid_evtchn(-1), 465 "is_valid_evtchn(-1) fails (negative are invalid)"); 466 467 mtx_init(&xen_intr_isrc_lock, "xen-irq-lock", NULL, MTX_DEF); 468 469 /* 470 * Set the per-cpu mask of CPU#0 to enable all, since by default all 471 * event channels are bound to CPU#0. 472 */ 473 CPU_FOREACH(i) { 474 pcpu = DPCPU_ID_PTR(i, xen_intr_pcpu); 475 memset(pcpu->evtchn_enabled, i == 0 ? ~0 : 0, 476 sizeof(pcpu->evtchn_enabled)); 477 } 478 479 for (i = 0; i < nitems(s->evtchn_mask); i++) 480 atomic_store_rel_long(&s->evtchn_mask[i], ~0); 481 482 xen_arch_intr_init(); 483 484 if (bootverbose) 485 printf("Xen interrupt system initialized\n"); 486 487 return (0); 488 } 489 SYSINIT(xen_intr_init, SI_SUB_INTR, SI_ORDER_SECOND, xen_intr_init, NULL); 490 491 /*--------------------------- Common PIC Functions ---------------------------*/ 492 493 static void 494 xen_rebind_ipi(struct xenisrc *isrc) 495 { 496 #ifdef SMP 497 u_int cpu = isrc->xi_cpu; 498 u_int vcpu_id = XEN_CPUID_TO_VCPUID(cpu); 499 int error; 500 struct evtchn_bind_ipi bind_ipi = { .vcpu = vcpu_id }; 501 502 error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, 503 &bind_ipi); 504 if (error != 0) 505 panic("unable to rebind xen IPI: %d", error); 506 507 isrc->xi_port = bind_ipi.port; 508 #else 509 panic("Resume IPI event channel on UP"); 510 #endif 511 } 512 513 static void 514 xen_rebind_virq(struct xenisrc *isrc) 515 { 516 u_int cpu = isrc->xi_cpu; 517 u_int vcpu_id = XEN_CPUID_TO_VCPUID(cpu); 518 int error; 519 struct evtchn_bind_virq bind_virq = { .virq = isrc->xi_virq, 520 .vcpu = vcpu_id }; 521 522 error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, 523 &bind_virq); 524 if (error != 0) 525 panic("unable to rebind xen VIRQ#%u: %d", isrc->xi_virq, error); 526 527 isrc->xi_port = bind_virq.port; 528 } 529 530 static struct xenisrc * 531 xen_intr_rebind_isrc(struct xenisrc *isrc) 532 { 533 #ifdef SMP 534 u_int cpu = isrc->xi_cpu; 535 int error; 536 #endif 537 struct xenisrc *prev; 538 539 switch (isrc->xi_type) { 540 case EVTCHN_TYPE_IPI: 541 xen_rebind_ipi(isrc); 542 break; 543 case EVTCHN_TYPE_VIRQ: 544 xen_rebind_virq(isrc); 545 break; 546 default: 547 return (NULL); 548 } 549 550 prev = xen_intr_port_to_isrc[isrc->xi_port]; 551 xen_intr_port_to_isrc[isrc->xi_port] = isrc; 552 553 #ifdef SMP 554 isrc->xi_cpu = 0; 555 error = xen_intr_assign_cpu(isrc, cpu); 556 if (error) 557 panic("%s(): unable to rebind Xen channel %u to vCPU%u: %d", 558 __func__, isrc->xi_port, cpu, error); 559 #endif 560 561 evtchn_unmask_port(isrc->xi_port); 562 563 return (prev); 564 } 565 566 /** 567 * Return this PIC to service after being suspended. 568 */ 569 void 570 xen_intr_resume(void) 571 { 572 shared_info_t *s = HYPERVISOR_shared_info; 573 u_int isrc_idx; 574 int i; 575 576 /* Reset the per-CPU masks */ 577 CPU_FOREACH(i) { 578 struct xen_intr_pcpu_data *pcpu; 579 580 pcpu = DPCPU_ID_PTR(i, xen_intr_pcpu); 581 memset(pcpu->evtchn_enabled, i == 0 ? ~0 : 0, 582 sizeof(pcpu->evtchn_enabled)); 583 } 584 585 /* Mask all event channels. */ 586 for (i = 0; i < nitems(s->evtchn_mask); i++) 587 atomic_store_rel_long(&s->evtchn_mask[i], ~0); 588 589 /* Clear existing port mappings */ 590 for (isrc_idx = 0; isrc_idx < NR_EVENT_CHANNELS; ++isrc_idx) 591 if (xen_intr_port_to_isrc[isrc_idx] != NULL) 592 xen_intr_port_to_isrc[isrc_idx]->xi_port = 593 INVALID_EVTCHN; 594 595 /* Remap in-use isrcs, using xen_intr_port_to_isrc as listing */ 596 for (isrc_idx = 0; isrc_idx < NR_EVENT_CHANNELS; ++isrc_idx) { 597 struct xenisrc *cur = xen_intr_port_to_isrc[isrc_idx]; 598 599 /* empty or entry already taken care of */ 600 if (cur == NULL || cur->xi_port == isrc_idx) 601 continue; 602 603 xen_intr_port_to_isrc[isrc_idx] = NULL; 604 605 do { 606 KASSERT(!is_valid_evtchn(cur->xi_port), 607 ("%s(): Multiple channels on single intr?", 608 __func__)); 609 610 cur = xen_intr_rebind_isrc(cur); 611 } while (cur != NULL); 612 } 613 } 614 615 /** 616 * Disable a Xen interrupt source. 617 * 618 * \param isrc The interrupt source to disable. 619 */ 620 void 621 xen_intr_disable_intr(struct xenisrc *isrc) 622 { 623 624 evtchn_mask_port(isrc->xi_port); 625 } 626 627 /** 628 * Configure CPU affinity for interrupt source event delivery. 629 * 630 * \param isrc The interrupt source to configure. 631 * \param to_cpu The id of the CPU for handling future events. 632 * 633 * \returns 0 if successful, otherwise an errno. 634 */ 635 int 636 xen_intr_assign_cpu(struct xenisrc *isrc, u_int to_cpu) 637 { 638 #ifdef SMP 639 struct evtchn_bind_vcpu bind_vcpu; 640 u_int vcpu_id = XEN_CPUID_TO_VCPUID(to_cpu); 641 int error, masked; 642 643 if (!xen_has_percpu_evtchn()) 644 return (EOPNOTSUPP); 645 646 mtx_lock(&xen_intr_isrc_lock); 647 if (!is_valid_evtchn(isrc->xi_port)) { 648 mtx_unlock(&xen_intr_isrc_lock); 649 return (EINVAL); 650 } 651 652 /* 653 * Mask the event channel while binding it to prevent interrupt 654 * delivery with an inconsistent state in isrc->xi_cpu. 655 */ 656 masked = evtchn_test_and_set_mask(isrc->xi_port); 657 if ((isrc->xi_type == EVTCHN_TYPE_VIRQ) || 658 (isrc->xi_type == EVTCHN_TYPE_IPI)) { 659 /* 660 * Virtual IRQs are associated with a cpu by 661 * the Hypervisor at evtchn_bind_virq time, so 662 * all we need to do is update the per-CPU masks. 663 */ 664 evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port); 665 isrc->xi_cpu = to_cpu; 666 evtchn_cpu_unmask_port(isrc->xi_cpu, isrc->xi_port); 667 goto out; 668 } 669 670 bind_vcpu.port = isrc->xi_port; 671 bind_vcpu.vcpu = vcpu_id; 672 673 error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu); 674 if (isrc->xi_cpu != to_cpu) { 675 if (error == 0) { 676 /* Commit to new binding by removing the old one. */ 677 evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port); 678 isrc->xi_cpu = to_cpu; 679 evtchn_cpu_unmask_port(isrc->xi_cpu, isrc->xi_port); 680 } 681 } 682 683 out: 684 if (masked == 0) 685 evtchn_unmask_port(isrc->xi_port); 686 mtx_unlock(&xen_intr_isrc_lock); 687 return (0); 688 #else 689 return (EOPNOTSUPP); 690 #endif 691 } 692 693 /*------------------- Virtual Interrupt Source PIC Functions -----------------*/ 694 /* 695 * Mask a level triggered interrupt source. 696 * 697 * \param isrc The interrupt source to mask (if necessary). 698 */ 699 void 700 xen_intr_disable_source(struct xenisrc *isrc) 701 { 702 703 /* 704 * NB: checking if the event channel is already masked is 705 * needed because the event channel user-space device 706 * masks event channels on its filter as part of its 707 * normal operation, and those shouldn't be automatically 708 * unmasked by the generic interrupt code. The event channel 709 * device will unmask them when needed. 710 */ 711 isrc->xi_masked = !!evtchn_test_and_set_mask(isrc->xi_port); 712 } 713 714 /* 715 * Unmask a level triggered interrupt source. 716 * 717 * \param isrc The interrupt source to unmask (if necessary). 718 */ 719 void 720 xen_intr_enable_source(struct xenisrc *isrc) 721 { 722 723 if (isrc->xi_masked == 0) 724 evtchn_unmask_port(isrc->xi_port); 725 } 726 727 /* 728 * Enable and unmask the interrupt source. 729 * 730 * \param isrc The interrupt source to enable. 731 */ 732 void 733 xen_intr_enable_intr(struct xenisrc *isrc) 734 { 735 736 evtchn_unmask_port(isrc->xi_port); 737 } 738 739 /*--------------------------- Public Functions -------------------------------*/ 740 /*------- API comments for these methods can be found in xen/xenintr.h -------*/ 741 int 742 xen_intr_bind_local_port(device_t dev, evtchn_port_t local_port, 743 driver_filter_t filter, driver_intr_t handler, void *arg, 744 enum intr_type flags, xen_intr_handle_t *port_handlep) 745 { 746 struct xenisrc *isrc; 747 int error; 748 749 error = xen_intr_bind_isrc(&isrc, local_port, EVTCHN_TYPE_PORT, 750 device_get_nameunit(dev), filter, handler, arg, flags, 751 port_handlep); 752 if (error != 0) 753 return (error); 754 755 /* 756 * The Event Channel API didn't open this port, so it is not 757 * responsible for closing it automatically on unbind. 758 */ 759 isrc->xi_close = 0; 760 return (0); 761 } 762 763 int 764 xen_intr_alloc_and_bind_local_port(device_t dev, u_int remote_domain, 765 driver_filter_t filter, driver_intr_t handler, void *arg, 766 enum intr_type flags, xen_intr_handle_t *port_handlep) 767 { 768 struct xenisrc *isrc; 769 struct evtchn_alloc_unbound alloc_unbound; 770 int error; 771 772 alloc_unbound.dom = DOMID_SELF; 773 alloc_unbound.remote_dom = remote_domain; 774 error = HYPERVISOR_event_channel_op(EVTCHNOP_alloc_unbound, 775 &alloc_unbound); 776 if (error != 0) { 777 /* 778 * XXX Trap Hypercall error code Linuxisms in 779 * the HYPERCALL layer. 780 */ 781 return (-error); 782 } 783 784 error = xen_intr_bind_isrc(&isrc, alloc_unbound.port, EVTCHN_TYPE_PORT, 785 device_get_nameunit(dev), filter, handler, arg, flags, 786 port_handlep); 787 if (error != 0) { 788 evtchn_close_t close = { .port = alloc_unbound.port }; 789 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close)) 790 panic("EVTCHNOP_close failed"); 791 return (error); 792 } 793 794 isrc->xi_close = 1; 795 return (0); 796 } 797 798 int 799 xen_intr_bind_remote_port(device_t dev, u_int remote_domain, 800 u_int remote_port, driver_filter_t filter, driver_intr_t handler, 801 void *arg, enum intr_type flags, xen_intr_handle_t *port_handlep) 802 { 803 struct xenisrc *isrc; 804 struct evtchn_bind_interdomain bind_interdomain; 805 int error; 806 807 bind_interdomain.remote_dom = remote_domain; 808 bind_interdomain.remote_port = remote_port; 809 error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain, 810 &bind_interdomain); 811 if (error != 0) { 812 /* 813 * XXX Trap Hypercall error code Linuxisms in 814 * the HYPERCALL layer. 815 */ 816 return (-error); 817 } 818 819 error = xen_intr_bind_isrc(&isrc, bind_interdomain.local_port, 820 EVTCHN_TYPE_PORT, device_get_nameunit(dev), filter, handler, arg, 821 flags, port_handlep); 822 if (error) { 823 evtchn_close_t close = { .port = bind_interdomain.local_port }; 824 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close)) 825 panic("EVTCHNOP_close failed"); 826 return (error); 827 } 828 829 /* 830 * The Event Channel API opened this port, so it is 831 * responsible for closing it automatically on unbind. 832 */ 833 isrc->xi_close = 1; 834 return (0); 835 } 836 837 int 838 xen_intr_bind_virq(device_t dev, u_int virq, u_int cpu, 839 driver_filter_t filter, driver_intr_t handler, void *arg, 840 enum intr_type flags, xen_intr_handle_t *port_handlep) 841 { 842 u_int vcpu_id = XEN_CPUID_TO_VCPUID(cpu); 843 struct xenisrc *isrc; 844 struct evtchn_bind_virq bind_virq = { .virq = virq, .vcpu = vcpu_id }; 845 int error; 846 847 isrc = NULL; 848 error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, &bind_virq); 849 if (error != 0) { 850 /* 851 * XXX Trap Hypercall error code Linuxisms in 852 * the HYPERCALL layer. 853 */ 854 return (-error); 855 } 856 857 error = xen_intr_bind_isrc(&isrc, bind_virq.port, EVTCHN_TYPE_VIRQ, 858 device_get_nameunit(dev), filter, handler, arg, flags, 859 port_handlep); 860 861 #ifdef SMP 862 if (error == 0) 863 error = xen_arch_intr_event_bind(isrc, cpu); 864 #endif 865 866 if (error != 0) { 867 evtchn_close_t close = { .port = bind_virq.port }; 868 869 xen_intr_unbind(*port_handlep); 870 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close)) 871 panic("EVTCHNOP_close failed"); 872 return (error); 873 } 874 875 #ifdef SMP 876 if (isrc->xi_cpu != cpu) { 877 /* 878 * Too early in the boot process for the generic interrupt 879 * code to perform the binding. Update our event channel 880 * masks manually so events can't fire on the wrong cpu 881 * during AP startup. 882 */ 883 xen_intr_assign_cpu(isrc, cpu); 884 } 885 #endif 886 887 /* 888 * The Event Channel API opened this port, so it is 889 * responsible for closing it automatically on unbind. 890 */ 891 isrc->xi_close = 1; 892 isrc->xi_virq = virq; 893 894 return (0); 895 } 896 897 int 898 xen_intr_alloc_and_bind_ipi(u_int cpu, driver_filter_t filter, 899 enum intr_type flags, xen_intr_handle_t *port_handlep) 900 { 901 #ifdef SMP 902 u_int vcpu_id = XEN_CPUID_TO_VCPUID(cpu); 903 struct xenisrc *isrc; 904 struct evtchn_bind_ipi bind_ipi = { .vcpu = vcpu_id }; 905 /* Same size as the one used by intr_handler->ih_name. */ 906 char name[MAXCOMLEN + 1]; 907 int error; 908 909 isrc = NULL; 910 error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, &bind_ipi); 911 if (error != 0) { 912 /* 913 * XXX Trap Hypercall error code Linuxisms in 914 * the HYPERCALL layer. 915 */ 916 return (-error); 917 } 918 919 snprintf(name, sizeof(name), "cpu%u", cpu); 920 921 error = xen_intr_bind_isrc(&isrc, bind_ipi.port, EVTCHN_TYPE_IPI, 922 name, filter, NULL, NULL, flags, port_handlep); 923 if (error != 0) { 924 evtchn_close_t close = { .port = bind_ipi.port }; 925 926 xen_intr_unbind(*port_handlep); 927 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close)) 928 panic("EVTCHNOP_close failed"); 929 return (error); 930 } 931 932 if (isrc->xi_cpu != cpu) { 933 /* 934 * Too early in the boot process for the generic interrupt 935 * code to perform the binding. Update our event channel 936 * masks manually so events can't fire on the wrong cpu 937 * during AP startup. 938 */ 939 xen_intr_assign_cpu(isrc, cpu); 940 } 941 942 /* 943 * The Event Channel API opened this port, so it is 944 * responsible for closing it automatically on unbind. 945 */ 946 isrc->xi_close = 1; 947 return (0); 948 #else 949 return (EOPNOTSUPP); 950 #endif 951 } 952 953 int 954 xen_intr_describe(xen_intr_handle_t port_handle, const char *fmt, ...) 955 { 956 char descr[MAXCOMLEN + 1]; 957 struct xenisrc *isrc; 958 va_list ap; 959 960 isrc = xen_intr_isrc_from_handle(port_handle); 961 if (isrc == NULL) 962 return (EINVAL); 963 964 va_start(ap, fmt); 965 vsnprintf(descr, sizeof(descr), fmt, ap); 966 va_end(ap); 967 return (xen_arch_intr_describe(isrc, isrc->xi_cookie, descr)); 968 } 969 970 void 971 xen_intr_unbind(xen_intr_handle_t *port_handlep) 972 { 973 struct xenisrc *isrc; 974 975 KASSERT(port_handlep != NULL, 976 ("NULL xen_intr_handle_t passed to %s", __func__)); 977 978 isrc = xen_intr_isrc_from_handle(*port_handlep); 979 *port_handlep = NULL; 980 if (isrc == NULL) 981 return; 982 983 mtx_lock(&xen_intr_isrc_lock); 984 if (refcount_release(&isrc->xi_refcount) == 0) { 985 mtx_unlock(&xen_intr_isrc_lock); 986 return; 987 } 988 mtx_unlock(&xen_intr_isrc_lock); 989 990 if (isrc->xi_cookie != NULL) 991 xen_arch_intr_remove_handler(isrc, isrc->xi_cookie); 992 xen_intr_release_isrc(isrc); 993 } 994 995 void 996 xen_intr_signal(xen_intr_handle_t handle) 997 { 998 struct xenisrc *isrc; 999 1000 isrc = xen_intr_isrc_from_handle(handle); 1001 if (isrc != NULL) { 1002 KASSERT(isrc->xi_type == EVTCHN_TYPE_PORT || 1003 isrc->xi_type == EVTCHN_TYPE_IPI, 1004 ("evtchn_signal on something other than a local port")); 1005 struct evtchn_send send = { .port = isrc->xi_port }; 1006 (void)HYPERVISOR_event_channel_op(EVTCHNOP_send, &send); 1007 } 1008 } 1009 1010 evtchn_port_t 1011 xen_intr_port(xen_intr_handle_t handle) 1012 { 1013 struct xenisrc *isrc; 1014 1015 isrc = xen_intr_isrc_from_handle(handle); 1016 if (isrc == NULL) 1017 return (0); 1018 1019 return (isrc->xi_port); 1020 } 1021 1022 int 1023 xen_intr_add_handler(const char *name, driver_filter_t filter, 1024 driver_intr_t handler, void *arg, enum intr_type flags, 1025 xen_intr_handle_t handle) 1026 { 1027 struct xenisrc *isrc; 1028 int error; 1029 1030 isrc = xen_intr_isrc_from_handle(handle); 1031 if (isrc == NULL || isrc->xi_cookie != NULL) 1032 return (EINVAL); 1033 1034 error = xen_arch_intr_add_handler(name, filter, handler, arg, 1035 flags | INTR_EXCL, isrc, &isrc->xi_cookie); 1036 if (error != 0) 1037 printf("%s: %s: add handler failed: %d\n", name, __func__, 1038 error); 1039 1040 return (error); 1041 } 1042 1043 int 1044 xen_intr_get_evtchn_from_port(evtchn_port_t port, xen_intr_handle_t *handlep) 1045 { 1046 1047 if (!is_valid_evtchn(port)) 1048 return (EINVAL); 1049 1050 if (handlep == NULL) { 1051 return (EINVAL); 1052 } 1053 1054 mtx_lock(&xen_intr_isrc_lock); 1055 if (xen_intr_port_to_isrc[port] == NULL) { 1056 mtx_unlock(&xen_intr_isrc_lock); 1057 return (EINVAL); 1058 } 1059 refcount_acquire(&xen_intr_port_to_isrc[port]->xi_refcount); 1060 mtx_unlock(&xen_intr_isrc_lock); 1061 1062 /* Assign the opaque handler */ 1063 *handlep = xen_intr_handle_from_isrc(xen_intr_port_to_isrc[port]); 1064 1065 return (0); 1066 } 1067 1068 #ifdef DDB 1069 static const char * 1070 xen_intr_print_type(enum evtchn_type type) 1071 { 1072 static const char *evtchn_type_to_string[EVTCHN_TYPE_COUNT] = { 1073 [EVTCHN_TYPE_UNBOUND] = "UNBOUND", 1074 [EVTCHN_TYPE_VIRQ] = "VIRQ", 1075 [EVTCHN_TYPE_IPI] = "IPI", 1076 [EVTCHN_TYPE_PORT] = "PORT", 1077 }; 1078 1079 if (type >= EVTCHN_TYPE_COUNT) 1080 return ("UNKNOWN"); 1081 1082 return (evtchn_type_to_string[type]); 1083 } 1084 1085 static void 1086 xen_intr_dump_port(struct xenisrc *isrc) 1087 { 1088 struct xen_intr_pcpu_data *pcpu; 1089 shared_info_t *s = HYPERVISOR_shared_info; 1090 u_int i; 1091 1092 db_printf("Port %d Type: %s\n", 1093 isrc->xi_port, xen_intr_print_type(isrc->xi_type)); 1094 if (isrc->xi_type == EVTCHN_TYPE_VIRQ) 1095 db_printf("\tVirq: %u\n", isrc->xi_virq); 1096 1097 db_printf("\tMasked: %d Pending: %d\n", 1098 !!xen_test_bit(isrc->xi_port, &s->evtchn_mask[0]), 1099 !!xen_test_bit(isrc->xi_port, &s->evtchn_pending[0])); 1100 1101 db_printf("\tPer-CPU Masks: "); 1102 CPU_FOREACH(i) { 1103 pcpu = DPCPU_ID_PTR(i, xen_intr_pcpu); 1104 db_printf("cpu#%u: %d ", i, 1105 !!xen_test_bit(isrc->xi_port, pcpu->evtchn_enabled)); 1106 } 1107 db_printf("\n"); 1108 } 1109 1110 DB_SHOW_COMMAND(xen_evtchn, db_show_xen_evtchn) 1111 { 1112 u_int i; 1113 1114 if (!xen_domain()) { 1115 db_printf("Only available on Xen guests\n"); 1116 return; 1117 } 1118 1119 for (i = 0; i < NR_EVENT_CHANNELS; i++) { 1120 struct xenisrc *isrc; 1121 1122 isrc = xen_intr_port_to_isrc[i]; 1123 if (isrc == NULL) 1124 continue; 1125 1126 xen_intr_dump_port(isrc); 1127 } 1128 } 1129 #endif /* DDB */ 1130