xref: /freebsd/sys/dev/xen/bus/xen_intr.c (revision 4ece79968e70b96d3283f202635d49a4bf04a7e7)
1 /******************************************************************************
2  * xen_intr.c
3  *
4  * Xen event and interrupt services for x86 HVM guests.
5  *
6  * Copyright (c) 2002-2005, K A Fraser
7  * Copyright (c) 2005, Intel Corporation <xiaofeng.ling@intel.com>
8  * Copyright (c) 2012, Spectra Logic Corporation
9  * Copyright © 2021-2023, Elliott Mitchell
10  *
11  * This file may be distributed separately from the Linux kernel, or
12  * incorporated into other software packages, subject to the following license:
13  *
14  * Permission is hereby granted, free of charge, to any person obtaining a copy
15  * of this source file (the "Software"), to deal in the Software without
16  * restriction, including without limitation the rights to use, copy, modify,
17  * merge, publish, distribute, sublicense, and/or sell copies of the Software,
18  * and to permit persons to whom the Software is furnished to do so, subject to
19  * the following conditions:
20  *
21  * The above copyright notice and this permission notice shall be included in
22  * all copies or substantial portions of the Software.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
27  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
28  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
29  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30  * IN THE SOFTWARE.
31  */
32 
33 #include <sys/cdefs.h>
34 #include "opt_ddb.h"
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/kernel.h>
40 #include <sys/limits.h>
41 #include <sys/lock.h>
42 #include <sys/mutex.h>
43 #include <sys/interrupt.h>
44 #include <sys/pcpu.h>
45 #include <sys/proc.h>
46 #include <sys/smp.h>
47 #include <sys/refcount.h>
48 
49 #include <vm/vm.h>
50 #include <vm/pmap.h>
51 
52 #include <machine/smp.h>
53 #include <machine/stdarg.h>
54 
55 #include <xen/xen-os.h>
56 #include <xen/hypervisor.h>
57 #include <xen/xen_intr.h>
58 #include <xen/evtchn/evtchnvar.h>
59 
60 #include <machine/xen/arch-intr.h>
61 
62 #ifdef DDB
63 #include <ddb/ddb.h>
64 #endif
65 
66 /**
67  * Per-cpu event channel processing state.
68  */
69 struct xen_intr_pcpu_data {
70 	/**
71 	 * The last event channel bitmap section (level one bit) processed.
72 	 * This is used to ensure we scan all ports before
73 	 * servicing an already servied port again.
74 	 */
75 	u_int	last_processed_l1i;
76 
77 	/**
78 	 * The last event channel processed within the event channel
79 	 * bitmap being scanned.
80 	 */
81 	u_int	last_processed_l2i;
82 
83 	/**
84 	 * A bitmap of ports that can be serviced from this CPU.
85 	 * A set bit means interrupt handling is enabled.
86 	 */
87 	xen_ulong_t	evtchn_enabled[sizeof(xen_ulong_t) * 8];
88 };
89 
90 /*
91  * Start the scan at port 0 by initializing the last scanned
92  * location as the highest numbered event channel port.
93  */
94 DPCPU_DEFINE_STATIC(struct xen_intr_pcpu_data, xen_intr_pcpu) = {
95 	.last_processed_l1i = LONG_BIT - 1,
96 	.last_processed_l2i = LONG_BIT - 1
97 };
98 
99 DPCPU_DECLARE(struct vcpu_info *, vcpu_info);
100 
101 #define	INVALID_EVTCHN		(~(evtchn_port_t)0) /* Invalid event channel */
102 #define	is_valid_evtchn(x)	((uintmax_t)(x) < NR_EVENT_CHANNELS)
103 
104 /*
105  * Lock for interrupt core data.
106  *
107  * Modifying xen_intr_port_to_isrc[], or isrc->xi_port (implies the former)
108  * requires this lock be held.  Any time this lock is not held, the condition
109  * `!xen_intr_port_to_isrc[i] || (xen_intr_port_to_isrc[i]->ix_port == i)`
110  * MUST be true for all values of i which are valid indicies of the array.
111  *
112  * Acquire/release operations for isrc->xi_refcount require this lock be held.
113  */
114 static struct mtx	 xen_intr_isrc_lock;
115 static struct xenisrc	*xen_intr_port_to_isrc[NR_EVENT_CHANNELS];
116 
117 /*------------------------- Private Functions --------------------------------*/
118 
119 /**
120  * Retrieve a handle for a Xen interrupt source.
121  *
122  * \param isrc  A valid Xen interrupt source structure.
123  *
124  * \returns  A handle suitable for use with xen_intr_isrc_from_handle()
125  *           to retrieve the original Xen interrupt source structure.
126  */
127 
128 static inline xen_intr_handle_t
129 xen_intr_handle_from_isrc(struct xenisrc *isrc)
130 {
131 	return (isrc);
132 }
133 
134 /**
135  * Lookup a Xen interrupt source object given an interrupt binding handle.
136  *
137  * \param handle  A handle initialized by a previous call to
138  *                xen_intr_bind_isrc().
139  *
140  * \returns  A pointer to the Xen interrupt source object associated
141  *           with the given interrupt handle.  NULL if no association
142  *           currently exists.
143  */
144 static inline struct xenisrc *
145 xen_intr_isrc_from_handle(xen_intr_handle_t handle)
146 {
147 	return ((struct xenisrc *)handle);
148 }
149 
150 /**
151  * Disable signal delivery for an event channel port on the
152  * specified CPU.
153  *
154  * \param port  The event channel port to mask.
155  *
156  * This API is used to manage the port<=>CPU binding of event
157  * channel handlers.
158  *
159  * \note  This operation does not preclude reception of an event
160  *        for this event channel on another CPU.  To mask the
161  *        event channel globally, use evtchn_mask().
162  */
163 static inline void
164 evtchn_cpu_mask_port(u_int cpu, evtchn_port_t port)
165 {
166 	struct xen_intr_pcpu_data *pcpu;
167 
168 	pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu);
169 	KASSERT(is_valid_evtchn(port), ("Invalid event channel port"));
170 	xen_clear_bit(port, pcpu->evtchn_enabled);
171 }
172 
173 /**
174  * Enable signal delivery for an event channel port on the
175  * specified CPU.
176  *
177  * \param port  The event channel port to unmask.
178  *
179  * This API is used to manage the port<=>CPU binding of event
180  * channel handlers.
181  *
182  * \note  This operation does not guarantee that event delivery
183  *        is enabled for this event channel port.  The port must
184  *        also be globally enabled.  See evtchn_unmask().
185  */
186 static inline void
187 evtchn_cpu_unmask_port(u_int cpu, evtchn_port_t port)
188 {
189 	struct xen_intr_pcpu_data *pcpu;
190 
191 	pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu);
192 	KASSERT(is_valid_evtchn(port), ("Invalid event channel port"));
193 	xen_set_bit(port, pcpu->evtchn_enabled);
194 }
195 
196 /**
197  * Attempt to free an active Xen interrupt source object.
198  *
199  * \param isrc  The interrupt source object to release.
200  *
201  * \returns  EBUSY if the source is still in use, otherwise 0.
202  */
203 static int
204 xen_intr_release_isrc(struct xenisrc *isrc)
205 {
206 
207 	mtx_lock(&xen_intr_isrc_lock);
208 	if (is_valid_evtchn(isrc->xi_port)) {
209 		evtchn_mask_port(isrc->xi_port);
210 		evtchn_clear_port(isrc->xi_port);
211 
212 		/* Rebind port to CPU 0. */
213 		evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port);
214 		evtchn_cpu_unmask_port(0, isrc->xi_port);
215 
216 		if (isrc->xi_close != 0) {
217 			struct evtchn_close close = { .port = isrc->xi_port };
218 
219 			if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
220 				panic("EVTCHNOP_close failed");
221 		}
222 
223 		xen_intr_port_to_isrc[isrc->xi_port] = NULL;
224 	}
225 	/* not reachable from xen_intr_port_to_isrc[], unlock */
226 	mtx_unlock(&xen_intr_isrc_lock);
227 
228 	xen_arch_intr_release(isrc);
229 	return (0);
230 }
231 
232 /**
233  * Associate an interrupt handler with an already allocated local Xen
234  * event channel port.
235  *
236  * \param isrcp       The returned Xen interrupt object associated with
237  *                    the specified local port.
238  * \param local_port  The event channel to bind.
239  * \param type        The event channel type of local_port.
240  * \param intr_owner  The device making this bind request.
241  * \param filter      An interrupt filter handler.  Specify NULL
242  *                    to always dispatch to the ithread handler.
243  * \param handler     An interrupt ithread handler.  Optional (can
244  *                    specify NULL) if all necessary event actions
245  *                    are performed by filter.
246  * \param arg         Argument to present to both filter and handler.
247  * \param irqflags    Interrupt handler flags.  See sys/bus.h.
248  * \param handlep     Pointer to an opaque handle used to manage this
249  *                    registration.
250  *
251  * \returns  0 on success, otherwise an errno.
252  */
253 static int
254 xen_intr_bind_isrc(struct xenisrc **isrcp, evtchn_port_t local_port,
255     enum evtchn_type type, const char *intr_owner, driver_filter_t filter,
256     driver_intr_t handler, void *arg, enum intr_type flags,
257     xen_intr_handle_t *const port_handlep)
258 {
259 	struct xenisrc *isrc;
260 	int error;
261 
262 	*isrcp = NULL;
263 	if (port_handlep == NULL) {
264 		printf("%s: %s: Bad event handle\n", intr_owner, __func__);
265 		return (EINVAL);
266 	}
267 	*port_handlep = NULL;
268 
269 	isrc = xen_arch_intr_alloc();
270 	if (isrc == NULL)
271 		return (ENOSPC);
272 
273 	isrc->xi_cookie = NULL;
274 	isrc->xi_type = type;
275 	isrc->xi_port = local_port;
276 	isrc->xi_close = false;
277 	isrc->xi_cpu = 0;
278 	refcount_init(&isrc->xi_refcount, 1);
279 	mtx_lock(&xen_intr_isrc_lock);
280 	xen_intr_port_to_isrc[isrc->xi_port] = isrc;
281 	mtx_unlock(&xen_intr_isrc_lock);
282 
283 #ifdef SMP
284 	if (type == EVTCHN_TYPE_PORT) {
285 		/*
286 		 * By default all interrupts are assigned to vCPU#0
287 		 * unless specified otherwise, so shuffle them to balance
288 		 * the interrupt load.
289 		 */
290 		xen_intr_assign_cpu(isrc, xen_arch_intr_next_cpu(isrc));
291 	}
292 #endif
293 
294 	/*
295 	 * If a filter or handler function is provided, add it to the event.
296 	 * Otherwise the event channel is left masked and without a handler,
297 	 * the caller is in charge of setting that up.
298 	 */
299 	if (filter != NULL || handler != NULL) {
300 		error = xen_intr_add_handler(intr_owner, filter, handler, arg,
301 		    flags, xen_intr_handle_from_isrc(isrc));
302 		if (error != 0) {
303 			xen_intr_release_isrc(isrc);
304 			return (error);
305 		}
306 	}
307 
308 	*isrcp = isrc;
309 	/* Assign the opaque handler */
310 	*port_handlep = xen_intr_handle_from_isrc(isrc);
311 	return (0);
312 }
313 
314 /**
315  * Determine the event channel ports at the given section of the
316  * event port bitmap which have pending events for the given cpu.
317  *
318  * \param pcpu  The Xen interrupt pcpu data for the cpu being queried.
319  * \param sh    The Xen shared info area.
320  * \param idx   The index of the section of the event channel bitmap to
321  *              inspect.
322  *
323  * \returns  A u_long with bits set for every event channel with pending
324  *           events.
325  */
326 static inline u_long
327 xen_intr_active_ports(const struct xen_intr_pcpu_data *const pcpu,
328     const u_int idx)
329 {
330 	volatile const shared_info_t *const sh = HYPERVISOR_shared_info;
331 
332 	CTASSERT(sizeof(sh->evtchn_mask[0]) == sizeof(sh->evtchn_pending[0]));
333 	CTASSERT(sizeof(sh->evtchn_mask[0]) == sizeof(pcpu->evtchn_enabled[0]));
334 	CTASSERT(sizeof(sh->evtchn_mask) == sizeof(sh->evtchn_pending));
335 	CTASSERT(sizeof(sh->evtchn_mask) == sizeof(pcpu->evtchn_enabled));
336 	return (sh->evtchn_pending[idx]
337 	      & ~sh->evtchn_mask[idx]
338 	      & pcpu->evtchn_enabled[idx]);
339 }
340 
341 /**
342  * Interrupt handler for processing all Xen event channel events.
343  *
344  * \param trap_frame  The trap frame context for the current interrupt.
345  */
346 int
347 xen_intr_handle_upcall(void *unused __unused)
348 {
349 	struct trapframe *trap_frame = curthread->td_intr_frame;
350 	u_int l1i, l2i, port, cpu __diagused;
351 	u_long masked_l1, masked_l2;
352 	struct xenisrc *isrc;
353 	vcpu_info_t *v;
354 	struct xen_intr_pcpu_data *pc;
355 	u_long l1, l2;
356 
357 	/* We must remain on the same vCPU during this function */
358 	CRITICAL_ASSERT(curthread);
359 
360 	cpu = PCPU_GET(cpuid);
361 	pc  = DPCPU_PTR(xen_intr_pcpu);
362 	v   = DPCPU_GET(vcpu_info);
363 
364 	if (!xen_has_percpu_evtchn()) {
365 		KASSERT((cpu == 0), ("Fired PCI event callback on wrong CPU"));
366 	}
367 
368 	v->evtchn_upcall_pending = 0;
369 /* No need for a barrier on x86 -- XCHG is a barrier on x86. */
370 #if !defined(__amd64__) && !defined(__i386__)
371 	/* Clear master flag /before/ clearing selector flag. */
372 	wmb();
373 #endif
374 	l1 = atomic_readandclear_xen_ulong(&v->evtchn_pending_sel);
375 
376 	l1i = pc->last_processed_l1i;
377 	l2i = pc->last_processed_l2i;
378 
379 	while (l1 != 0) {
380 		l1i = (l1i + 1) % LONG_BIT;
381 		masked_l1 = l1 & ((~0UL) << l1i);
382 
383 		if (masked_l1 == 0) {
384 			/*
385 			 * if we masked out all events, wrap around
386 			 * to the beginning.
387 			 */
388 			l1i = LONG_BIT - 1;
389 			l2i = LONG_BIT - 1;
390 			continue;
391 		}
392 		l1i = ffsl(masked_l1) - 1;
393 
394 		do {
395 			l2 = xen_intr_active_ports(pc, l1i);
396 
397 			l2i = (l2i + 1) % LONG_BIT;
398 			masked_l2 = l2 & ((~0UL) << l2i);
399 
400 			if (masked_l2 == 0) {
401 				/* if we masked out all events, move on */
402 				l2i = LONG_BIT - 1;
403 				break;
404 			}
405 			l2i = ffsl(masked_l2) - 1;
406 
407 			/* process port */
408 			port = (l1i * LONG_BIT) + l2i;
409 			evtchn_clear_port(port);
410 
411 			isrc = xen_intr_port_to_isrc[port];
412 			if (__predict_false(isrc == NULL))
413 				continue;
414 
415 			/* Make sure we are firing on the right vCPU */
416 			KASSERT((isrc->xi_cpu == PCPU_GET(cpuid)),
417 				("Received unexpected event on vCPU#%u, event bound to vCPU#%u",
418 				PCPU_GET(cpuid), isrc->xi_cpu));
419 
420 			xen_arch_intr_execute_handlers(isrc, trap_frame);
421 
422 			/*
423 			 * If this is the final port processed,
424 			 * we'll pick up here+1 next time.
425 			 */
426 			pc->last_processed_l1i = l1i;
427 			pc->last_processed_l2i = l2i;
428 
429 		} while (l2i != LONG_BIT - 1);
430 
431 		l2 = xen_intr_active_ports(pc, l1i);
432 		if (l2 == 0) {
433 			/*
434 			 * We handled all ports, so we can clear the
435 			 * selector bit.
436 			 */
437 			l1 &= ~(1UL << l1i);
438 		}
439 	}
440 
441 	return (FILTER_HANDLED);
442 }
443 
444 static int
445 xen_intr_init(void *dummy __unused)
446 {
447 	shared_info_t *s = HYPERVISOR_shared_info;
448 	struct xen_intr_pcpu_data *pcpu;
449 	int i;
450 
451 	if (!xen_domain())
452 		return (0);
453 
454 	_Static_assert(is_valid_evtchn(0),
455 	    "is_valid_evtchn(0) fails (unused by Xen, but valid by interface");
456 	_Static_assert(is_valid_evtchn(NR_EVENT_CHANNELS - 1),
457 	    "is_valid_evtchn(max) fails (is a valid channel)");
458 	_Static_assert(!is_valid_evtchn(NR_EVENT_CHANNELS),
459 	    "is_valid_evtchn(>max) fails (NOT a valid channel)");
460 	_Static_assert(!is_valid_evtchn(~(evtchn_port_t)0),
461 	    "is_valid_evtchn(maxint) fails (overflow?)");
462 	_Static_assert(!is_valid_evtchn(INVALID_EVTCHN),
463 	    "is_valid_evtchn(INVALID_EVTCHN) fails (must be invalid!)");
464 	_Static_assert(!is_valid_evtchn(-1),
465 	    "is_valid_evtchn(-1) fails (negative are invalid)");
466 
467 	mtx_init(&xen_intr_isrc_lock, "xen-irq-lock", NULL, MTX_DEF);
468 
469 	/*
470 	 * Set the per-cpu mask of CPU#0 to enable all, since by default all
471 	 * event channels are bound to CPU#0.
472 	 */
473 	CPU_FOREACH(i) {
474 		pcpu = DPCPU_ID_PTR(i, xen_intr_pcpu);
475 		memset(pcpu->evtchn_enabled, i == 0 ? ~0 : 0,
476 		    sizeof(pcpu->evtchn_enabled));
477 	}
478 
479 	for (i = 0; i < nitems(s->evtchn_mask); i++)
480 		atomic_store_rel_xen_ulong(&s->evtchn_mask[i], ~0);
481 
482 	xen_arch_intr_init();
483 
484 	if (bootverbose)
485 		printf("Xen interrupt system initialized\n");
486 
487 	return (0);
488 }
489 SYSINIT(xen_intr_init, SI_SUB_INTR, SI_ORDER_SECOND, xen_intr_init, NULL);
490 
491 /*--------------------------- Common PIC Functions ---------------------------*/
492 
493 static void
494 xen_rebind_ipi(struct xenisrc *isrc)
495 {
496 #ifdef SMP
497 	u_int cpu = isrc->xi_cpu;
498 	u_int vcpu_id = XEN_CPUID_TO_VCPUID(cpu);
499 	int error;
500 	struct evtchn_bind_ipi bind_ipi = { .vcpu = vcpu_id };
501 
502 	error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
503 	                                    &bind_ipi);
504 	if (error != 0)
505 		panic("unable to rebind xen IPI: %d", error);
506 
507 	isrc->xi_port = bind_ipi.port;
508 #else
509 	panic("Resume IPI event channel on UP");
510 #endif
511 }
512 
513 static void
514 xen_rebind_virq(struct xenisrc *isrc)
515 {
516 	u_int cpu = isrc->xi_cpu;
517 	u_int vcpu_id = XEN_CPUID_TO_VCPUID(cpu);
518 	int error;
519 	struct evtchn_bind_virq bind_virq = { .virq = isrc->xi_virq,
520 	                                      .vcpu = vcpu_id };
521 
522 	error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
523 	                                    &bind_virq);
524 	if (error != 0)
525 		panic("unable to rebind xen VIRQ#%u: %d", isrc->xi_virq, error);
526 
527 	isrc->xi_port = bind_virq.port;
528 }
529 
530 static struct xenisrc *
531 xen_intr_rebind_isrc(struct xenisrc *isrc)
532 {
533 #ifdef SMP
534 	u_int cpu = isrc->xi_cpu;
535 	int error;
536 #endif
537 	struct xenisrc *prev;
538 
539 	switch (isrc->xi_type) {
540 	case EVTCHN_TYPE_IPI:
541 		xen_rebind_ipi(isrc);
542 		break;
543 	case EVTCHN_TYPE_VIRQ:
544 		xen_rebind_virq(isrc);
545 		break;
546 	default:
547 		return (NULL);
548 	}
549 
550 	prev = xen_intr_port_to_isrc[isrc->xi_port];
551 	xen_intr_port_to_isrc[isrc->xi_port] = isrc;
552 
553 #ifdef SMP
554 	isrc->xi_cpu = 0;
555 	error = xen_intr_assign_cpu(isrc, cpu);
556 	if (error)
557 		panic("%s(): unable to rebind Xen channel %u to vCPU%u: %d",
558 		    __func__, isrc->xi_port, cpu, error);
559 #endif
560 
561 	evtchn_unmask_port(isrc->xi_port);
562 
563 	return (prev);
564 }
565 
566 /**
567  * Return this PIC to service after being suspended.
568  */
569 void
570 xen_intr_resume(void)
571 {
572 	shared_info_t *s = HYPERVISOR_shared_info;
573 	u_int isrc_idx;
574 	int i;
575 
576 	/* Reset the per-CPU masks */
577 	CPU_FOREACH(i) {
578 		struct xen_intr_pcpu_data *pcpu;
579 
580 		pcpu = DPCPU_ID_PTR(i, xen_intr_pcpu);
581 		memset(pcpu->evtchn_enabled, i == 0 ? ~0 : 0,
582 		    sizeof(pcpu->evtchn_enabled));
583 	}
584 
585 	/* Mask all event channels. */
586 	for (i = 0; i < nitems(s->evtchn_mask); i++)
587 		atomic_store_rel_xen_ulong(&s->evtchn_mask[i], ~0);
588 
589 	/* Clear existing port mappings */
590 	for (isrc_idx = 0; isrc_idx < NR_EVENT_CHANNELS; ++isrc_idx)
591 		if (xen_intr_port_to_isrc[isrc_idx] != NULL)
592 			xen_intr_port_to_isrc[isrc_idx]->xi_port =
593 			    INVALID_EVTCHN;
594 
595 	/* Remap in-use isrcs, using xen_intr_port_to_isrc as listing */
596 	for (isrc_idx = 0; isrc_idx < NR_EVENT_CHANNELS; ++isrc_idx) {
597 		struct xenisrc *cur = xen_intr_port_to_isrc[isrc_idx];
598 
599 		/* empty or entry already taken care of */
600 		if (cur == NULL || cur->xi_port == isrc_idx)
601 			continue;
602 
603 		xen_intr_port_to_isrc[isrc_idx] = NULL;
604 
605 		do {
606 			KASSERT(!is_valid_evtchn(cur->xi_port),
607 			    ("%s(): Multiple channels on single intr?",
608 			    __func__));
609 
610 			cur = xen_intr_rebind_isrc(cur);
611 		} while (cur != NULL);
612 	}
613 }
614 
615 /**
616  * Disable a Xen interrupt source.
617  *
618  * \param isrc  The interrupt source to disable.
619  */
620 void
621 xen_intr_disable_intr(struct xenisrc *isrc)
622 {
623 
624 	if (__predict_true(is_valid_evtchn(isrc->xi_port)))
625 		evtchn_mask_port(isrc->xi_port);
626 }
627 
628 /**
629  * Configure CPU affinity for interrupt source event delivery.
630  *
631  * \param isrc     The interrupt source to configure.
632  * \param to_cpu   The id of the CPU for handling future events.
633  *
634  * \returns  0 if successful, otherwise an errno.
635  */
636 int
637 xen_intr_assign_cpu(struct xenisrc *isrc, u_int to_cpu)
638 {
639 #ifdef SMP
640 	struct evtchn_bind_vcpu bind_vcpu;
641 	u_int vcpu_id = XEN_CPUID_TO_VCPUID(to_cpu);
642 	int error, masked;
643 
644 	if (!xen_has_percpu_evtchn())
645 		return (EOPNOTSUPP);
646 
647 	mtx_lock(&xen_intr_isrc_lock);
648 	if (!is_valid_evtchn(isrc->xi_port)) {
649 		mtx_unlock(&xen_intr_isrc_lock);
650 		return (EINVAL);
651 	}
652 
653 	/*
654 	 * Mask the event channel while binding it to prevent interrupt
655 	 * delivery with an inconsistent state in isrc->xi_cpu.
656 	 */
657 	masked = evtchn_test_and_set_mask(isrc->xi_port);
658 	if ((isrc->xi_type == EVTCHN_TYPE_VIRQ) ||
659 		(isrc->xi_type == EVTCHN_TYPE_IPI)) {
660 		/*
661 		 * Virtual IRQs are associated with a cpu by
662 		 * the Hypervisor at evtchn_bind_virq time, so
663 		 * all we need to do is update the per-CPU masks.
664 		 */
665 		evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port);
666 		isrc->xi_cpu = to_cpu;
667 		evtchn_cpu_unmask_port(isrc->xi_cpu, isrc->xi_port);
668 		goto out;
669 	}
670 
671 	bind_vcpu.port = isrc->xi_port;
672 	bind_vcpu.vcpu = vcpu_id;
673 
674 	error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu);
675 	if (isrc->xi_cpu != to_cpu) {
676 		if (error == 0) {
677 			/* Commit to new binding by removing the old one. */
678 			evtchn_cpu_mask_port(isrc->xi_cpu, isrc->xi_port);
679 			isrc->xi_cpu = to_cpu;
680 			evtchn_cpu_unmask_port(isrc->xi_cpu, isrc->xi_port);
681 		}
682 	}
683 
684 out:
685 	if (masked == 0)
686 		evtchn_unmask_port(isrc->xi_port);
687 	mtx_unlock(&xen_intr_isrc_lock);
688 	return (0);
689 #else
690 	return (EOPNOTSUPP);
691 #endif
692 }
693 
694 /*------------------- Virtual Interrupt Source PIC Functions -----------------*/
695 /*
696  * Mask a level triggered interrupt source.
697  *
698  * \param isrc  The interrupt source to mask (if necessary).
699  */
700 void
701 xen_intr_disable_source(struct xenisrc *isrc)
702 {
703 
704 	/*
705 	 * NB: checking if the event channel is already masked is
706 	 * needed because the event channel user-space device
707 	 * masks event channels on its filter as part of its
708 	 * normal operation, and those shouldn't be automatically
709 	 * unmasked by the generic interrupt code. The event channel
710 	 * device will unmask them when needed.
711 	 */
712 	if (__predict_true(is_valid_evtchn(isrc->xi_port)))
713 		isrc->xi_masked = !!evtchn_test_and_set_mask(isrc->xi_port);
714 }
715 
716 /*
717  * Unmask a level triggered interrupt source.
718  *
719  * \param isrc  The interrupt source to unmask (if necessary).
720  */
721 void
722 xen_intr_enable_source(struct xenisrc *isrc)
723 {
724 
725 	if (isrc->xi_masked == 0)
726 		evtchn_unmask_port(isrc->xi_port);
727 }
728 
729 /*
730  * Enable and unmask the interrupt source.
731  *
732  * \param isrc  The interrupt source to enable.
733  */
734 void
735 xen_intr_enable_intr(struct xenisrc *isrc)
736 {
737 
738 	evtchn_unmask_port(isrc->xi_port);
739 }
740 
741 /*--------------------------- Public Functions -------------------------------*/
742 /*------- API comments for these methods can be found in xen/xenintr.h -------*/
743 int
744 xen_intr_bind_local_port(device_t dev, evtchn_port_t local_port,
745     driver_filter_t filter, driver_intr_t handler, void *arg,
746     enum intr_type flags, xen_intr_handle_t *port_handlep)
747 {
748 	struct xenisrc *isrc;
749 	int error;
750 
751 	error = xen_intr_bind_isrc(&isrc, local_port, EVTCHN_TYPE_PORT,
752 	    device_get_nameunit(dev), filter, handler, arg, flags,
753 	    port_handlep);
754 	if (error != 0)
755 		return (error);
756 
757 	/*
758 	 * The Event Channel API didn't open this port, so it is not
759 	 * responsible for closing it automatically on unbind.
760 	 */
761 	isrc->xi_close = 0;
762 	return (0);
763 }
764 
765 int
766 xen_intr_alloc_and_bind_local_port(device_t dev, u_int remote_domain,
767     driver_filter_t filter, driver_intr_t handler, void *arg,
768     enum intr_type flags, xen_intr_handle_t *port_handlep)
769 {
770 	struct xenisrc *isrc;
771 	struct evtchn_alloc_unbound alloc_unbound;
772 	int error;
773 
774 	alloc_unbound.dom        = DOMID_SELF;
775 	alloc_unbound.remote_dom = remote_domain;
776 	error = HYPERVISOR_event_channel_op(EVTCHNOP_alloc_unbound,
777 		    &alloc_unbound);
778 	if (error != 0) {
779 		/*
780 		 * XXX Trap Hypercall error code Linuxisms in
781 		 *     the HYPERCALL layer.
782 		 */
783 		return (-error);
784 	}
785 
786 	error = xen_intr_bind_isrc(&isrc, alloc_unbound.port, EVTCHN_TYPE_PORT,
787 	    device_get_nameunit(dev), filter, handler, arg, flags,
788 	    port_handlep);
789 	if (error != 0) {
790 		evtchn_close_t close = { .port = alloc_unbound.port };
791 		if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
792 			panic("EVTCHNOP_close failed");
793 		return (error);
794 	}
795 
796 	isrc->xi_close = 1;
797 	return (0);
798 }
799 
800 int
801 xen_intr_bind_remote_port(device_t dev, u_int remote_domain,
802     u_int remote_port, driver_filter_t filter, driver_intr_t handler,
803     void *arg, enum intr_type flags, xen_intr_handle_t *port_handlep)
804 {
805 	struct xenisrc *isrc;
806 	struct evtchn_bind_interdomain bind_interdomain;
807 	int error;
808 
809 	bind_interdomain.remote_dom  = remote_domain;
810 	bind_interdomain.remote_port = remote_port;
811 	error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
812 					    &bind_interdomain);
813 	if (error != 0) {
814 		/*
815 		 * XXX Trap Hypercall error code Linuxisms in
816 		 *     the HYPERCALL layer.
817 		 */
818 		return (-error);
819 	}
820 
821 	error = xen_intr_bind_isrc(&isrc, bind_interdomain.local_port,
822 	    EVTCHN_TYPE_PORT, device_get_nameunit(dev), filter, handler, arg,
823 	    flags, port_handlep);
824 	if (error) {
825 		evtchn_close_t close = { .port = bind_interdomain.local_port };
826 		if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
827 			panic("EVTCHNOP_close failed");
828 		return (error);
829 	}
830 
831 	/*
832 	 * The Event Channel API opened this port, so it is
833 	 * responsible for closing it automatically on unbind.
834 	 */
835 	isrc->xi_close = 1;
836 	return (0);
837 }
838 
839 int
840 xen_intr_bind_virq(device_t dev, u_int virq, u_int cpu,
841     driver_filter_t filter, driver_intr_t handler, void *arg,
842     enum intr_type flags, xen_intr_handle_t *port_handlep)
843 {
844 	u_int vcpu_id = XEN_CPUID_TO_VCPUID(cpu);
845 	struct xenisrc *isrc;
846 	struct evtchn_bind_virq bind_virq = { .virq = virq, .vcpu = vcpu_id };
847 	int error;
848 
849 	isrc = NULL;
850 	error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, &bind_virq);
851 	if (error != 0) {
852 		/*
853 		 * XXX Trap Hypercall error code Linuxisms in
854 		 *     the HYPERCALL layer.
855 		 */
856 		return (-error);
857 	}
858 
859 	error = xen_intr_bind_isrc(&isrc, bind_virq.port, EVTCHN_TYPE_VIRQ,
860 	    device_get_nameunit(dev), filter, handler, arg, flags,
861 	    port_handlep);
862 
863 #ifdef SMP
864 	if (error == 0)
865 		error = xen_arch_intr_event_bind(isrc, cpu);
866 #endif
867 
868 	if (error != 0) {
869 		evtchn_close_t close = { .port = bind_virq.port };
870 
871 		xen_intr_unbind(port_handlep);
872 		if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
873 			panic("EVTCHNOP_close failed");
874 		return (error);
875 	}
876 
877 #ifdef SMP
878 	if (isrc->xi_cpu != cpu) {
879 		/*
880 		 * Too early in the boot process for the generic interrupt
881 		 * code to perform the binding.  Update our event channel
882 		 * masks manually so events can't fire on the wrong cpu
883 		 * during AP startup.
884 		 */
885 		xen_intr_assign_cpu(isrc, cpu);
886 	}
887 #endif
888 
889 	/*
890 	 * The Event Channel API opened this port, so it is
891 	 * responsible for closing it automatically on unbind.
892 	 */
893 	isrc->xi_close = 1;
894 	isrc->xi_virq = virq;
895 
896 	return (0);
897 }
898 
899 int
900 xen_intr_alloc_and_bind_ipi(u_int cpu, driver_filter_t filter,
901     enum intr_type flags, xen_intr_handle_t *port_handlep)
902 {
903 #ifdef SMP
904 	u_int vcpu_id = XEN_CPUID_TO_VCPUID(cpu);
905 	struct xenisrc *isrc;
906 	struct evtchn_bind_ipi bind_ipi = { .vcpu = vcpu_id };
907 	/* Same size as the one used by intr_handler->ih_name. */
908 	char name[MAXCOMLEN + 1];
909 	int error;
910 
911 	isrc = NULL;
912 	error = HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, &bind_ipi);
913 	if (error != 0) {
914 		/*
915 		 * XXX Trap Hypercall error code Linuxisms in
916 		 *     the HYPERCALL layer.
917 		 */
918 		return (-error);
919 	}
920 
921 	snprintf(name, sizeof(name), "cpu%u", cpu);
922 
923 	error = xen_intr_bind_isrc(&isrc, bind_ipi.port, EVTCHN_TYPE_IPI,
924 	    name, filter, NULL, NULL, flags, port_handlep);
925 	if (error != 0) {
926 		evtchn_close_t close = { .port = bind_ipi.port };
927 
928 		xen_intr_unbind(port_handlep);
929 		if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close))
930 			panic("EVTCHNOP_close failed");
931 		return (error);
932 	}
933 
934 	if (isrc->xi_cpu != cpu) {
935 		/*
936 		 * Too early in the boot process for the generic interrupt
937 		 * code to perform the binding.  Update our event channel
938 		 * masks manually so events can't fire on the wrong cpu
939 		 * during AP startup.
940 		 */
941 		xen_intr_assign_cpu(isrc, cpu);
942 	}
943 
944 	/*
945 	 * The Event Channel API opened this port, so it is
946 	 * responsible for closing it automatically on unbind.
947 	 */
948 	isrc->xi_close = 1;
949 	return (0);
950 #else
951 	return (EOPNOTSUPP);
952 #endif
953 }
954 
955 int
956 xen_intr_describe(xen_intr_handle_t port_handle, const char *fmt, ...)
957 {
958 	char descr[MAXCOMLEN + 1];
959 	struct xenisrc *isrc;
960 	va_list ap;
961 
962 	isrc = xen_intr_isrc_from_handle(port_handle);
963 	if (isrc == NULL)
964 		return (EINVAL);
965 
966 	va_start(ap, fmt);
967 	vsnprintf(descr, sizeof(descr), fmt, ap);
968 	va_end(ap);
969 	return (xen_arch_intr_describe(isrc, isrc->xi_cookie, descr));
970 }
971 
972 void
973 xen_intr_unbind(xen_intr_handle_t *port_handlep)
974 {
975 	struct xenisrc *isrc;
976 
977 	KASSERT(port_handlep != NULL,
978 	    ("NULL xen_intr_handle_t passed to %s", __func__));
979 
980 	isrc = xen_intr_isrc_from_handle(*port_handlep);
981 	*port_handlep = NULL;
982 	if (isrc == NULL)
983 		return;
984 
985 	mtx_lock(&xen_intr_isrc_lock);
986 	if (refcount_release(&isrc->xi_refcount) == 0) {
987 		mtx_unlock(&xen_intr_isrc_lock);
988 		return;
989 	}
990 	mtx_unlock(&xen_intr_isrc_lock);
991 
992 	if (isrc->xi_cookie != NULL)
993 		xen_arch_intr_remove_handler(isrc, isrc->xi_cookie);
994 	xen_intr_release_isrc(isrc);
995 }
996 
997 void
998 xen_intr_signal(xen_intr_handle_t handle)
999 {
1000 	struct xenisrc *isrc;
1001 
1002 	isrc = xen_intr_isrc_from_handle(handle);
1003 	if (isrc != NULL) {
1004 		KASSERT(isrc->xi_type == EVTCHN_TYPE_PORT ||
1005 			isrc->xi_type == EVTCHN_TYPE_IPI,
1006 			("evtchn_signal on something other than a local port"));
1007 		struct evtchn_send send = { .port = isrc->xi_port };
1008 		(void)HYPERVISOR_event_channel_op(EVTCHNOP_send, &send);
1009 	}
1010 }
1011 
1012 evtchn_port_t
1013 xen_intr_port(xen_intr_handle_t handle)
1014 {
1015 	struct xenisrc *isrc;
1016 
1017 	isrc = xen_intr_isrc_from_handle(handle);
1018 	if (isrc == NULL)
1019 		return (0);
1020 
1021 	return (isrc->xi_port);
1022 }
1023 
1024 int
1025 xen_intr_add_handler(const char *name, driver_filter_t filter,
1026     driver_intr_t handler, void *arg, enum intr_type flags,
1027     xen_intr_handle_t handle)
1028 {
1029 	struct xenisrc *isrc;
1030 	int error;
1031 
1032 	isrc = xen_intr_isrc_from_handle(handle);
1033 	if (isrc == NULL || isrc->xi_cookie != NULL)
1034 		return (EINVAL);
1035 
1036 	error = xen_arch_intr_add_handler(name, filter, handler, arg,
1037 	    flags | INTR_EXCL, isrc, &isrc->xi_cookie);
1038 	if (error != 0)
1039 		printf("%s: %s: add handler failed: %d\n", name, __func__,
1040 		    error);
1041 
1042 	return (error);
1043 }
1044 
1045 int
1046 xen_intr_get_evtchn_from_port(evtchn_port_t port, xen_intr_handle_t *handlep)
1047 {
1048 
1049 	if (!is_valid_evtchn(port))
1050 		return (EINVAL);
1051 
1052 	if (handlep == NULL) {
1053 		return (EINVAL);
1054 	}
1055 
1056 	mtx_lock(&xen_intr_isrc_lock);
1057 	if (xen_intr_port_to_isrc[port] == NULL) {
1058 		mtx_unlock(&xen_intr_isrc_lock);
1059 		return (EINVAL);
1060 	}
1061 	refcount_acquire(&xen_intr_port_to_isrc[port]->xi_refcount);
1062 	mtx_unlock(&xen_intr_isrc_lock);
1063 
1064 	/* Assign the opaque handler */
1065 	*handlep = xen_intr_handle_from_isrc(xen_intr_port_to_isrc[port]);
1066 
1067 	return (0);
1068 }
1069 
1070 #ifdef DDB
1071 static const char *
1072 xen_intr_print_type(enum evtchn_type type)
1073 {
1074 	static const char *evtchn_type_to_string[EVTCHN_TYPE_COUNT] = {
1075 		[EVTCHN_TYPE_UNBOUND]	= "UNBOUND",
1076 		[EVTCHN_TYPE_VIRQ]	= "VIRQ",
1077 		[EVTCHN_TYPE_IPI]	= "IPI",
1078 		[EVTCHN_TYPE_PORT]	= "PORT",
1079 	};
1080 
1081 	if (type >= EVTCHN_TYPE_COUNT)
1082 		return ("UNKNOWN");
1083 
1084 	return (evtchn_type_to_string[type]);
1085 }
1086 
1087 static void
1088 xen_intr_dump_port(struct xenisrc *isrc)
1089 {
1090 	struct xen_intr_pcpu_data *pcpu;
1091 	shared_info_t *s = HYPERVISOR_shared_info;
1092 	u_int i;
1093 
1094 	db_printf("Port %d Type: %s\n",
1095 	    isrc->xi_port, xen_intr_print_type(isrc->xi_type));
1096 	if (isrc->xi_type == EVTCHN_TYPE_VIRQ)
1097 		db_printf("\tVirq: %u\n", isrc->xi_virq);
1098 
1099 	db_printf("\tMasked: %d Pending: %d\n",
1100 	    !!xen_test_bit(isrc->xi_port, &s->evtchn_mask[0]),
1101 	    !!xen_test_bit(isrc->xi_port, &s->evtchn_pending[0]));
1102 
1103 	db_printf("\tPer-CPU Masks: ");
1104 	CPU_FOREACH(i) {
1105 		pcpu = DPCPU_ID_PTR(i, xen_intr_pcpu);
1106 		db_printf("cpu#%u: %d ", i,
1107 		    !!xen_test_bit(isrc->xi_port, pcpu->evtchn_enabled));
1108 	}
1109 	db_printf("\n");
1110 }
1111 
1112 DB_SHOW_COMMAND(xen_evtchn, db_show_xen_evtchn)
1113 {
1114 	u_int i;
1115 
1116 	if (!xen_domain()) {
1117 		db_printf("Only available on Xen guests\n");
1118 		return;
1119 	}
1120 
1121 	for (i = 0; i < NR_EVENT_CHANNELS; i++) {
1122 		struct xenisrc *isrc;
1123 
1124 		isrc = xen_intr_port_to_isrc[i];
1125 		if (isrc == NULL)
1126 			continue;
1127 
1128 		xen_intr_dump_port(isrc);
1129 	}
1130 }
1131 #endif /* DDB */
1132