1ab7ce14bSJulien Grall /*- 2ab7ce14bSJulien Grall * SPDX-License-Identifier: MIT OR GPL-2.0-only 3ab7ce14bSJulien Grall * 4ab7ce14bSJulien Grall * Copyright © 2002-2005 K A Fraser 5ab7ce14bSJulien Grall * Copyright © 2005 Intel Corporation <xiaofeng.ling@intel.com> 6d32d6527SElliott Mitchell * Copyright © 2005-2006 Kip Macy 7ab7ce14bSJulien Grall * Copyright © 2013 Spectra Logic Corporation 8ab7ce14bSJulien Grall * Copyright © 2015 Julien Grall 9ab7ce14bSJulien Grall * Copyright © 2021,2022 Elliott Mitchell 10ab7ce14bSJulien Grall * 11ab7ce14bSJulien Grall * This file may be distributed separately from the Linux kernel, or 12ab7ce14bSJulien Grall * incorporated into other software packages, subject to the following license: 13ab7ce14bSJulien Grall * 14ab7ce14bSJulien Grall * Permission is hereby granted, free of charge, to any person obtaining a copy 15ab7ce14bSJulien Grall * of this source file (the "Software"), to deal in the Software without 16ab7ce14bSJulien Grall * restriction, including without limitation the rights to use, copy, modify, 17ab7ce14bSJulien Grall * merge, publish, distribute, sublicense, and/or sell copies of the Software, 18ab7ce14bSJulien Grall * and to permit persons to whom the Software is furnished to do so, subject to 19ab7ce14bSJulien Grall * the following conditions: 20ab7ce14bSJulien Grall * 21ab7ce14bSJulien Grall * The above copyright notice and this permission notice shall be included in 22ab7ce14bSJulien Grall * all copies or substantial portions of the Software. 23ab7ce14bSJulien Grall * 24ab7ce14bSJulien Grall * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 25ab7ce14bSJulien Grall * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 26ab7ce14bSJulien Grall * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 27ab7ce14bSJulien Grall * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 28ab7ce14bSJulien Grall * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 29ab7ce14bSJulien Grall * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 30ab7ce14bSJulien Grall * IN THE SOFTWARE. 31ab7ce14bSJulien Grall */ 32ab7ce14bSJulien Grall 33ab7ce14bSJulien Grall #ifndef _XEN_INTR_INTERNAL_H_ 34ab7ce14bSJulien Grall #define _XEN_INTR_INTERNAL_H_ 35ab7ce14bSJulien Grall 36ab7ce14bSJulien Grall #ifndef _MACHINE__XEN_ARCH_INTR_H_ 37ab7ce14bSJulien Grall #error "do not #include intr-internal.h, #include machine/arch-intr.h instead" 38ab7ce14bSJulien Grall #endif 39ab7ce14bSJulien Grall 40ab7ce14bSJulien Grall /* Current implementation only supports 2L event channels. */ 41ab7ce14bSJulien Grall #define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS 42ab7ce14bSJulien Grall 43d32d6527SElliott Mitchell enum evtchn_type { 44d32d6527SElliott Mitchell EVTCHN_TYPE_UNBOUND, 45d32d6527SElliott Mitchell EVTCHN_TYPE_VIRQ, 46d32d6527SElliott Mitchell EVTCHN_TYPE_IPI, 47d32d6527SElliott Mitchell EVTCHN_TYPE_PORT, 48d32d6527SElliott Mitchell EVTCHN_TYPE_COUNT 49d32d6527SElliott Mitchell }; 50d32d6527SElliott Mitchell 51ab7ce14bSJulien Grall struct xenisrc { 52ab7ce14bSJulien Grall xen_arch_isrc_t xi_arch; /* @TOP -> *xi_arch=*xenisrc */ 53ab7ce14bSJulien Grall enum evtchn_type xi_type; 54ab7ce14bSJulien Grall u_int xi_cpu; /* VCPU for delivery */ 55ab7ce14bSJulien Grall evtchn_port_t xi_port; 56ab7ce14bSJulien Grall u_int xi_virq; 57ab7ce14bSJulien Grall void *xi_cookie; 58ab7ce14bSJulien Grall bool xi_close:1; /* close on unbind? */ 59ab7ce14bSJulien Grall bool xi_masked:1; 60ab7ce14bSJulien Grall volatile u_int xi_refcount; 61ab7ce14bSJulien Grall }; 62ab7ce14bSJulien Grall 632d795ab1SJulien Grall /***************** Functions called by the architecture code *****************/ 642d795ab1SJulien Grall 652d795ab1SJulien Grall extern void xen_intr_resume(void); 662d795ab1SJulien Grall extern void xen_intr_enable_source(struct xenisrc *isrc); 672d795ab1SJulien Grall extern void xen_intr_disable_source(struct xenisrc *isrc); 682d795ab1SJulien Grall extern void xen_intr_enable_intr(struct xenisrc *isrc); 692d795ab1SJulien Grall extern void xen_intr_disable_intr(struct xenisrc *isrc); 702d795ab1SJulien Grall extern int xen_intr_assign_cpu(struct xenisrc *isrc, u_int to_cpu); 712d795ab1SJulien Grall 722d795ab1SJulien Grall /******************* Functions implemented by each architecture **************/ 732d795ab1SJulien Grall 742d795ab1SJulien Grall #if 0 752d795ab1SJulien Grall /* 762d795ab1SJulien Grall * These are sample prototypes, the architecture should include its own in 772d795ab1SJulien Grall * <machine/xen/arch-intr.h>. The architecture may implement these as inline. 782d795ab1SJulien Grall */ 792d795ab1SJulien Grall void xen_arch_intr_init(void); 80*6699c22cSElliott Mitchell struct xenisrc *xen_arch_intr_alloc(void); 81*6699c22cSElliott Mitchell void xen_arch_intr_release(struct xenisrc *isrc); 82*6699c22cSElliott Mitchell u_int xen_arch_intr_next_cpu(struct xenisrc *isrc); 832d795ab1SJulien Grall u_long xen_arch_intr_execute_handlers(struct xenisrc *isrc, 842d795ab1SJulien Grall struct trapframe *frame); 852d795ab1SJulien Grall int xen_arch_intr_add_handler(const char *name, 862d795ab1SJulien Grall driver_filter_t filter, driver_intr_t handler, void *arg, 872d795ab1SJulien Grall enum intr_type flags, struct xenisrc *isrc, 882d795ab1SJulien Grall void **cookiep); 892d795ab1SJulien Grall int xen_arch_intr_describe(struct xenisrc *isrc, void *cookie, 902d795ab1SJulien Grall const char *descr); 912d795ab1SJulien Grall int xen_arch_intr_remove_handler(struct xenisrc *isrc, 922d795ab1SJulien Grall void *cookie); 932d795ab1SJulien Grall int xen_arch_intr_event_bind(struct xenisrc *isrc, u_int cpu); 942d795ab1SJulien Grall #endif 952d795ab1SJulien Grall 96ab7ce14bSJulien Grall #endif /* _XEN_INTR_INTERNAL_H_ */ 97