xref: /freebsd/sys/dev/wpi/if_wpi_debug.h (revision d48a2d23039536ab9f92f88a72c27b9895796abf)
1 /*-
2  * Copyright (c) 2006,2007
3  *	Damien Bergamini <damien.bergamini@free.fr>
4  *	Benjamin Close <Benjamin.Close@clearchain.com>
5  * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  *
19  * $FreeBSD$
20  */
21 
22 #ifndef __IF_WPI_DEBUG_H__
23 #define __IF_WPI_DEBUG_H__
24 
25 #ifdef WPI_DEBUG
26 enum {
27 	WPI_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
28 	WPI_DEBUG_RECV		= 0x00000002,	/* basic recv operation */
29 	WPI_DEBUG_STATE		= 0x00000004,	/* 802.11 state transitions */
30 	WPI_DEBUG_HW		= 0x00000008,	/* Stage 1 (eeprom) debugging */
31 	WPI_DEBUG_RESET		= 0x00000010,	/* reset processing */
32 	WPI_DEBUG_FIRMWARE	= 0x00000020,	/* firmware(9) loading debug */
33 	WPI_DEBUG_BEACON	= 0x00000040,	/* beacon handling */
34 	WPI_DEBUG_WATCHDOG	= 0x00000080,	/* watchdog timeout */
35 	WPI_DEBUG_INTR		= 0x00000100,	/* ISR */
36 	WPI_DEBUG_SCAN		= 0x00000200,	/* Scan related operations */
37 	WPI_DEBUG_NOTIFY	= 0x00000400,	/* State 2 Notif intr debug */
38 	WPI_DEBUG_TEMP		= 0x00000800,	/* TXPower/Temp Calibration */
39 	WPI_DEBUG_CMD		= 0x00001000,	/* cmd submission */
40 	WPI_DEBUG_TRACE		= 0x00002000,	/* Print begin and start driver function */
41 	WPI_DEBUG_PWRSAVE	= 0x00004000,	/* Power save operations */
42 	WPI_DEBUG_EEPROM	= 0x00008000,	/* EEPROM info */
43 	WPI_DEBUG_NODE		= 0x00010000,	/* node addition/removal */
44 	WPI_DEBUG_KEY		= 0x00020000,	/* node key management */
45 	WPI_DEBUG_EDCA		= 0x00040000,	/* WME info */
46 	WPI_DEBUG_REGISTER	= 0x00080000,	/* print chipset register */
47 	WPI_DEBUG_BMISS		= 0x00100000,	/* print number of missed beacons */
48 	WPI_DEBUG_ANY		= 0xffffffff
49 };
50 
51 #define DPRINTF(sc, m, ...) do {		\
52 	if (sc->sc_debug & (m))			\
53 		printf(__VA_ARGS__);		\
54 } while (0)
55 
56 #define TRACE_STR_BEGIN		"->%s: begin\n"
57 #define TRACE_STR_DOING		"->Doing %s\n"
58 #define TRACE_STR_END		"->%s: end\n"
59 #define TRACE_STR_END_ERR	"->%s: end in error\n"
60 
61 #define WPI_DESC(x) case x:	return #x
62 
63 static const char *wpi_cmd_str(int cmd)
64 {
65 	switch (cmd) {
66 		/* Notifications. */
67 		WPI_DESC(WPI_UC_READY);
68 		WPI_DESC(WPI_RX_DONE);
69 		WPI_DESC(WPI_START_SCAN);
70 		WPI_DESC(WPI_SCAN_RESULTS);
71 		WPI_DESC(WPI_STOP_SCAN);
72 		WPI_DESC(WPI_BEACON_SENT);
73 		WPI_DESC(WPI_RX_STATISTICS);
74 		WPI_DESC(WPI_BEACON_STATISTICS);
75 		WPI_DESC(WPI_STATE_CHANGED);
76 		WPI_DESC(WPI_BEACON_MISSED);
77 
78 		/* Command notifications. */
79 		WPI_DESC(WPI_CMD_RXON);
80 		WPI_DESC(WPI_CMD_RXON_ASSOC);
81 		WPI_DESC(WPI_CMD_EDCA_PARAMS);
82 		WPI_DESC(WPI_CMD_TIMING);
83 		WPI_DESC(WPI_CMD_ADD_NODE);
84 		WPI_DESC(WPI_CMD_DEL_NODE);
85 		WPI_DESC(WPI_CMD_TX_DATA);
86 		WPI_DESC(WPI_CMD_MRR_SETUP);
87 		WPI_DESC(WPI_CMD_SET_LED);
88 		WPI_DESC(WPI_CMD_SET_POWER_MODE);
89 		WPI_DESC(WPI_CMD_SCAN);
90 		WPI_DESC(WPI_CMD_SCAN_ABORT);
91 		WPI_DESC(WPI_CMD_SET_BEACON);
92 		WPI_DESC(WPI_CMD_TXPOWER);
93 		WPI_DESC(WPI_CMD_BT_COEX);
94 
95 	default:
96 		return "UNKNOWN CMD";
97 	}
98 }
99 
100 /*
101  * Translate CSR code to string
102  */
103 static const char *wpi_get_csr_string(size_t csr)
104 {
105 	switch (csr) {
106 		WPI_DESC(WPI_HW_IF_CONFIG);
107 		WPI_DESC(WPI_INT);
108 		WPI_DESC(WPI_INT_MASK);
109 		WPI_DESC(WPI_FH_INT);
110 		WPI_DESC(WPI_GPIO_IN);
111 		WPI_DESC(WPI_RESET);
112 		WPI_DESC(WPI_GP_CNTRL);
113 		WPI_DESC(WPI_EEPROM);
114 		WPI_DESC(WPI_EEPROM_GP);
115 		WPI_DESC(WPI_GIO);
116 		WPI_DESC(WPI_UCODE_GP1);
117 		WPI_DESC(WPI_UCODE_GP2);
118 		WPI_DESC(WPI_GIO_CHICKEN);
119 		WPI_DESC(WPI_ANA_PLL);
120 		WPI_DESC(WPI_DBG_HPET_MEM);
121 	default:
122 		KASSERT(0, ("Unknown CSR: %d\n", csr));
123 		return "UNKNOWN CSR";
124 	}
125 }
126 
127 static const char *wpi_get_prph_string(size_t prph)
128 {
129 	switch (prph) {
130 		WPI_DESC(WPI_APMG_CLK_CTRL);
131 		WPI_DESC(WPI_APMG_PS);
132 		WPI_DESC(WPI_APMG_PCI_STT);
133 		WPI_DESC(WPI_APMG_RFKILL);
134 	default:
135 		KASSERT(0, ("Unknown register: %d\n", prph));
136 		return "UNKNOWN PRPH";
137 	}
138 }
139 
140 #else
141 #define DPRINTF(sc, m, ...)	do { (void) sc; } while (0)
142 #endif
143 
144 #endif	/* __IF_WPI_DEBUG_H__ */
145