1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011 Sandvine Incorporated ULC. 5 * Copyright (c) 2012 iXsystems, Inc. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 /* 30 * Support for Winbond watchdog. 31 * 32 * With minor abstractions it might be possible to add support for other 33 * different Winbond Super I/O chips as well. Winbond seems to have four 34 * different types of chips, four different ways to get into extended config 35 * mode. 36 * 37 * Note: there is no serialization between the debugging sysctl handlers and 38 * the watchdog functions and possibly others poking the registers at the same 39 * time. For that at least possibly interfering sysctls are hidden by default. 40 */ 41 42 #include <sys/param.h> 43 #include <sys/kernel.h> 44 #include <sys/systm.h> 45 #include <sys/bus.h> 46 #include <sys/eventhandler.h> 47 #include <sys/module.h> 48 #include <sys/sbuf.h> 49 #include <sys/sysctl.h> 50 #include <sys/watchdog.h> 51 52 #include <dev/superio/superio.h> 53 54 #include <machine/bus.h> 55 #include <machine/resource.h> 56 57 /* 58 * Global registers. 59 */ 60 #define WB_DEVICE_ID_REG 0x20 /* Device ID */ 61 #define WB_DEVICE_REV_REG 0x21 /* Device revision */ 62 #define WB_CR26 0x26 /* Bit6: HEFRAS (base port selector) */ 63 64 /* LDN selection. */ 65 #define WB_LDN_REG 0x07 66 #define WB_LDN_REG_LDN8 0x08 /* GPIO 2, Watchdog */ 67 68 /* 69 * LDN8 (GPIO 2, Watchdog) specific registers and options. 70 */ 71 /* CR30: LDN8 activation control. */ 72 #define WB_LDN8_CR30 0x30 73 #define WB_LDN8_CR30_ACTIVE 0x01 /* 1: LD active */ 74 75 /* CRF5: Watchdog scale, P20. Mapped to reg_1. */ 76 #define WB_LDN8_CRF5 0xF5 77 #define WB_LDN8_CRF5_SCALE 0x08 /* 0: 1s, 1: 60s */ 78 #define WB_LDN8_CRF5_KEYB_P20 0x04 /* 1: keyb P20 forces timeout */ 79 #define WB_LDN8_CRF5_KBRST 0x02 /* 1: timeout causes pin60 kbd reset */ 80 81 /* CRF6: Watchdog Timeout (0 == off). Mapped to reg_timeout. */ 82 #define WB_LDN8_CRF6 0xF6 83 84 /* CRF7: Watchdog mouse, keyb, force, .. Mapped to reg_2. */ 85 #define WB_LDN8_CRF7 0xF7 86 #define WB_LDN8_CRF7_MOUSE 0x80 /* 1: mouse irq resets wd timer */ 87 #define WB_LDN8_CRF7_KEYB 0x40 /* 1: keyb irq resets wd timer */ 88 #define WB_LDN8_CRF7_FORCE 0x20 /* 1: force timeout (self-clear) */ 89 #define WB_LDN8_CRF7_TS 0x10 /* 0: counting, 1: fired */ 90 #define WB_LDN8_CRF7_IRQS 0x0f /* irq source for watchdog, 2 == SMI */ 91 92 enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf, 93 w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg, 94 w83627dhg_p, w83667hg_b, nct6775, nct6776, nct6779, nct6791, 95 nct6792, nct6793, nct6795, nct6102 }; 96 97 struct wb_softc { 98 device_t dev; 99 eventhandler_tag ev_tag; 100 enum chips chip; 101 uint8_t ctl_reg; 102 uint8_t time_reg; 103 uint8_t csr_reg; 104 int debug_verbose; 105 106 /* 107 * Special feature to let the watchdog fire at a different 108 * timeout as set by watchdog(4) but still use that API to 109 * re-load it periodically. 110 */ 111 unsigned int timeout_override; 112 113 /* 114 * Space to save current state temporary and for sysctls. 115 * We want to know the timeout value and usually need two 116 * additional registers for options. Do not name them by 117 * register as these might be different by chip. 118 */ 119 uint8_t reg_timeout; 120 uint8_t reg_1; 121 uint8_t reg_2; 122 }; 123 124 struct winbond_vendor_device_id { 125 uint8_t device_id; 126 enum chips chip; 127 const char * descr; 128 } wb_devs[] = { 129 { 130 .device_id = 0x52, 131 .chip = w83627hf, 132 .descr = "Winbond 83627HF/F/HG/G", 133 }, 134 { 135 .device_id = 0x59, 136 .chip = w83627s, 137 .descr = "Winbond 83627S", 138 }, 139 { 140 .device_id = 0x60, 141 .chip = w83697hf, 142 .descr = "Winbond 83697HF", 143 }, 144 { 145 .device_id = 0x68, 146 .chip = w83697ug, 147 .descr = "Winbond 83697UG", 148 }, 149 { 150 .device_id = 0x70, 151 .chip = w83637hf, 152 .descr = "Winbond 83637HF", 153 }, 154 { 155 .device_id = 0x82, 156 .chip = w83627thf, 157 .descr = "Winbond 83627THF", 158 }, 159 { 160 .device_id = 0x85, 161 .chip = w83687thf, 162 .descr = "Winbond 83687THF", 163 }, 164 { 165 .device_id = 0x88, 166 .chip = w83627ehf, 167 .descr = "Winbond 83627EHF", 168 }, 169 { 170 .device_id = 0xa0, 171 .chip = w83627dhg, 172 .descr = "Winbond 83627DHG", 173 }, 174 { 175 .device_id = 0xa2, 176 .chip = w83627uhg, 177 .descr = "Winbond 83627UHG", 178 }, 179 { 180 .device_id = 0xa5, 181 .chip = w83667hg, 182 .descr = "Winbond 83667HG", 183 }, 184 { 185 .device_id = 0xb0, 186 .chip = w83627dhg_p, 187 .descr = "Winbond 83627DHG-P", 188 }, 189 { 190 .device_id = 0xb3, 191 .chip = w83667hg_b, 192 .descr = "Winbond 83667HG-B", 193 }, 194 { 195 .device_id = 0xb4, 196 .chip = nct6775, 197 .descr = "Nuvoton NCT6775", 198 }, 199 { 200 .device_id = 0xc3, 201 .chip = nct6776, 202 .descr = "Nuvoton NCT6776", 203 }, 204 { 205 .device_id = 0xc4, 206 .chip = nct6102, 207 .descr = "Nuvoton NCT6102", 208 }, 209 { 210 .device_id = 0xc5, 211 .chip = nct6779, 212 .descr = "Nuvoton NCT6779", 213 }, 214 { 215 .device_id = 0xc8, 216 .chip = nct6791, 217 .descr = "Nuvoton NCT6791", 218 }, 219 { 220 .device_id = 0xc9, 221 .chip = nct6792, 222 .descr = "Nuvoton NCT6792", 223 }, 224 { 225 .device_id = 0xd1, 226 .chip = nct6793, 227 .descr = "Nuvoton NCT6793", 228 }, 229 { 230 .device_id = 0xd3, 231 .chip = nct6795, 232 .descr = "Nuvoton NCT6795", 233 }, 234 }; 235 236 /* 237 * Return the watchdog related registers as we last read them. This will 238 * usually not give the current timeout or state on whether the watchdog 239 * fired. 240 */ 241 static int 242 sysctl_wb_debug(SYSCTL_HANDLER_ARGS) 243 { 244 struct wb_softc *sc; 245 struct sbuf sb; 246 int error; 247 248 sc = arg1; 249 250 sbuf_new_for_sysctl(&sb, NULL, 64, req); 251 252 sbuf_printf(&sb, "LDN8 (GPIO2, Watchdog): "); 253 sbuf_printf(&sb, "CR%02X 0x%02x ", sc->ctl_reg, sc->reg_1); 254 sbuf_printf(&sb, "CR%02X 0x%02x ", sc->time_reg, sc->reg_timeout); 255 sbuf_printf(&sb, "CR%02X 0x%02x", sc->csr_reg, sc->reg_2); 256 257 error = sbuf_finish(&sb); 258 sbuf_delete(&sb); 259 return (error); 260 } 261 262 /* 263 * Read the current values before returning them. Given this might poke 264 * the registers the same time as the watchdog, this sysctl handler should 265 * be marked CTLFLAG_SKIP to not show up by default. 266 */ 267 static int 268 sysctl_wb_debug_current(SYSCTL_HANDLER_ARGS) 269 { 270 struct wb_softc *sc; 271 272 sc = arg1; 273 274 sc->reg_1 = superio_read(sc->dev, sc->ctl_reg); 275 sc->reg_timeout = superio_read(sc->dev, sc->time_reg); 276 sc->reg_2 = superio_read(sc->dev, sc->csr_reg); 277 278 return (sysctl_wb_debug(oidp, arg1, arg2, req)); 279 } 280 281 /* 282 * Sysctl handlers to force a watchdog timeout or to test the NMI functionality 283 * works as expetced. 284 * For testing we could set a test_nmi flag in the softc that, in case of NMI, a 285 * callback function from trap.c could check whether we fired and not report the 286 * timeout but clear the flag for the sysctl again. This is interesting given a 287 * lot of boards have jumpers to change the action on watchdog timeout or 288 * disable the watchdog completely. 289 * XXX-BZ notyet: currently no general infrastructure exists to do this. 290 */ 291 static int 292 sysctl_wb_force_test_nmi(SYSCTL_HANDLER_ARGS) 293 { 294 struct wb_softc *sc; 295 int error, val; 296 297 sc = arg1; 298 299 #ifdef notyet 300 val = sc->test_nmi; 301 #else 302 val = 0; 303 #endif 304 error = sysctl_handle_int(oidp, &val, 0, req); 305 if (error || !req->newptr) 306 return (error); 307 308 #ifdef notyet 309 int test = arg2; 310 311 /* Manually clear the test for a value of 0 and do nothing else. */ 312 if (test && val == 0) { 313 sc->test_nmi = 0; 314 return (0); 315 } 316 317 /* 318 * If we are testing the NMI functionality, set the flag before 319 * forcing the timeout. 320 */ 321 if (test) 322 sc->test_nmi = 1; 323 #endif 324 325 /* Force watchdog to fire. */ 326 sc->reg_2 = superio_read(sc->dev, sc->csr_reg); 327 sc->reg_2 |= WB_LDN8_CRF7_FORCE; 328 superio_write(sc->dev, sc->csr_reg, sc->reg_2); 329 330 return (0); 331 } 332 333 /* 334 * Print current watchdog state. 335 * 336 * Note: it is the responsibility of the caller to update the registers 337 * upfront. 338 */ 339 static void 340 wb_print_state(struct wb_softc *sc, const char *msg) 341 { 342 343 device_printf(sc->dev, "%s%sWatchdog %sabled. %s" 344 "Scaling by %ds, timer at %d (%s=%ds%s). " 345 "CR%02X 0x%02x CR%02X 0x%02x\n", 346 (msg != NULL) ? msg : "", (msg != NULL) ? ": " : "", 347 (sc->reg_timeout > 0x00) ? "en" : "dis", 348 (sc->reg_2 & WB_LDN8_CRF7_TS) ? "Watchdog fired. " : "", 349 (sc->reg_1 & WB_LDN8_CRF5_SCALE) ? 60 : 1, 350 sc->reg_timeout, 351 (sc->reg_timeout > 0x00) ? "<" : "", 352 sc->reg_timeout * ((sc->reg_1 & WB_LDN8_CRF5_SCALE) ? 60 : 1), 353 (sc->reg_timeout > 0x00) ? " left" : "", 354 sc->ctl_reg, sc->reg_1, sc->csr_reg, sc->reg_2); 355 } 356 357 /* 358 * (Re)load the watchdog counter depending on timeout. A timeout of 0 will 359 * disable the watchdog. 360 */ 361 static int 362 wb_set_watchdog(struct wb_softc *sc, unsigned int timeout) 363 { 364 365 if (timeout != 0) { 366 /* 367 * In case an override is set, let it override. It may lead 368 * to strange results as we do not check the input of the sysctl. 369 */ 370 if (sc->timeout_override > 0) 371 timeout = sc->timeout_override; 372 373 /* Make sure we support the requested timeout. */ 374 if (timeout > 255 * 60) 375 return (EINVAL); 376 } 377 378 if (sc->debug_verbose) 379 wb_print_state(sc, "Before watchdog counter (re)load"); 380 381 if (timeout == 0) { 382 /* Disable watchdog. */ 383 sc->reg_timeout = 0; 384 superio_write(sc->dev, sc->time_reg, sc->reg_timeout); 385 386 } else { 387 /* Read current scaling factor. */ 388 sc->reg_1 = superio_read(sc->dev, sc->ctl_reg); 389 390 if (timeout > 255) { 391 /* Set scaling factor to 60s. */ 392 sc->reg_1 |= WB_LDN8_CRF5_SCALE; 393 sc->reg_timeout = (timeout / 60); 394 if (timeout % 60) 395 sc->reg_timeout++; 396 } else { 397 /* Set scaling factor to 1s. */ 398 sc->reg_1 &= ~WB_LDN8_CRF5_SCALE; 399 sc->reg_timeout = timeout; 400 } 401 402 /* In case we fired before we need to clear to fire again. */ 403 sc->reg_2 = superio_read(sc->dev, sc->csr_reg); 404 if (sc->reg_2 & WB_LDN8_CRF7_TS) { 405 sc->reg_2 &= ~WB_LDN8_CRF7_TS; 406 superio_write(sc->dev, sc->csr_reg, sc->reg_2); 407 } 408 409 /* Write back scaling factor. */ 410 superio_write(sc->dev, sc->ctl_reg, sc->reg_1); 411 412 /* Set timer and arm/reset the watchdog. */ 413 superio_write(sc->dev, sc->time_reg, sc->reg_timeout); 414 } 415 416 if (sc->debug_verbose) 417 wb_print_state(sc, "After watchdog counter (re)load"); 418 return (0); 419 } 420 421 /* 422 * watchdog(9) EVENTHANDLER function implementation to (re)load the counter 423 * with the given timeout or disable the watchdog. 424 */ 425 static void 426 wb_watchdog_fn(void *private, u_int cmd, int *error) 427 { 428 struct wb_softc *sc; 429 unsigned int timeout; 430 int e; 431 432 sc = private; 433 KASSERT(sc != NULL, ("%s: watchdog handler function called without " 434 "softc.", __func__)); 435 436 cmd &= WD_INTERVAL; 437 if (cmd > 0 && cmd <= 63) { 438 /* Reset (and arm) watchdog. */ 439 timeout = ((uint64_t)1 << cmd) / 1000000000; 440 if (timeout == 0) 441 timeout = 1; 442 e = wb_set_watchdog(sc, timeout); 443 if (e == 0) { 444 if (error != NULL) 445 *error = 0; 446 } else { 447 /* On error, try to make sure the WD is disabled. */ 448 wb_set_watchdog(sc, 0); 449 } 450 451 } else { 452 /* Disable watchdog. */ 453 e = wb_set_watchdog(sc, 0); 454 if (e != 0 && cmd == 0 && error != NULL) { 455 /* Failed to disable watchdog. */ 456 *error = EOPNOTSUPP; 457 } 458 } 459 } 460 461 static int 462 wb_probe(device_t dev) 463 { 464 char buf[128]; 465 struct wb_softc *sc; 466 int j; 467 uint8_t devid; 468 uint8_t revid; 469 470 if (superio_vendor(dev) != SUPERIO_VENDOR_NUVOTON) 471 return (ENXIO); 472 if (superio_get_type(dev) != SUPERIO_DEV_WDT) 473 return (ENXIO); 474 475 sc = device_get_softc(dev); 476 devid = superio_devid(dev) >> 8; 477 revid = superio_revid(dev); 478 for (j = 0; j < nitems(wb_devs); j++) { 479 if (wb_devs[j].device_id == devid) { 480 sc->chip = wb_devs[j].chip; 481 snprintf(buf, sizeof(buf), 482 "%s (0x%02x/0x%02x) Watchdog Timer", 483 wb_devs[j].descr, devid, revid); 484 device_set_desc_copy(dev, buf); 485 return (BUS_PROBE_SPECIFIC); 486 } 487 } 488 if (bootverbose) { 489 device_printf(dev, 490 "unrecognized chip: devid 0x%02x, revid 0x%02x\n", 491 devid, revid); 492 } 493 return (ENXIO); 494 } 495 496 static int 497 wb_attach(device_t dev) 498 { 499 struct wb_softc *sc; 500 struct sysctl_ctx_list *sctx; 501 struct sysctl_oid *soid; 502 unsigned long timeout; 503 uint8_t t; 504 505 sc = device_get_softc(dev); 506 sc->dev = dev; 507 508 /* Make sure WDT is enabled. */ 509 superio_dev_enable(dev, WB_LDN8_CR30_ACTIVE); 510 511 switch (sc->chip) { 512 case w83697hf: 513 case w83697ug: 514 sc->ctl_reg = 0xf3; 515 sc->time_reg = 0xf4; 516 sc->csr_reg = 0xf7; 517 break; 518 case nct6102: 519 sc->ctl_reg = 0xf0; 520 sc->time_reg = 0xf1; 521 sc->csr_reg = 0xf2; 522 break; 523 default: 524 sc->ctl_reg = 0xf5; 525 sc->time_reg = 0xf6; 526 sc->csr_reg = 0xf7; 527 break; 528 } 529 530 switch (sc->chip) { 531 case w83627hf: 532 case w83627s: 533 t = superio_read(dev, 0x2B) & ~0x10; 534 superio_write(dev, 0x2B, t); /* set GPIO24 to WDT0 */ 535 break; 536 case w83697hf: 537 /* Set pin 119 to WDTO# mode (= CR29, WDT0) */ 538 t = superio_read(dev, 0x29) & ~0x60; 539 t |= 0x20; 540 superio_write(dev, 0x29, t); 541 break; 542 case w83697ug: 543 /* Set pin 118 to WDTO# mode */ 544 t = superio_read(dev, 0x2b) & ~0x04; 545 superio_write(dev, 0x2b, t); 546 break; 547 case w83627thf: 548 t = (superio_read(dev, 0x2B) & ~0x08) | 0x04; 549 superio_write(dev, 0x2B, t); /* set GPIO3 to WDT0 */ 550 break; 551 case w83627dhg: 552 case w83627dhg_p: 553 t = superio_read(dev, 0x2D) & ~0x01; /* PIN77 -> WDT0# */ 554 superio_write(dev, 0x2D, t); /* set GPIO5 to WDT0 */ 555 t = superio_read(dev, sc->ctl_reg); 556 t |= 0x02; /* enable the WDTO# output low pulse 557 * to the KBRST# pin */ 558 superio_write(dev, sc->ctl_reg, t); 559 break; 560 case w83637hf: 561 break; 562 case w83687thf: 563 t = superio_read(dev, 0x2C) & ~0x80; /* PIN47 -> WDT0# */ 564 superio_write(dev, 0x2C, t); 565 break; 566 case w83627ehf: 567 case w83627uhg: 568 case w83667hg: 569 case w83667hg_b: 570 case nct6775: 571 case nct6776: 572 case nct6779: 573 case nct6791: 574 case nct6792: 575 case nct6793: 576 case nct6795: 577 case nct6102: 578 /* 579 * These chips have a fixed WDTO# output pin (W83627UHG), 580 * or support more than one WDTO# output pin. 581 * Don't touch its configuration, and hope the BIOS 582 * does the right thing. 583 */ 584 t = superio_read(dev, sc->ctl_reg); 585 t |= 0x02; /* enable the WDTO# output low pulse 586 * to the KBRST# pin */ 587 superio_write(dev, sc->ctl_reg, t); 588 break; 589 default: 590 break; 591 } 592 593 /* Read the current watchdog configuration. */ 594 sc->reg_1 = superio_read(dev, sc->ctl_reg); 595 sc->reg_timeout = superio_read(dev, sc->time_reg); 596 sc->reg_2 = superio_read(dev, sc->csr_reg); 597 598 /* Print current state if bootverbose or watchdog already enabled. */ 599 if (bootverbose || (sc->reg_timeout > 0x00)) 600 wb_print_state(sc, "Before watchdog attach"); 601 602 sc->reg_1 &= ~WB_LDN8_CRF5_KEYB_P20; 603 sc->reg_1 |= WB_LDN8_CRF5_KBRST; 604 superio_write(dev, sc->ctl_reg, sc->reg_1); 605 606 /* 607 * Clear a previous watchdog timeout event (if still set). 608 * Disable timer reset on mouse interrupts. Leave reset on keyboard, 609 * since one of my boards is getting stuck in reboot without it. 610 */ 611 sc->reg_2 &= ~(WB_LDN8_CRF7_MOUSE|WB_LDN8_CRF7_TS); 612 superio_write(dev, sc->csr_reg, sc->reg_2); 613 614 /* Read global timeout override tunable, Add per device sysctls. */ 615 if (TUNABLE_ULONG_FETCH("hw.wbwd.timeout_override", &timeout)) { 616 if (timeout > 0) 617 sc->timeout_override = timeout; 618 } 619 sctx = device_get_sysctl_ctx(dev); 620 soid = device_get_sysctl_tree(dev); 621 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, 622 "timeout_override", CTLFLAG_RW, &sc->timeout_override, 0, 623 "Timeout in seconds overriding default watchdog timeout"); 624 SYSCTL_ADD_INT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, 625 "debug_verbose", CTLFLAG_RW, &sc->debug_verbose, 0, 626 "Enables extra debugging information"); 627 SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "debug", 628 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0, 629 sysctl_wb_debug, "A", 630 "Selected register information from last change by driver"); 631 SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "debug_current", 632 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_SKIP | CTLFLAG_MPSAFE, 633 sc, 0, sysctl_wb_debug_current, "A", 634 "Selected register information (may interfere)"); 635 SYSCTL_ADD_PROC(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "force_timeout", 636 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_SKIP | CTLFLAG_MPSAFE, sc, 0, 637 sysctl_wb_force_test_nmi, "I", "Enable to force watchdog to fire."); 638 639 /* Register watchdog. */ 640 sc->ev_tag = EVENTHANDLER_REGISTER(watchdog_list, wb_watchdog_fn, sc, 641 0); 642 643 if (bootverbose) 644 wb_print_state(sc, "After watchdog attach"); 645 646 return (0); 647 } 648 649 static int 650 wb_detach(device_t dev) 651 { 652 struct wb_softc *sc; 653 654 sc = device_get_softc(dev); 655 656 /* Unregister and stop the watchdog if running. */ 657 if (sc->ev_tag) 658 EVENTHANDLER_DEREGISTER(watchdog_list, sc->ev_tag); 659 wb_set_watchdog(sc, 0); 660 661 /* Bus subroutines take care of sysctls already. */ 662 663 return (0); 664 } 665 666 static device_method_t wb_methods[] = { 667 /* Device interface */ 668 DEVMETHOD(device_probe, wb_probe), 669 DEVMETHOD(device_attach, wb_attach), 670 DEVMETHOD(device_detach, wb_detach), 671 672 DEVMETHOD_END 673 }; 674 675 static driver_t wb_driver = { 676 "wbwd", 677 wb_methods, 678 sizeof(struct wb_softc) 679 }; 680 681 DRIVER_MODULE(wb, superio, wb_driver, NULL, NULL); 682 MODULE_DEPEND(wb, superio, 1, 1, 1); 683 MODULE_VERSION(wb, 1); 684