1 /*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/kernel.h> 38 #include <sys/systm.h> 39 #include <sys/bus.h> 40 #include <sys/module.h> 41 #include <sys/rman.h> 42 43 #include <dev/vt/vt.h> 44 #include <dev/vt/hw/vga/vt_vga_reg.h> 45 46 #include <machine/bus.h> 47 48 #if defined(__amd64__) || defined(__i386__) 49 #include <vm/vm.h> 50 #include <vm/pmap.h> 51 #include <machine/pmap.h> 52 #include <machine/vmparam.h> 53 #endif /* __amd64__ || __i386__ */ 54 55 struct vga_softc { 56 bus_space_tag_t vga_fb_tag; 57 bus_space_handle_t vga_fb_handle; 58 bus_space_tag_t vga_reg_tag; 59 bus_space_handle_t vga_reg_handle; 60 int vga_wmode; 61 term_color_t vga_curfg, vga_curbg; 62 boolean_t vga_enabled; 63 }; 64 65 /* Convenience macros. */ 66 #define MEM_READ1(sc, ofs) \ 67 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 68 #define MEM_WRITE1(sc, ofs, val) \ 69 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 70 #define REG_READ1(sc, reg) \ 71 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 72 #define REG_WRITE1(sc, reg, val) \ 73 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 74 75 #define VT_VGA_WIDTH 640 76 #define VT_VGA_HEIGHT 480 77 #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 78 79 /* 80 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 81 * memory). 82 */ 83 #define VT_VGA_PIXELS_BLOCK 8 84 85 /* 86 * We use an off-screen addresses to: 87 * o store the background color; 88 * o store pixels pattern. 89 * Those addresses are then loaded in the latches once. 90 */ 91 #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 92 93 static vd_probe_t vga_probe; 94 static vd_init_t vga_init; 95 static vd_blank_t vga_blank; 96 static vd_bitblt_text_t vga_bitblt_text; 97 static vd_bitblt_bmp_t vga_bitblt_bitmap; 98 static vd_drawrect_t vga_drawrect; 99 static vd_setpixel_t vga_setpixel; 100 static vd_postswitch_t vga_postswitch; 101 102 static const struct vt_driver vt_vga_driver = { 103 .vd_name = "vga", 104 .vd_probe = vga_probe, 105 .vd_init = vga_init, 106 .vd_blank = vga_blank, 107 .vd_bitblt_text = vga_bitblt_text, 108 .vd_bitblt_bmp = vga_bitblt_bitmap, 109 .vd_drawrect = vga_drawrect, 110 .vd_setpixel = vga_setpixel, 111 .vd_postswitch = vga_postswitch, 112 .vd_priority = VD_PRIORITY_GENERIC, 113 }; 114 115 /* 116 * Driver supports both text mode and graphics mode. Make sure the 117 * buffer is always big enough to support both. 118 */ 119 static struct vga_softc vga_conssoftc; 120 VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 121 122 static inline void 123 vga_setwmode(struct vt_device *vd, int wmode) 124 { 125 struct vga_softc *sc = vd->vd_softc; 126 127 if (sc->vga_wmode == wmode) 128 return; 129 130 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 131 REG_WRITE1(sc, VGA_GC_DATA, wmode); 132 sc->vga_wmode = wmode; 133 134 switch (wmode) { 135 case 3: 136 /* Re-enable all plans. */ 137 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 138 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 139 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 140 break; 141 } 142 } 143 144 static inline void 145 vga_setfg(struct vt_device *vd, term_color_t color) 146 { 147 struct vga_softc *sc = vd->vd_softc; 148 149 vga_setwmode(vd, 3); 150 151 if (sc->vga_curfg == color) 152 return; 153 154 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 155 REG_WRITE1(sc, VGA_GC_DATA, color); 156 sc->vga_curfg = color; 157 } 158 159 static inline void 160 vga_setbg(struct vt_device *vd, term_color_t color) 161 { 162 struct vga_softc *sc = vd->vd_softc; 163 164 vga_setwmode(vd, 3); 165 166 if (sc->vga_curbg == color) 167 return; 168 169 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 170 REG_WRITE1(sc, VGA_GC_DATA, color); 171 172 /* 173 * Write 8 pixels using the background color to an off-screen 174 * byte in the video memory. 175 */ 176 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 177 178 /* 179 * Read those 8 pixels back to load the background color in the 180 * latches register. 181 */ 182 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 183 184 sc->vga_curbg = color; 185 186 /* 187 * The Set/Reset register doesn't contain the fg color anymore, 188 * store an invalid color. 189 */ 190 sc->vga_curfg = 0xff; 191 } 192 193 /* 194 * Binary searchable table for Unicode to CP437 conversion. 195 */ 196 197 struct unicp437 { 198 uint16_t unicode_base; 199 uint8_t cp437_base; 200 uint8_t length; 201 }; 202 203 static const struct unicp437 cp437table[] = { 204 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 205 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 206 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 207 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 208 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 209 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 210 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 211 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 212 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 213 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 214 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 215 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 216 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 217 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 218 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 219 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 220 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 221 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 222 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 223 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 224 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 225 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 226 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 227 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 228 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 229 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 230 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 231 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 232 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 233 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 234 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 235 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 236 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 237 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 238 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 239 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 240 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 241 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 242 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 243 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 244 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 245 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 246 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 247 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 248 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 249 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 250 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 251 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 252 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 253 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 254 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 255 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 256 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 257 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 258 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 259 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 260 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 261 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 262 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 263 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 264 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 265 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 266 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 267 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 268 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 269 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 270 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 271 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 272 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 273 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 274 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 275 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 276 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 277 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 278 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 279 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 280 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 281 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 282 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 283 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 284 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 285 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 286 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 287 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 288 { 0x266c, 0x0e, 0x00 }, 289 }; 290 291 static uint8_t 292 vga_get_cp437(term_char_t c) 293 { 294 int min, mid, max; 295 296 min = 0; 297 max = (sizeof(cp437table) / sizeof(struct unicp437)) - 1; 298 299 if (c < cp437table[0].unicode_base || 300 c > cp437table[max].unicode_base + cp437table[max].length) 301 return '?'; 302 303 while (max >= min) { 304 mid = (min + max) / 2; 305 if (c < cp437table[mid].unicode_base) 306 max = mid - 1; 307 else if (c > cp437table[mid].unicode_base + 308 cp437table[mid].length) 309 min = mid + 1; 310 else 311 return (c - cp437table[mid].unicode_base + 312 cp437table[mid].cp437_base); 313 } 314 315 return '?'; 316 } 317 318 static void 319 vga_blank(struct vt_device *vd, term_color_t color) 320 { 321 struct vga_softc *sc = vd->vd_softc; 322 u_int ofs; 323 324 vga_setfg(vd, color); 325 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 326 MEM_WRITE1(sc, ofs, 0xff); 327 } 328 329 static inline void 330 vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 331 uint8_t v) 332 { 333 struct vga_softc *sc = vd->vd_softc; 334 335 /* Skip empty writes, in order to avoid palette changes. */ 336 if (v != 0x00) { 337 vga_setfg(vd, color); 338 /* 339 * When this MEM_READ1() gets disabled, all sorts of 340 * artifacts occur. This is because this read loads the 341 * set of 8 pixels that are about to be changed. There 342 * is one scenario where we can avoid the read, namely 343 * if all pixels are about to be overwritten anyway. 344 */ 345 if (v != 0xff) { 346 MEM_READ1(sc, dst); 347 348 /* The bg color was trashed by the reads. */ 349 sc->vga_curbg = 0xff; 350 } 351 MEM_WRITE1(sc, dst, v); 352 } 353 } 354 355 static void 356 vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 357 { 358 359 if (vd->vd_flags & VDF_TEXTMODE) 360 return; 361 362 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 363 0x80 >> (x % 8)); 364 } 365 366 static void 367 vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 368 term_color_t color) 369 { 370 int x, y; 371 372 if (vd->vd_flags & VDF_TEXTMODE) 373 return; 374 375 for (y = y1; y <= y2; y++) { 376 if (fill || (y == y1) || (y == y2)) { 377 for (x = x1; x <= x2; x++) 378 vga_setpixel(vd, x, y, color); 379 } else { 380 vga_setpixel(vd, x1, y, color); 381 vga_setpixel(vd, x2, y, color); 382 } 383 } 384 } 385 386 static void 387 vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 388 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 389 uint8_t *pattern, uint8_t *mask) 390 { 391 unsigned int n; 392 393 n = src_x / 8; 394 395 /* 396 * This mask has bits set, where a pixel (ether 0 or 1) 397 * comes from the source bitmap. 398 */ 399 if (mask != NULL) { 400 *mask = (0xff 401 >> (8 - x_count)) 402 << (8 - x_count - dst_x); 403 } 404 405 if (n == (src_x + x_count - 1) / 8) { 406 /* All the pixels we want are in the same byte. */ 407 *pattern = src[n]; 408 if (dst_x >= src_x) 409 *pattern >>= (dst_x - src_x % 8); 410 else 411 *pattern <<= (src_x % 8 - dst_x); 412 } else { 413 /* The pixels we want are split into two bytes. */ 414 if (dst_x >= src_x % 8) { 415 *pattern = 416 src[n] << (8 - dst_x - src_x % 8) | 417 src[n + 1] >> (dst_x - src_x % 8); 418 } else { 419 *pattern = 420 src[n] << (src_x % 8 - dst_x) | 421 src[n + 1] >> (8 - src_x % 8 - dst_x); 422 } 423 } 424 } 425 426 static void 427 vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 428 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 429 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 430 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 431 term_color_t fg, term_color_t bg, int overwrite) 432 { 433 unsigned int i, bytes; 434 uint8_t pattern, relevant_bits, mask; 435 436 bytes = (src_width + 7) / 8; 437 438 for (i = 0; i < y_count; ++i) { 439 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 440 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 441 442 if (src_mask == NULL) { 443 /* 444 * No src mask. Consider that all wanted bits 445 * from the source are "authoritative". 446 */ 447 mask = relevant_bits; 448 } else { 449 /* 450 * There's an src mask. We shift it the same way 451 * we shifted the source pattern. 452 */ 453 vga_compute_shifted_pattern( 454 src_mask + (src_y + i) * bytes, 455 bytes, src_x, x_count, dst_x, 456 &mask, NULL); 457 458 /* Now, only keep the wanted bits among them. */ 459 mask &= relevant_bits; 460 } 461 462 /* 463 * Clear bits from the pattern which must be 464 * transparent, according to the source mask. 465 */ 466 pattern &= mask; 467 468 /* Set the bits in the 2-colors array. */ 469 if (overwrite) 470 pattern_2colors[dst_y + i] &= ~mask; 471 pattern_2colors[dst_y + i] |= pattern; 472 473 if (pattern_ncolors == NULL) 474 continue; 475 476 /* 477 * Set the same bits in the n-colors array. This one 478 * supports transparency, when a given bit is cleared in 479 * all colors. 480 */ 481 if (overwrite) { 482 /* 483 * Ensure that the pixels used by this bitmap are 484 * cleared in other colors. 485 */ 486 for (int j = 0; j < 16; ++j) 487 pattern_ncolors[(dst_y + i) * 16 + j] &= 488 ~mask; 489 } 490 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 491 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 492 } 493 } 494 495 static void 496 vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 497 term_color_t fg, term_color_t bg, 498 unsigned int x, unsigned int y, unsigned int height) 499 { 500 unsigned int i, offset; 501 struct vga_softc *sc; 502 503 /* 504 * The great advantage of Write Mode 3 is that we just need 505 * to load the foreground in the Set/Reset register, load the 506 * background color in the latches register (this is done 507 * through a write in offscreen memory followed by a read of 508 * that data), then write the pattern to video memory. This 509 * pattern indicates if the pixel should use the foreground 510 * color (bit set) or the background color (bit cleared). 511 */ 512 513 vga_setbg(vd, bg); 514 vga_setfg(vd, fg); 515 516 sc = vd->vd_softc; 517 offset = (VT_VGA_WIDTH * y + x) / 8; 518 519 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 520 MEM_WRITE1(sc, offset, masks[i]); 521 } 522 } 523 524 static void 525 vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 526 unsigned int x, unsigned int y, unsigned int height) 527 { 528 unsigned int i, j, plan, color, offset; 529 struct vga_softc *sc; 530 uint8_t mask, plans[height * 4]; 531 532 sc = vd->vd_softc; 533 534 memset(plans, 0, sizeof(plans)); 535 536 /* 537 * To write a group of pixels using 3 or more colors, we select 538 * Write Mode 0 and write one byte to each plan separately. 539 */ 540 541 /* 542 * We first compute each byte: each plan contains one bit of the 543 * color code for each of the 8 pixels. 544 * 545 * For example, if the 8 pixels are like this: 546 * GBBBBBBY 547 * where: 548 * G (gray) = 0b0111 549 * B (black) = 0b0000 550 * Y (yellow) = 0b0011 551 * 552 * The corresponding for bytes are: 553 * GBBBBBBY 554 * Plan 0: 10000001 = 0x81 555 * Plan 1: 10000001 = 0x81 556 * Plan 2: 10000000 = 0x80 557 * Plan 3: 00000000 = 0x00 558 * | | | 559 * | | +-> 0b0011 (Y) 560 * | +-----> 0b0000 (B) 561 * +--------> 0b0111 (G) 562 */ 563 564 for (i = 0; i < height; ++i) { 565 for (color = 0; color < 16; ++color) { 566 mask = masks[i * 16 + color]; 567 if (mask == 0x00) 568 continue; 569 570 for (j = 0; j < 8; ++j) { 571 if (!((mask >> (7 - j)) & 0x1)) 572 continue; 573 574 /* The pixel "j" uses color "color". */ 575 for (plan = 0; plan < 4; ++plan) 576 plans[i * 4 + plan] |= 577 ((color >> plan) & 0x1) << (7 - j); 578 } 579 } 580 } 581 582 /* 583 * The bytes are ready: we now switch to Write Mode 0 and write 584 * all bytes, one plan at a time. 585 */ 586 vga_setwmode(vd, 0); 587 588 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 589 for (plan = 0; plan < 4; ++plan) { 590 /* Select plan. */ 591 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 592 593 /* Write all bytes for this plan, from Y to Y+height. */ 594 for (i = 0; i < height; ++i) { 595 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 596 MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 597 } 598 } 599 } 600 601 static void 602 vga_bitblt_one_text_pixels_block(struct vt_device *vd, 603 const struct vt_window *vw, unsigned int x, unsigned int y) 604 { 605 const struct vt_buf *vb; 606 const struct vt_font *vf; 607 unsigned int i, col, row, src_x, x_count; 608 unsigned int used_colors_list[16], used_colors; 609 uint8_t pattern_2colors[vw->vw_font->vf_height]; 610 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 611 term_char_t c; 612 term_color_t fg, bg; 613 const uint8_t *src; 614 615 vb = &vw->vw_buf; 616 vf = vw->vw_font; 617 618 /* 619 * The current pixels block. 620 * 621 * We fill it with portions of characters, because both "grids" 622 * may not match. 623 * 624 * i is the index in this pixels block. 625 */ 626 627 i = x; 628 used_colors = 0; 629 memset(used_colors_list, 0, sizeof(used_colors_list)); 630 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 631 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 632 633 if (i < vw->vw_draw_area.tr_begin.tp_col) { 634 /* 635 * i is in the margin used to center the text area on 636 * the screen. 637 */ 638 639 i = vw->vw_draw_area.tr_begin.tp_col; 640 } 641 642 while (i < x + VT_VGA_PIXELS_BLOCK && 643 i < vw->vw_draw_area.tr_end.tp_col) { 644 /* 645 * Find which character is drawn on this pixel in the 646 * pixels block. 647 * 648 * While here, record what colors it uses. 649 */ 650 651 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 652 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 653 654 c = VTBUF_GET_FIELD(vb, row, col); 655 src = vtfont_lookup(vf, c); 656 657 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 658 if ((used_colors_list[fg] & 0x1) != 0x1) 659 used_colors++; 660 if ((used_colors_list[bg] & 0x2) != 0x2) 661 used_colors++; 662 used_colors_list[fg] |= 0x1; 663 used_colors_list[bg] |= 0x2; 664 665 /* 666 * Compute the portion of the character we want to draw, 667 * because the pixels block may start in the middle of a 668 * character. 669 * 670 * The first pixel to draw in the character is 671 * the current position - 672 * the start position of the character 673 * 674 * The last pixel to draw is either 675 * - the last pixel of the character, or 676 * - the pixel of the character matching the end of 677 * the pixels block 678 * whichever comes first. This position is then 679 * changed to be relative to the start position of the 680 * character. 681 */ 682 683 src_x = i - 684 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 685 x_count = min(min( 686 (col + 1) * vf->vf_width + 687 vw->vw_draw_area.tr_begin.tp_col, 688 x + VT_VGA_PIXELS_BLOCK), 689 vw->vw_draw_area.tr_end.tp_col); 690 x_count -= col * vf->vf_width + 691 vw->vw_draw_area.tr_begin.tp_col; 692 x_count -= src_x; 693 694 /* Copy a portion of the character. */ 695 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 696 src, NULL, vf->vf_width, 697 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 698 0, 0, vf->vf_height, fg, bg, 0); 699 700 /* We move to the next portion. */ 701 i += x_count; 702 } 703 704 #ifndef SC_NO_CUTPASTE 705 /* 706 * Copy the mouse pointer bitmap if it's over the current pixels 707 * block. 708 * 709 * We use the saved cursor position (saved in vt_flush()), because 710 * the current position could be different than the one used 711 * to mark the area dirty. 712 */ 713 term_rect_t drawn_area; 714 715 drawn_area.tr_begin.tp_col = x; 716 drawn_area.tr_begin.tp_row = y; 717 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 718 drawn_area.tr_end.tp_row = y + vf->vf_height; 719 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 720 struct vt_mouse_cursor *cursor; 721 unsigned int mx, my; 722 unsigned int dst_x, src_y, dst_y, y_count; 723 724 cursor = vd->vd_mcursor; 725 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 726 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 727 728 /* Compute the portion of the cursor we want to copy. */ 729 src_x = x > mx ? x - mx : 0; 730 dst_x = mx > x ? mx - x : 0; 731 x_count = min(min(min( 732 cursor->width - src_x, 733 x + VT_VGA_PIXELS_BLOCK - mx), 734 vw->vw_draw_area.tr_end.tp_col - mx), 735 VT_VGA_PIXELS_BLOCK); 736 737 /* 738 * The cursor isn't aligned on the Y-axis with 739 * characters, so we need to compute the vertical 740 * start/count. 741 */ 742 src_y = y > my ? y - my : 0; 743 dst_y = my > y ? my - y : 0; 744 y_count = min( 745 min(cursor->height - src_y, y + vf->vf_height - my), 746 vf->vf_height); 747 748 /* Copy the cursor portion. */ 749 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 750 cursor->map, cursor->mask, cursor->width, 751 src_x, dst_x, x_count, src_y, dst_y, y_count, 752 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 753 754 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 755 used_colors++; 756 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 757 used_colors++; 758 } 759 #endif 760 761 /* 762 * The pixels block is completed, we can now draw it on the 763 * screen. 764 */ 765 if (used_colors == 2) 766 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 767 x, y, vf->vf_height); 768 else 769 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 770 x, y, vf->vf_height); 771 } 772 773 static void 774 vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 775 const term_rect_t *area) 776 { 777 const struct vt_font *vf; 778 unsigned int col, row; 779 unsigned int x1, y1, x2, y2, x, y; 780 781 vf = vw->vw_font; 782 783 /* 784 * Compute the top-left pixel position aligned with the video 785 * adapter pixels block size. 786 * 787 * This is calculated from the top-left column of te dirty area: 788 * 789 * 1. Compute the top-left pixel of the character: 790 * col * font width + x offset 791 * 792 * NOTE: x offset is used to center the text area on the 793 * screen. It's expressed in pixels, not in characters 794 * col/row! 795 * 796 * 2. Find the pixel further on the left marking the start of 797 * an aligned pixels block (eg. chunk of 8 pixels): 798 * character's x / blocksize * blocksize 799 * 800 * The division, being made on integers, achieves the 801 * alignment. 802 * 803 * For the Y-axis, we need to compute the character's y 804 * coordinate, but we don't need to align it. 805 */ 806 807 col = area->tr_begin.tp_col; 808 row = area->tr_begin.tp_row; 809 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 810 / VT_VGA_PIXELS_BLOCK) 811 * VT_VGA_PIXELS_BLOCK; 812 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 813 814 /* 815 * Compute the bottom right pixel position, again, aligned with 816 * the pixels block size. 817 * 818 * The same rules apply, we just add 1 to base the computation 819 * on the "right border" of the dirty area. 820 */ 821 822 col = area->tr_end.tp_col; 823 row = area->tr_end.tp_row; 824 x2 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col 825 + VT_VGA_PIXELS_BLOCK - 1) 826 / VT_VGA_PIXELS_BLOCK) 827 * VT_VGA_PIXELS_BLOCK; 828 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 829 830 /* Clip the area to the screen size. */ 831 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 832 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 833 834 /* 835 * Now, we take care of N pixels line at a time (the first for 836 * loop, N = font height), and for these lines, draw one pixels 837 * block at a time (the second for loop), not a character at a 838 * time. 839 * 840 * Therefore, on the X-axis, characters my be drawn partially if 841 * they are not aligned on 8-pixels boundary. 842 * 843 * However, the operation is repeated for the full height of the 844 * font before moving to the next character, because it allows 845 * to keep the color settings and write mode, before perhaps 846 * changing them with the next one. 847 */ 848 849 for (y = y1; y < y2; y += vf->vf_height) { 850 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 851 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 852 } 853 } 854 } 855 856 static void 857 vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 858 const term_rect_t *area) 859 { 860 struct vga_softc *sc; 861 const struct vt_buf *vb; 862 unsigned int col, row; 863 term_char_t c; 864 term_color_t fg, bg; 865 uint8_t ch, attr; 866 867 sc = vd->vd_softc; 868 vb = &vw->vw_buf; 869 870 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 871 for (col = area->tr_begin.tp_col; 872 col < area->tr_end.tp_col; 873 ++col) { 874 /* 875 * Get next character and its associated fg/bg 876 * colors. 877 */ 878 c = VTBUF_GET_FIELD(vb, row, col); 879 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 880 &fg, &bg); 881 882 /* 883 * Convert character to CP437, which is the 884 * character set used by the VGA hardware by 885 * default. 886 */ 887 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 888 889 /* Convert colors to VGA attributes. */ 890 attr = bg << 4 | fg; 891 892 MEM_WRITE1(sc, 0x18000 + (row * 80 + col) * 2 + 0, 893 ch); 894 MEM_WRITE1(sc, 0x18000 + (row * 80 + col) * 2 + 1, 895 attr); 896 } 897 } 898 } 899 900 static void 901 vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 902 const term_rect_t *area) 903 { 904 905 if (!(vd->vd_flags & VDF_TEXTMODE)) { 906 vga_bitblt_text_gfxmode(vd, vw, area); 907 } else { 908 vga_bitblt_text_txtmode(vd, vw, area); 909 } 910 } 911 912 static void 913 vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 914 const uint8_t *pattern, const uint8_t *mask, 915 unsigned int width, unsigned int height, 916 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 917 { 918 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 919 uint8_t pattern_2colors; 920 921 /* Align coordinates with the 8-pxels grid. */ 922 x1 = x / VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 923 y1 = y; 924 925 x2 = (x + width + VT_VGA_PIXELS_BLOCK - 1) / 926 VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 927 y2 = y + height; 928 x2 = min(x2, vd->vd_width - 1); 929 y2 = min(y2, vd->vd_height - 1); 930 931 for (j = y1; j < y2; ++j) { 932 src_x = 0; 933 dst_x = x - x1; 934 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 935 936 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 937 pattern_2colors = 0; 938 939 vga_copy_bitmap_portion( 940 &pattern_2colors, NULL, 941 pattern, mask, width, 942 src_x, dst_x, x_count, 943 j - y1, 0, 1, fg, bg, 0); 944 945 vga_bitblt_pixels_block_2colors(vd, 946 &pattern_2colors, fg, bg, 947 i, j, 1); 948 949 src_x += x_count; 950 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 951 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 952 } 953 } 954 } 955 956 static void 957 vga_initialize_graphics(struct vt_device *vd) 958 { 959 struct vga_softc *sc = vd->vd_softc; 960 961 /* Clock select. */ 962 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 963 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 964 /* Set sequencer clocking and memory mode. */ 965 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 966 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 967 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 968 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 969 970 /* Set the graphics controller in graphics mode. */ 971 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 972 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 973 /* Program the CRT controller. */ 974 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 975 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 976 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 977 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 978 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 979 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 980 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 981 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 982 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 983 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 984 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 985 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 986 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 987 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 988 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 989 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 990 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 991 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 992 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 993 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 994 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 995 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 996 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 997 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 998 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 999 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 1000 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 1001 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 1002 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 1003 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 1004 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 1005 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1006 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1007 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1008 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1009 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1010 1011 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1012 1013 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1014 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1015 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1016 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1017 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1018 1019 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1020 REG_WRITE1(sc, VGA_GC_DATA, 0); 1021 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1022 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1023 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1024 REG_WRITE1(sc, VGA_GC_DATA, 0); 1025 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1026 REG_WRITE1(sc, VGA_GC_DATA, 0); 1027 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1028 REG_WRITE1(sc, VGA_GC_DATA, 0); 1029 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1030 REG_WRITE1(sc, VGA_GC_DATA, 0); 1031 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1032 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1033 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1034 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1035 } 1036 1037 static void 1038 vga_initialize(struct vt_device *vd, int textmode) 1039 { 1040 struct vga_softc *sc = vd->vd_softc; 1041 uint8_t x; 1042 1043 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1044 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1045 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1046 1047 /* Unprotect CRTC registers 0-7. */ 1048 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1049 x = REG_READ1(sc, VGA_CRTC_DATA); 1050 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1051 1052 /* 1053 * Wait for the vertical retrace. 1054 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1055 * the side-effect of clearing the internal flip-flip of the attribute 1056 * controller's write register. This means that because this code is 1057 * here, we know for sure that the first write to the attribute 1058 * controller will be a write to the address register. Removing this 1059 * code therefore also removes that guarantee and appropriate measures 1060 * need to be taken. 1061 */ 1062 do { 1063 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1064 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1065 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE)); 1066 1067 /* Now, disable the sync. signals. */ 1068 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1069 x = REG_READ1(sc, VGA_CRTC_DATA); 1070 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1071 1072 /* Asynchronous sequencer reset. */ 1073 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1074 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1075 1076 if (!textmode) 1077 vga_initialize_graphics(vd); 1078 1079 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1080 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1081 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1082 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1083 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1084 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1085 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1086 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1087 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1088 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1089 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1090 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1091 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1092 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1093 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1094 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1095 1096 if (textmode) { 1097 /* Set the attribute controller to blink disable. */ 1098 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1099 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1100 } else { 1101 /* Set the attribute controller in graphics mode. */ 1102 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1103 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1104 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1105 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1106 } 1107 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1108 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1109 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1110 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1111 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1112 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1113 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1114 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1115 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1116 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1117 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1118 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1119 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1120 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1121 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1122 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1123 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1124 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1125 VGA_AC_PAL_SB); 1126 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1127 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1128 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1129 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1130 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1131 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1132 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1133 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1134 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1135 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1136 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1137 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1138 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1139 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1140 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1141 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1142 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1143 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1144 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1145 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1146 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1147 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1148 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1149 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1150 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1151 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1152 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1153 1154 if (!textmode) { 1155 u_int ofs; 1156 1157 /* 1158 * Done. Clear the frame buffer. All bit planes are 1159 * enabled, so a single-paged loop should clear all 1160 * planes. 1161 */ 1162 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1163 MEM_WRITE1(sc, ofs, 0); 1164 } 1165 } 1166 1167 /* Re-enable the sequencer. */ 1168 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1169 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1170 /* Re-enable the sync signals. */ 1171 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1172 x = REG_READ1(sc, VGA_CRTC_DATA); 1173 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1174 1175 if (!textmode) { 1176 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1177 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1178 REG_WRITE1(sc, VGA_GC_DATA, 3); 1179 sc->vga_wmode = 3; 1180 1181 /* 1182 * In Write Mode 3, Enable Set/Reset is ignored, but we 1183 * use Write Mode 0 to write a group of 8 pixels using 1184 * 3 or more colors. In this case, we want to disable 1185 * Set/Reset: set Enable Set/Reset to 0. 1186 */ 1187 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1188 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1189 1190 /* 1191 * Clear the colors we think are loaded into Set/Reset or 1192 * the latches. 1193 */ 1194 sc->vga_curfg = sc->vga_curbg = 0xff; 1195 } 1196 } 1197 1198 static int 1199 vga_probe(struct vt_device *vd) 1200 { 1201 1202 return (CN_INTERNAL); 1203 } 1204 1205 static int 1206 vga_init(struct vt_device *vd) 1207 { 1208 struct vga_softc *sc; 1209 int textmode; 1210 1211 if (vd->vd_softc == NULL) 1212 vd->vd_softc = (void *)&vga_conssoftc; 1213 sc = vd->vd_softc; 1214 textmode = 0; 1215 1216 #if defined(__amd64__) || defined(__i386__) 1217 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1218 sc->vga_fb_handle = KERNBASE + VGA_MEM_BASE; 1219 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1220 sc->vga_reg_handle = VGA_REG_BASE; 1221 #else 1222 # error "Architecture not yet supported!" 1223 #endif 1224 1225 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1226 if (textmode) { 1227 vd->vd_flags |= VDF_TEXTMODE; 1228 vd->vd_width = 80; 1229 vd->vd_height = 25; 1230 } else { 1231 vd->vd_width = VT_VGA_WIDTH; 1232 vd->vd_height = VT_VGA_HEIGHT; 1233 } 1234 vga_initialize(vd, textmode); 1235 sc->vga_enabled = true; 1236 1237 return (CN_INTERNAL); 1238 } 1239 1240 static void 1241 vga_postswitch(struct vt_device *vd) 1242 { 1243 1244 /* Reinit VGA mode, to restore view after app which change mode. */ 1245 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1246 /* Ask vt(9) to update chars on visible area. */ 1247 vd->vd_flags |= VDF_INVALID; 1248 } 1249 1250 /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1251 static void 1252 vtvga_identify(driver_t *driver, device_t parent) 1253 { 1254 1255 if (!vga_conssoftc.vga_enabled) 1256 return; 1257 1258 if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1259 panic("Unable to attach vt_vga console"); 1260 } 1261 1262 static int 1263 vtvga_probe(device_t dev) 1264 { 1265 1266 device_set_desc(dev, "VT VGA driver"); 1267 1268 return (BUS_PROBE_NOWILDCARD); 1269 } 1270 1271 static int 1272 vtvga_attach(device_t dev) 1273 { 1274 struct resource *pseudo_phys_res; 1275 int res_id; 1276 1277 res_id = 0; 1278 pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1279 &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1280 VGA_MEM_SIZE, RF_ACTIVE); 1281 if (pseudo_phys_res == NULL) 1282 panic("Unable to reserve vt_vga memory"); 1283 return (0); 1284 } 1285 1286 /*-------------------- Private Device Attachment Data -----------------------*/ 1287 static device_method_t vtvga_methods[] = { 1288 /* Device interface */ 1289 DEVMETHOD(device_identify, vtvga_identify), 1290 DEVMETHOD(device_probe, vtvga_probe), 1291 DEVMETHOD(device_attach, vtvga_attach), 1292 1293 DEVMETHOD_END 1294 }; 1295 1296 DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1297 devclass_t vtvga_devclass; 1298 1299 DRIVER_MODULE(vtvga, nexus, vtvga_driver, vtvga_devclass, NULL, NULL); 1300