1 /*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include "opt_acpi.h" 34 35 #include <sys/cdefs.h> 36 #include <sys/param.h> 37 #include <sys/kernel.h> 38 #include <sys/systm.h> 39 #include <sys/bus.h> 40 #include <sys/module.h> 41 #include <sys/rman.h> 42 43 #include <dev/vt/vt.h> 44 #include <dev/vt/colors/vt_termcolors.h> 45 #include <dev/vt/hw/vga/vt_vga_reg.h> 46 #include <dev/pci/pcivar.h> 47 48 #include <machine/bus.h> 49 #if defined(__amd64__) || defined(__i386__) 50 #include <contrib/dev/acpica/include/acpi.h> 51 #include <machine/md_var.h> 52 #endif 53 54 struct vga_softc { 55 bus_space_tag_t vga_fb_tag; 56 bus_space_handle_t vga_fb_handle; 57 bus_space_tag_t vga_reg_tag; 58 bus_space_handle_t vga_reg_handle; 59 int vga_wmode; 60 term_color_t vga_curfg, vga_curbg; 61 boolean_t vga_enabled; 62 }; 63 64 /* Convenience macros. */ 65 #define MEM_READ1(sc, ofs) \ 66 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 67 #define MEM_WRITE1(sc, ofs, val) \ 68 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 69 #define MEM_WRITE2(sc, ofs, val) \ 70 bus_space_write_2(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 71 #define REG_READ1(sc, reg) \ 72 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 73 #define REG_WRITE1(sc, reg, val) \ 74 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 75 76 #define VT_VGA_WIDTH 640 77 #define VT_VGA_HEIGHT 480 78 #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 79 80 /* 81 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 82 * memory). 83 */ 84 #define VT_VGA_PIXELS_BLOCK 8 85 86 /* 87 * We use an off-screen addresses to: 88 * o store the background color; 89 * o store pixels pattern. 90 * Those addresses are then loaded in the latches once. 91 */ 92 #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 93 94 static vd_probe_t vga_probe; 95 static vd_init_t vga_init; 96 static vd_blank_t vga_blank; 97 static vd_bitblt_text_t vga_bitblt_text; 98 static vd_invalidate_text_t vga_invalidate_text; 99 static vd_bitblt_bmp_t vga_bitblt_bitmap; 100 static vd_drawrect_t vga_drawrect; 101 static vd_setpixel_t vga_setpixel; 102 static vd_postswitch_t vga_postswitch; 103 104 static const struct vt_driver vt_vga_driver = { 105 .vd_name = "vga", 106 .vd_probe = vga_probe, 107 .vd_init = vga_init, 108 .vd_blank = vga_blank, 109 .vd_bitblt_text = vga_bitblt_text, 110 .vd_invalidate_text = vga_invalidate_text, 111 .vd_bitblt_bmp = vga_bitblt_bitmap, 112 .vd_drawrect = vga_drawrect, 113 .vd_setpixel = vga_setpixel, 114 .vd_postswitch = vga_postswitch, 115 .vd_priority = VD_PRIORITY_GENERIC, 116 }; 117 118 /* 119 * Driver supports both text mode and graphics mode. Make sure the 120 * buffer is always big enough to support both. 121 */ 122 static struct vga_softc vga_conssoftc; 123 VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 124 125 static inline void 126 vga_setwmode(struct vt_device *vd, int wmode) 127 { 128 struct vga_softc *sc = vd->vd_softc; 129 130 if (sc->vga_wmode == wmode) 131 return; 132 133 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 134 REG_WRITE1(sc, VGA_GC_DATA, wmode); 135 sc->vga_wmode = wmode; 136 137 switch (wmode) { 138 case 3: 139 /* Re-enable all planes. */ 140 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 141 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 142 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 143 break; 144 } 145 } 146 147 static inline void 148 vga_setfg(struct vt_device *vd, term_color_t color) 149 { 150 struct vga_softc *sc = vd->vd_softc; 151 152 vga_setwmode(vd, 3); 153 154 if (sc->vga_curfg == color) 155 return; 156 157 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 158 REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 159 sc->vga_curfg = color; 160 } 161 162 static inline void 163 vga_setbg(struct vt_device *vd, term_color_t color) 164 { 165 struct vga_softc *sc = vd->vd_softc; 166 167 vga_setwmode(vd, 3); 168 169 if (sc->vga_curbg == color) 170 return; 171 172 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 173 REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 174 175 /* 176 * Write 8 pixels using the background color to an off-screen 177 * byte in the video memory. 178 */ 179 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 180 181 /* 182 * Read those 8 pixels back to load the background color in the 183 * latches register. 184 */ 185 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 186 187 sc->vga_curbg = color; 188 189 /* 190 * The Set/Reset register doesn't contain the fg color anymore, 191 * store an invalid color. 192 */ 193 sc->vga_curfg = 0xff; 194 } 195 196 /* 197 * Binary searchable table for Unicode to CP437 conversion. 198 */ 199 200 struct unicp437 { 201 uint16_t unicode_base; 202 uint8_t cp437_base; 203 uint8_t length; 204 }; 205 206 static const struct unicp437 cp437table[] = { 207 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 208 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 209 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 210 { 0x00a6, 0x7c, 0x00 }, 211 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 212 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 213 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 214 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 215 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 216 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 217 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 218 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 219 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 220 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 221 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 222 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 223 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 224 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 225 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 226 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 227 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 228 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 229 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 230 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 231 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 232 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 233 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 234 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 235 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 236 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 237 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 238 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 239 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 240 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 241 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 242 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 243 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 244 { 0x2013, 0x2d, 0x00 }, 245 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 246 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 247 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 248 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 249 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 250 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 251 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 252 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 253 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 254 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 255 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 256 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 257 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 258 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 259 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 260 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 261 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 262 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 263 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 264 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 265 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 266 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 267 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 268 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 269 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 270 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 271 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 272 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 273 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 274 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 275 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 276 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 277 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 278 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 279 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 280 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 281 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 282 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 283 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 284 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 285 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 286 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 287 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 288 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 289 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 290 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 291 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 292 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 293 { 0x266c, 0x0e, 0x00 }, { 0x2713, 0xfb, 0x00 }, 294 { 0x27e8, 0x3c, 0x00 }, { 0x27e9, 0x3e, 0x00 }, 295 }; 296 297 static uint8_t 298 vga_get_cp437(term_char_t c) 299 { 300 int min, mid, max; 301 302 min = 0; 303 max = nitems(cp437table) - 1; 304 305 if (c < cp437table[0].unicode_base || 306 c > cp437table[max].unicode_base + cp437table[max].length) 307 return '?'; 308 309 while (max >= min) { 310 mid = (min + max) / 2; 311 if (c < cp437table[mid].unicode_base) 312 max = mid - 1; 313 else if (c > cp437table[mid].unicode_base + 314 cp437table[mid].length) 315 min = mid + 1; 316 else 317 return (c - cp437table[mid].unicode_base + 318 cp437table[mid].cp437_base); 319 } 320 321 return '?'; 322 } 323 324 static void 325 vga_blank(struct vt_device *vd, term_color_t color) 326 { 327 struct vga_softc *sc = vd->vd_softc; 328 u_int ofs; 329 330 vga_setfg(vd, color); 331 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 332 MEM_WRITE1(sc, ofs, 0xff); 333 } 334 335 static inline void 336 vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 337 uint8_t v) 338 { 339 struct vga_softc *sc = vd->vd_softc; 340 341 /* Skip empty writes, in order to avoid palette changes. */ 342 if (v != 0x00) { 343 vga_setfg(vd, color); 344 /* 345 * When this MEM_READ1() gets disabled, all sorts of 346 * artifacts occur. This is because this read loads the 347 * set of 8 pixels that are about to be changed. There 348 * is one scenario where we can avoid the read, namely 349 * if all pixels are about to be overwritten anyway. 350 */ 351 if (v != 0xff) { 352 MEM_READ1(sc, dst); 353 354 /* The bg color was trashed by the reads. */ 355 sc->vga_curbg = 0xff; 356 } 357 MEM_WRITE1(sc, dst, v); 358 } 359 } 360 361 static void 362 vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 363 { 364 365 if (vd->vd_flags & VDF_TEXTMODE) 366 return; 367 368 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 369 0x80 >> (x % 8)); 370 } 371 372 static void 373 vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 374 term_color_t color) 375 { 376 int x, y; 377 378 if (vd->vd_flags & VDF_TEXTMODE) 379 return; 380 381 for (y = y1; y <= y2; y++) { 382 if (fill || (y == y1) || (y == y2)) { 383 for (x = x1; x <= x2; x++) 384 vga_setpixel(vd, x, y, color); 385 } else { 386 vga_setpixel(vd, x1, y, color); 387 vga_setpixel(vd, x2, y, color); 388 } 389 } 390 } 391 392 static void 393 vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 394 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 395 uint8_t *pattern, uint8_t *mask) 396 { 397 unsigned int n; 398 399 n = src_x / 8; 400 401 /* 402 * This mask has bits set, where a pixel (ether 0 or 1) 403 * comes from the source bitmap. 404 */ 405 if (mask != NULL) { 406 *mask = (0xff 407 >> (8 - x_count)) 408 << (8 - x_count - dst_x); 409 } 410 411 if (n == (src_x + x_count - 1) / 8) { 412 /* All the pixels we want are in the same byte. */ 413 *pattern = src[n]; 414 if (dst_x >= src_x) 415 *pattern >>= (dst_x - src_x % 8); 416 else 417 *pattern <<= (src_x % 8 - dst_x); 418 } else { 419 /* The pixels we want are split into two bytes. */ 420 if (dst_x >= src_x % 8) { 421 *pattern = 422 src[n] << (8 - dst_x - src_x % 8) | 423 src[n + 1] >> (dst_x - src_x % 8); 424 } else { 425 *pattern = 426 src[n] << (src_x % 8 - dst_x) | 427 src[n + 1] >> (8 - src_x % 8 - dst_x); 428 } 429 } 430 } 431 432 static void 433 vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 434 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 435 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 436 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 437 term_color_t fg, term_color_t bg, int overwrite) 438 { 439 unsigned int i, bytes; 440 uint8_t pattern, relevant_bits, mask; 441 442 bytes = (src_width + 7) / 8; 443 444 for (i = 0; i < y_count; ++i) { 445 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 446 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 447 448 if (src_mask == NULL) { 449 /* 450 * No src mask. Consider that all wanted bits 451 * from the source are "authoritative". 452 */ 453 mask = relevant_bits; 454 } else { 455 /* 456 * There's an src mask. We shift it the same way 457 * we shifted the source pattern. 458 */ 459 vga_compute_shifted_pattern( 460 src_mask + (src_y + i) * bytes, 461 bytes, src_x, x_count, dst_x, 462 &mask, NULL); 463 464 /* Now, only keep the wanted bits among them. */ 465 mask &= relevant_bits; 466 } 467 468 /* 469 * Clear bits from the pattern which must be 470 * transparent, according to the source mask. 471 */ 472 pattern &= mask; 473 474 /* Set the bits in the 2-colors array. */ 475 if (overwrite) 476 pattern_2colors[dst_y + i] &= ~mask; 477 pattern_2colors[dst_y + i] |= pattern; 478 479 if (pattern_ncolors == NULL) 480 continue; 481 482 /* 483 * Set the same bits in the n-colors array. This one 484 * supports transparency, when a given bit is cleared in 485 * all colors. 486 */ 487 if (overwrite) { 488 /* 489 * Ensure that the pixels used by this bitmap are 490 * cleared in other colors. 491 */ 492 for (int j = 0; j < 16; ++j) 493 pattern_ncolors[(dst_y + i) * 16 + j] &= 494 ~mask; 495 } 496 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 497 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 498 } 499 } 500 501 static void 502 vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 503 term_color_t fg, term_color_t bg, 504 unsigned int x, unsigned int y, unsigned int height) 505 { 506 unsigned int i, offset; 507 struct vga_softc *sc; 508 509 /* 510 * The great advantage of Write Mode 3 is that we just need 511 * to load the foreground in the Set/Reset register, load the 512 * background color in the latches register (this is done 513 * through a write in offscreen memory followed by a read of 514 * that data), then write the pattern to video memory. This 515 * pattern indicates if the pixel should use the foreground 516 * color (bit set) or the background color (bit cleared). 517 */ 518 519 vga_setbg(vd, bg); 520 vga_setfg(vd, fg); 521 522 sc = vd->vd_softc; 523 offset = (VT_VGA_WIDTH * y + x) / 8; 524 525 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 526 MEM_WRITE1(sc, offset, masks[i]); 527 } 528 } 529 530 static void 531 vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 532 unsigned int x, unsigned int y, unsigned int height) 533 { 534 unsigned int i, j, plane, color, offset; 535 struct vga_softc *sc; 536 uint8_t mask, planes[height * 4]; 537 538 sc = vd->vd_softc; 539 540 memset(planes, 0, sizeof(planes)); 541 542 /* 543 * To write a group of pixels using 3 or more colors, we select 544 * Write Mode 0 and write one byte to each plane separately. 545 */ 546 547 /* 548 * We first compute each byte: each plane contains one bit of the 549 * color code for each of the 8 pixels. 550 * 551 * For example, if the 8 pixels are like this: 552 * GBBBBBBY 553 * where: 554 * G (gray) = 0b0111 555 * B (black) = 0b0000 556 * Y (yellow) = 0b0011 557 * 558 * The corresponding for bytes are: 559 * GBBBBBBY 560 * Plane 0: 10000001 = 0x81 561 * Plane 1: 10000001 = 0x81 562 * Plane 2: 10000000 = 0x80 563 * Plane 3: 00000000 = 0x00 564 * | | | 565 * | | +-> 0b0011 (Y) 566 * | +-----> 0b0000 (B) 567 * +--------> 0b0111 (G) 568 */ 569 570 for (i = 0; i < height; ++i) { 571 for (color = 0; color < 16; ++color) { 572 mask = masks[i * 16 + color]; 573 if (mask == 0x00) 574 continue; 575 576 for (j = 0; j < 8; ++j) { 577 if (!((mask >> (7 - j)) & 0x1)) 578 continue; 579 580 /* The pixel "j" uses color "color". */ 581 for (plane = 0; plane < 4; ++plane) 582 planes[i * 4 + plane] |= 583 ((cons_to_vga_colors[color] >> 584 plane) & 0x1) << (7 - j); 585 } 586 } 587 } 588 589 /* 590 * The bytes are ready: we now switch to Write Mode 0 and write 591 * all bytes, one plane at a time. 592 */ 593 vga_setwmode(vd, 0); 594 595 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 596 for (plane = 0; plane < 4; ++plane) { 597 /* Select plane. */ 598 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plane); 599 600 /* Write all bytes for this plane, from Y to Y+height. */ 601 for (i = 0; i < height; ++i) { 602 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 603 MEM_WRITE1(sc, offset, planes[i * 4 + plane]); 604 } 605 } 606 } 607 608 static void 609 vga_bitblt_one_text_pixels_block(struct vt_device *vd, 610 const struct vt_window *vw, unsigned int x, unsigned int y) 611 { 612 const struct vt_buf *vb; 613 const struct vt_font *vf; 614 unsigned int i, col, row, src_x, x_count; 615 unsigned int used_colors_list[16], used_colors; 616 uint8_t pattern_2colors[vw->vw_font->vf_height]; 617 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 618 term_char_t c; 619 term_color_t fg, bg; 620 const uint8_t *src; 621 622 vb = &vw->vw_buf; 623 vf = vw->vw_font; 624 625 /* 626 * The current pixels block. 627 * 628 * We fill it with portions of characters, because both "grids" 629 * may not match. 630 * 631 * i is the index in this pixels block. 632 */ 633 634 i = x; 635 used_colors = 0; 636 memset(used_colors_list, 0, sizeof(used_colors_list)); 637 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 638 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 639 640 if (i < vw->vw_draw_area.tr_begin.tp_col) { 641 /* 642 * i is in the margin used to center the text area on 643 * the screen. 644 */ 645 646 i = vw->vw_draw_area.tr_begin.tp_col; 647 } 648 649 while (i < x + VT_VGA_PIXELS_BLOCK && 650 i < vw->vw_draw_area.tr_end.tp_col) { 651 /* 652 * Find which character is drawn on this pixel in the 653 * pixels block. 654 * 655 * While here, record what colors it uses. 656 */ 657 658 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 659 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 660 661 c = VTBUF_GET_FIELD(vb, row, col); 662 src = vtfont_lookup(vf, c); 663 664 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 665 if ((used_colors_list[fg] & 0x1) != 0x1) 666 used_colors++; 667 if ((used_colors_list[bg] & 0x2) != 0x2) 668 used_colors++; 669 used_colors_list[fg] |= 0x1; 670 used_colors_list[bg] |= 0x2; 671 672 /* 673 * Compute the portion of the character we want to draw, 674 * because the pixels block may start in the middle of a 675 * character. 676 * 677 * The first pixel to draw in the character is 678 * the current position - 679 * the start position of the character 680 * 681 * The last pixel to draw is either 682 * - the last pixel of the character, or 683 * - the pixel of the character matching the end of 684 * the pixels block 685 * whichever comes first. This position is then 686 * changed to be relative to the start position of the 687 * character. 688 */ 689 690 src_x = i - 691 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 692 x_count = min(min( 693 (col + 1) * vf->vf_width + 694 vw->vw_draw_area.tr_begin.tp_col, 695 x + VT_VGA_PIXELS_BLOCK), 696 vw->vw_draw_area.tr_end.tp_col); 697 x_count -= col * vf->vf_width + 698 vw->vw_draw_area.tr_begin.tp_col; 699 x_count -= src_x; 700 701 /* Copy a portion of the character. */ 702 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 703 src, NULL, vf->vf_width, 704 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 705 0, 0, vf->vf_height, fg, bg, 0); 706 707 /* We move to the next portion. */ 708 i += x_count; 709 } 710 711 #ifndef SC_NO_CUTPASTE 712 /* 713 * Copy the mouse pointer bitmap if it's over the current pixels 714 * block. 715 * 716 * We use the saved cursor position (saved in vt_flush()), because 717 * the current position could be different than the one used 718 * to mark the area dirty. 719 */ 720 term_rect_t drawn_area; 721 722 drawn_area.tr_begin.tp_col = x; 723 drawn_area.tr_begin.tp_row = y; 724 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 725 drawn_area.tr_end.tp_row = y + vf->vf_height; 726 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 727 struct vt_mouse_cursor *cursor; 728 unsigned int mx, my; 729 unsigned int dst_x, src_y, dst_y, y_count; 730 731 cursor = vd->vd_mcursor; 732 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 733 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 734 735 /* Compute the portion of the cursor we want to copy. */ 736 src_x = x > mx ? x - mx : 0; 737 dst_x = mx > x ? mx - x : 0; 738 x_count = min(min(min( 739 cursor->width - src_x, 740 x + VT_VGA_PIXELS_BLOCK - mx), 741 vw->vw_draw_area.tr_end.tp_col - mx), 742 VT_VGA_PIXELS_BLOCK); 743 744 /* 745 * The cursor isn't aligned on the Y-axis with 746 * characters, so we need to compute the vertical 747 * start/count. 748 */ 749 src_y = y > my ? y - my : 0; 750 dst_y = my > y ? my - y : 0; 751 y_count = min( 752 min(cursor->height - src_y, y + vf->vf_height - my), 753 vf->vf_height); 754 755 /* Copy the cursor portion. */ 756 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 757 cursor->map, cursor->mask, cursor->width, 758 src_x, dst_x, x_count, src_y, dst_y, y_count, 759 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 760 761 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 762 used_colors++; 763 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 764 used_colors++; 765 } 766 #endif 767 768 /* 769 * The pixels block is completed, we can now draw it on the 770 * screen. 771 */ 772 if (used_colors == 2) 773 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 774 x, y, vf->vf_height); 775 else 776 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 777 x, y, vf->vf_height); 778 } 779 780 static void 781 vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 782 const term_rect_t *area) 783 { 784 const struct vt_font *vf; 785 unsigned int col, row; 786 unsigned int x1, y1, x2, y2, x, y; 787 788 vf = vw->vw_font; 789 790 /* 791 * Compute the top-left pixel position aligned with the video 792 * adapter pixels block size. 793 * 794 * This is calculated from the top-left column of te dirty area: 795 * 796 * 1. Compute the top-left pixel of the character: 797 * col * font width + x offset 798 * 799 * NOTE: x offset is used to center the text area on the 800 * screen. It's expressed in pixels, not in characters 801 * col/row! 802 * 803 * 2. Find the pixel further on the left marking the start of 804 * an aligned pixels block (eg. chunk of 8 pixels): 805 * character's x / blocksize * blocksize 806 * 807 * The division, being made on integers, achieves the 808 * alignment. 809 * 810 * For the Y-axis, we need to compute the character's y 811 * coordinate, but we don't need to align it. 812 */ 813 814 col = area->tr_begin.tp_col; 815 row = area->tr_begin.tp_row; 816 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 817 / VT_VGA_PIXELS_BLOCK) 818 * VT_VGA_PIXELS_BLOCK; 819 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 820 821 /* 822 * Compute the bottom right pixel position, again, aligned with 823 * the pixels block size. 824 * 825 * The same rules apply, we just add 1 to base the computation 826 * on the "right border" of the dirty area. 827 */ 828 829 col = area->tr_end.tp_col; 830 row = area->tr_end.tp_row; 831 x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col, 832 VT_VGA_PIXELS_BLOCK) 833 * VT_VGA_PIXELS_BLOCK; 834 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 835 836 /* Clip the area to the screen size. */ 837 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 838 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 839 840 /* 841 * Now, we take care of N pixels line at a time (the first for 842 * loop, N = font height), and for these lines, draw one pixels 843 * block at a time (the second for loop), not a character at a 844 * time. 845 * 846 * Therefore, on the X-axis, characters my be drawn partially if 847 * they are not aligned on 8-pixels boundary. 848 * 849 * However, the operation is repeated for the full height of the 850 * font before moving to the next character, because it allows 851 * to keep the color settings and write mode, before perhaps 852 * changing them with the next one. 853 */ 854 855 for (y = y1; y < y2; y += vf->vf_height) { 856 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 857 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 858 } 859 } 860 } 861 862 static void 863 vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 864 const term_rect_t *area) 865 { 866 struct vga_softc *sc; 867 const struct vt_buf *vb; 868 unsigned int col, row; 869 term_char_t c; 870 term_color_t fg, bg; 871 uint8_t ch, attr; 872 size_t z; 873 874 sc = vd->vd_softc; 875 vb = &vw->vw_buf; 876 877 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 878 for (col = area->tr_begin.tp_col; 879 col < area->tr_end.tp_col; 880 ++col) { 881 /* 882 * Get next character and its associated fg/bg 883 * colors. 884 */ 885 c = VTBUF_GET_FIELD(vb, row, col); 886 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 887 &fg, &bg); 888 889 z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col; 890 if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) * 891 PIXEL_WIDTH(VT_FB_MAX_WIDTH)) 892 continue; 893 if (vd->vd_drawn && (vd->vd_drawn[z] == c) && 894 vd->vd_drawnfg && (vd->vd_drawnfg[z] == fg) && 895 vd->vd_drawnbg && (vd->vd_drawnbg[z] == bg)) 896 continue; 897 898 /* 899 * Convert character to CP437, which is the 900 * character set used by the VGA hardware by 901 * default. 902 */ 903 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 904 905 /* Convert colors to VGA attributes. */ 906 attr = 907 cons_to_vga_colors[bg] << 4 | 908 cons_to_vga_colors[fg]; 909 910 MEM_WRITE2(sc, (row * 80 + col) * 2 + 0, 911 ch + ((uint16_t)(attr) << 8)); 912 913 if (vd->vd_drawn) 914 vd->vd_drawn[z] = c; 915 if (vd->vd_drawnfg) 916 vd->vd_drawnfg[z] = fg; 917 if (vd->vd_drawnbg) 918 vd->vd_drawnbg[z] = bg; 919 } 920 } 921 } 922 923 static void 924 vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 925 const term_rect_t *area) 926 { 927 928 if (!(vd->vd_flags & VDF_TEXTMODE)) { 929 vga_bitblt_text_gfxmode(vd, vw, area); 930 } else { 931 vga_bitblt_text_txtmode(vd, vw, area); 932 } 933 } 934 935 void 936 vga_invalidate_text(struct vt_device *vd, const term_rect_t *area) 937 { 938 unsigned int col, row; 939 size_t z; 940 941 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 942 for (col = area->tr_begin.tp_col; 943 col < area->tr_end.tp_col; 944 ++col) { 945 z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col; 946 if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) * 947 PIXEL_WIDTH(VT_FB_MAX_WIDTH)) 948 continue; 949 if (vd->vd_drawn) 950 vd->vd_drawn[z] = 0; 951 if (vd->vd_drawnfg) 952 vd->vd_drawnfg[z] = 0; 953 if (vd->vd_drawnbg) 954 vd->vd_drawnbg[z] = 0; 955 } 956 } 957 } 958 959 static void 960 vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 961 const uint8_t *pattern, const uint8_t *mask, 962 unsigned int width, unsigned int height, 963 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 964 { 965 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 966 uint8_t pattern_2colors; 967 968 /* Align coordinates with the 8-pxels grid. */ 969 x1 = rounddown(x, VT_VGA_PIXELS_BLOCK); 970 y1 = y; 971 972 x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK); 973 y2 = y + height; 974 x2 = min(x2, vd->vd_width - 1); 975 y2 = min(y2, vd->vd_height - 1); 976 977 for (j = y1; j < y2; ++j) { 978 src_x = 0; 979 dst_x = x - x1; 980 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 981 982 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 983 pattern_2colors = 0; 984 985 vga_copy_bitmap_portion( 986 &pattern_2colors, NULL, 987 pattern, mask, width, 988 src_x, dst_x, x_count, 989 j - y1, 0, 1, fg, bg, 0); 990 991 vga_bitblt_pixels_block_2colors(vd, 992 &pattern_2colors, fg, bg, 993 i, j, 1); 994 995 src_x += x_count; 996 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 997 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 998 } 999 } 1000 } 1001 1002 static void 1003 vga_initialize_graphics(struct vt_device *vd) 1004 { 1005 struct vga_softc *sc = vd->vd_softc; 1006 1007 /* Clock select. */ 1008 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 1009 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 1010 /* Set sequencer clocking and memory mode. */ 1011 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 1012 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 1013 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 1014 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 1015 1016 /* Set the graphics controller in graphics mode. */ 1017 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 1018 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 1019 /* Program the CRT controller. */ 1020 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 1021 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 1022 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 1023 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 1024 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 1025 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 1026 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 1027 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 1028 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 1029 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 1030 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 1031 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 1032 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 1033 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 1034 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 1035 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 1036 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 1037 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 1038 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 1039 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 1040 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 1041 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1042 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 1043 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 1044 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 1045 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 1046 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 1047 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 1048 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 1049 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 1050 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 1051 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1052 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1053 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1054 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1055 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1056 1057 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1058 1059 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1060 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1061 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1062 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1063 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1064 1065 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1066 REG_WRITE1(sc, VGA_GC_DATA, 0); 1067 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1068 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1069 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1070 REG_WRITE1(sc, VGA_GC_DATA, 0); 1071 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1072 REG_WRITE1(sc, VGA_GC_DATA, 0); 1073 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1074 REG_WRITE1(sc, VGA_GC_DATA, 0); 1075 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1076 REG_WRITE1(sc, VGA_GC_DATA, 0); 1077 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1078 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1079 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1080 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1081 } 1082 1083 static int 1084 vga_initialize(struct vt_device *vd, int textmode) 1085 { 1086 struct vga_softc *sc = vd->vd_softc; 1087 uint8_t x; 1088 int timeout; 1089 1090 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1091 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1092 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1093 1094 /* Unprotect CRTC registers 0-7. */ 1095 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1096 x = REG_READ1(sc, VGA_CRTC_DATA); 1097 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1098 1099 /* 1100 * Wait for the vertical retrace. 1101 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1102 * the side-effect of clearing the internal flip-flip of the attribute 1103 * controller's write register. This means that because this code is 1104 * here, we know for sure that the first write to the attribute 1105 * controller will be a write to the address register. Removing this 1106 * code therefore also removes that guarantee and appropriate measures 1107 * need to be taken. 1108 */ 1109 timeout = 10000; 1110 do { 1111 DELAY(10); 1112 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1113 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1114 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1115 if (timeout == 0) { 1116 printf("Timeout initializing vt_vga\n"); 1117 return (ENXIO); 1118 } 1119 1120 /* Now, disable the sync. signals. */ 1121 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1122 x = REG_READ1(sc, VGA_CRTC_DATA); 1123 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1124 1125 /* Asynchronous sequencer reset. */ 1126 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1127 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1128 1129 if (!textmode) 1130 vga_initialize_graphics(vd); 1131 1132 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1133 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1134 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1135 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1136 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1137 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1138 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1139 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1140 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1141 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1142 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1143 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1144 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1145 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1146 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1147 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1148 1149 if (textmode) { 1150 /* Set the attribute controller to blink disable. */ 1151 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1152 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1153 } else { 1154 /* Set the attribute controller in graphics mode. */ 1155 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1156 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1157 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1158 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1159 } 1160 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1161 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1162 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1163 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1164 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1165 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1166 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1167 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1168 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1169 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1170 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1171 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1172 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1173 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1174 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1175 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1176 1177 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1178 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1179 VGA_AC_PAL_SB); 1180 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1181 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1182 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1183 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1184 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1185 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1186 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1187 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1188 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1189 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1190 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1191 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1192 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1193 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1194 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1195 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1196 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1197 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1198 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1199 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1200 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1201 1202 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1203 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1204 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1205 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1206 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1207 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1208 1209 if (!textmode) { 1210 u_int ofs; 1211 1212 /* 1213 * Done. Clear the frame buffer. All bit planes are 1214 * enabled, so a single-paged loop should clear all 1215 * planes. 1216 */ 1217 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1218 MEM_WRITE1(sc, ofs, 0); 1219 } 1220 } 1221 1222 /* Re-enable the sequencer. */ 1223 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1224 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1225 /* Re-enable the sync signals. */ 1226 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1227 x = REG_READ1(sc, VGA_CRTC_DATA); 1228 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1229 1230 if (!textmode) { 1231 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1232 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1233 REG_WRITE1(sc, VGA_GC_DATA, 3); 1234 sc->vga_wmode = 3; 1235 1236 /* 1237 * In Write Mode 3, Enable Set/Reset is ignored, but we 1238 * use Write Mode 0 to write a group of 8 pixels using 1239 * 3 or more colors. In this case, we want to disable 1240 * Set/Reset: set Enable Set/Reset to 0. 1241 */ 1242 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1243 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1244 1245 /* 1246 * Clear the colors we think are loaded into Set/Reset or 1247 * the latches. 1248 */ 1249 sc->vga_curfg = sc->vga_curbg = 0xff; 1250 } 1251 1252 return (0); 1253 } 1254 1255 static bool 1256 vga_acpi_disabled(void) 1257 { 1258 #if defined(__amd64__) || defined(__i386__) 1259 uint16_t flags; 1260 int ignore; 1261 1262 /* 1263 * Ignore the flag on real hardware: there's a lot of buggy firmware 1264 * that will wrongly set it. 1265 */ 1266 ignore = (vm_guest == VM_GUEST_NO); 1267 TUNABLE_INT_FETCH("hw.vga.acpi_ignore_no_vga", &ignore); 1268 if (ignore || !acpi_get_fadt_bootflags(&flags)) 1269 return (false); 1270 return ((flags & ACPI_FADT_NO_VGA) != 0); 1271 #else 1272 return (false); 1273 #endif 1274 } 1275 1276 static int 1277 vga_probe(struct vt_device *vd) 1278 { 1279 1280 return (vga_acpi_disabled() ? CN_DEAD : CN_INTERNAL); 1281 } 1282 1283 static int 1284 vga_init(struct vt_device *vd) 1285 { 1286 struct vga_softc *sc; 1287 int textmode; 1288 1289 if (vd->vd_softc == NULL) 1290 vd->vd_softc = (void *)&vga_conssoftc; 1291 sc = vd->vd_softc; 1292 1293 if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 1294 vga_pci_repost(vd->vd_video_dev); 1295 1296 #if defined(__amd64__) || defined(__i386__) 1297 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1298 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1299 #else 1300 # error "Architecture not yet supported!" 1301 #endif 1302 1303 bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 1304 &sc->vga_reg_handle); 1305 1306 /* 1307 * If "hw.vga.textmode" is not set and we're running on hypervisor, 1308 * we use text mode by default, this is because when we're on 1309 * hypervisor, vt(4) is usually much slower in graphics mode than 1310 * in text mode, especially when we're on Hyper-V. 1311 */ 1312 textmode = vm_guest != VM_GUEST_NO; 1313 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1314 if (textmode) { 1315 vd->vd_flags |= VDF_TEXTMODE; 1316 vd->vd_width = 80; 1317 vd->vd_height = 25; 1318 bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 1319 &sc->vga_fb_handle); 1320 } else { 1321 vd->vd_width = VT_VGA_WIDTH; 1322 vd->vd_height = VT_VGA_HEIGHT; 1323 bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 1324 &sc->vga_fb_handle); 1325 } 1326 if (vga_initialize(vd, textmode) != 0) 1327 return (CN_DEAD); 1328 sc->vga_enabled = true; 1329 1330 return (CN_INTERNAL); 1331 } 1332 1333 static void 1334 vga_postswitch(struct vt_device *vd) 1335 { 1336 1337 /* Reinit VGA mode, to restore view after app which change mode. */ 1338 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1339 /* Ask vt(9) to update chars on visible area. */ 1340 vd->vd_flags |= VDF_INVALID; 1341 } 1342 1343 /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1344 static void 1345 vtvga_identify(driver_t *driver, device_t parent) 1346 { 1347 1348 if (!vga_conssoftc.vga_enabled) 1349 return; 1350 1351 if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1352 panic("Unable to attach vt_vga console"); 1353 } 1354 1355 static int 1356 vtvga_probe(device_t dev) 1357 { 1358 1359 device_set_desc(dev, "VT VGA driver"); 1360 1361 return (BUS_PROBE_NOWILDCARD); 1362 } 1363 1364 static int 1365 vtvga_attach(device_t dev) 1366 { 1367 struct resource *pseudo_phys_res; 1368 int res_id; 1369 1370 res_id = 0; 1371 pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1372 &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1373 VGA_MEM_SIZE, RF_ACTIVE); 1374 if (pseudo_phys_res == NULL) 1375 panic("Unable to reserve vt_vga memory"); 1376 return (0); 1377 } 1378 1379 /*-------------------- Private Device Attachment Data -----------------------*/ 1380 static device_method_t vtvga_methods[] = { 1381 /* Device interface */ 1382 DEVMETHOD(device_identify, vtvga_identify), 1383 DEVMETHOD(device_probe, vtvga_probe), 1384 DEVMETHOD(device_attach, vtvga_attach), 1385 1386 DEVMETHOD_END 1387 }; 1388 1389 DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1390 1391 DRIVER_MODULE(vtvga, nexus, vtvga_driver, NULL, NULL); 1392