1 /*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/kernel.h> 38 #include <sys/systm.h> 39 #include <sys/bus.h> 40 #include <sys/module.h> 41 #include <sys/rman.h> 42 43 #include <dev/vt/vt.h> 44 #include <dev/vt/hw/vga/vt_vga_reg.h> 45 #include <dev/pci/pcivar.h> 46 47 #include <machine/bus.h> 48 49 #if defined(__amd64__) || defined(__i386__) 50 #include <vm/vm.h> 51 #include <vm/pmap.h> 52 #include <machine/pmap.h> 53 #include <machine/vmparam.h> 54 #endif /* __amd64__ || __i386__ */ 55 56 struct vga_softc { 57 bus_space_tag_t vga_fb_tag; 58 bus_space_handle_t vga_fb_handle; 59 bus_space_tag_t vga_reg_tag; 60 bus_space_handle_t vga_reg_handle; 61 int vga_wmode; 62 term_color_t vga_curfg, vga_curbg; 63 boolean_t vga_enabled; 64 }; 65 66 /* Convenience macros. */ 67 #define MEM_READ1(sc, ofs) \ 68 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 69 #define MEM_WRITE1(sc, ofs, val) \ 70 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 71 #define REG_READ1(sc, reg) \ 72 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 73 #define REG_WRITE1(sc, reg, val) \ 74 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 75 76 #define VT_VGA_WIDTH 640 77 #define VT_VGA_HEIGHT 480 78 #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 79 80 /* 81 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 82 * memory). 83 */ 84 #define VT_VGA_PIXELS_BLOCK 8 85 86 /* 87 * We use an off-screen addresses to: 88 * o store the background color; 89 * o store pixels pattern. 90 * Those addresses are then loaded in the latches once. 91 */ 92 #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 93 94 static vd_probe_t vga_probe; 95 static vd_init_t vga_init; 96 static vd_blank_t vga_blank; 97 static vd_bitblt_text_t vga_bitblt_text; 98 static vd_bitblt_bmp_t vga_bitblt_bitmap; 99 static vd_drawrect_t vga_drawrect; 100 static vd_setpixel_t vga_setpixel; 101 static vd_postswitch_t vga_postswitch; 102 103 static const struct vt_driver vt_vga_driver = { 104 .vd_name = "vga", 105 .vd_probe = vga_probe, 106 .vd_init = vga_init, 107 .vd_blank = vga_blank, 108 .vd_bitblt_text = vga_bitblt_text, 109 .vd_bitblt_bmp = vga_bitblt_bitmap, 110 .vd_drawrect = vga_drawrect, 111 .vd_setpixel = vga_setpixel, 112 .vd_postswitch = vga_postswitch, 113 .vd_priority = VD_PRIORITY_GENERIC, 114 }; 115 116 /* 117 * Driver supports both text mode and graphics mode. Make sure the 118 * buffer is always big enough to support both. 119 */ 120 static struct vga_softc vga_conssoftc; 121 VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 122 123 static inline void 124 vga_setwmode(struct vt_device *vd, int wmode) 125 { 126 struct vga_softc *sc = vd->vd_softc; 127 128 if (sc->vga_wmode == wmode) 129 return; 130 131 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 132 REG_WRITE1(sc, VGA_GC_DATA, wmode); 133 sc->vga_wmode = wmode; 134 135 switch (wmode) { 136 case 3: 137 /* Re-enable all plans. */ 138 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 139 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 140 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 141 break; 142 } 143 } 144 145 static inline void 146 vga_setfg(struct vt_device *vd, term_color_t color) 147 { 148 struct vga_softc *sc = vd->vd_softc; 149 150 vga_setwmode(vd, 3); 151 152 if (sc->vga_curfg == color) 153 return; 154 155 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 156 REG_WRITE1(sc, VGA_GC_DATA, color); 157 sc->vga_curfg = color; 158 } 159 160 static inline void 161 vga_setbg(struct vt_device *vd, term_color_t color) 162 { 163 struct vga_softc *sc = vd->vd_softc; 164 165 vga_setwmode(vd, 3); 166 167 if (sc->vga_curbg == color) 168 return; 169 170 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 171 REG_WRITE1(sc, VGA_GC_DATA, color); 172 173 /* 174 * Write 8 pixels using the background color to an off-screen 175 * byte in the video memory. 176 */ 177 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 178 179 /* 180 * Read those 8 pixels back to load the background color in the 181 * latches register. 182 */ 183 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 184 185 sc->vga_curbg = color; 186 187 /* 188 * The Set/Reset register doesn't contain the fg color anymore, 189 * store an invalid color. 190 */ 191 sc->vga_curfg = 0xff; 192 } 193 194 /* 195 * Binary searchable table for Unicode to CP437 conversion. 196 */ 197 198 struct unicp437 { 199 uint16_t unicode_base; 200 uint8_t cp437_base; 201 uint8_t length; 202 }; 203 204 static const struct unicp437 cp437table[] = { 205 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 206 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 207 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 208 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 209 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 210 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 211 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 212 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 213 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 214 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 215 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 216 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 217 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 218 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 219 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 220 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 221 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 222 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 223 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 224 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 225 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 226 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 227 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 228 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 229 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 230 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 231 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 232 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 233 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 234 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 235 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 236 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 237 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 238 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 239 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 240 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 241 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 242 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 243 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 244 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 245 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 246 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 247 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 248 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 249 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 250 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 251 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 252 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 253 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 254 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 255 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 256 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 257 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 258 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 259 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 260 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 261 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 262 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 263 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 264 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 265 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 266 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 267 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 268 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 269 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 270 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 271 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 272 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 273 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 274 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 275 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 276 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 277 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 278 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 279 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 280 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 281 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 282 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 283 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 284 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 285 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 286 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 287 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 288 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 289 { 0x266c, 0x0e, 0x00 }, 290 }; 291 292 static uint8_t 293 vga_get_cp437(term_char_t c) 294 { 295 int min, mid, max; 296 297 min = 0; 298 max = (sizeof(cp437table) / sizeof(struct unicp437)) - 1; 299 300 if (c < cp437table[0].unicode_base || 301 c > cp437table[max].unicode_base + cp437table[max].length) 302 return '?'; 303 304 while (max >= min) { 305 mid = (min + max) / 2; 306 if (c < cp437table[mid].unicode_base) 307 max = mid - 1; 308 else if (c > cp437table[mid].unicode_base + 309 cp437table[mid].length) 310 min = mid + 1; 311 else 312 return (c - cp437table[mid].unicode_base + 313 cp437table[mid].cp437_base); 314 } 315 316 return '?'; 317 } 318 319 static void 320 vga_blank(struct vt_device *vd, term_color_t color) 321 { 322 struct vga_softc *sc = vd->vd_softc; 323 u_int ofs; 324 325 vga_setfg(vd, color); 326 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 327 MEM_WRITE1(sc, ofs, 0xff); 328 } 329 330 static inline void 331 vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 332 uint8_t v) 333 { 334 struct vga_softc *sc = vd->vd_softc; 335 336 /* Skip empty writes, in order to avoid palette changes. */ 337 if (v != 0x00) { 338 vga_setfg(vd, color); 339 /* 340 * When this MEM_READ1() gets disabled, all sorts of 341 * artifacts occur. This is because this read loads the 342 * set of 8 pixels that are about to be changed. There 343 * is one scenario where we can avoid the read, namely 344 * if all pixels are about to be overwritten anyway. 345 */ 346 if (v != 0xff) { 347 MEM_READ1(sc, dst); 348 349 /* The bg color was trashed by the reads. */ 350 sc->vga_curbg = 0xff; 351 } 352 MEM_WRITE1(sc, dst, v); 353 } 354 } 355 356 static void 357 vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 358 { 359 360 if (vd->vd_flags & VDF_TEXTMODE) 361 return; 362 363 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 364 0x80 >> (x % 8)); 365 } 366 367 static void 368 vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 369 term_color_t color) 370 { 371 int x, y; 372 373 if (vd->vd_flags & VDF_TEXTMODE) 374 return; 375 376 for (y = y1; y <= y2; y++) { 377 if (fill || (y == y1) || (y == y2)) { 378 for (x = x1; x <= x2; x++) 379 vga_setpixel(vd, x, y, color); 380 } else { 381 vga_setpixel(vd, x1, y, color); 382 vga_setpixel(vd, x2, y, color); 383 } 384 } 385 } 386 387 static void 388 vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 389 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 390 uint8_t *pattern, uint8_t *mask) 391 { 392 unsigned int n; 393 394 n = src_x / 8; 395 396 /* 397 * This mask has bits set, where a pixel (ether 0 or 1) 398 * comes from the source bitmap. 399 */ 400 if (mask != NULL) { 401 *mask = (0xff 402 >> (8 - x_count)) 403 << (8 - x_count - dst_x); 404 } 405 406 if (n == (src_x + x_count - 1) / 8) { 407 /* All the pixels we want are in the same byte. */ 408 *pattern = src[n]; 409 if (dst_x >= src_x) 410 *pattern >>= (dst_x - src_x % 8); 411 else 412 *pattern <<= (src_x % 8 - dst_x); 413 } else { 414 /* The pixels we want are split into two bytes. */ 415 if (dst_x >= src_x % 8) { 416 *pattern = 417 src[n] << (8 - dst_x - src_x % 8) | 418 src[n + 1] >> (dst_x - src_x % 8); 419 } else { 420 *pattern = 421 src[n] << (src_x % 8 - dst_x) | 422 src[n + 1] >> (8 - src_x % 8 - dst_x); 423 } 424 } 425 } 426 427 static void 428 vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 429 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 430 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 431 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 432 term_color_t fg, term_color_t bg, int overwrite) 433 { 434 unsigned int i, bytes; 435 uint8_t pattern, relevant_bits, mask; 436 437 bytes = (src_width + 7) / 8; 438 439 for (i = 0; i < y_count; ++i) { 440 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 441 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 442 443 if (src_mask == NULL) { 444 /* 445 * No src mask. Consider that all wanted bits 446 * from the source are "authoritative". 447 */ 448 mask = relevant_bits; 449 } else { 450 /* 451 * There's an src mask. We shift it the same way 452 * we shifted the source pattern. 453 */ 454 vga_compute_shifted_pattern( 455 src_mask + (src_y + i) * bytes, 456 bytes, src_x, x_count, dst_x, 457 &mask, NULL); 458 459 /* Now, only keep the wanted bits among them. */ 460 mask &= relevant_bits; 461 } 462 463 /* 464 * Clear bits from the pattern which must be 465 * transparent, according to the source mask. 466 */ 467 pattern &= mask; 468 469 /* Set the bits in the 2-colors array. */ 470 if (overwrite) 471 pattern_2colors[dst_y + i] &= ~mask; 472 pattern_2colors[dst_y + i] |= pattern; 473 474 if (pattern_ncolors == NULL) 475 continue; 476 477 /* 478 * Set the same bits in the n-colors array. This one 479 * supports transparency, when a given bit is cleared in 480 * all colors. 481 */ 482 if (overwrite) { 483 /* 484 * Ensure that the pixels used by this bitmap are 485 * cleared in other colors. 486 */ 487 for (int j = 0; j < 16; ++j) 488 pattern_ncolors[(dst_y + i) * 16 + j] &= 489 ~mask; 490 } 491 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 492 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 493 } 494 } 495 496 static void 497 vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 498 term_color_t fg, term_color_t bg, 499 unsigned int x, unsigned int y, unsigned int height) 500 { 501 unsigned int i, offset; 502 struct vga_softc *sc; 503 504 /* 505 * The great advantage of Write Mode 3 is that we just need 506 * to load the foreground in the Set/Reset register, load the 507 * background color in the latches register (this is done 508 * through a write in offscreen memory followed by a read of 509 * that data), then write the pattern to video memory. This 510 * pattern indicates if the pixel should use the foreground 511 * color (bit set) or the background color (bit cleared). 512 */ 513 514 vga_setbg(vd, bg); 515 vga_setfg(vd, fg); 516 517 sc = vd->vd_softc; 518 offset = (VT_VGA_WIDTH * y + x) / 8; 519 520 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 521 MEM_WRITE1(sc, offset, masks[i]); 522 } 523 } 524 525 static void 526 vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 527 unsigned int x, unsigned int y, unsigned int height) 528 { 529 unsigned int i, j, plan, color, offset; 530 struct vga_softc *sc; 531 uint8_t mask, plans[height * 4]; 532 533 sc = vd->vd_softc; 534 535 memset(plans, 0, sizeof(plans)); 536 537 /* 538 * To write a group of pixels using 3 or more colors, we select 539 * Write Mode 0 and write one byte to each plan separately. 540 */ 541 542 /* 543 * We first compute each byte: each plan contains one bit of the 544 * color code for each of the 8 pixels. 545 * 546 * For example, if the 8 pixels are like this: 547 * GBBBBBBY 548 * where: 549 * G (gray) = 0b0111 550 * B (black) = 0b0000 551 * Y (yellow) = 0b0011 552 * 553 * The corresponding for bytes are: 554 * GBBBBBBY 555 * Plan 0: 10000001 = 0x81 556 * Plan 1: 10000001 = 0x81 557 * Plan 2: 10000000 = 0x80 558 * Plan 3: 00000000 = 0x00 559 * | | | 560 * | | +-> 0b0011 (Y) 561 * | +-----> 0b0000 (B) 562 * +--------> 0b0111 (G) 563 */ 564 565 for (i = 0; i < height; ++i) { 566 for (color = 0; color < 16; ++color) { 567 mask = masks[i * 16 + color]; 568 if (mask == 0x00) 569 continue; 570 571 for (j = 0; j < 8; ++j) { 572 if (!((mask >> (7 - j)) & 0x1)) 573 continue; 574 575 /* The pixel "j" uses color "color". */ 576 for (plan = 0; plan < 4; ++plan) 577 plans[i * 4 + plan] |= 578 ((color >> plan) & 0x1) << (7 - j); 579 } 580 } 581 } 582 583 /* 584 * The bytes are ready: we now switch to Write Mode 0 and write 585 * all bytes, one plan at a time. 586 */ 587 vga_setwmode(vd, 0); 588 589 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 590 for (plan = 0; plan < 4; ++plan) { 591 /* Select plan. */ 592 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 593 594 /* Write all bytes for this plan, from Y to Y+height. */ 595 for (i = 0; i < height; ++i) { 596 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 597 MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 598 } 599 } 600 } 601 602 static void 603 vga_bitblt_one_text_pixels_block(struct vt_device *vd, 604 const struct vt_window *vw, unsigned int x, unsigned int y) 605 { 606 const struct vt_buf *vb; 607 const struct vt_font *vf; 608 unsigned int i, col, row, src_x, x_count; 609 unsigned int used_colors_list[16], used_colors; 610 uint8_t pattern_2colors[vw->vw_font->vf_height]; 611 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 612 term_char_t c; 613 term_color_t fg, bg; 614 const uint8_t *src; 615 616 vb = &vw->vw_buf; 617 vf = vw->vw_font; 618 619 /* 620 * The current pixels block. 621 * 622 * We fill it with portions of characters, because both "grids" 623 * may not match. 624 * 625 * i is the index in this pixels block. 626 */ 627 628 i = x; 629 used_colors = 0; 630 memset(used_colors_list, 0, sizeof(used_colors_list)); 631 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 632 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 633 634 if (i < vw->vw_draw_area.tr_begin.tp_col) { 635 /* 636 * i is in the margin used to center the text area on 637 * the screen. 638 */ 639 640 i = vw->vw_draw_area.tr_begin.tp_col; 641 } 642 643 while (i < x + VT_VGA_PIXELS_BLOCK && 644 i < vw->vw_draw_area.tr_end.tp_col) { 645 /* 646 * Find which character is drawn on this pixel in the 647 * pixels block. 648 * 649 * While here, record what colors it uses. 650 */ 651 652 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 653 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 654 655 c = VTBUF_GET_FIELD(vb, row, col); 656 src = vtfont_lookup(vf, c); 657 658 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 659 if ((used_colors_list[fg] & 0x1) != 0x1) 660 used_colors++; 661 if ((used_colors_list[bg] & 0x2) != 0x2) 662 used_colors++; 663 used_colors_list[fg] |= 0x1; 664 used_colors_list[bg] |= 0x2; 665 666 /* 667 * Compute the portion of the character we want to draw, 668 * because the pixels block may start in the middle of a 669 * character. 670 * 671 * The first pixel to draw in the character is 672 * the current position - 673 * the start position of the character 674 * 675 * The last pixel to draw is either 676 * - the last pixel of the character, or 677 * - the pixel of the character matching the end of 678 * the pixels block 679 * whichever comes first. This position is then 680 * changed to be relative to the start position of the 681 * character. 682 */ 683 684 src_x = i - 685 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 686 x_count = min(min( 687 (col + 1) * vf->vf_width + 688 vw->vw_draw_area.tr_begin.tp_col, 689 x + VT_VGA_PIXELS_BLOCK), 690 vw->vw_draw_area.tr_end.tp_col); 691 x_count -= col * vf->vf_width + 692 vw->vw_draw_area.tr_begin.tp_col; 693 x_count -= src_x; 694 695 /* Copy a portion of the character. */ 696 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 697 src, NULL, vf->vf_width, 698 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 699 0, 0, vf->vf_height, fg, bg, 0); 700 701 /* We move to the next portion. */ 702 i += x_count; 703 } 704 705 #ifndef SC_NO_CUTPASTE 706 /* 707 * Copy the mouse pointer bitmap if it's over the current pixels 708 * block. 709 * 710 * We use the saved cursor position (saved in vt_flush()), because 711 * the current position could be different than the one used 712 * to mark the area dirty. 713 */ 714 term_rect_t drawn_area; 715 716 drawn_area.tr_begin.tp_col = x; 717 drawn_area.tr_begin.tp_row = y; 718 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 719 drawn_area.tr_end.tp_row = y + vf->vf_height; 720 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 721 struct vt_mouse_cursor *cursor; 722 unsigned int mx, my; 723 unsigned int dst_x, src_y, dst_y, y_count; 724 725 cursor = vd->vd_mcursor; 726 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 727 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 728 729 /* Compute the portion of the cursor we want to copy. */ 730 src_x = x > mx ? x - mx : 0; 731 dst_x = mx > x ? mx - x : 0; 732 x_count = min(min(min( 733 cursor->width - src_x, 734 x + VT_VGA_PIXELS_BLOCK - mx), 735 vw->vw_draw_area.tr_end.tp_col - mx), 736 VT_VGA_PIXELS_BLOCK); 737 738 /* 739 * The cursor isn't aligned on the Y-axis with 740 * characters, so we need to compute the vertical 741 * start/count. 742 */ 743 src_y = y > my ? y - my : 0; 744 dst_y = my > y ? my - y : 0; 745 y_count = min( 746 min(cursor->height - src_y, y + vf->vf_height - my), 747 vf->vf_height); 748 749 /* Copy the cursor portion. */ 750 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 751 cursor->map, cursor->mask, cursor->width, 752 src_x, dst_x, x_count, src_y, dst_y, y_count, 753 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 754 755 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 756 used_colors++; 757 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 758 used_colors++; 759 } 760 #endif 761 762 /* 763 * The pixels block is completed, we can now draw it on the 764 * screen. 765 */ 766 if (used_colors == 2) 767 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 768 x, y, vf->vf_height); 769 else 770 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 771 x, y, vf->vf_height); 772 } 773 774 static void 775 vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 776 const term_rect_t *area) 777 { 778 const struct vt_font *vf; 779 unsigned int col, row; 780 unsigned int x1, y1, x2, y2, x, y; 781 782 vf = vw->vw_font; 783 784 /* 785 * Compute the top-left pixel position aligned with the video 786 * adapter pixels block size. 787 * 788 * This is calculated from the top-left column of te dirty area: 789 * 790 * 1. Compute the top-left pixel of the character: 791 * col * font width + x offset 792 * 793 * NOTE: x offset is used to center the text area on the 794 * screen. It's expressed in pixels, not in characters 795 * col/row! 796 * 797 * 2. Find the pixel further on the left marking the start of 798 * an aligned pixels block (eg. chunk of 8 pixels): 799 * character's x / blocksize * blocksize 800 * 801 * The division, being made on integers, achieves the 802 * alignment. 803 * 804 * For the Y-axis, we need to compute the character's y 805 * coordinate, but we don't need to align it. 806 */ 807 808 col = area->tr_begin.tp_col; 809 row = area->tr_begin.tp_row; 810 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 811 / VT_VGA_PIXELS_BLOCK) 812 * VT_VGA_PIXELS_BLOCK; 813 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 814 815 /* 816 * Compute the bottom right pixel position, again, aligned with 817 * the pixels block size. 818 * 819 * The same rules apply, we just add 1 to base the computation 820 * on the "right border" of the dirty area. 821 */ 822 823 col = area->tr_end.tp_col; 824 row = area->tr_end.tp_row; 825 x2 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col 826 + VT_VGA_PIXELS_BLOCK - 1) 827 / VT_VGA_PIXELS_BLOCK) 828 * VT_VGA_PIXELS_BLOCK; 829 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 830 831 /* Clip the area to the screen size. */ 832 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 833 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 834 835 /* 836 * Now, we take care of N pixels line at a time (the first for 837 * loop, N = font height), and for these lines, draw one pixels 838 * block at a time (the second for loop), not a character at a 839 * time. 840 * 841 * Therefore, on the X-axis, characters my be drawn partially if 842 * they are not aligned on 8-pixels boundary. 843 * 844 * However, the operation is repeated for the full height of the 845 * font before moving to the next character, because it allows 846 * to keep the color settings and write mode, before perhaps 847 * changing them with the next one. 848 */ 849 850 for (y = y1; y < y2; y += vf->vf_height) { 851 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 852 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 853 } 854 } 855 } 856 857 static void 858 vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 859 const term_rect_t *area) 860 { 861 struct vga_softc *sc; 862 const struct vt_buf *vb; 863 unsigned int col, row; 864 term_char_t c; 865 term_color_t fg, bg; 866 uint8_t ch, attr; 867 868 sc = vd->vd_softc; 869 vb = &vw->vw_buf; 870 871 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 872 for (col = area->tr_begin.tp_col; 873 col < area->tr_end.tp_col; 874 ++col) { 875 /* 876 * Get next character and its associated fg/bg 877 * colors. 878 */ 879 c = VTBUF_GET_FIELD(vb, row, col); 880 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 881 &fg, &bg); 882 883 /* 884 * Convert character to CP437, which is the 885 * character set used by the VGA hardware by 886 * default. 887 */ 888 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 889 890 /* Convert colors to VGA attributes. */ 891 attr = bg << 4 | fg; 892 893 MEM_WRITE1(sc, 0x18000 + (row * 80 + col) * 2 + 0, 894 ch); 895 MEM_WRITE1(sc, 0x18000 + (row * 80 + col) * 2 + 1, 896 attr); 897 } 898 } 899 } 900 901 static void 902 vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 903 const term_rect_t *area) 904 { 905 906 if (!(vd->vd_flags & VDF_TEXTMODE)) { 907 vga_bitblt_text_gfxmode(vd, vw, area); 908 } else { 909 vga_bitblt_text_txtmode(vd, vw, area); 910 } 911 } 912 913 static void 914 vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 915 const uint8_t *pattern, const uint8_t *mask, 916 unsigned int width, unsigned int height, 917 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 918 { 919 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 920 uint8_t pattern_2colors; 921 922 /* Align coordinates with the 8-pxels grid. */ 923 x1 = x / VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 924 y1 = y; 925 926 x2 = (x + width + VT_VGA_PIXELS_BLOCK - 1) / 927 VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 928 y2 = y + height; 929 x2 = min(x2, vd->vd_width - 1); 930 y2 = min(y2, vd->vd_height - 1); 931 932 for (j = y1; j < y2; ++j) { 933 src_x = 0; 934 dst_x = x - x1; 935 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 936 937 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 938 pattern_2colors = 0; 939 940 vga_copy_bitmap_portion( 941 &pattern_2colors, NULL, 942 pattern, mask, width, 943 src_x, dst_x, x_count, 944 j - y1, 0, 1, fg, bg, 0); 945 946 vga_bitblt_pixels_block_2colors(vd, 947 &pattern_2colors, fg, bg, 948 i, j, 1); 949 950 src_x += x_count; 951 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 952 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 953 } 954 } 955 } 956 957 static void 958 vga_initialize_graphics(struct vt_device *vd) 959 { 960 struct vga_softc *sc = vd->vd_softc; 961 962 /* Clock select. */ 963 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 964 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 965 /* Set sequencer clocking and memory mode. */ 966 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 967 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 968 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 969 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 970 971 /* Set the graphics controller in graphics mode. */ 972 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 973 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 974 /* Program the CRT controller. */ 975 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 976 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 977 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 978 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 979 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 980 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 981 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 982 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 983 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 984 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 985 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 986 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 987 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 988 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 989 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 990 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 991 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 992 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 993 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 994 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 995 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 996 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 997 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 998 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 999 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 1000 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 1001 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 1002 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 1003 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 1004 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 1005 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 1006 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1007 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1008 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1009 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1010 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1011 1012 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1013 1014 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1015 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1016 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1017 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1018 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1019 1020 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1021 REG_WRITE1(sc, VGA_GC_DATA, 0); 1022 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1023 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1024 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1025 REG_WRITE1(sc, VGA_GC_DATA, 0); 1026 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1027 REG_WRITE1(sc, VGA_GC_DATA, 0); 1028 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1029 REG_WRITE1(sc, VGA_GC_DATA, 0); 1030 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1031 REG_WRITE1(sc, VGA_GC_DATA, 0); 1032 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1033 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1034 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1035 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1036 } 1037 1038 static int 1039 vga_initialize(struct vt_device *vd, int textmode) 1040 { 1041 struct vga_softc *sc = vd->vd_softc; 1042 uint8_t x; 1043 int timeout; 1044 1045 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1046 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1047 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1048 1049 /* Unprotect CRTC registers 0-7. */ 1050 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1051 x = REG_READ1(sc, VGA_CRTC_DATA); 1052 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1053 1054 /* 1055 * Wait for the vertical retrace. 1056 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1057 * the side-effect of clearing the internal flip-flip of the attribute 1058 * controller's write register. This means that because this code is 1059 * here, we know for sure that the first write to the attribute 1060 * controller will be a write to the address register. Removing this 1061 * code therefore also removes that guarantee and appropriate measures 1062 * need to be taken. 1063 */ 1064 timeout = 10000; 1065 do { 1066 DELAY(10); 1067 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1068 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1069 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1070 if (timeout == 0) { 1071 printf("Timeout initializing vt_vga\n"); 1072 return (ENXIO); 1073 } 1074 1075 /* Now, disable the sync. signals. */ 1076 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1077 x = REG_READ1(sc, VGA_CRTC_DATA); 1078 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1079 1080 /* Asynchronous sequencer reset. */ 1081 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1082 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1083 1084 if (!textmode) 1085 vga_initialize_graphics(vd); 1086 1087 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1088 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1089 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1090 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1091 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1092 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1093 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1094 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1095 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1096 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1097 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1098 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1099 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1100 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1101 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1102 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1103 1104 if (textmode) { 1105 /* Set the attribute controller to blink disable. */ 1106 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1107 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1108 } else { 1109 /* Set the attribute controller in graphics mode. */ 1110 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1111 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1112 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1113 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1114 } 1115 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1116 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1117 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1118 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1119 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1120 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1121 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1122 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1123 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1124 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1125 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1126 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1127 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1128 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1129 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1130 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1131 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1132 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1133 VGA_AC_PAL_SB); 1134 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1135 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1136 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1137 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1138 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1139 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1140 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1141 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1142 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1143 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1144 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1145 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1146 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1147 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1148 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1149 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1150 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1151 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1152 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1153 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1154 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1155 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1156 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1157 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1158 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1159 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1160 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1161 1162 if (!textmode) { 1163 u_int ofs; 1164 1165 /* 1166 * Done. Clear the frame buffer. All bit planes are 1167 * enabled, so a single-paged loop should clear all 1168 * planes. 1169 */ 1170 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1171 MEM_WRITE1(sc, ofs, 0); 1172 } 1173 } 1174 1175 /* Re-enable the sequencer. */ 1176 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1177 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1178 /* Re-enable the sync signals. */ 1179 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1180 x = REG_READ1(sc, VGA_CRTC_DATA); 1181 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1182 1183 if (!textmode) { 1184 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1185 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1186 REG_WRITE1(sc, VGA_GC_DATA, 3); 1187 sc->vga_wmode = 3; 1188 1189 /* 1190 * In Write Mode 3, Enable Set/Reset is ignored, but we 1191 * use Write Mode 0 to write a group of 8 pixels using 1192 * 3 or more colors. In this case, we want to disable 1193 * Set/Reset: set Enable Set/Reset to 0. 1194 */ 1195 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1196 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1197 1198 /* 1199 * Clear the colors we think are loaded into Set/Reset or 1200 * the latches. 1201 */ 1202 sc->vga_curfg = sc->vga_curbg = 0xff; 1203 } 1204 1205 return (0); 1206 } 1207 1208 static int 1209 vga_probe(struct vt_device *vd) 1210 { 1211 1212 return (CN_INTERNAL); 1213 } 1214 1215 static int 1216 vga_init(struct vt_device *vd) 1217 { 1218 struct vga_softc *sc; 1219 int textmode; 1220 1221 if (vd->vd_softc == NULL) 1222 vd->vd_softc = (void *)&vga_conssoftc; 1223 sc = vd->vd_softc; 1224 textmode = 0; 1225 1226 if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 1227 vga_pci_repost(vd->vd_video_dev); 1228 1229 #if defined(__amd64__) || defined(__i386__) 1230 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1231 sc->vga_fb_handle = KERNBASE + VGA_MEM_BASE; 1232 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1233 sc->vga_reg_handle = VGA_REG_BASE; 1234 #else 1235 # error "Architecture not yet supported!" 1236 #endif 1237 1238 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1239 if (textmode) { 1240 vd->vd_flags |= VDF_TEXTMODE; 1241 vd->vd_width = 80; 1242 vd->vd_height = 25; 1243 } else { 1244 vd->vd_width = VT_VGA_WIDTH; 1245 vd->vd_height = VT_VGA_HEIGHT; 1246 } 1247 if (vga_initialize(vd, textmode) != 0) 1248 return (CN_DEAD); 1249 sc->vga_enabled = true; 1250 1251 return (CN_INTERNAL); 1252 } 1253 1254 static void 1255 vga_postswitch(struct vt_device *vd) 1256 { 1257 1258 /* Reinit VGA mode, to restore view after app which change mode. */ 1259 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1260 /* Ask vt(9) to update chars on visible area. */ 1261 vd->vd_flags |= VDF_INVALID; 1262 } 1263 1264 /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1265 static void 1266 vtvga_identify(driver_t *driver, device_t parent) 1267 { 1268 1269 if (!vga_conssoftc.vga_enabled) 1270 return; 1271 1272 if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1273 panic("Unable to attach vt_vga console"); 1274 } 1275 1276 static int 1277 vtvga_probe(device_t dev) 1278 { 1279 1280 device_set_desc(dev, "VT VGA driver"); 1281 1282 return (BUS_PROBE_NOWILDCARD); 1283 } 1284 1285 static int 1286 vtvga_attach(device_t dev) 1287 { 1288 struct resource *pseudo_phys_res; 1289 int res_id; 1290 1291 res_id = 0; 1292 pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1293 &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1294 VGA_MEM_SIZE, RF_ACTIVE); 1295 if (pseudo_phys_res == NULL) 1296 panic("Unable to reserve vt_vga memory"); 1297 return (0); 1298 } 1299 1300 /*-------------------- Private Device Attachment Data -----------------------*/ 1301 static device_method_t vtvga_methods[] = { 1302 /* Device interface */ 1303 DEVMETHOD(device_identify, vtvga_identify), 1304 DEVMETHOD(device_probe, vtvga_probe), 1305 DEVMETHOD(device_attach, vtvga_attach), 1306 1307 DEVMETHOD_END 1308 }; 1309 1310 DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1311 devclass_t vtvga_devclass; 1312 1313 DRIVER_MODULE(vtvga, nexus, vtvga_driver, vtvga_devclass, NULL, NULL); 1314