1 /*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include "opt_acpi.h" 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include <sys/param.h> 39 #include <sys/kernel.h> 40 #include <sys/systm.h> 41 #include <sys/bus.h> 42 #include <sys/module.h> 43 #include <sys/rman.h> 44 45 #include <dev/vt/vt.h> 46 #include <dev/vt/hw/vga/vt_vga_reg.h> 47 #include <dev/pci/pcivar.h> 48 49 #include <machine/bus.h> 50 51 #if ((defined(__amd64__) || defined(__i386__)) && defined(DEV_ACPI)) 52 #include <contrib/dev/acpica/include/acpi.h> 53 #endif 54 55 struct vga_softc { 56 bus_space_tag_t vga_fb_tag; 57 bus_space_handle_t vga_fb_handle; 58 bus_space_tag_t vga_reg_tag; 59 bus_space_handle_t vga_reg_handle; 60 int vga_wmode; 61 term_color_t vga_curfg, vga_curbg; 62 boolean_t vga_enabled; 63 }; 64 65 /* Convenience macros. */ 66 #define MEM_READ1(sc, ofs) \ 67 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 68 #define MEM_WRITE1(sc, ofs, val) \ 69 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 70 #define REG_READ1(sc, reg) \ 71 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 72 #define REG_WRITE1(sc, reg, val) \ 73 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 74 75 #define VT_VGA_WIDTH 640 76 #define VT_VGA_HEIGHT 480 77 #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 78 79 /* 80 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 81 * memory). 82 */ 83 #define VT_VGA_PIXELS_BLOCK 8 84 85 /* 86 * We use an off-screen addresses to: 87 * o store the background color; 88 * o store pixels pattern. 89 * Those addresses are then loaded in the latches once. 90 */ 91 #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 92 93 static vd_probe_t vga_probe; 94 static vd_init_t vga_init; 95 static vd_blank_t vga_blank; 96 static vd_bitblt_text_t vga_bitblt_text; 97 static vd_bitblt_bmp_t vga_bitblt_bitmap; 98 static vd_drawrect_t vga_drawrect; 99 static vd_setpixel_t vga_setpixel; 100 static vd_postswitch_t vga_postswitch; 101 102 static const struct vt_driver vt_vga_driver = { 103 .vd_name = "vga", 104 .vd_probe = vga_probe, 105 .vd_init = vga_init, 106 .vd_blank = vga_blank, 107 .vd_bitblt_text = vga_bitblt_text, 108 .vd_bitblt_bmp = vga_bitblt_bitmap, 109 .vd_drawrect = vga_drawrect, 110 .vd_setpixel = vga_setpixel, 111 .vd_postswitch = vga_postswitch, 112 .vd_priority = VD_PRIORITY_GENERIC, 113 }; 114 115 /* 116 * Driver supports both text mode and graphics mode. Make sure the 117 * buffer is always big enough to support both. 118 */ 119 static struct vga_softc vga_conssoftc; 120 VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 121 122 static inline void 123 vga_setwmode(struct vt_device *vd, int wmode) 124 { 125 struct vga_softc *sc = vd->vd_softc; 126 127 if (sc->vga_wmode == wmode) 128 return; 129 130 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 131 REG_WRITE1(sc, VGA_GC_DATA, wmode); 132 sc->vga_wmode = wmode; 133 134 switch (wmode) { 135 case 3: 136 /* Re-enable all plans. */ 137 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 138 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 139 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 140 break; 141 } 142 } 143 144 static inline void 145 vga_setfg(struct vt_device *vd, term_color_t color) 146 { 147 struct vga_softc *sc = vd->vd_softc; 148 149 vga_setwmode(vd, 3); 150 151 if (sc->vga_curfg == color) 152 return; 153 154 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 155 REG_WRITE1(sc, VGA_GC_DATA, color); 156 sc->vga_curfg = color; 157 } 158 159 static inline void 160 vga_setbg(struct vt_device *vd, term_color_t color) 161 { 162 struct vga_softc *sc = vd->vd_softc; 163 164 vga_setwmode(vd, 3); 165 166 if (sc->vga_curbg == color) 167 return; 168 169 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 170 REG_WRITE1(sc, VGA_GC_DATA, color); 171 172 /* 173 * Write 8 pixels using the background color to an off-screen 174 * byte in the video memory. 175 */ 176 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 177 178 /* 179 * Read those 8 pixels back to load the background color in the 180 * latches register. 181 */ 182 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 183 184 sc->vga_curbg = color; 185 186 /* 187 * The Set/Reset register doesn't contain the fg color anymore, 188 * store an invalid color. 189 */ 190 sc->vga_curfg = 0xff; 191 } 192 193 /* 194 * Binary searchable table for Unicode to CP437 conversion. 195 */ 196 197 struct unicp437 { 198 uint16_t unicode_base; 199 uint8_t cp437_base; 200 uint8_t length; 201 }; 202 203 static const struct unicp437 cp437table[] = { 204 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 205 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 206 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 207 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 208 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 209 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 210 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 211 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 212 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 213 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 214 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 215 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 216 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 217 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 218 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 219 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 220 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 221 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 222 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 223 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 224 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 225 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 226 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 227 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 228 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 229 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 230 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 231 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 232 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 233 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 234 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 235 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 236 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 237 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 238 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 239 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 240 { 0x2013, 0x2d, 0x00 }, 241 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 242 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 243 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 244 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 245 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 246 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 247 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 248 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 249 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 250 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 251 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 252 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 253 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 254 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 255 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 256 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 257 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 258 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 259 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 260 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 261 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 262 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 263 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 264 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 265 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 266 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 267 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 268 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 269 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 270 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 271 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 272 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 273 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 274 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 275 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 276 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 277 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 278 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 279 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 280 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 281 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 282 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 283 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 284 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 285 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 286 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 287 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 288 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 289 { 0x266c, 0x0e, 0x00 }, { 0x27e8, 0x3c, 0x00 }, 290 { 0x27e9, 0x3e, 0x00 }, 291 }; 292 293 static uint8_t 294 vga_get_cp437(term_char_t c) 295 { 296 int min, mid, max; 297 298 min = 0; 299 max = nitems(cp437table) - 1; 300 301 if (c < cp437table[0].unicode_base || 302 c > cp437table[max].unicode_base + cp437table[max].length) 303 return '?'; 304 305 while (max >= min) { 306 mid = (min + max) / 2; 307 if (c < cp437table[mid].unicode_base) 308 max = mid - 1; 309 else if (c > cp437table[mid].unicode_base + 310 cp437table[mid].length) 311 min = mid + 1; 312 else 313 return (c - cp437table[mid].unicode_base + 314 cp437table[mid].cp437_base); 315 } 316 317 return '?'; 318 } 319 320 static void 321 vga_blank(struct vt_device *vd, term_color_t color) 322 { 323 struct vga_softc *sc = vd->vd_softc; 324 u_int ofs; 325 326 vga_setfg(vd, color); 327 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 328 MEM_WRITE1(sc, ofs, 0xff); 329 } 330 331 static inline void 332 vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 333 uint8_t v) 334 { 335 struct vga_softc *sc = vd->vd_softc; 336 337 /* Skip empty writes, in order to avoid palette changes. */ 338 if (v != 0x00) { 339 vga_setfg(vd, color); 340 /* 341 * When this MEM_READ1() gets disabled, all sorts of 342 * artifacts occur. This is because this read loads the 343 * set of 8 pixels that are about to be changed. There 344 * is one scenario where we can avoid the read, namely 345 * if all pixels are about to be overwritten anyway. 346 */ 347 if (v != 0xff) { 348 MEM_READ1(sc, dst); 349 350 /* The bg color was trashed by the reads. */ 351 sc->vga_curbg = 0xff; 352 } 353 MEM_WRITE1(sc, dst, v); 354 } 355 } 356 357 static void 358 vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 359 { 360 361 if (vd->vd_flags & VDF_TEXTMODE) 362 return; 363 364 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 365 0x80 >> (x % 8)); 366 } 367 368 static void 369 vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 370 term_color_t color) 371 { 372 int x, y; 373 374 if (vd->vd_flags & VDF_TEXTMODE) 375 return; 376 377 for (y = y1; y <= y2; y++) { 378 if (fill || (y == y1) || (y == y2)) { 379 for (x = x1; x <= x2; x++) 380 vga_setpixel(vd, x, y, color); 381 } else { 382 vga_setpixel(vd, x1, y, color); 383 vga_setpixel(vd, x2, y, color); 384 } 385 } 386 } 387 388 static void 389 vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 390 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 391 uint8_t *pattern, uint8_t *mask) 392 { 393 unsigned int n; 394 395 n = src_x / 8; 396 397 /* 398 * This mask has bits set, where a pixel (ether 0 or 1) 399 * comes from the source bitmap. 400 */ 401 if (mask != NULL) { 402 *mask = (0xff 403 >> (8 - x_count)) 404 << (8 - x_count - dst_x); 405 } 406 407 if (n == (src_x + x_count - 1) / 8) { 408 /* All the pixels we want are in the same byte. */ 409 *pattern = src[n]; 410 if (dst_x >= src_x) 411 *pattern >>= (dst_x - src_x % 8); 412 else 413 *pattern <<= (src_x % 8 - dst_x); 414 } else { 415 /* The pixels we want are split into two bytes. */ 416 if (dst_x >= src_x % 8) { 417 *pattern = 418 src[n] << (8 - dst_x - src_x % 8) | 419 src[n + 1] >> (dst_x - src_x % 8); 420 } else { 421 *pattern = 422 src[n] << (src_x % 8 - dst_x) | 423 src[n + 1] >> (8 - src_x % 8 - dst_x); 424 } 425 } 426 } 427 428 static void 429 vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 430 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 431 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 432 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 433 term_color_t fg, term_color_t bg, int overwrite) 434 { 435 unsigned int i, bytes; 436 uint8_t pattern, relevant_bits, mask; 437 438 bytes = (src_width + 7) / 8; 439 440 for (i = 0; i < y_count; ++i) { 441 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 442 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 443 444 if (src_mask == NULL) { 445 /* 446 * No src mask. Consider that all wanted bits 447 * from the source are "authoritative". 448 */ 449 mask = relevant_bits; 450 } else { 451 /* 452 * There's an src mask. We shift it the same way 453 * we shifted the source pattern. 454 */ 455 vga_compute_shifted_pattern( 456 src_mask + (src_y + i) * bytes, 457 bytes, src_x, x_count, dst_x, 458 &mask, NULL); 459 460 /* Now, only keep the wanted bits among them. */ 461 mask &= relevant_bits; 462 } 463 464 /* 465 * Clear bits from the pattern which must be 466 * transparent, according to the source mask. 467 */ 468 pattern &= mask; 469 470 /* Set the bits in the 2-colors array. */ 471 if (overwrite) 472 pattern_2colors[dst_y + i] &= ~mask; 473 pattern_2colors[dst_y + i] |= pattern; 474 475 if (pattern_ncolors == NULL) 476 continue; 477 478 /* 479 * Set the same bits in the n-colors array. This one 480 * supports transparency, when a given bit is cleared in 481 * all colors. 482 */ 483 if (overwrite) { 484 /* 485 * Ensure that the pixels used by this bitmap are 486 * cleared in other colors. 487 */ 488 for (int j = 0; j < 16; ++j) 489 pattern_ncolors[(dst_y + i) * 16 + j] &= 490 ~mask; 491 } 492 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 493 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 494 } 495 } 496 497 static void 498 vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 499 term_color_t fg, term_color_t bg, 500 unsigned int x, unsigned int y, unsigned int height) 501 { 502 unsigned int i, offset; 503 struct vga_softc *sc; 504 505 /* 506 * The great advantage of Write Mode 3 is that we just need 507 * to load the foreground in the Set/Reset register, load the 508 * background color in the latches register (this is done 509 * through a write in offscreen memory followed by a read of 510 * that data), then write the pattern to video memory. This 511 * pattern indicates if the pixel should use the foreground 512 * color (bit set) or the background color (bit cleared). 513 */ 514 515 vga_setbg(vd, bg); 516 vga_setfg(vd, fg); 517 518 sc = vd->vd_softc; 519 offset = (VT_VGA_WIDTH * y + x) / 8; 520 521 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 522 MEM_WRITE1(sc, offset, masks[i]); 523 } 524 } 525 526 static void 527 vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 528 unsigned int x, unsigned int y, unsigned int height) 529 { 530 unsigned int i, j, plan, color, offset; 531 struct vga_softc *sc; 532 uint8_t mask, plans[height * 4]; 533 534 sc = vd->vd_softc; 535 536 memset(plans, 0, sizeof(plans)); 537 538 /* 539 * To write a group of pixels using 3 or more colors, we select 540 * Write Mode 0 and write one byte to each plan separately. 541 */ 542 543 /* 544 * We first compute each byte: each plan contains one bit of the 545 * color code for each of the 8 pixels. 546 * 547 * For example, if the 8 pixels are like this: 548 * GBBBBBBY 549 * where: 550 * G (gray) = 0b0111 551 * B (black) = 0b0000 552 * Y (yellow) = 0b0011 553 * 554 * The corresponding for bytes are: 555 * GBBBBBBY 556 * Plan 0: 10000001 = 0x81 557 * Plan 1: 10000001 = 0x81 558 * Plan 2: 10000000 = 0x80 559 * Plan 3: 00000000 = 0x00 560 * | | | 561 * | | +-> 0b0011 (Y) 562 * | +-----> 0b0000 (B) 563 * +--------> 0b0111 (G) 564 */ 565 566 for (i = 0; i < height; ++i) { 567 for (color = 0; color < 16; ++color) { 568 mask = masks[i * 16 + color]; 569 if (mask == 0x00) 570 continue; 571 572 for (j = 0; j < 8; ++j) { 573 if (!((mask >> (7 - j)) & 0x1)) 574 continue; 575 576 /* The pixel "j" uses color "color". */ 577 for (plan = 0; plan < 4; ++plan) 578 plans[i * 4 + plan] |= 579 ((color >> plan) & 0x1) << (7 - j); 580 } 581 } 582 } 583 584 /* 585 * The bytes are ready: we now switch to Write Mode 0 and write 586 * all bytes, one plan at a time. 587 */ 588 vga_setwmode(vd, 0); 589 590 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 591 for (plan = 0; plan < 4; ++plan) { 592 /* Select plan. */ 593 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 594 595 /* Write all bytes for this plan, from Y to Y+height. */ 596 for (i = 0; i < height; ++i) { 597 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 598 MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 599 } 600 } 601 } 602 603 static void 604 vga_bitblt_one_text_pixels_block(struct vt_device *vd, 605 const struct vt_window *vw, unsigned int x, unsigned int y) 606 { 607 const struct vt_buf *vb; 608 const struct vt_font *vf; 609 unsigned int i, col, row, src_x, x_count; 610 unsigned int used_colors_list[16], used_colors; 611 uint8_t pattern_2colors[vw->vw_font->vf_height]; 612 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 613 term_char_t c; 614 term_color_t fg, bg; 615 const uint8_t *src; 616 617 vb = &vw->vw_buf; 618 vf = vw->vw_font; 619 620 /* 621 * The current pixels block. 622 * 623 * We fill it with portions of characters, because both "grids" 624 * may not match. 625 * 626 * i is the index in this pixels block. 627 */ 628 629 i = x; 630 used_colors = 0; 631 memset(used_colors_list, 0, sizeof(used_colors_list)); 632 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 633 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 634 635 if (i < vw->vw_draw_area.tr_begin.tp_col) { 636 /* 637 * i is in the margin used to center the text area on 638 * the screen. 639 */ 640 641 i = vw->vw_draw_area.tr_begin.tp_col; 642 } 643 644 while (i < x + VT_VGA_PIXELS_BLOCK && 645 i < vw->vw_draw_area.tr_end.tp_col) { 646 /* 647 * Find which character is drawn on this pixel in the 648 * pixels block. 649 * 650 * While here, record what colors it uses. 651 */ 652 653 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 654 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 655 656 c = VTBUF_GET_FIELD(vb, row, col); 657 src = vtfont_lookup(vf, c); 658 659 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 660 if ((used_colors_list[fg] & 0x1) != 0x1) 661 used_colors++; 662 if ((used_colors_list[bg] & 0x2) != 0x2) 663 used_colors++; 664 used_colors_list[fg] |= 0x1; 665 used_colors_list[bg] |= 0x2; 666 667 /* 668 * Compute the portion of the character we want to draw, 669 * because the pixels block may start in the middle of a 670 * character. 671 * 672 * The first pixel to draw in the character is 673 * the current position - 674 * the start position of the character 675 * 676 * The last pixel to draw is either 677 * - the last pixel of the character, or 678 * - the pixel of the character matching the end of 679 * the pixels block 680 * whichever comes first. This position is then 681 * changed to be relative to the start position of the 682 * character. 683 */ 684 685 src_x = i - 686 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 687 x_count = min(min( 688 (col + 1) * vf->vf_width + 689 vw->vw_draw_area.tr_begin.tp_col, 690 x + VT_VGA_PIXELS_BLOCK), 691 vw->vw_draw_area.tr_end.tp_col); 692 x_count -= col * vf->vf_width + 693 vw->vw_draw_area.tr_begin.tp_col; 694 x_count -= src_x; 695 696 /* Copy a portion of the character. */ 697 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 698 src, NULL, vf->vf_width, 699 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 700 0, 0, vf->vf_height, fg, bg, 0); 701 702 /* We move to the next portion. */ 703 i += x_count; 704 } 705 706 #ifndef SC_NO_CUTPASTE 707 /* 708 * Copy the mouse pointer bitmap if it's over the current pixels 709 * block. 710 * 711 * We use the saved cursor position (saved in vt_flush()), because 712 * the current position could be different than the one used 713 * to mark the area dirty. 714 */ 715 term_rect_t drawn_area; 716 717 drawn_area.tr_begin.tp_col = x; 718 drawn_area.tr_begin.tp_row = y; 719 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 720 drawn_area.tr_end.tp_row = y + vf->vf_height; 721 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 722 struct vt_mouse_cursor *cursor; 723 unsigned int mx, my; 724 unsigned int dst_x, src_y, dst_y, y_count; 725 726 cursor = vd->vd_mcursor; 727 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 728 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 729 730 /* Compute the portion of the cursor we want to copy. */ 731 src_x = x > mx ? x - mx : 0; 732 dst_x = mx > x ? mx - x : 0; 733 x_count = min(min(min( 734 cursor->width - src_x, 735 x + VT_VGA_PIXELS_BLOCK - mx), 736 vw->vw_draw_area.tr_end.tp_col - mx), 737 VT_VGA_PIXELS_BLOCK); 738 739 /* 740 * The cursor isn't aligned on the Y-axis with 741 * characters, so we need to compute the vertical 742 * start/count. 743 */ 744 src_y = y > my ? y - my : 0; 745 dst_y = my > y ? my - y : 0; 746 y_count = min( 747 min(cursor->height - src_y, y + vf->vf_height - my), 748 vf->vf_height); 749 750 /* Copy the cursor portion. */ 751 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 752 cursor->map, cursor->mask, cursor->width, 753 src_x, dst_x, x_count, src_y, dst_y, y_count, 754 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 755 756 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 757 used_colors++; 758 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 759 used_colors++; 760 } 761 #endif 762 763 /* 764 * The pixels block is completed, we can now draw it on the 765 * screen. 766 */ 767 if (used_colors == 2) 768 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 769 x, y, vf->vf_height); 770 else 771 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 772 x, y, vf->vf_height); 773 } 774 775 static void 776 vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 777 const term_rect_t *area) 778 { 779 const struct vt_font *vf; 780 unsigned int col, row; 781 unsigned int x1, y1, x2, y2, x, y; 782 783 vf = vw->vw_font; 784 785 /* 786 * Compute the top-left pixel position aligned with the video 787 * adapter pixels block size. 788 * 789 * This is calculated from the top-left column of te dirty area: 790 * 791 * 1. Compute the top-left pixel of the character: 792 * col * font width + x offset 793 * 794 * NOTE: x offset is used to center the text area on the 795 * screen. It's expressed in pixels, not in characters 796 * col/row! 797 * 798 * 2. Find the pixel further on the left marking the start of 799 * an aligned pixels block (eg. chunk of 8 pixels): 800 * character's x / blocksize * blocksize 801 * 802 * The division, being made on integers, achieves the 803 * alignment. 804 * 805 * For the Y-axis, we need to compute the character's y 806 * coordinate, but we don't need to align it. 807 */ 808 809 col = area->tr_begin.tp_col; 810 row = area->tr_begin.tp_row; 811 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 812 / VT_VGA_PIXELS_BLOCK) 813 * VT_VGA_PIXELS_BLOCK; 814 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 815 816 /* 817 * Compute the bottom right pixel position, again, aligned with 818 * the pixels block size. 819 * 820 * The same rules apply, we just add 1 to base the computation 821 * on the "right border" of the dirty area. 822 */ 823 824 col = area->tr_end.tp_col; 825 row = area->tr_end.tp_row; 826 x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col, 827 VT_VGA_PIXELS_BLOCK) 828 * VT_VGA_PIXELS_BLOCK; 829 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 830 831 /* Clip the area to the screen size. */ 832 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 833 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 834 835 /* 836 * Now, we take care of N pixels line at a time (the first for 837 * loop, N = font height), and for these lines, draw one pixels 838 * block at a time (the second for loop), not a character at a 839 * time. 840 * 841 * Therefore, on the X-axis, characters my be drawn partially if 842 * they are not aligned on 8-pixels boundary. 843 * 844 * However, the operation is repeated for the full height of the 845 * font before moving to the next character, because it allows 846 * to keep the color settings and write mode, before perhaps 847 * changing them with the next one. 848 */ 849 850 for (y = y1; y < y2; y += vf->vf_height) { 851 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 852 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 853 } 854 } 855 } 856 857 static void 858 vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 859 const term_rect_t *area) 860 { 861 struct vga_softc *sc; 862 const struct vt_buf *vb; 863 unsigned int col, row; 864 term_char_t c; 865 term_color_t fg, bg; 866 uint8_t ch, attr; 867 868 sc = vd->vd_softc; 869 vb = &vw->vw_buf; 870 871 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 872 for (col = area->tr_begin.tp_col; 873 col < area->tr_end.tp_col; 874 ++col) { 875 /* 876 * Get next character and its associated fg/bg 877 * colors. 878 */ 879 c = VTBUF_GET_FIELD(vb, row, col); 880 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 881 &fg, &bg); 882 883 /* 884 * Convert character to CP437, which is the 885 * character set used by the VGA hardware by 886 * default. 887 */ 888 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 889 890 /* Convert colors to VGA attributes. */ 891 attr = bg << 4 | fg; 892 893 MEM_WRITE1(sc, (row * 80 + col) * 2 + 0, 894 ch); 895 MEM_WRITE1(sc, (row * 80 + col) * 2 + 1, 896 attr); 897 } 898 } 899 } 900 901 static void 902 vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 903 const term_rect_t *area) 904 { 905 906 if (!(vd->vd_flags & VDF_TEXTMODE)) { 907 vga_bitblt_text_gfxmode(vd, vw, area); 908 } else { 909 vga_bitblt_text_txtmode(vd, vw, area); 910 } 911 } 912 913 static void 914 vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 915 const uint8_t *pattern, const uint8_t *mask, 916 unsigned int width, unsigned int height, 917 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 918 { 919 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 920 uint8_t pattern_2colors; 921 922 /* Align coordinates with the 8-pxels grid. */ 923 x1 = rounddown(x, VT_VGA_PIXELS_BLOCK); 924 y1 = y; 925 926 x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK); 927 y2 = y + height; 928 x2 = min(x2, vd->vd_width - 1); 929 y2 = min(y2, vd->vd_height - 1); 930 931 for (j = y1; j < y2; ++j) { 932 src_x = 0; 933 dst_x = x - x1; 934 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 935 936 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 937 pattern_2colors = 0; 938 939 vga_copy_bitmap_portion( 940 &pattern_2colors, NULL, 941 pattern, mask, width, 942 src_x, dst_x, x_count, 943 j - y1, 0, 1, fg, bg, 0); 944 945 vga_bitblt_pixels_block_2colors(vd, 946 &pattern_2colors, fg, bg, 947 i, j, 1); 948 949 src_x += x_count; 950 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 951 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 952 } 953 } 954 } 955 956 static void 957 vga_initialize_graphics(struct vt_device *vd) 958 { 959 struct vga_softc *sc = vd->vd_softc; 960 961 /* Clock select. */ 962 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 963 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 964 /* Set sequencer clocking and memory mode. */ 965 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 966 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 967 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 968 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 969 970 /* Set the graphics controller in graphics mode. */ 971 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 972 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 973 /* Program the CRT controller. */ 974 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 975 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 976 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 977 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 978 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 979 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 980 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 981 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 982 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 983 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 984 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 985 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 986 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 987 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 988 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 989 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 990 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 991 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 992 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 993 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 994 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 995 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 996 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 997 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 998 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 999 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 1000 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 1001 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 1002 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 1003 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 1004 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 1005 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1006 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1007 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1008 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1009 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1010 1011 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1012 1013 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1014 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1015 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1016 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1017 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1018 1019 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1020 REG_WRITE1(sc, VGA_GC_DATA, 0); 1021 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1022 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1023 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1024 REG_WRITE1(sc, VGA_GC_DATA, 0); 1025 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1026 REG_WRITE1(sc, VGA_GC_DATA, 0); 1027 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1028 REG_WRITE1(sc, VGA_GC_DATA, 0); 1029 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1030 REG_WRITE1(sc, VGA_GC_DATA, 0); 1031 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1032 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1033 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1034 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1035 } 1036 1037 static int 1038 vga_initialize(struct vt_device *vd, int textmode) 1039 { 1040 struct vga_softc *sc = vd->vd_softc; 1041 uint8_t x; 1042 int timeout; 1043 1044 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1045 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1046 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1047 1048 /* Unprotect CRTC registers 0-7. */ 1049 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1050 x = REG_READ1(sc, VGA_CRTC_DATA); 1051 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1052 1053 /* 1054 * Wait for the vertical retrace. 1055 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1056 * the side-effect of clearing the internal flip-flip of the attribute 1057 * controller's write register. This means that because this code is 1058 * here, we know for sure that the first write to the attribute 1059 * controller will be a write to the address register. Removing this 1060 * code therefore also removes that guarantee and appropriate measures 1061 * need to be taken. 1062 */ 1063 timeout = 10000; 1064 do { 1065 DELAY(10); 1066 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1067 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1068 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1069 if (timeout == 0) { 1070 printf("Timeout initializing vt_vga\n"); 1071 return (ENXIO); 1072 } 1073 1074 /* Now, disable the sync. signals. */ 1075 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1076 x = REG_READ1(sc, VGA_CRTC_DATA); 1077 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1078 1079 /* Asynchronous sequencer reset. */ 1080 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1081 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1082 1083 if (!textmode) 1084 vga_initialize_graphics(vd); 1085 1086 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1087 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1088 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1089 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1090 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1091 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1092 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1093 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1094 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1095 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1096 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1097 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1098 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1099 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1100 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1101 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1102 1103 if (textmode) { 1104 /* Set the attribute controller to blink disable. */ 1105 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1106 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1107 } else { 1108 /* Set the attribute controller in graphics mode. */ 1109 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1110 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1111 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1112 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1113 } 1114 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1115 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1116 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1117 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1118 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1119 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1120 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1121 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1122 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1123 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1124 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1125 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1126 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1127 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1128 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1129 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1130 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1131 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1132 VGA_AC_PAL_SB); 1133 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1134 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1135 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1136 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1137 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1138 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1139 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1140 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1141 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1142 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1143 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1144 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1145 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1146 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1147 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1148 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1149 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1150 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1151 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1152 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1153 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1154 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1155 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1156 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1157 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1158 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1159 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1160 1161 if (!textmode) { 1162 u_int ofs; 1163 1164 /* 1165 * Done. Clear the frame buffer. All bit planes are 1166 * enabled, so a single-paged loop should clear all 1167 * planes. 1168 */ 1169 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1170 MEM_WRITE1(sc, ofs, 0); 1171 } 1172 } 1173 1174 /* Re-enable the sequencer. */ 1175 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1176 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1177 /* Re-enable the sync signals. */ 1178 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1179 x = REG_READ1(sc, VGA_CRTC_DATA); 1180 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1181 1182 if (!textmode) { 1183 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1184 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1185 REG_WRITE1(sc, VGA_GC_DATA, 3); 1186 sc->vga_wmode = 3; 1187 1188 /* 1189 * In Write Mode 3, Enable Set/Reset is ignored, but we 1190 * use Write Mode 0 to write a group of 8 pixels using 1191 * 3 or more colors. In this case, we want to disable 1192 * Set/Reset: set Enable Set/Reset to 0. 1193 */ 1194 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1195 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1196 1197 /* 1198 * Clear the colors we think are loaded into Set/Reset or 1199 * the latches. 1200 */ 1201 sc->vga_curfg = sc->vga_curbg = 0xff; 1202 } 1203 1204 return (0); 1205 } 1206 1207 static bool 1208 vga_acpi_disabled(void) 1209 { 1210 #if ((defined(__amd64__) || defined(__i386__)) && defined(DEV_ACPI)) 1211 ACPI_TABLE_FADT *fadt; 1212 vm_paddr_t physaddr; 1213 uint16_t flags; 1214 1215 physaddr = acpi_find_table(ACPI_SIG_FADT); 1216 if (physaddr == 0) 1217 return (false); 1218 1219 fadt = acpi_map_table(physaddr, ACPI_SIG_FADT); 1220 if (fadt == NULL) { 1221 printf("vt_vga: unable to map FADT ACPI table\n"); 1222 return (false); 1223 } 1224 1225 flags = fadt->BootFlags; 1226 acpi_unmap_table(fadt); 1227 1228 if (flags & ACPI_FADT_NO_VGA) 1229 return (true); 1230 #endif 1231 1232 return (false); 1233 } 1234 1235 static int 1236 vga_probe(struct vt_device *vd) 1237 { 1238 1239 return (vga_acpi_disabled() ? CN_DEAD : CN_INTERNAL); 1240 } 1241 1242 static int 1243 vga_init(struct vt_device *vd) 1244 { 1245 struct vga_softc *sc; 1246 int textmode; 1247 1248 if (vd->vd_softc == NULL) 1249 vd->vd_softc = (void *)&vga_conssoftc; 1250 sc = vd->vd_softc; 1251 1252 if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 1253 vga_pci_repost(vd->vd_video_dev); 1254 1255 #if defined(__amd64__) || defined(__i386__) 1256 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1257 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1258 #else 1259 # error "Architecture not yet supported!" 1260 #endif 1261 1262 bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 1263 &sc->vga_reg_handle); 1264 1265 /* 1266 * If "hw.vga.textmode" is not set and we're running on hypervisor, 1267 * we use text mode by default, this is because when we're on 1268 * hypervisor, vt(4) is usually much slower in graphics mode than 1269 * in text mode, especially when we're on Hyper-V. 1270 */ 1271 textmode = vm_guest != VM_GUEST_NO; 1272 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1273 if (textmode) { 1274 vd->vd_flags |= VDF_TEXTMODE; 1275 vd->vd_width = 80; 1276 vd->vd_height = 25; 1277 bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 1278 &sc->vga_fb_handle); 1279 } else { 1280 vd->vd_width = VT_VGA_WIDTH; 1281 vd->vd_height = VT_VGA_HEIGHT; 1282 bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 1283 &sc->vga_fb_handle); 1284 } 1285 if (vga_initialize(vd, textmode) != 0) 1286 return (CN_DEAD); 1287 sc->vga_enabled = true; 1288 1289 return (CN_INTERNAL); 1290 } 1291 1292 static void 1293 vga_postswitch(struct vt_device *vd) 1294 { 1295 1296 /* Reinit VGA mode, to restore view after app which change mode. */ 1297 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1298 /* Ask vt(9) to update chars on visible area. */ 1299 vd->vd_flags |= VDF_INVALID; 1300 } 1301 1302 /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1303 static void 1304 vtvga_identify(driver_t *driver, device_t parent) 1305 { 1306 1307 if (!vga_conssoftc.vga_enabled) 1308 return; 1309 1310 if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1311 panic("Unable to attach vt_vga console"); 1312 } 1313 1314 static int 1315 vtvga_probe(device_t dev) 1316 { 1317 1318 device_set_desc(dev, "VT VGA driver"); 1319 1320 return (BUS_PROBE_NOWILDCARD); 1321 } 1322 1323 static int 1324 vtvga_attach(device_t dev) 1325 { 1326 struct resource *pseudo_phys_res; 1327 int res_id; 1328 1329 res_id = 0; 1330 pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1331 &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1332 VGA_MEM_SIZE, RF_ACTIVE); 1333 if (pseudo_phys_res == NULL) 1334 panic("Unable to reserve vt_vga memory"); 1335 return (0); 1336 } 1337 1338 /*-------------------- Private Device Attachment Data -----------------------*/ 1339 static device_method_t vtvga_methods[] = { 1340 /* Device interface */ 1341 DEVMETHOD(device_identify, vtvga_identify), 1342 DEVMETHOD(device_probe, vtvga_probe), 1343 DEVMETHOD(device_attach, vtvga_attach), 1344 1345 DEVMETHOD_END 1346 }; 1347 1348 DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1349 devclass_t vtvga_devclass; 1350 1351 DRIVER_MODULE(vtvga, nexus, vtvga_driver, vtvga_devclass, NULL, NULL); 1352