1 /*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include "opt_acpi.h" 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include <sys/param.h> 39 #include <sys/kernel.h> 40 #include <sys/systm.h> 41 #include <sys/bus.h> 42 #include <sys/module.h> 43 #include <sys/rman.h> 44 45 #include <dev/vt/vt.h> 46 #include <dev/vt/colors/vt_termcolors.h> 47 #include <dev/vt/hw/vga/vt_vga_reg.h> 48 #include <dev/pci/pcivar.h> 49 50 #include <machine/bus.h> 51 52 #if ((defined(__amd64__) || defined(__i386__)) && defined(DEV_ACPI)) 53 #include <contrib/dev/acpica/include/acpi.h> 54 #endif 55 56 struct vga_softc { 57 bus_space_tag_t vga_fb_tag; 58 bus_space_handle_t vga_fb_handle; 59 bus_space_tag_t vga_reg_tag; 60 bus_space_handle_t vga_reg_handle; 61 int vga_wmode; 62 term_color_t vga_curfg, vga_curbg; 63 boolean_t vga_enabled; 64 }; 65 66 /* Convenience macros. */ 67 #define MEM_READ1(sc, ofs) \ 68 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 69 #define MEM_WRITE1(sc, ofs, val) \ 70 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 71 #define REG_READ1(sc, reg) \ 72 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 73 #define REG_WRITE1(sc, reg, val) \ 74 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 75 76 #define VT_VGA_WIDTH 640 77 #define VT_VGA_HEIGHT 480 78 #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 79 80 /* 81 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 82 * memory). 83 */ 84 #define VT_VGA_PIXELS_BLOCK 8 85 86 /* 87 * We use an off-screen addresses to: 88 * o store the background color; 89 * o store pixels pattern. 90 * Those addresses are then loaded in the latches once. 91 */ 92 #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 93 94 static vd_probe_t vga_probe; 95 static vd_init_t vga_init; 96 static vd_blank_t vga_blank; 97 static vd_bitblt_text_t vga_bitblt_text; 98 static vd_bitblt_bmp_t vga_bitblt_bitmap; 99 static vd_drawrect_t vga_drawrect; 100 static vd_setpixel_t vga_setpixel; 101 static vd_postswitch_t vga_postswitch; 102 103 static const struct vt_driver vt_vga_driver = { 104 .vd_name = "vga", 105 .vd_probe = vga_probe, 106 .vd_init = vga_init, 107 .vd_blank = vga_blank, 108 .vd_bitblt_text = vga_bitblt_text, 109 .vd_bitblt_bmp = vga_bitblt_bitmap, 110 .vd_drawrect = vga_drawrect, 111 .vd_setpixel = vga_setpixel, 112 .vd_postswitch = vga_postswitch, 113 .vd_priority = VD_PRIORITY_GENERIC, 114 }; 115 116 /* 117 * Driver supports both text mode and graphics mode. Make sure the 118 * buffer is always big enough to support both. 119 */ 120 static struct vga_softc vga_conssoftc; 121 VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 122 123 static inline void 124 vga_setwmode(struct vt_device *vd, int wmode) 125 { 126 struct vga_softc *sc = vd->vd_softc; 127 128 if (sc->vga_wmode == wmode) 129 return; 130 131 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 132 REG_WRITE1(sc, VGA_GC_DATA, wmode); 133 sc->vga_wmode = wmode; 134 135 switch (wmode) { 136 case 3: 137 /* Re-enable all plans. */ 138 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 139 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 140 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 141 break; 142 } 143 } 144 145 static inline void 146 vga_setfg(struct vt_device *vd, term_color_t color) 147 { 148 struct vga_softc *sc = vd->vd_softc; 149 150 vga_setwmode(vd, 3); 151 152 if (sc->vga_curfg == color) 153 return; 154 155 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 156 REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 157 sc->vga_curfg = color; 158 } 159 160 static inline void 161 vga_setbg(struct vt_device *vd, term_color_t color) 162 { 163 struct vga_softc *sc = vd->vd_softc; 164 165 vga_setwmode(vd, 3); 166 167 if (sc->vga_curbg == color) 168 return; 169 170 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 171 REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 172 173 /* 174 * Write 8 pixels using the background color to an off-screen 175 * byte in the video memory. 176 */ 177 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 178 179 /* 180 * Read those 8 pixels back to load the background color in the 181 * latches register. 182 */ 183 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 184 185 sc->vga_curbg = color; 186 187 /* 188 * The Set/Reset register doesn't contain the fg color anymore, 189 * store an invalid color. 190 */ 191 sc->vga_curfg = 0xff; 192 } 193 194 /* 195 * Binary searchable table for Unicode to CP437 conversion. 196 */ 197 198 struct unicp437 { 199 uint16_t unicode_base; 200 uint8_t cp437_base; 201 uint8_t length; 202 }; 203 204 static const struct unicp437 cp437table[] = { 205 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 206 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 207 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 208 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 209 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 210 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 211 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 212 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 213 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 214 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 215 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 216 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 217 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 218 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 219 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 220 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 221 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 222 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 223 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 224 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 225 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 226 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 227 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 228 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 229 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 230 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 231 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 232 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 233 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 234 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 235 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 236 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 237 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 238 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 239 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 240 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 241 { 0x2013, 0x2d, 0x00 }, 242 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 243 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 244 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 245 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 246 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 247 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 248 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 249 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 250 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 251 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 252 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 253 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 254 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 255 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 256 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 257 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 258 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 259 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 260 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 261 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 262 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 263 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 264 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 265 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 266 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 267 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 268 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 269 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 270 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 271 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 272 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 273 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 274 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 275 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 276 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 277 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 278 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 279 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 280 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 281 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 282 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 283 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 284 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 285 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 286 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 287 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 288 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 289 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 290 { 0x266c, 0x0e, 0x00 }, { 0x27e8, 0x3c, 0x00 }, 291 { 0x27e9, 0x3e, 0x00 }, 292 }; 293 294 static uint8_t 295 vga_get_cp437(term_char_t c) 296 { 297 int min, mid, max; 298 299 min = 0; 300 max = nitems(cp437table) - 1; 301 302 if (c < cp437table[0].unicode_base || 303 c > cp437table[max].unicode_base + cp437table[max].length) 304 return '?'; 305 306 while (max >= min) { 307 mid = (min + max) / 2; 308 if (c < cp437table[mid].unicode_base) 309 max = mid - 1; 310 else if (c > cp437table[mid].unicode_base + 311 cp437table[mid].length) 312 min = mid + 1; 313 else 314 return (c - cp437table[mid].unicode_base + 315 cp437table[mid].cp437_base); 316 } 317 318 return '?'; 319 } 320 321 static void 322 vga_blank(struct vt_device *vd, term_color_t color) 323 { 324 struct vga_softc *sc = vd->vd_softc; 325 u_int ofs; 326 327 vga_setfg(vd, color); 328 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 329 MEM_WRITE1(sc, ofs, 0xff); 330 } 331 332 static inline void 333 vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 334 uint8_t v) 335 { 336 struct vga_softc *sc = vd->vd_softc; 337 338 /* Skip empty writes, in order to avoid palette changes. */ 339 if (v != 0x00) { 340 vga_setfg(vd, color); 341 /* 342 * When this MEM_READ1() gets disabled, all sorts of 343 * artifacts occur. This is because this read loads the 344 * set of 8 pixels that are about to be changed. There 345 * is one scenario where we can avoid the read, namely 346 * if all pixels are about to be overwritten anyway. 347 */ 348 if (v != 0xff) { 349 MEM_READ1(sc, dst); 350 351 /* The bg color was trashed by the reads. */ 352 sc->vga_curbg = 0xff; 353 } 354 MEM_WRITE1(sc, dst, v); 355 } 356 } 357 358 static void 359 vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 360 { 361 362 if (vd->vd_flags & VDF_TEXTMODE) 363 return; 364 365 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 366 0x80 >> (x % 8)); 367 } 368 369 static void 370 vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 371 term_color_t color) 372 { 373 int x, y; 374 375 if (vd->vd_flags & VDF_TEXTMODE) 376 return; 377 378 for (y = y1; y <= y2; y++) { 379 if (fill || (y == y1) || (y == y2)) { 380 for (x = x1; x <= x2; x++) 381 vga_setpixel(vd, x, y, color); 382 } else { 383 vga_setpixel(vd, x1, y, color); 384 vga_setpixel(vd, x2, y, color); 385 } 386 } 387 } 388 389 static void 390 vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 391 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 392 uint8_t *pattern, uint8_t *mask) 393 { 394 unsigned int n; 395 396 n = src_x / 8; 397 398 /* 399 * This mask has bits set, where a pixel (ether 0 or 1) 400 * comes from the source bitmap. 401 */ 402 if (mask != NULL) { 403 *mask = (0xff 404 >> (8 - x_count)) 405 << (8 - x_count - dst_x); 406 } 407 408 if (n == (src_x + x_count - 1) / 8) { 409 /* All the pixels we want are in the same byte. */ 410 *pattern = src[n]; 411 if (dst_x >= src_x) 412 *pattern >>= (dst_x - src_x % 8); 413 else 414 *pattern <<= (src_x % 8 - dst_x); 415 } else { 416 /* The pixels we want are split into two bytes. */ 417 if (dst_x >= src_x % 8) { 418 *pattern = 419 src[n] << (8 - dst_x - src_x % 8) | 420 src[n + 1] >> (dst_x - src_x % 8); 421 } else { 422 *pattern = 423 src[n] << (src_x % 8 - dst_x) | 424 src[n + 1] >> (8 - src_x % 8 - dst_x); 425 } 426 } 427 } 428 429 static void 430 vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 431 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 432 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 433 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 434 term_color_t fg, term_color_t bg, int overwrite) 435 { 436 unsigned int i, bytes; 437 uint8_t pattern, relevant_bits, mask; 438 439 bytes = (src_width + 7) / 8; 440 441 for (i = 0; i < y_count; ++i) { 442 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 443 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 444 445 if (src_mask == NULL) { 446 /* 447 * No src mask. Consider that all wanted bits 448 * from the source are "authoritative". 449 */ 450 mask = relevant_bits; 451 } else { 452 /* 453 * There's an src mask. We shift it the same way 454 * we shifted the source pattern. 455 */ 456 vga_compute_shifted_pattern( 457 src_mask + (src_y + i) * bytes, 458 bytes, src_x, x_count, dst_x, 459 &mask, NULL); 460 461 /* Now, only keep the wanted bits among them. */ 462 mask &= relevant_bits; 463 } 464 465 /* 466 * Clear bits from the pattern which must be 467 * transparent, according to the source mask. 468 */ 469 pattern &= mask; 470 471 /* Set the bits in the 2-colors array. */ 472 if (overwrite) 473 pattern_2colors[dst_y + i] &= ~mask; 474 pattern_2colors[dst_y + i] |= pattern; 475 476 if (pattern_ncolors == NULL) 477 continue; 478 479 /* 480 * Set the same bits in the n-colors array. This one 481 * supports transparency, when a given bit is cleared in 482 * all colors. 483 */ 484 if (overwrite) { 485 /* 486 * Ensure that the pixels used by this bitmap are 487 * cleared in other colors. 488 */ 489 for (int j = 0; j < 16; ++j) 490 pattern_ncolors[(dst_y + i) * 16 + j] &= 491 ~mask; 492 } 493 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 494 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 495 } 496 } 497 498 static void 499 vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 500 term_color_t fg, term_color_t bg, 501 unsigned int x, unsigned int y, unsigned int height) 502 { 503 unsigned int i, offset; 504 struct vga_softc *sc; 505 506 /* 507 * The great advantage of Write Mode 3 is that we just need 508 * to load the foreground in the Set/Reset register, load the 509 * background color in the latches register (this is done 510 * through a write in offscreen memory followed by a read of 511 * that data), then write the pattern to video memory. This 512 * pattern indicates if the pixel should use the foreground 513 * color (bit set) or the background color (bit cleared). 514 */ 515 516 vga_setbg(vd, bg); 517 vga_setfg(vd, fg); 518 519 sc = vd->vd_softc; 520 offset = (VT_VGA_WIDTH * y + x) / 8; 521 522 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 523 MEM_WRITE1(sc, offset, masks[i]); 524 } 525 } 526 527 static void 528 vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 529 unsigned int x, unsigned int y, unsigned int height) 530 { 531 unsigned int i, j, plan, color, offset; 532 struct vga_softc *sc; 533 uint8_t mask, plans[height * 4]; 534 535 sc = vd->vd_softc; 536 537 memset(plans, 0, sizeof(plans)); 538 539 /* 540 * To write a group of pixels using 3 or more colors, we select 541 * Write Mode 0 and write one byte to each plan separately. 542 */ 543 544 /* 545 * We first compute each byte: each plan contains one bit of the 546 * color code for each of the 8 pixels. 547 * 548 * For example, if the 8 pixels are like this: 549 * GBBBBBBY 550 * where: 551 * G (gray) = 0b0111 552 * B (black) = 0b0000 553 * Y (yellow) = 0b0011 554 * 555 * The corresponding for bytes are: 556 * GBBBBBBY 557 * Plan 0: 10000001 = 0x81 558 * Plan 1: 10000001 = 0x81 559 * Plan 2: 10000000 = 0x80 560 * Plan 3: 00000000 = 0x00 561 * | | | 562 * | | +-> 0b0011 (Y) 563 * | +-----> 0b0000 (B) 564 * +--------> 0b0111 (G) 565 */ 566 567 for (i = 0; i < height; ++i) { 568 for (color = 0; color < 16; ++color) { 569 mask = masks[i * 16 + color]; 570 if (mask == 0x00) 571 continue; 572 573 for (j = 0; j < 8; ++j) { 574 if (!((mask >> (7 - j)) & 0x1)) 575 continue; 576 577 /* The pixel "j" uses color "color". */ 578 for (plan = 0; plan < 4; ++plan) 579 plans[i * 4 + plan] |= 580 ((color >> plan) & 0x1) << (7 - j); 581 } 582 } 583 } 584 585 /* 586 * The bytes are ready: we now switch to Write Mode 0 and write 587 * all bytes, one plan at a time. 588 */ 589 vga_setwmode(vd, 0); 590 591 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 592 for (plan = 0; plan < 4; ++plan) { 593 /* Select plan. */ 594 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 595 596 /* Write all bytes for this plan, from Y to Y+height. */ 597 for (i = 0; i < height; ++i) { 598 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 599 MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 600 } 601 } 602 } 603 604 static void 605 vga_bitblt_one_text_pixels_block(struct vt_device *vd, 606 const struct vt_window *vw, unsigned int x, unsigned int y) 607 { 608 const struct vt_buf *vb; 609 const struct vt_font *vf; 610 unsigned int i, col, row, src_x, x_count; 611 unsigned int used_colors_list[16], used_colors; 612 uint8_t pattern_2colors[vw->vw_font->vf_height]; 613 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 614 term_char_t c; 615 term_color_t fg, bg; 616 const uint8_t *src; 617 618 vb = &vw->vw_buf; 619 vf = vw->vw_font; 620 621 /* 622 * The current pixels block. 623 * 624 * We fill it with portions of characters, because both "grids" 625 * may not match. 626 * 627 * i is the index in this pixels block. 628 */ 629 630 i = x; 631 used_colors = 0; 632 memset(used_colors_list, 0, sizeof(used_colors_list)); 633 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 634 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 635 636 if (i < vw->vw_draw_area.tr_begin.tp_col) { 637 /* 638 * i is in the margin used to center the text area on 639 * the screen. 640 */ 641 642 i = vw->vw_draw_area.tr_begin.tp_col; 643 } 644 645 while (i < x + VT_VGA_PIXELS_BLOCK && 646 i < vw->vw_draw_area.tr_end.tp_col) { 647 /* 648 * Find which character is drawn on this pixel in the 649 * pixels block. 650 * 651 * While here, record what colors it uses. 652 */ 653 654 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 655 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 656 657 c = VTBUF_GET_FIELD(vb, row, col); 658 src = vtfont_lookup(vf, c); 659 660 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 661 if ((used_colors_list[fg] & 0x1) != 0x1) 662 used_colors++; 663 if ((used_colors_list[bg] & 0x2) != 0x2) 664 used_colors++; 665 used_colors_list[fg] |= 0x1; 666 used_colors_list[bg] |= 0x2; 667 668 /* 669 * Compute the portion of the character we want to draw, 670 * because the pixels block may start in the middle of a 671 * character. 672 * 673 * The first pixel to draw in the character is 674 * the current position - 675 * the start position of the character 676 * 677 * The last pixel to draw is either 678 * - the last pixel of the character, or 679 * - the pixel of the character matching the end of 680 * the pixels block 681 * whichever comes first. This position is then 682 * changed to be relative to the start position of the 683 * character. 684 */ 685 686 src_x = i - 687 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 688 x_count = min(min( 689 (col + 1) * vf->vf_width + 690 vw->vw_draw_area.tr_begin.tp_col, 691 x + VT_VGA_PIXELS_BLOCK), 692 vw->vw_draw_area.tr_end.tp_col); 693 x_count -= col * vf->vf_width + 694 vw->vw_draw_area.tr_begin.tp_col; 695 x_count -= src_x; 696 697 /* Copy a portion of the character. */ 698 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 699 src, NULL, vf->vf_width, 700 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 701 0, 0, vf->vf_height, fg, bg, 0); 702 703 /* We move to the next portion. */ 704 i += x_count; 705 } 706 707 #ifndef SC_NO_CUTPASTE 708 /* 709 * Copy the mouse pointer bitmap if it's over the current pixels 710 * block. 711 * 712 * We use the saved cursor position (saved in vt_flush()), because 713 * the current position could be different than the one used 714 * to mark the area dirty. 715 */ 716 term_rect_t drawn_area; 717 718 drawn_area.tr_begin.tp_col = x; 719 drawn_area.tr_begin.tp_row = y; 720 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 721 drawn_area.tr_end.tp_row = y + vf->vf_height; 722 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 723 struct vt_mouse_cursor *cursor; 724 unsigned int mx, my; 725 unsigned int dst_x, src_y, dst_y, y_count; 726 727 cursor = vd->vd_mcursor; 728 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 729 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 730 731 /* Compute the portion of the cursor we want to copy. */ 732 src_x = x > mx ? x - mx : 0; 733 dst_x = mx > x ? mx - x : 0; 734 x_count = min(min(min( 735 cursor->width - src_x, 736 x + VT_VGA_PIXELS_BLOCK - mx), 737 vw->vw_draw_area.tr_end.tp_col - mx), 738 VT_VGA_PIXELS_BLOCK); 739 740 /* 741 * The cursor isn't aligned on the Y-axis with 742 * characters, so we need to compute the vertical 743 * start/count. 744 */ 745 src_y = y > my ? y - my : 0; 746 dst_y = my > y ? my - y : 0; 747 y_count = min( 748 min(cursor->height - src_y, y + vf->vf_height - my), 749 vf->vf_height); 750 751 /* Copy the cursor portion. */ 752 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 753 cursor->map, cursor->mask, cursor->width, 754 src_x, dst_x, x_count, src_y, dst_y, y_count, 755 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 756 757 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 758 used_colors++; 759 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 760 used_colors++; 761 } 762 #endif 763 764 /* 765 * The pixels block is completed, we can now draw it on the 766 * screen. 767 */ 768 if (used_colors == 2) 769 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 770 x, y, vf->vf_height); 771 else 772 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 773 x, y, vf->vf_height); 774 } 775 776 static void 777 vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 778 const term_rect_t *area) 779 { 780 const struct vt_font *vf; 781 unsigned int col, row; 782 unsigned int x1, y1, x2, y2, x, y; 783 784 vf = vw->vw_font; 785 786 /* 787 * Compute the top-left pixel position aligned with the video 788 * adapter pixels block size. 789 * 790 * This is calculated from the top-left column of te dirty area: 791 * 792 * 1. Compute the top-left pixel of the character: 793 * col * font width + x offset 794 * 795 * NOTE: x offset is used to center the text area on the 796 * screen. It's expressed in pixels, not in characters 797 * col/row! 798 * 799 * 2. Find the pixel further on the left marking the start of 800 * an aligned pixels block (eg. chunk of 8 pixels): 801 * character's x / blocksize * blocksize 802 * 803 * The division, being made on integers, achieves the 804 * alignment. 805 * 806 * For the Y-axis, we need to compute the character's y 807 * coordinate, but we don't need to align it. 808 */ 809 810 col = area->tr_begin.tp_col; 811 row = area->tr_begin.tp_row; 812 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 813 / VT_VGA_PIXELS_BLOCK) 814 * VT_VGA_PIXELS_BLOCK; 815 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 816 817 /* 818 * Compute the bottom right pixel position, again, aligned with 819 * the pixels block size. 820 * 821 * The same rules apply, we just add 1 to base the computation 822 * on the "right border" of the dirty area. 823 */ 824 825 col = area->tr_end.tp_col; 826 row = area->tr_end.tp_row; 827 x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col, 828 VT_VGA_PIXELS_BLOCK) 829 * VT_VGA_PIXELS_BLOCK; 830 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 831 832 /* Clip the area to the screen size. */ 833 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 834 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 835 836 /* 837 * Now, we take care of N pixels line at a time (the first for 838 * loop, N = font height), and for these lines, draw one pixels 839 * block at a time (the second for loop), not a character at a 840 * time. 841 * 842 * Therefore, on the X-axis, characters my be drawn partially if 843 * they are not aligned on 8-pixels boundary. 844 * 845 * However, the operation is repeated for the full height of the 846 * font before moving to the next character, because it allows 847 * to keep the color settings and write mode, before perhaps 848 * changing them with the next one. 849 */ 850 851 for (y = y1; y < y2; y += vf->vf_height) { 852 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 853 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 854 } 855 } 856 } 857 858 static void 859 vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 860 const term_rect_t *area) 861 { 862 struct vga_softc *sc; 863 const struct vt_buf *vb; 864 unsigned int col, row; 865 term_char_t c; 866 term_color_t fg, bg; 867 uint8_t ch, attr; 868 869 sc = vd->vd_softc; 870 vb = &vw->vw_buf; 871 872 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 873 for (col = area->tr_begin.tp_col; 874 col < area->tr_end.tp_col; 875 ++col) { 876 /* 877 * Get next character and its associated fg/bg 878 * colors. 879 */ 880 c = VTBUF_GET_FIELD(vb, row, col); 881 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 882 &fg, &bg); 883 884 /* 885 * Convert character to CP437, which is the 886 * character set used by the VGA hardware by 887 * default. 888 */ 889 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 890 891 /* Convert colors to VGA attributes. */ 892 attr = 893 cons_to_vga_colors[bg] << 4 | 894 cons_to_vga_colors[fg]; 895 896 MEM_WRITE1(sc, (row * 80 + col) * 2 + 0, 897 ch); 898 MEM_WRITE1(sc, (row * 80 + col) * 2 + 1, 899 attr); 900 } 901 } 902 } 903 904 static void 905 vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 906 const term_rect_t *area) 907 { 908 909 if (!(vd->vd_flags & VDF_TEXTMODE)) { 910 vga_bitblt_text_gfxmode(vd, vw, area); 911 } else { 912 vga_bitblt_text_txtmode(vd, vw, area); 913 } 914 } 915 916 static void 917 vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 918 const uint8_t *pattern, const uint8_t *mask, 919 unsigned int width, unsigned int height, 920 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 921 { 922 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 923 uint8_t pattern_2colors; 924 925 /* Align coordinates with the 8-pxels grid. */ 926 x1 = rounddown(x, VT_VGA_PIXELS_BLOCK); 927 y1 = y; 928 929 x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK); 930 y2 = y + height; 931 x2 = min(x2, vd->vd_width - 1); 932 y2 = min(y2, vd->vd_height - 1); 933 934 for (j = y1; j < y2; ++j) { 935 src_x = 0; 936 dst_x = x - x1; 937 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 938 939 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 940 pattern_2colors = 0; 941 942 vga_copy_bitmap_portion( 943 &pattern_2colors, NULL, 944 pattern, mask, width, 945 src_x, dst_x, x_count, 946 j - y1, 0, 1, fg, bg, 0); 947 948 vga_bitblt_pixels_block_2colors(vd, 949 &pattern_2colors, fg, bg, 950 i, j, 1); 951 952 src_x += x_count; 953 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 954 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 955 } 956 } 957 } 958 959 static void 960 vga_initialize_graphics(struct vt_device *vd) 961 { 962 struct vga_softc *sc = vd->vd_softc; 963 964 /* Clock select. */ 965 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 966 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 967 /* Set sequencer clocking and memory mode. */ 968 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 969 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 970 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 971 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 972 973 /* Set the graphics controller in graphics mode. */ 974 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 975 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 976 /* Program the CRT controller. */ 977 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 978 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 979 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 980 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 981 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 982 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 983 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 984 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 985 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 986 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 987 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 988 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 989 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 990 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 991 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 992 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 993 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 994 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 995 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 996 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 997 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 998 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 999 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 1000 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 1001 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 1002 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 1003 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 1004 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 1005 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 1006 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 1007 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 1008 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1009 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1010 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1011 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1012 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1013 1014 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1015 1016 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1017 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1018 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1019 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1020 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1021 1022 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1023 REG_WRITE1(sc, VGA_GC_DATA, 0); 1024 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1025 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1026 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1027 REG_WRITE1(sc, VGA_GC_DATA, 0); 1028 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1029 REG_WRITE1(sc, VGA_GC_DATA, 0); 1030 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1031 REG_WRITE1(sc, VGA_GC_DATA, 0); 1032 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1033 REG_WRITE1(sc, VGA_GC_DATA, 0); 1034 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1035 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1036 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1037 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1038 } 1039 1040 static int 1041 vga_initialize(struct vt_device *vd, int textmode) 1042 { 1043 struct vga_softc *sc = vd->vd_softc; 1044 uint8_t x; 1045 int timeout; 1046 1047 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1048 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1049 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1050 1051 /* Unprotect CRTC registers 0-7. */ 1052 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1053 x = REG_READ1(sc, VGA_CRTC_DATA); 1054 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1055 1056 /* 1057 * Wait for the vertical retrace. 1058 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1059 * the side-effect of clearing the internal flip-flip of the attribute 1060 * controller's write register. This means that because this code is 1061 * here, we know for sure that the first write to the attribute 1062 * controller will be a write to the address register. Removing this 1063 * code therefore also removes that guarantee and appropriate measures 1064 * need to be taken. 1065 */ 1066 timeout = 10000; 1067 do { 1068 DELAY(10); 1069 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1070 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1071 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1072 if (timeout == 0) { 1073 printf("Timeout initializing vt_vga\n"); 1074 return (ENXIO); 1075 } 1076 1077 /* Now, disable the sync. signals. */ 1078 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1079 x = REG_READ1(sc, VGA_CRTC_DATA); 1080 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1081 1082 /* Asynchronous sequencer reset. */ 1083 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1084 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1085 1086 if (!textmode) 1087 vga_initialize_graphics(vd); 1088 1089 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1090 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1091 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1092 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1093 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1094 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1095 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1096 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1097 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1098 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1099 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1100 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1101 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1102 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1103 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1104 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1105 1106 if (textmode) { 1107 /* Set the attribute controller to blink disable. */ 1108 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1109 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1110 } else { 1111 /* Set the attribute controller in graphics mode. */ 1112 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1113 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1114 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1115 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1116 } 1117 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1118 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1119 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1120 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1121 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1122 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1123 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1124 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1125 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1126 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1127 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1128 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1129 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1130 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1131 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1132 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1133 1134 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1135 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1136 VGA_AC_PAL_SB); 1137 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1138 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1139 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1140 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1141 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1142 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1143 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1144 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1145 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1146 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1147 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1148 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1149 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1150 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1151 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1152 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1153 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1154 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1155 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1156 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1157 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1158 1159 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1160 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1161 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1162 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1163 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1164 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1165 1166 if (!textmode) { 1167 u_int ofs; 1168 1169 /* 1170 * Done. Clear the frame buffer. All bit planes are 1171 * enabled, so a single-paged loop should clear all 1172 * planes. 1173 */ 1174 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1175 MEM_WRITE1(sc, ofs, 0); 1176 } 1177 } 1178 1179 /* Re-enable the sequencer. */ 1180 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1181 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1182 /* Re-enable the sync signals. */ 1183 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1184 x = REG_READ1(sc, VGA_CRTC_DATA); 1185 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1186 1187 if (!textmode) { 1188 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1189 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1190 REG_WRITE1(sc, VGA_GC_DATA, 3); 1191 sc->vga_wmode = 3; 1192 1193 /* 1194 * In Write Mode 3, Enable Set/Reset is ignored, but we 1195 * use Write Mode 0 to write a group of 8 pixels using 1196 * 3 or more colors. In this case, we want to disable 1197 * Set/Reset: set Enable Set/Reset to 0. 1198 */ 1199 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1200 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1201 1202 /* 1203 * Clear the colors we think are loaded into Set/Reset or 1204 * the latches. 1205 */ 1206 sc->vga_curfg = sc->vga_curbg = 0xff; 1207 } 1208 1209 return (0); 1210 } 1211 1212 static bool 1213 vga_acpi_disabled(void) 1214 { 1215 #if ((defined(__amd64__) || defined(__i386__)) && defined(DEV_ACPI)) 1216 ACPI_TABLE_FADT *fadt; 1217 vm_paddr_t physaddr; 1218 uint16_t flags; 1219 1220 physaddr = acpi_find_table(ACPI_SIG_FADT); 1221 if (physaddr == 0) 1222 return (false); 1223 1224 fadt = acpi_map_table(physaddr, ACPI_SIG_FADT); 1225 if (fadt == NULL) { 1226 printf("vt_vga: unable to map FADT ACPI table\n"); 1227 return (false); 1228 } 1229 1230 flags = fadt->BootFlags; 1231 acpi_unmap_table(fadt); 1232 1233 if (flags & ACPI_FADT_NO_VGA) 1234 return (true); 1235 #endif 1236 1237 return (false); 1238 } 1239 1240 static int 1241 vga_probe(struct vt_device *vd) 1242 { 1243 1244 return (vga_acpi_disabled() ? CN_DEAD : CN_INTERNAL); 1245 } 1246 1247 static int 1248 vga_init(struct vt_device *vd) 1249 { 1250 struct vga_softc *sc; 1251 int textmode; 1252 1253 if (vd->vd_softc == NULL) 1254 vd->vd_softc = (void *)&vga_conssoftc; 1255 sc = vd->vd_softc; 1256 1257 if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 1258 vga_pci_repost(vd->vd_video_dev); 1259 1260 #if defined(__amd64__) || defined(__i386__) 1261 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1262 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1263 #else 1264 # error "Architecture not yet supported!" 1265 #endif 1266 1267 bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 1268 &sc->vga_reg_handle); 1269 1270 /* 1271 * If "hw.vga.textmode" is not set and we're running on hypervisor, 1272 * we use text mode by default, this is because when we're on 1273 * hypervisor, vt(4) is usually much slower in graphics mode than 1274 * in text mode, especially when we're on Hyper-V. 1275 */ 1276 textmode = vm_guest != VM_GUEST_NO; 1277 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1278 if (textmode) { 1279 vd->vd_flags |= VDF_TEXTMODE; 1280 vd->vd_width = 80; 1281 vd->vd_height = 25; 1282 bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 1283 &sc->vga_fb_handle); 1284 } else { 1285 vd->vd_width = VT_VGA_WIDTH; 1286 vd->vd_height = VT_VGA_HEIGHT; 1287 bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 1288 &sc->vga_fb_handle); 1289 } 1290 if (vga_initialize(vd, textmode) != 0) 1291 return (CN_DEAD); 1292 sc->vga_enabled = true; 1293 1294 return (CN_INTERNAL); 1295 } 1296 1297 static void 1298 vga_postswitch(struct vt_device *vd) 1299 { 1300 1301 /* Reinit VGA mode, to restore view after app which change mode. */ 1302 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1303 /* Ask vt(9) to update chars on visible area. */ 1304 vd->vd_flags |= VDF_INVALID; 1305 } 1306 1307 /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1308 static void 1309 vtvga_identify(driver_t *driver, device_t parent) 1310 { 1311 1312 if (!vga_conssoftc.vga_enabled) 1313 return; 1314 1315 if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1316 panic("Unable to attach vt_vga console"); 1317 } 1318 1319 static int 1320 vtvga_probe(device_t dev) 1321 { 1322 1323 device_set_desc(dev, "VT VGA driver"); 1324 1325 return (BUS_PROBE_NOWILDCARD); 1326 } 1327 1328 static int 1329 vtvga_attach(device_t dev) 1330 { 1331 struct resource *pseudo_phys_res; 1332 int res_id; 1333 1334 res_id = 0; 1335 pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1336 &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1337 VGA_MEM_SIZE, RF_ACTIVE); 1338 if (pseudo_phys_res == NULL) 1339 panic("Unable to reserve vt_vga memory"); 1340 return (0); 1341 } 1342 1343 /*-------------------- Private Device Attachment Data -----------------------*/ 1344 static device_method_t vtvga_methods[] = { 1345 /* Device interface */ 1346 DEVMETHOD(device_identify, vtvga_identify), 1347 DEVMETHOD(device_probe, vtvga_probe), 1348 DEVMETHOD(device_attach, vtvga_attach), 1349 1350 DEVMETHOD_END 1351 }; 1352 1353 DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1354 devclass_t vtvga_devclass; 1355 1356 DRIVER_MODULE(vtvga, nexus, vtvga_driver, vtvga_devclass, NULL, NULL); 1357