1 /*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include "opt_acpi.h" 34 35 #include <sys/param.h> 36 #include <sys/kernel.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/module.h> 40 #include <sys/rman.h> 41 42 #include <dev/vt/vt.h> 43 #include <dev/vt/colors/vt_termcolors.h> 44 #include <dev/vt/hw/vga/vt_vga_reg.h> 45 #include <dev/pci/pcivar.h> 46 47 #include <machine/bus.h> 48 #if defined(__amd64__) || defined(__i386__) 49 #include <contrib/dev/acpica/include/acpi.h> 50 #include <machine/md_var.h> 51 #endif 52 53 struct vga_softc { 54 bus_space_tag_t vga_fb_tag; 55 bus_space_handle_t vga_fb_handle; 56 bus_space_tag_t vga_reg_tag; 57 bus_space_handle_t vga_reg_handle; 58 int vga_wmode; 59 term_color_t vga_curfg, vga_curbg; 60 boolean_t vga_enabled; 61 }; 62 63 /* Convenience macros. */ 64 #define MEM_READ1(sc, ofs) \ 65 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 66 #define MEM_WRITE1(sc, ofs, val) \ 67 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 68 #define MEM_WRITE2(sc, ofs, val) \ 69 bus_space_write_2(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 70 #define REG_READ1(sc, reg) \ 71 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 72 #define REG_WRITE1(sc, reg, val) \ 73 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 74 75 #define VT_VGA_WIDTH 640 76 #define VT_VGA_HEIGHT 480 77 #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 78 79 /* 80 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 81 * memory). 82 */ 83 #define VT_VGA_PIXELS_BLOCK 8 84 85 /* 86 * We use an off-screen addresses to: 87 * o store the background color; 88 * o store pixels pattern. 89 * Those addresses are then loaded in the latches once. 90 */ 91 #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 92 93 static vd_probe_t vga_probe; 94 static vd_init_t vga_init; 95 static vd_blank_t vga_blank; 96 static vd_bitblt_text_t vga_bitblt_text; 97 static vd_invalidate_text_t vga_invalidate_text; 98 static vd_bitblt_bmp_t vga_bitblt_bitmap; 99 static vd_bitblt_argb_t vga_bitblt_argb; 100 static vd_drawrect_t vga_drawrect; 101 static vd_setpixel_t vga_setpixel; 102 static vd_postswitch_t vga_postswitch; 103 104 static const struct vt_driver vt_vga_driver = { 105 .vd_name = "vga", 106 .vd_probe = vga_probe, 107 .vd_init = vga_init, 108 .vd_blank = vga_blank, 109 .vd_bitblt_text = vga_bitblt_text, 110 .vd_invalidate_text = vga_invalidate_text, 111 .vd_bitblt_bmp = vga_bitblt_bitmap, 112 .vd_bitblt_argb = vga_bitblt_argb, 113 .vd_drawrect = vga_drawrect, 114 .vd_setpixel = vga_setpixel, 115 .vd_postswitch = vga_postswitch, 116 .vd_priority = VD_PRIORITY_GENERIC, 117 }; 118 119 /* 120 * Driver supports both text mode and graphics mode. Make sure the 121 * buffer is always big enough to support both. 122 */ 123 static struct vga_softc vga_conssoftc; 124 VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 125 126 static inline void 127 vga_setwmode(struct vt_device *vd, int wmode) 128 { 129 struct vga_softc *sc = vd->vd_softc; 130 131 if (sc->vga_wmode == wmode) 132 return; 133 134 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 135 REG_WRITE1(sc, VGA_GC_DATA, wmode); 136 sc->vga_wmode = wmode; 137 138 switch (wmode) { 139 case 3: 140 /* Re-enable all planes. */ 141 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 142 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 143 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 144 break; 145 } 146 } 147 148 static inline void 149 vga_setfg(struct vt_device *vd, term_color_t color) 150 { 151 struct vga_softc *sc = vd->vd_softc; 152 153 vga_setwmode(vd, 3); 154 155 if (sc->vga_curfg == color) 156 return; 157 158 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 159 REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 160 sc->vga_curfg = color; 161 } 162 163 static inline void 164 vga_setbg(struct vt_device *vd, term_color_t color) 165 { 166 struct vga_softc *sc = vd->vd_softc; 167 168 vga_setwmode(vd, 3); 169 170 if (sc->vga_curbg == color) 171 return; 172 173 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 174 REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 175 176 /* 177 * Write 8 pixels using the background color to an off-screen 178 * byte in the video memory. 179 */ 180 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 181 182 /* 183 * Read those 8 pixels back to load the background color in the 184 * latches register. 185 */ 186 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 187 188 sc->vga_curbg = color; 189 190 /* 191 * The Set/Reset register doesn't contain the fg color anymore, 192 * store an invalid color. 193 */ 194 sc->vga_curfg = 0xff; 195 } 196 197 /* 198 * Binary searchable table for Unicode to CP437 conversion. 199 */ 200 201 struct unicp437 { 202 uint16_t unicode_base; 203 uint8_t cp437_base; 204 uint8_t length; 205 }; 206 207 static const struct unicp437 cp437table[] = { 208 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 209 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 210 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 211 { 0x00a6, 0x7c, 0x00 }, 212 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 213 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 214 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 215 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 216 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 217 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 218 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 219 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 220 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 221 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 222 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 223 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 224 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 225 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 226 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 227 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 228 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 229 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 230 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 231 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 232 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 233 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 234 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 235 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 236 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 237 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 238 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 239 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 240 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 241 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 242 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 243 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 244 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 245 { 0x2013, 0x2d, 0x00 }, 246 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 247 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 248 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 249 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 250 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 251 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 252 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 253 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 254 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 255 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 256 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 257 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 258 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 259 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 260 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 261 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 262 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 263 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 264 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 265 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 266 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 267 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 268 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 269 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 270 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 271 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 272 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 273 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 274 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 275 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 276 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 277 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 278 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 279 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 280 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 281 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 282 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 283 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 284 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 285 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 286 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 287 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 288 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 289 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 290 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 291 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 292 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 293 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 294 { 0x266c, 0x0e, 0x00 }, { 0x2713, 0xfb, 0x00 }, 295 { 0x27e8, 0x3c, 0x00 }, { 0x27e9, 0x3e, 0x00 }, 296 }; 297 298 static uint8_t 299 vga_get_cp437(term_char_t c) 300 { 301 int min, mid, max; 302 303 min = 0; 304 max = nitems(cp437table) - 1; 305 306 if (c < cp437table[0].unicode_base || 307 c > cp437table[max].unicode_base + cp437table[max].length) 308 return '?'; 309 310 while (max >= min) { 311 mid = (min + max) / 2; 312 if (c < cp437table[mid].unicode_base) 313 max = mid - 1; 314 else if (c > cp437table[mid].unicode_base + 315 cp437table[mid].length) 316 min = mid + 1; 317 else 318 return (c - cp437table[mid].unicode_base + 319 cp437table[mid].cp437_base); 320 } 321 322 return '?'; 323 } 324 325 static void 326 vga_blank(struct vt_device *vd, term_color_t color) 327 { 328 struct vga_softc *sc = vd->vd_softc; 329 u_int ofs; 330 331 vga_setfg(vd, color); 332 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 333 MEM_WRITE1(sc, ofs, 0xff); 334 } 335 336 static inline void 337 vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 338 uint8_t v) 339 { 340 struct vga_softc *sc = vd->vd_softc; 341 342 /* Skip empty writes, in order to avoid palette changes. */ 343 if (v != 0x00) { 344 vga_setfg(vd, color); 345 /* 346 * When this MEM_READ1() gets disabled, all sorts of 347 * artifacts occur. This is because this read loads the 348 * set of 8 pixels that are about to be changed. There 349 * is one scenario where we can avoid the read, namely 350 * if all pixels are about to be overwritten anyway. 351 */ 352 if (v != 0xff) { 353 MEM_READ1(sc, dst); 354 355 /* The bg color was trashed by the reads. */ 356 sc->vga_curbg = 0xff; 357 } 358 MEM_WRITE1(sc, dst, v); 359 } 360 } 361 362 static void 363 vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 364 { 365 366 if (vd->vd_flags & VDF_TEXTMODE) 367 return; 368 369 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 370 0x80 >> (x % 8)); 371 } 372 373 static void 374 vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 375 term_color_t color) 376 { 377 int x, y; 378 379 if (vd->vd_flags & VDF_TEXTMODE) 380 return; 381 382 for (y = y1; y <= y2; y++) { 383 if (fill || (y == y1) || (y == y2)) { 384 for (x = x1; x <= x2; x++) 385 vga_setpixel(vd, x, y, color); 386 } else { 387 vga_setpixel(vd, x1, y, color); 388 vga_setpixel(vd, x2, y, color); 389 } 390 } 391 } 392 393 static void 394 vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 395 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 396 uint8_t *pattern, uint8_t *mask) 397 { 398 unsigned int n; 399 400 n = src_x / 8; 401 402 /* 403 * This mask has bits set, where a pixel (ether 0 or 1) 404 * comes from the source bitmap. 405 */ 406 if (mask != NULL) { 407 *mask = (0xff 408 >> (8 - x_count)) 409 << (8 - x_count - dst_x); 410 } 411 412 if (n == (src_x + x_count - 1) / 8) { 413 /* All the pixels we want are in the same byte. */ 414 *pattern = src[n]; 415 if (dst_x >= src_x) 416 *pattern >>= (dst_x - src_x % 8); 417 else 418 *pattern <<= (src_x % 8 - dst_x); 419 } else { 420 /* The pixels we want are split into two bytes. */ 421 if (dst_x >= src_x % 8) { 422 *pattern = 423 src[n] << (8 - dst_x - src_x % 8) | 424 src[n + 1] >> (dst_x - src_x % 8); 425 } else { 426 *pattern = 427 src[n] << (src_x % 8 - dst_x) | 428 src[n + 1] >> (8 - src_x % 8 - dst_x); 429 } 430 } 431 } 432 433 static void 434 vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 435 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 436 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 437 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 438 term_color_t fg, term_color_t bg, int overwrite) 439 { 440 unsigned int i, bytes; 441 uint8_t pattern, relevant_bits, mask; 442 443 bytes = (src_width + 7) / 8; 444 445 for (i = 0; i < y_count; ++i) { 446 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 447 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 448 449 if (src_mask == NULL) { 450 /* 451 * No src mask. Consider that all wanted bits 452 * from the source are "authoritative". 453 */ 454 mask = relevant_bits; 455 } else { 456 /* 457 * There's an src mask. We shift it the same way 458 * we shifted the source pattern. 459 */ 460 vga_compute_shifted_pattern( 461 src_mask + (src_y + i) * bytes, 462 bytes, src_x, x_count, dst_x, 463 &mask, NULL); 464 465 /* Now, only keep the wanted bits among them. */ 466 mask &= relevant_bits; 467 } 468 469 /* 470 * Clear bits from the pattern which must be 471 * transparent, according to the source mask. 472 */ 473 pattern &= mask; 474 475 /* Set the bits in the 2-colors array. */ 476 if (overwrite) 477 pattern_2colors[dst_y + i] &= ~mask; 478 pattern_2colors[dst_y + i] |= pattern; 479 480 if (pattern_ncolors == NULL) 481 continue; 482 483 /* 484 * Set the same bits in the n-colors array. This one 485 * supports transparency, when a given bit is cleared in 486 * all colors. 487 */ 488 if (overwrite) { 489 /* 490 * Ensure that the pixels used by this bitmap are 491 * cleared in other colors. 492 */ 493 for (int j = 0; j < 16; ++j) 494 pattern_ncolors[(dst_y + i) * 16 + j] &= 495 ~mask; 496 } 497 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 498 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 499 } 500 } 501 502 static void 503 vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 504 term_color_t fg, term_color_t bg, 505 unsigned int x, unsigned int y, unsigned int height) 506 { 507 unsigned int i, offset; 508 struct vga_softc *sc; 509 510 /* 511 * The great advantage of Write Mode 3 is that we just need 512 * to load the foreground in the Set/Reset register, load the 513 * background color in the latches register (this is done 514 * through a write in offscreen memory followed by a read of 515 * that data), then write the pattern to video memory. This 516 * pattern indicates if the pixel should use the foreground 517 * color (bit set) or the background color (bit cleared). 518 */ 519 520 vga_setbg(vd, bg); 521 vga_setfg(vd, fg); 522 523 sc = vd->vd_softc; 524 offset = (VT_VGA_WIDTH * y + x) / 8; 525 526 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 527 MEM_WRITE1(sc, offset, masks[i]); 528 } 529 } 530 531 static void 532 vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 533 unsigned int x, unsigned int y, unsigned int height) 534 { 535 unsigned int i, j, plane, color, offset; 536 struct vga_softc *sc; 537 uint8_t mask, planes[height * 4]; 538 539 sc = vd->vd_softc; 540 541 memset(planes, 0, sizeof(planes)); 542 543 /* 544 * To write a group of pixels using 3 or more colors, we select 545 * Write Mode 0 and write one byte to each plane separately. 546 */ 547 548 /* 549 * We first compute each byte: each plane contains one bit of the 550 * color code for each of the 8 pixels. 551 * 552 * For example, if the 8 pixels are like this: 553 * GBBBBBBY 554 * where: 555 * G (gray) = 0b0111 556 * B (black) = 0b0000 557 * Y (yellow) = 0b0011 558 * 559 * The corresponding for bytes are: 560 * GBBBBBBY 561 * Plane 0: 10000001 = 0x81 562 * Plane 1: 10000001 = 0x81 563 * Plane 2: 10000000 = 0x80 564 * Plane 3: 00000000 = 0x00 565 * | | | 566 * | | +-> 0b0011 (Y) 567 * | +-----> 0b0000 (B) 568 * +--------> 0b0111 (G) 569 */ 570 571 for (i = 0; i < height; ++i) { 572 for (color = 0; color < 16; ++color) { 573 mask = masks[i * 16 + color]; 574 if (mask == 0x00) 575 continue; 576 577 for (j = 0; j < 8; ++j) { 578 if (!((mask >> (7 - j)) & 0x1)) 579 continue; 580 581 /* The pixel "j" uses color "color". */ 582 for (plane = 0; plane < 4; ++plane) 583 planes[i * 4 + plane] |= 584 ((cons_to_vga_colors[color] >> 585 plane) & 0x1) << (7 - j); 586 } 587 } 588 } 589 590 /* 591 * The bytes are ready: we now switch to Write Mode 0 and write 592 * all bytes, one plane at a time. 593 */ 594 vga_setwmode(vd, 0); 595 596 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 597 for (plane = 0; plane < 4; ++plane) { 598 /* Select plane. */ 599 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plane); 600 601 /* Write all bytes for this plane, from Y to Y+height. */ 602 for (i = 0; i < height; ++i) { 603 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 604 MEM_WRITE1(sc, offset, planes[i * 4 + plane]); 605 } 606 } 607 } 608 609 static void 610 vga_bitblt_one_text_pixels_block(struct vt_device *vd, 611 const struct vt_window *vw, unsigned int x, unsigned int y) 612 { 613 const struct vt_buf *vb; 614 const struct vt_font *vf; 615 unsigned int i, col, row, src_x, x_count; 616 unsigned int used_colors_list[16], used_colors; 617 uint8_t pattern_2colors[vw->vw_font->vf_height]; 618 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 619 term_char_t c; 620 term_color_t fg, bg; 621 const uint8_t *src; 622 623 vb = &vw->vw_buf; 624 vf = vw->vw_font; 625 626 /* 627 * The current pixels block. 628 * 629 * We fill it with portions of characters, because both "grids" 630 * may not match. 631 * 632 * i is the index in this pixels block. 633 */ 634 635 i = x; 636 used_colors = 0; 637 memset(used_colors_list, 0, sizeof(used_colors_list)); 638 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 639 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 640 641 if (i < vw->vw_draw_area.tr_begin.tp_col) { 642 /* 643 * i is in the margin used to center the text area on 644 * the screen. 645 */ 646 647 i = vw->vw_draw_area.tr_begin.tp_col; 648 } 649 650 while (i < x + VT_VGA_PIXELS_BLOCK && 651 i < vw->vw_draw_area.tr_end.tp_col) { 652 /* 653 * Find which character is drawn on this pixel in the 654 * pixels block. 655 * 656 * While here, record what colors it uses. 657 */ 658 659 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 660 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 661 662 c = VTBUF_GET_FIELD(vb, row, col); 663 src = vtfont_lookup(vf, c); 664 665 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 666 if ((used_colors_list[fg] & 0x1) != 0x1) 667 used_colors++; 668 if ((used_colors_list[bg] & 0x2) != 0x2) 669 used_colors++; 670 used_colors_list[fg] |= 0x1; 671 used_colors_list[bg] |= 0x2; 672 673 /* 674 * Compute the portion of the character we want to draw, 675 * because the pixels block may start in the middle of a 676 * character. 677 * 678 * The first pixel to draw in the character is 679 * the current position - 680 * the start position of the character 681 * 682 * The last pixel to draw is either 683 * - the last pixel of the character, or 684 * - the pixel of the character matching the end of 685 * the pixels block 686 * whichever comes first. This position is then 687 * changed to be relative to the start position of the 688 * character. 689 */ 690 691 src_x = i - 692 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 693 x_count = min(min( 694 (col + 1) * vf->vf_width + 695 vw->vw_draw_area.tr_begin.tp_col, 696 x + VT_VGA_PIXELS_BLOCK), 697 vw->vw_draw_area.tr_end.tp_col); 698 x_count -= col * vf->vf_width + 699 vw->vw_draw_area.tr_begin.tp_col; 700 x_count -= src_x; 701 702 /* Copy a portion of the character. */ 703 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 704 src, NULL, vf->vf_width, 705 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 706 0, 0, vf->vf_height, fg, bg, 0); 707 708 /* We move to the next portion. */ 709 i += x_count; 710 } 711 712 #ifndef SC_NO_CUTPASTE 713 /* 714 * Copy the mouse pointer bitmap if it's over the current pixels 715 * block. 716 * 717 * We use the saved cursor position (saved in vt_flush()), because 718 * the current position could be different than the one used 719 * to mark the area dirty. 720 */ 721 term_rect_t drawn_area; 722 723 drawn_area.tr_begin.tp_col = x; 724 drawn_area.tr_begin.tp_row = y; 725 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 726 drawn_area.tr_end.tp_row = y + vf->vf_height; 727 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 728 struct vt_mouse_cursor *cursor; 729 unsigned int mx, my; 730 unsigned int dst_x, src_y, dst_y, y_count; 731 732 cursor = vd->vd_mcursor; 733 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 734 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 735 736 /* Compute the portion of the cursor we want to copy. */ 737 src_x = x > mx ? x - mx : 0; 738 dst_x = mx > x ? mx - x : 0; 739 x_count = min(min(min( 740 cursor->width - src_x, 741 x + VT_VGA_PIXELS_BLOCK - mx), 742 vw->vw_draw_area.tr_end.tp_col - mx), 743 VT_VGA_PIXELS_BLOCK); 744 745 /* 746 * The cursor isn't aligned on the Y-axis with 747 * characters, so we need to compute the vertical 748 * start/count. 749 */ 750 src_y = y > my ? y - my : 0; 751 dst_y = my > y ? my - y : 0; 752 y_count = min( 753 min(cursor->height - src_y, y + vf->vf_height - my), 754 vf->vf_height); 755 756 /* Copy the cursor portion. */ 757 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 758 cursor->map, cursor->mask, cursor->width, 759 src_x, dst_x, x_count, src_y, dst_y, y_count, 760 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 761 762 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 763 used_colors++; 764 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 765 used_colors++; 766 } 767 #endif 768 769 /* 770 * The pixels block is completed, we can now draw it on the 771 * screen. 772 */ 773 if (used_colors == 2) 774 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 775 x, y, vf->vf_height); 776 else 777 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 778 x, y, vf->vf_height); 779 } 780 781 static void 782 vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 783 const term_rect_t *area) 784 { 785 const struct vt_font *vf; 786 unsigned int col, row; 787 unsigned int x1, y1, x2, y2, x, y; 788 789 vf = vw->vw_font; 790 791 /* 792 * Compute the top-left pixel position aligned with the video 793 * adapter pixels block size. 794 * 795 * This is calculated from the top-left column of te dirty area: 796 * 797 * 1. Compute the top-left pixel of the character: 798 * col * font width + x offset 799 * 800 * NOTE: x offset is used to center the text area on the 801 * screen. It's expressed in pixels, not in characters 802 * col/row! 803 * 804 * 2. Find the pixel further on the left marking the start of 805 * an aligned pixels block (eg. chunk of 8 pixels): 806 * character's x / blocksize * blocksize 807 * 808 * The division, being made on integers, achieves the 809 * alignment. 810 * 811 * For the Y-axis, we need to compute the character's y 812 * coordinate, but we don't need to align it. 813 */ 814 815 col = area->tr_begin.tp_col; 816 row = area->tr_begin.tp_row; 817 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 818 / VT_VGA_PIXELS_BLOCK) 819 * VT_VGA_PIXELS_BLOCK; 820 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 821 822 /* 823 * Compute the bottom right pixel position, again, aligned with 824 * the pixels block size. 825 * 826 * The same rules apply, we just add 1 to base the computation 827 * on the "right border" of the dirty area. 828 */ 829 830 col = area->tr_end.tp_col; 831 row = area->tr_end.tp_row; 832 x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col, 833 VT_VGA_PIXELS_BLOCK) 834 * VT_VGA_PIXELS_BLOCK; 835 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 836 837 /* Clip the area to the screen size. */ 838 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 839 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 840 841 /* 842 * Now, we take care of N pixels line at a time (the first for 843 * loop, N = font height), and for these lines, draw one pixels 844 * block at a time (the second for loop), not a character at a 845 * time. 846 * 847 * Therefore, on the X-axis, characters my be drawn partially if 848 * they are not aligned on 8-pixels boundary. 849 * 850 * However, the operation is repeated for the full height of the 851 * font before moving to the next character, because it allows 852 * to keep the color settings and write mode, before perhaps 853 * changing them with the next one. 854 */ 855 856 for (y = y1; y < y2; y += vf->vf_height) { 857 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 858 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 859 } 860 } 861 } 862 863 static void 864 vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 865 const term_rect_t *area) 866 { 867 struct vga_softc *sc; 868 const struct vt_buf *vb; 869 unsigned int col, row; 870 term_char_t c; 871 term_color_t fg, bg; 872 uint8_t ch, attr; 873 size_t z; 874 875 sc = vd->vd_softc; 876 vb = &vw->vw_buf; 877 878 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 879 for (col = area->tr_begin.tp_col; 880 col < area->tr_end.tp_col; 881 ++col) { 882 /* 883 * Get next character and its associated fg/bg 884 * colors. 885 */ 886 c = VTBUF_GET_FIELD(vb, row, col); 887 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 888 &fg, &bg); 889 890 z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col; 891 if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) * 892 PIXEL_WIDTH(VT_FB_MAX_WIDTH)) 893 continue; 894 if (vd->vd_drawn && (vd->vd_drawn[z] == c) && 895 vd->vd_drawnfg && (vd->vd_drawnfg[z] == fg) && 896 vd->vd_drawnbg && (vd->vd_drawnbg[z] == bg)) 897 continue; 898 899 /* 900 * Convert character to CP437, which is the 901 * character set used by the VGA hardware by 902 * default. 903 */ 904 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 905 906 /* Convert colors to VGA attributes. */ 907 attr = 908 cons_to_vga_colors[bg] << 4 | 909 cons_to_vga_colors[fg]; 910 911 MEM_WRITE2(sc, (row * 80 + col) * 2 + 0, 912 ch + ((uint16_t)(attr) << 8)); 913 914 if (vd->vd_drawn) 915 vd->vd_drawn[z] = c; 916 if (vd->vd_drawnfg) 917 vd->vd_drawnfg[z] = fg; 918 if (vd->vd_drawnbg) 919 vd->vd_drawnbg[z] = bg; 920 } 921 } 922 } 923 924 static void 925 vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 926 const term_rect_t *area) 927 { 928 929 if (!(vd->vd_flags & VDF_TEXTMODE)) { 930 vga_bitblt_text_gfxmode(vd, vw, area); 931 } else { 932 vga_bitblt_text_txtmode(vd, vw, area); 933 } 934 } 935 936 void 937 vga_invalidate_text(struct vt_device *vd, const term_rect_t *area) 938 { 939 unsigned int col, row; 940 size_t z; 941 942 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 943 for (col = area->tr_begin.tp_col; 944 col < area->tr_end.tp_col; 945 ++col) { 946 z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col; 947 if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) * 948 PIXEL_WIDTH(VT_FB_MAX_WIDTH)) 949 continue; 950 if (vd->vd_drawn) 951 vd->vd_drawn[z] = 0; 952 if (vd->vd_drawnfg) 953 vd->vd_drawnfg[z] = 0; 954 if (vd->vd_drawnbg) 955 vd->vd_drawnbg[z] = 0; 956 } 957 } 958 } 959 960 static void 961 vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 962 const uint8_t *pattern, const uint8_t *mask, 963 unsigned int width, unsigned int height, 964 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 965 { 966 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 967 uint8_t pattern_2colors; 968 969 /* Align coordinates with the 8-pxels grid. */ 970 x1 = rounddown(x, VT_VGA_PIXELS_BLOCK); 971 y1 = y; 972 973 x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK); 974 y2 = y + height; 975 x2 = min(x2, vd->vd_width - 1); 976 y2 = min(y2, vd->vd_height - 1); 977 978 for (j = y1; j < y2; ++j) { 979 src_x = 0; 980 dst_x = x - x1; 981 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 982 983 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 984 pattern_2colors = 0; 985 986 vga_copy_bitmap_portion( 987 &pattern_2colors, NULL, 988 pattern, mask, width, 989 src_x, dst_x, x_count, 990 j - y1, 0, 1, fg, bg, 0); 991 992 vga_bitblt_pixels_block_2colors(vd, 993 &pattern_2colors, fg, bg, 994 i, j, 1); 995 996 src_x += x_count; 997 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 998 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 999 } 1000 } 1001 } 1002 1003 static int 1004 vga_bitblt_argb(struct vt_device *vd, const struct vt_window *vw, 1005 const uint8_t *argb, 1006 unsigned int width, unsigned int height, 1007 unsigned int x, unsigned int y) 1008 { 1009 1010 return (EOPNOTSUPP); 1011 } 1012 1013 static void 1014 vga_initialize_graphics(struct vt_device *vd) 1015 { 1016 struct vga_softc *sc = vd->vd_softc; 1017 1018 /* Clock select. */ 1019 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 1020 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 1021 /* Set sequencer clocking and memory mode. */ 1022 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 1023 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 1024 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 1025 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 1026 1027 /* Set the graphics controller in graphics mode. */ 1028 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 1029 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 1030 /* Program the CRT controller. */ 1031 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 1032 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 1033 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 1034 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 1035 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 1036 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 1037 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 1038 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 1039 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 1040 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 1041 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 1042 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 1043 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 1044 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 1045 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 1046 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 1047 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 1048 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 1049 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 1050 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 1051 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 1052 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1053 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 1054 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 1055 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 1056 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 1057 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 1058 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 1059 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 1060 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 1061 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 1062 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1063 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1064 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1065 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1066 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1067 1068 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1069 1070 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1071 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1072 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1073 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1074 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1075 1076 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1077 REG_WRITE1(sc, VGA_GC_DATA, 0); 1078 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1079 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1080 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1081 REG_WRITE1(sc, VGA_GC_DATA, 0); 1082 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1083 REG_WRITE1(sc, VGA_GC_DATA, 0); 1084 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1085 REG_WRITE1(sc, VGA_GC_DATA, 0); 1086 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1087 REG_WRITE1(sc, VGA_GC_DATA, 0); 1088 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1089 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1090 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1091 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1092 } 1093 1094 static int 1095 vga_initialize(struct vt_device *vd, int textmode) 1096 { 1097 struct vga_softc *sc = vd->vd_softc; 1098 uint8_t x; 1099 int timeout; 1100 1101 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1102 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1103 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1104 1105 /* Unprotect CRTC registers 0-7. */ 1106 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1107 x = REG_READ1(sc, VGA_CRTC_DATA); 1108 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1109 1110 /* 1111 * Wait for the vertical retrace. 1112 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1113 * the side-effect of clearing the internal flip-flip of the attribute 1114 * controller's write register. This means that because this code is 1115 * here, we know for sure that the first write to the attribute 1116 * controller will be a write to the address register. Removing this 1117 * code therefore also removes that guarantee and appropriate measures 1118 * need to be taken. 1119 */ 1120 timeout = 10000; 1121 do { 1122 DELAY(10); 1123 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1124 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1125 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1126 if (timeout == 0) { 1127 printf("Timeout initializing vt_vga\n"); 1128 return (ENXIO); 1129 } 1130 1131 /* Now, disable the sync. signals. */ 1132 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1133 x = REG_READ1(sc, VGA_CRTC_DATA); 1134 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1135 1136 /* Asynchronous sequencer reset. */ 1137 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1138 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1139 1140 if (!textmode) 1141 vga_initialize_graphics(vd); 1142 1143 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1144 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1145 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1146 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1147 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1148 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1149 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1150 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1151 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1152 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1153 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1154 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1155 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1156 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1157 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1158 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1159 1160 if (textmode) { 1161 /* Set the attribute controller to blink disable. */ 1162 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1163 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1164 } else { 1165 /* Set the attribute controller in graphics mode. */ 1166 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1167 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1168 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1169 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1170 } 1171 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1172 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1173 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1174 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1175 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1176 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1177 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1178 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1179 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1180 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1181 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1182 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1183 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1184 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1185 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1186 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1187 1188 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1189 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1190 VGA_AC_PAL_SB); 1191 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1192 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1193 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1194 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1195 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1196 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1197 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1198 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1199 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1200 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1201 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1202 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1203 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1204 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1205 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1206 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1207 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1208 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1209 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1210 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1211 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1212 1213 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1214 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1215 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1216 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1217 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1218 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1219 1220 if (!textmode) { 1221 u_int ofs; 1222 1223 /* 1224 * Done. Clear the frame buffer. All bit planes are 1225 * enabled, so a single-paged loop should clear all 1226 * planes. 1227 */ 1228 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1229 MEM_WRITE1(sc, ofs, 0); 1230 } 1231 } 1232 1233 /* Re-enable the sequencer. */ 1234 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1235 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1236 /* Re-enable the sync signals. */ 1237 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1238 x = REG_READ1(sc, VGA_CRTC_DATA); 1239 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1240 1241 if (!textmode) { 1242 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1243 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1244 REG_WRITE1(sc, VGA_GC_DATA, 3); 1245 sc->vga_wmode = 3; 1246 1247 /* 1248 * In Write Mode 3, Enable Set/Reset is ignored, but we 1249 * use Write Mode 0 to write a group of 8 pixels using 1250 * 3 or more colors. In this case, we want to disable 1251 * Set/Reset: set Enable Set/Reset to 0. 1252 */ 1253 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1254 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1255 1256 /* 1257 * Clear the colors we think are loaded into Set/Reset or 1258 * the latches. 1259 */ 1260 sc->vga_curfg = sc->vga_curbg = 0xff; 1261 } 1262 1263 return (0); 1264 } 1265 1266 static bool 1267 vga_acpi_disabled(void) 1268 { 1269 #if defined(__amd64__) || defined(__i386__) 1270 uint16_t flags; 1271 int ignore; 1272 1273 /* 1274 * Ignore the flag on real hardware: there's a lot of buggy firmware 1275 * that will wrongly set it. 1276 */ 1277 ignore = (vm_guest == VM_GUEST_NO); 1278 TUNABLE_INT_FETCH("hw.vga.acpi_ignore_no_vga", &ignore); 1279 if (ignore || !acpi_get_fadt_bootflags(&flags)) 1280 return (false); 1281 return ((flags & ACPI_FADT_NO_VGA) != 0); 1282 #else 1283 return (false); 1284 #endif 1285 } 1286 1287 static int 1288 vga_probe(struct vt_device *vd) 1289 { 1290 1291 return (vga_acpi_disabled() ? CN_DEAD : CN_INTERNAL); 1292 } 1293 1294 static int 1295 vga_init(struct vt_device *vd) 1296 { 1297 struct vga_softc *sc; 1298 int textmode; 1299 1300 if (vd->vd_softc == NULL) 1301 vd->vd_softc = (void *)&vga_conssoftc; 1302 sc = vd->vd_softc; 1303 1304 if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 1305 vga_pci_repost(vd->vd_video_dev); 1306 1307 #if defined(__amd64__) || defined(__i386__) 1308 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1309 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1310 #else 1311 # error "Architecture not yet supported!" 1312 #endif 1313 1314 bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 1315 &sc->vga_reg_handle); 1316 1317 /* 1318 * If "hw.vga.textmode" is not set and we're running on hypervisor, 1319 * we use text mode by default, this is because when we're on 1320 * hypervisor, vt(4) is usually much slower in graphics mode than 1321 * in text mode, especially when we're on Hyper-V. 1322 */ 1323 textmode = vm_guest != VM_GUEST_NO; 1324 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1325 if (textmode) { 1326 vd->vd_flags |= VDF_TEXTMODE; 1327 vd->vd_width = 80; 1328 vd->vd_height = 25; 1329 bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 1330 &sc->vga_fb_handle); 1331 } else { 1332 vd->vd_width = VT_VGA_WIDTH; 1333 vd->vd_height = VT_VGA_HEIGHT; 1334 bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 1335 &sc->vga_fb_handle); 1336 } 1337 if (vga_initialize(vd, textmode) != 0) 1338 return (CN_DEAD); 1339 sc->vga_enabled = true; 1340 1341 return (CN_INTERNAL); 1342 } 1343 1344 static void 1345 vga_postswitch(struct vt_device *vd) 1346 { 1347 1348 /* Reinit VGA mode, to restore view after app which change mode. */ 1349 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1350 /* Ask vt(9) to update chars on visible area. */ 1351 vd->vd_flags |= VDF_INVALID; 1352 } 1353 1354 /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1355 static void 1356 vtvga_identify(driver_t *driver, device_t parent) 1357 { 1358 1359 if (!vga_conssoftc.vga_enabled) 1360 return; 1361 1362 if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1363 panic("Unable to attach vt_vga console"); 1364 } 1365 1366 static int 1367 vtvga_probe(device_t dev) 1368 { 1369 1370 device_set_desc(dev, "VT VGA driver"); 1371 1372 return (BUS_PROBE_NOWILDCARD); 1373 } 1374 1375 static int 1376 vtvga_attach(device_t dev) 1377 { 1378 struct resource *pseudo_phys_res; 1379 int res_id; 1380 1381 res_id = 0; 1382 pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1383 &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1384 VGA_MEM_SIZE, RF_ACTIVE); 1385 if (pseudo_phys_res == NULL) 1386 panic("Unable to reserve vt_vga memory"); 1387 return (0); 1388 } 1389 1390 /*-------------------- Private Device Attachment Data -----------------------*/ 1391 static device_method_t vtvga_methods[] = { 1392 /* Device interface */ 1393 DEVMETHOD(device_identify, vtvga_identify), 1394 DEVMETHOD(device_probe, vtvga_probe), 1395 DEVMETHOD(device_attach, vtvga_attach), 1396 1397 DEVMETHOD_END 1398 }; 1399 1400 DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1401 1402 DRIVER_MODULE(vtvga, nexus, vtvga_driver, NULL, NULL); 1403