1a401c53aSAleksandr Rybalko /*- 2a401c53aSAleksandr Rybalko * Copyright (c) 2005 Marcel Moolenaar 3a401c53aSAleksandr Rybalko * All rights reserved. 4a401c53aSAleksandr Rybalko * 5a401c53aSAleksandr Rybalko * Copyright (c) 2009 The FreeBSD Foundation 6a401c53aSAleksandr Rybalko * All rights reserved. 7a401c53aSAleksandr Rybalko * 8a401c53aSAleksandr Rybalko * Portions of this software were developed by Ed Schouten 9a401c53aSAleksandr Rybalko * under sponsorship from the FreeBSD Foundation. 10a401c53aSAleksandr Rybalko * 11a401c53aSAleksandr Rybalko * Redistribution and use in source and binary forms, with or without 12a401c53aSAleksandr Rybalko * modification, are permitted provided that the following conditions 13a401c53aSAleksandr Rybalko * are met: 14a401c53aSAleksandr Rybalko * 1. Redistributions of source code must retain the above copyright 15a401c53aSAleksandr Rybalko * notice, this list of conditions and the following disclaimer. 16a401c53aSAleksandr Rybalko * 2. Redistributions in binary form must reproduce the above copyright 17a401c53aSAleksandr Rybalko * notice, this list of conditions and the following disclaimer in the 18a401c53aSAleksandr Rybalko * documentation and/or other materials provided with the distribution. 19a401c53aSAleksandr Rybalko * 20a401c53aSAleksandr Rybalko * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21a401c53aSAleksandr Rybalko * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22a401c53aSAleksandr Rybalko * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23a401c53aSAleksandr Rybalko * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24a401c53aSAleksandr Rybalko * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25a401c53aSAleksandr Rybalko * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26a401c53aSAleksandr Rybalko * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27a401c53aSAleksandr Rybalko * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28a401c53aSAleksandr Rybalko * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29a401c53aSAleksandr Rybalko * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30a401c53aSAleksandr Rybalko * SUCH DAMAGE. 31a401c53aSAleksandr Rybalko */ 32a401c53aSAleksandr Rybalko 33a401c53aSAleksandr Rybalko #include <sys/cdefs.h> 34a401c53aSAleksandr Rybalko __FBSDID("$FreeBSD$"); 35a401c53aSAleksandr Rybalko 36a401c53aSAleksandr Rybalko #include <sys/param.h> 37a401c53aSAleksandr Rybalko #include <sys/kernel.h> 38a401c53aSAleksandr Rybalko #include <sys/systm.h> 39acb332a8SRoger Pau Monné #include <sys/bus.h> 40acb332a8SRoger Pau Monné #include <sys/module.h> 41acb332a8SRoger Pau Monné #include <sys/rman.h> 42a401c53aSAleksandr Rybalko 43a401c53aSAleksandr Rybalko #include <dev/vt/vt.h> 44a401c53aSAleksandr Rybalko #include <dev/vt/hw/vga/vt_vga_reg.h> 4576e2f976SJean-Sébastien Pédron #include <dev/pci/pcivar.h> 46a401c53aSAleksandr Rybalko 47a401c53aSAleksandr Rybalko #include <machine/bus.h> 48a401c53aSAleksandr Rybalko 49a401c53aSAleksandr Rybalko struct vga_softc { 50a401c53aSAleksandr Rybalko bus_space_tag_t vga_fb_tag; 51a401c53aSAleksandr Rybalko bus_space_handle_t vga_fb_handle; 52a401c53aSAleksandr Rybalko bus_space_tag_t vga_reg_tag; 53a401c53aSAleksandr Rybalko bus_space_handle_t vga_reg_handle; 54af9f67eaSJean-Sébastien Pédron int vga_wmode; 55bdcaf97cSJean-Sébastien Pédron term_color_t vga_curfg, vga_curbg; 56acb332a8SRoger Pau Monné boolean_t vga_enabled; 57a401c53aSAleksandr Rybalko }; 58a401c53aSAleksandr Rybalko 59a401c53aSAleksandr Rybalko /* Convenience macros. */ 60a401c53aSAleksandr Rybalko #define MEM_READ1(sc, ofs) \ 61a401c53aSAleksandr Rybalko bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 62a401c53aSAleksandr Rybalko #define MEM_WRITE1(sc, ofs, val) \ 63a401c53aSAleksandr Rybalko bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 64a401c53aSAleksandr Rybalko #define REG_READ1(sc, reg) \ 65a401c53aSAleksandr Rybalko bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 66a401c53aSAleksandr Rybalko #define REG_WRITE1(sc, reg, val) \ 67a401c53aSAleksandr Rybalko bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 68a401c53aSAleksandr Rybalko 69a401c53aSAleksandr Rybalko #define VT_VGA_WIDTH 640 70a401c53aSAleksandr Rybalko #define VT_VGA_HEIGHT 480 71a401c53aSAleksandr Rybalko #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 72a401c53aSAleksandr Rybalko 73bdcaf97cSJean-Sébastien Pédron /* 74bdcaf97cSJean-Sébastien Pédron * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 75bdcaf97cSJean-Sébastien Pédron * memory). 76bdcaf97cSJean-Sébastien Pédron */ 77bdcaf97cSJean-Sébastien Pédron #define VT_VGA_PIXELS_BLOCK 8 78bdcaf97cSJean-Sébastien Pédron 79bdcaf97cSJean-Sébastien Pédron /* 80bdcaf97cSJean-Sébastien Pédron * We use an off-screen addresses to: 81bdcaf97cSJean-Sébastien Pédron * o store the background color; 82bdcaf97cSJean-Sébastien Pédron * o store pixels pattern. 83bdcaf97cSJean-Sébastien Pédron * Those addresses are then loaded in the latches once. 84bdcaf97cSJean-Sébastien Pédron */ 85bdcaf97cSJean-Sébastien Pédron #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 86bdcaf97cSJean-Sébastien Pédron 87a401c53aSAleksandr Rybalko static vd_probe_t vga_probe; 88a401c53aSAleksandr Rybalko static vd_init_t vga_init; 89a401c53aSAleksandr Rybalko static vd_blank_t vga_blank; 90bdcaf97cSJean-Sébastien Pédron static vd_bitblt_text_t vga_bitblt_text; 91631bb572SJean-Sébastien Pédron static vd_bitblt_bmp_t vga_bitblt_bitmap; 92a401c53aSAleksandr Rybalko static vd_drawrect_t vga_drawrect; 93a401c53aSAleksandr Rybalko static vd_setpixel_t vga_setpixel; 94a401c53aSAleksandr Rybalko static vd_postswitch_t vga_postswitch; 95a401c53aSAleksandr Rybalko 96a401c53aSAleksandr Rybalko static const struct vt_driver vt_vga_driver = { 97a401c53aSAleksandr Rybalko .vd_name = "vga", 98a401c53aSAleksandr Rybalko .vd_probe = vga_probe, 99a401c53aSAleksandr Rybalko .vd_init = vga_init, 100a401c53aSAleksandr Rybalko .vd_blank = vga_blank, 101bdcaf97cSJean-Sébastien Pédron .vd_bitblt_text = vga_bitblt_text, 102631bb572SJean-Sébastien Pédron .vd_bitblt_bmp = vga_bitblt_bitmap, 103a401c53aSAleksandr Rybalko .vd_drawrect = vga_drawrect, 104a401c53aSAleksandr Rybalko .vd_setpixel = vga_setpixel, 105a401c53aSAleksandr Rybalko .vd_postswitch = vga_postswitch, 106a401c53aSAleksandr Rybalko .vd_priority = VD_PRIORITY_GENERIC, 107a401c53aSAleksandr Rybalko }; 108a401c53aSAleksandr Rybalko 109a401c53aSAleksandr Rybalko /* 110a401c53aSAleksandr Rybalko * Driver supports both text mode and graphics mode. Make sure the 111a401c53aSAleksandr Rybalko * buffer is always big enough to support both. 112a401c53aSAleksandr Rybalko */ 113a401c53aSAleksandr Rybalko static struct vga_softc vga_conssoftc; 114a401c53aSAleksandr Rybalko VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 115a401c53aSAleksandr Rybalko 116a401c53aSAleksandr Rybalko static inline void 117af9f67eaSJean-Sébastien Pédron vga_setwmode(struct vt_device *vd, int wmode) 118af9f67eaSJean-Sébastien Pédron { 119af9f67eaSJean-Sébastien Pédron struct vga_softc *sc = vd->vd_softc; 120af9f67eaSJean-Sébastien Pédron 121af9f67eaSJean-Sébastien Pédron if (sc->vga_wmode == wmode) 122af9f67eaSJean-Sébastien Pédron return; 123af9f67eaSJean-Sébastien Pédron 124af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 125af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, wmode); 126af9f67eaSJean-Sébastien Pédron sc->vga_wmode = wmode; 127af9f67eaSJean-Sébastien Pédron 128af9f67eaSJean-Sébastien Pédron switch (wmode) { 129af9f67eaSJean-Sébastien Pédron case 3: 130af9f67eaSJean-Sébastien Pédron /* Re-enable all plans. */ 131af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 132af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 133af9f67eaSJean-Sébastien Pédron VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 134af9f67eaSJean-Sébastien Pédron break; 135af9f67eaSJean-Sébastien Pédron } 136af9f67eaSJean-Sébastien Pédron } 137af9f67eaSJean-Sébastien Pédron 138af9f67eaSJean-Sébastien Pédron static inline void 139bdcaf97cSJean-Sébastien Pédron vga_setfg(struct vt_device *vd, term_color_t color) 140a401c53aSAleksandr Rybalko { 141a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 142a401c53aSAleksandr Rybalko 143af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 3); 144af9f67eaSJean-Sébastien Pédron 145af9f67eaSJean-Sébastien Pédron if (sc->vga_curfg == color) 146af9f67eaSJean-Sébastien Pédron return; 147af9f67eaSJean-Sébastien Pédron 148a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 149a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, color); 150bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = color; 151a401c53aSAleksandr Rybalko } 152a401c53aSAleksandr Rybalko 153a401c53aSAleksandr Rybalko static inline void 154bdcaf97cSJean-Sébastien Pédron vga_setbg(struct vt_device *vd, term_color_t color) 155a401c53aSAleksandr Rybalko { 156a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 157a401c53aSAleksandr Rybalko 158af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 3); 159af9f67eaSJean-Sébastien Pédron 160af9f67eaSJean-Sébastien Pédron if (sc->vga_curbg == color) 161af9f67eaSJean-Sébastien Pédron return; 162af9f67eaSJean-Sébastien Pédron 163bdcaf97cSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 164bdcaf97cSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, color); 165a401c53aSAleksandr Rybalko 16634cb8c9fSAleksandr Rybalko /* 167af9f67eaSJean-Sébastien Pédron * Write 8 pixels using the background color to an off-screen 168af9f67eaSJean-Sébastien Pédron * byte in the video memory. 16934cb8c9fSAleksandr Rybalko */ 170bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 17134cb8c9fSAleksandr Rybalko 17234cb8c9fSAleksandr Rybalko /* 173af9f67eaSJean-Sébastien Pédron * Read those 8 pixels back to load the background color in the 174af9f67eaSJean-Sébastien Pédron * latches register. 17534cb8c9fSAleksandr Rybalko */ 176bdcaf97cSJean-Sébastien Pédron MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 17734cb8c9fSAleksandr Rybalko 178bdcaf97cSJean-Sébastien Pédron sc->vga_curbg = color; 17934cb8c9fSAleksandr Rybalko 180bdcaf97cSJean-Sébastien Pédron /* 181af9f67eaSJean-Sébastien Pédron * The Set/Reset register doesn't contain the fg color anymore, 182af9f67eaSJean-Sébastien Pédron * store an invalid color. 183bdcaf97cSJean-Sébastien Pédron */ 184bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = 0xff; 185a401c53aSAleksandr Rybalko } 186a401c53aSAleksandr Rybalko 187a401c53aSAleksandr Rybalko /* 188a401c53aSAleksandr Rybalko * Binary searchable table for Unicode to CP437 conversion. 189a401c53aSAleksandr Rybalko */ 190a401c53aSAleksandr Rybalko 191a401c53aSAleksandr Rybalko struct unicp437 { 192a401c53aSAleksandr Rybalko uint16_t unicode_base; 193a401c53aSAleksandr Rybalko uint8_t cp437_base; 194a401c53aSAleksandr Rybalko uint8_t length; 195a401c53aSAleksandr Rybalko }; 196a401c53aSAleksandr Rybalko 197a401c53aSAleksandr Rybalko static const struct unicp437 cp437table[] = { 198a401c53aSAleksandr Rybalko { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 199a401c53aSAleksandr Rybalko { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 200a401c53aSAleksandr Rybalko { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 201a401c53aSAleksandr Rybalko { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 202a401c53aSAleksandr Rybalko { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 203a401c53aSAleksandr Rybalko { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 204a401c53aSAleksandr Rybalko { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 205a401c53aSAleksandr Rybalko { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 206a401c53aSAleksandr Rybalko { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 207a401c53aSAleksandr Rybalko { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 208a401c53aSAleksandr Rybalko { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 209a401c53aSAleksandr Rybalko { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 210a401c53aSAleksandr Rybalko { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 211a401c53aSAleksandr Rybalko { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 212a401c53aSAleksandr Rybalko { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 213a401c53aSAleksandr Rybalko { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 214a401c53aSAleksandr Rybalko { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 215a401c53aSAleksandr Rybalko { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 216a401c53aSAleksandr Rybalko { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 217a401c53aSAleksandr Rybalko { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 218a401c53aSAleksandr Rybalko { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 219a401c53aSAleksandr Rybalko { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 220a401c53aSAleksandr Rybalko { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 221a401c53aSAleksandr Rybalko { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 222a401c53aSAleksandr Rybalko { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 223a401c53aSAleksandr Rybalko { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 224a401c53aSAleksandr Rybalko { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 225a401c53aSAleksandr Rybalko { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 226a401c53aSAleksandr Rybalko { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 227a401c53aSAleksandr Rybalko { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 228a401c53aSAleksandr Rybalko { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 229a401c53aSAleksandr Rybalko { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 230a401c53aSAleksandr Rybalko { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 231a401c53aSAleksandr Rybalko { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 232a401c53aSAleksandr Rybalko { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 233a401c53aSAleksandr Rybalko { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 234a401c53aSAleksandr Rybalko { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 235a401c53aSAleksandr Rybalko { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 236a401c53aSAleksandr Rybalko { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 237a401c53aSAleksandr Rybalko { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 238a401c53aSAleksandr Rybalko { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 239a401c53aSAleksandr Rybalko { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 240a401c53aSAleksandr Rybalko { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 241a401c53aSAleksandr Rybalko { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 242a401c53aSAleksandr Rybalko { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 243a401c53aSAleksandr Rybalko { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 244a401c53aSAleksandr Rybalko { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 245a401c53aSAleksandr Rybalko { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 246a401c53aSAleksandr Rybalko { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 247a401c53aSAleksandr Rybalko { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 248a401c53aSAleksandr Rybalko { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 249a401c53aSAleksandr Rybalko { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 250a401c53aSAleksandr Rybalko { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 251a401c53aSAleksandr Rybalko { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 252a401c53aSAleksandr Rybalko { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 253a401c53aSAleksandr Rybalko { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 254a401c53aSAleksandr Rybalko { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 255a401c53aSAleksandr Rybalko { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 256a401c53aSAleksandr Rybalko { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 257a401c53aSAleksandr Rybalko { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 258a401c53aSAleksandr Rybalko { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 259a401c53aSAleksandr Rybalko { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 260a401c53aSAleksandr Rybalko { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 261a401c53aSAleksandr Rybalko { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 262a401c53aSAleksandr Rybalko { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 263a401c53aSAleksandr Rybalko { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 264a401c53aSAleksandr Rybalko { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 265a401c53aSAleksandr Rybalko { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 266a401c53aSAleksandr Rybalko { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 267a401c53aSAleksandr Rybalko { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 268a401c53aSAleksandr Rybalko { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 269a401c53aSAleksandr Rybalko { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 270a401c53aSAleksandr Rybalko { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 271a401c53aSAleksandr Rybalko { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 272a401c53aSAleksandr Rybalko { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 273a401c53aSAleksandr Rybalko { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 274a401c53aSAleksandr Rybalko { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 275a401c53aSAleksandr Rybalko { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 276a401c53aSAleksandr Rybalko { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 277a401c53aSAleksandr Rybalko { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 278a401c53aSAleksandr Rybalko { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 279a401c53aSAleksandr Rybalko { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 280a401c53aSAleksandr Rybalko { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 281a401c53aSAleksandr Rybalko { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 282a401c53aSAleksandr Rybalko { 0x266c, 0x0e, 0x00 }, 283a401c53aSAleksandr Rybalko }; 284a401c53aSAleksandr Rybalko 285a401c53aSAleksandr Rybalko static uint8_t 286a401c53aSAleksandr Rybalko vga_get_cp437(term_char_t c) 287a401c53aSAleksandr Rybalko { 288a401c53aSAleksandr Rybalko int min, mid, max; 289a401c53aSAleksandr Rybalko 290a401c53aSAleksandr Rybalko min = 0; 291*e6b01ed7SEnji Cooper max = nitems(cp437table) - 1; 292a401c53aSAleksandr Rybalko 293a401c53aSAleksandr Rybalko if (c < cp437table[0].unicode_base || 294a401c53aSAleksandr Rybalko c > cp437table[max].unicode_base + cp437table[max].length) 295a401c53aSAleksandr Rybalko return '?'; 296a401c53aSAleksandr Rybalko 297a401c53aSAleksandr Rybalko while (max >= min) { 298a401c53aSAleksandr Rybalko mid = (min + max) / 2; 299a401c53aSAleksandr Rybalko if (c < cp437table[mid].unicode_base) 300a401c53aSAleksandr Rybalko max = mid - 1; 301a401c53aSAleksandr Rybalko else if (c > cp437table[mid].unicode_base + 302a401c53aSAleksandr Rybalko cp437table[mid].length) 303a401c53aSAleksandr Rybalko min = mid + 1; 304a401c53aSAleksandr Rybalko else 305a401c53aSAleksandr Rybalko return (c - cp437table[mid].unicode_base + 306a401c53aSAleksandr Rybalko cp437table[mid].cp437_base); 307a401c53aSAleksandr Rybalko } 308a401c53aSAleksandr Rybalko 309a401c53aSAleksandr Rybalko return '?'; 310a401c53aSAleksandr Rybalko } 311a401c53aSAleksandr Rybalko 312a401c53aSAleksandr Rybalko static void 313bdcaf97cSJean-Sébastien Pédron vga_blank(struct vt_device *vd, term_color_t color) 314a401c53aSAleksandr Rybalko { 315a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 316bdcaf97cSJean-Sébastien Pédron u_int ofs; 317bdcaf97cSJean-Sébastien Pédron 318bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, color); 319bdcaf97cSJean-Sébastien Pédron for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 320bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, ofs, 0xff); 321bdcaf97cSJean-Sébastien Pédron } 322bdcaf97cSJean-Sébastien Pédron 323bdcaf97cSJean-Sébastien Pédron static inline void 324bdcaf97cSJean-Sébastien Pédron vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 325bdcaf97cSJean-Sébastien Pédron uint8_t v) 326bdcaf97cSJean-Sébastien Pédron { 327bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc = vd->vd_softc; 328bdcaf97cSJean-Sébastien Pédron 329bdcaf97cSJean-Sébastien Pédron /* Skip empty writes, in order to avoid palette changes. */ 330bdcaf97cSJean-Sébastien Pédron if (v != 0x00) { 331bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, color); 332bdcaf97cSJean-Sébastien Pédron /* 333bdcaf97cSJean-Sébastien Pédron * When this MEM_READ1() gets disabled, all sorts of 334bdcaf97cSJean-Sébastien Pédron * artifacts occur. This is because this read loads the 335bdcaf97cSJean-Sébastien Pédron * set of 8 pixels that are about to be changed. There 336bdcaf97cSJean-Sébastien Pédron * is one scenario where we can avoid the read, namely 337bdcaf97cSJean-Sébastien Pédron * if all pixels are about to be overwritten anyway. 338bdcaf97cSJean-Sébastien Pédron */ 339bdcaf97cSJean-Sébastien Pédron if (v != 0xff) { 340bdcaf97cSJean-Sébastien Pédron MEM_READ1(sc, dst); 341bdcaf97cSJean-Sébastien Pédron 342bdcaf97cSJean-Sébastien Pédron /* The bg color was trashed by the reads. */ 343bdcaf97cSJean-Sébastien Pédron sc->vga_curbg = 0xff; 344bdcaf97cSJean-Sébastien Pédron } 345bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, dst, v); 346bdcaf97cSJean-Sébastien Pédron } 347bdcaf97cSJean-Sébastien Pédron } 348bdcaf97cSJean-Sébastien Pédron 349bdcaf97cSJean-Sébastien Pédron static void 350bdcaf97cSJean-Sébastien Pédron vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 351bdcaf97cSJean-Sébastien Pédron { 352bdcaf97cSJean-Sébastien Pédron 3536cbf3f62SJean-Sébastien Pédron if (vd->vd_flags & VDF_TEXTMODE) 3546cbf3f62SJean-Sébastien Pédron return; 3556cbf3f62SJean-Sébastien Pédron 356bdcaf97cSJean-Sébastien Pédron vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 357bdcaf97cSJean-Sébastien Pédron 0x80 >> (x % 8)); 358bdcaf97cSJean-Sébastien Pédron } 359bdcaf97cSJean-Sébastien Pédron 360bdcaf97cSJean-Sébastien Pédron static void 361bdcaf97cSJean-Sébastien Pédron vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 362bdcaf97cSJean-Sébastien Pédron term_color_t color) 363bdcaf97cSJean-Sébastien Pédron { 364bdcaf97cSJean-Sébastien Pédron int x, y; 365bdcaf97cSJean-Sébastien Pédron 3666cbf3f62SJean-Sébastien Pédron if (vd->vd_flags & VDF_TEXTMODE) 3676cbf3f62SJean-Sébastien Pédron return; 3686cbf3f62SJean-Sébastien Pédron 369bdcaf97cSJean-Sébastien Pédron for (y = y1; y <= y2; y++) { 370bdcaf97cSJean-Sébastien Pédron if (fill || (y == y1) || (y == y2)) { 371bdcaf97cSJean-Sébastien Pédron for (x = x1; x <= x2; x++) 372bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x, y, color); 373bdcaf97cSJean-Sébastien Pédron } else { 374bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x1, y, color); 375bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x2, y, color); 376bdcaf97cSJean-Sébastien Pédron } 377bdcaf97cSJean-Sébastien Pédron } 378bdcaf97cSJean-Sébastien Pédron } 379bdcaf97cSJean-Sébastien Pédron 380bdcaf97cSJean-Sébastien Pédron static void 381bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 382bdcaf97cSJean-Sébastien Pédron unsigned int src_x, unsigned int x_count, unsigned int dst_x, 383bdcaf97cSJean-Sébastien Pédron uint8_t *pattern, uint8_t *mask) 384bdcaf97cSJean-Sébastien Pédron { 385bdcaf97cSJean-Sébastien Pédron unsigned int n; 386bdcaf97cSJean-Sébastien Pédron 387bdcaf97cSJean-Sébastien Pédron n = src_x / 8; 388a401c53aSAleksandr Rybalko 389a401c53aSAleksandr Rybalko /* 390bdcaf97cSJean-Sébastien Pédron * This mask has bits set, where a pixel (ether 0 or 1) 391bdcaf97cSJean-Sébastien Pédron * comes from the source bitmap. 392bdcaf97cSJean-Sébastien Pédron */ 393bdcaf97cSJean-Sébastien Pédron if (mask != NULL) { 394bdcaf97cSJean-Sébastien Pédron *mask = (0xff 395bdcaf97cSJean-Sébastien Pédron >> (8 - x_count)) 396bdcaf97cSJean-Sébastien Pédron << (8 - x_count - dst_x); 397bdcaf97cSJean-Sébastien Pédron } 398bdcaf97cSJean-Sébastien Pédron 399bdcaf97cSJean-Sébastien Pédron if (n == (src_x + x_count - 1) / 8) { 400bdcaf97cSJean-Sébastien Pédron /* All the pixels we want are in the same byte. */ 401bdcaf97cSJean-Sébastien Pédron *pattern = src[n]; 402bdcaf97cSJean-Sébastien Pédron if (dst_x >= src_x) 403bdcaf97cSJean-Sébastien Pédron *pattern >>= (dst_x - src_x % 8); 404bdcaf97cSJean-Sébastien Pédron else 405bdcaf97cSJean-Sébastien Pédron *pattern <<= (src_x % 8 - dst_x); 406bdcaf97cSJean-Sébastien Pédron } else { 407bdcaf97cSJean-Sébastien Pédron /* The pixels we want are split into two bytes. */ 408bdcaf97cSJean-Sébastien Pédron if (dst_x >= src_x % 8) { 409bdcaf97cSJean-Sébastien Pédron *pattern = 410bdcaf97cSJean-Sébastien Pédron src[n] << (8 - dst_x - src_x % 8) | 411bdcaf97cSJean-Sébastien Pédron src[n + 1] >> (dst_x - src_x % 8); 412bdcaf97cSJean-Sébastien Pédron } else { 413bdcaf97cSJean-Sébastien Pédron *pattern = 414bdcaf97cSJean-Sébastien Pédron src[n] << (src_x % 8 - dst_x) | 415bdcaf97cSJean-Sébastien Pédron src[n + 1] >> (8 - src_x % 8 - dst_x); 416bdcaf97cSJean-Sébastien Pédron } 417bdcaf97cSJean-Sébastien Pédron } 418bdcaf97cSJean-Sébastien Pédron } 419bdcaf97cSJean-Sébastien Pédron 420bdcaf97cSJean-Sébastien Pédron static void 421bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 422bdcaf97cSJean-Sébastien Pédron const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 423bdcaf97cSJean-Sébastien Pédron unsigned int src_x, unsigned int dst_x, unsigned int x_count, 424bdcaf97cSJean-Sébastien Pédron unsigned int src_y, unsigned int dst_y, unsigned int y_count, 425bdcaf97cSJean-Sébastien Pédron term_color_t fg, term_color_t bg, int overwrite) 426bdcaf97cSJean-Sébastien Pédron { 427bdcaf97cSJean-Sébastien Pédron unsigned int i, bytes; 428bdcaf97cSJean-Sébastien Pédron uint8_t pattern, relevant_bits, mask; 429bdcaf97cSJean-Sébastien Pédron 430bdcaf97cSJean-Sébastien Pédron bytes = (src_width + 7) / 8; 431bdcaf97cSJean-Sébastien Pédron 432bdcaf97cSJean-Sébastien Pédron for (i = 0; i < y_count; ++i) { 433bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern(src + (src_y + i) * bytes, 434bdcaf97cSJean-Sébastien Pédron bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 435bdcaf97cSJean-Sébastien Pédron 436bdcaf97cSJean-Sébastien Pédron if (src_mask == NULL) { 437bdcaf97cSJean-Sébastien Pédron /* 438bdcaf97cSJean-Sébastien Pédron * No src mask. Consider that all wanted bits 439bdcaf97cSJean-Sébastien Pédron * from the source are "authoritative". 440bdcaf97cSJean-Sébastien Pédron */ 441bdcaf97cSJean-Sébastien Pédron mask = relevant_bits; 442bdcaf97cSJean-Sébastien Pédron } else { 443bdcaf97cSJean-Sébastien Pédron /* 444bdcaf97cSJean-Sébastien Pédron * There's an src mask. We shift it the same way 445bdcaf97cSJean-Sébastien Pédron * we shifted the source pattern. 446bdcaf97cSJean-Sébastien Pédron */ 447bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern( 448bdcaf97cSJean-Sébastien Pédron src_mask + (src_y + i) * bytes, 449bdcaf97cSJean-Sébastien Pédron bytes, src_x, x_count, dst_x, 450bdcaf97cSJean-Sébastien Pédron &mask, NULL); 451bdcaf97cSJean-Sébastien Pédron 452bdcaf97cSJean-Sébastien Pédron /* Now, only keep the wanted bits among them. */ 453bdcaf97cSJean-Sébastien Pédron mask &= relevant_bits; 454bdcaf97cSJean-Sébastien Pédron } 455bdcaf97cSJean-Sébastien Pédron 456bdcaf97cSJean-Sébastien Pédron /* 457bdcaf97cSJean-Sébastien Pédron * Clear bits from the pattern which must be 458bdcaf97cSJean-Sébastien Pédron * transparent, according to the source mask. 459bdcaf97cSJean-Sébastien Pédron */ 460bdcaf97cSJean-Sébastien Pédron pattern &= mask; 461bdcaf97cSJean-Sébastien Pédron 462bdcaf97cSJean-Sébastien Pédron /* Set the bits in the 2-colors array. */ 463bdcaf97cSJean-Sébastien Pédron if (overwrite) 464bdcaf97cSJean-Sébastien Pédron pattern_2colors[dst_y + i] &= ~mask; 465bdcaf97cSJean-Sébastien Pédron pattern_2colors[dst_y + i] |= pattern; 466bdcaf97cSJean-Sébastien Pédron 4677e1770a7SJean-Sébastien Pédron if (pattern_ncolors == NULL) 4687e1770a7SJean-Sébastien Pédron continue; 4697e1770a7SJean-Sébastien Pédron 470bdcaf97cSJean-Sébastien Pédron /* 471bdcaf97cSJean-Sébastien Pédron * Set the same bits in the n-colors array. This one 472bdcaf97cSJean-Sébastien Pédron * supports transparency, when a given bit is cleared in 473bdcaf97cSJean-Sébastien Pédron * all colors. 474bdcaf97cSJean-Sébastien Pédron */ 475bdcaf97cSJean-Sébastien Pédron if (overwrite) { 476bdcaf97cSJean-Sébastien Pédron /* 477bdcaf97cSJean-Sébastien Pédron * Ensure that the pixels used by this bitmap are 478bdcaf97cSJean-Sébastien Pédron * cleared in other colors. 479bdcaf97cSJean-Sébastien Pédron */ 480bdcaf97cSJean-Sébastien Pédron for (int j = 0; j < 16; ++j) 481bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + j] &= 482bdcaf97cSJean-Sébastien Pédron ~mask; 483bdcaf97cSJean-Sébastien Pédron } 484bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 485bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 486bdcaf97cSJean-Sébastien Pédron } 487bdcaf97cSJean-Sébastien Pédron } 488bdcaf97cSJean-Sébastien Pédron 489bdcaf97cSJean-Sébastien Pédron static void 490bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 491bdcaf97cSJean-Sébastien Pédron term_color_t fg, term_color_t bg, 492bdcaf97cSJean-Sébastien Pédron unsigned int x, unsigned int y, unsigned int height) 493bdcaf97cSJean-Sébastien Pédron { 494bdcaf97cSJean-Sébastien Pédron unsigned int i, offset; 495bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 496bdcaf97cSJean-Sébastien Pédron 497bdcaf97cSJean-Sébastien Pédron /* 498bdcaf97cSJean-Sébastien Pédron * The great advantage of Write Mode 3 is that we just need 499bdcaf97cSJean-Sébastien Pédron * to load the foreground in the Set/Reset register, load the 500bdcaf97cSJean-Sébastien Pédron * background color in the latches register (this is done 501bdcaf97cSJean-Sébastien Pédron * through a write in offscreen memory followed by a read of 502bdcaf97cSJean-Sébastien Pédron * that data), then write the pattern to video memory. This 503bdcaf97cSJean-Sébastien Pédron * pattern indicates if the pixel should use the foreground 504bdcaf97cSJean-Sébastien Pédron * color (bit set) or the background color (bit cleared). 505bdcaf97cSJean-Sébastien Pédron */ 506bdcaf97cSJean-Sébastien Pédron 507bdcaf97cSJean-Sébastien Pédron vga_setbg(vd, bg); 508bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, fg); 509bdcaf97cSJean-Sébastien Pédron 510bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 511bdcaf97cSJean-Sébastien Pédron offset = (VT_VGA_WIDTH * y + x) / 8; 512bdcaf97cSJean-Sébastien Pédron 513bdcaf97cSJean-Sébastien Pédron for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 514bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, offset, masks[i]); 515bdcaf97cSJean-Sébastien Pédron } 516bdcaf97cSJean-Sébastien Pédron } 517bdcaf97cSJean-Sébastien Pédron 518bdcaf97cSJean-Sébastien Pédron static void 519bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 520bdcaf97cSJean-Sébastien Pédron unsigned int x, unsigned int y, unsigned int height) 521bdcaf97cSJean-Sébastien Pédron { 522af9f67eaSJean-Sébastien Pédron unsigned int i, j, plan, color, offset; 523bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 524af9f67eaSJean-Sébastien Pédron uint8_t mask, plans[height * 4]; 525bdcaf97cSJean-Sébastien Pédron 526bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 527bdcaf97cSJean-Sébastien Pédron 528af9f67eaSJean-Sébastien Pédron memset(plans, 0, sizeof(plans)); 529af9f67eaSJean-Sébastien Pédron 530bdcaf97cSJean-Sébastien Pédron /* 531af9f67eaSJean-Sébastien Pédron * To write a group of pixels using 3 or more colors, we select 532af9f67eaSJean-Sébastien Pédron * Write Mode 0 and write one byte to each plan separately. 533af9f67eaSJean-Sébastien Pédron */ 534af9f67eaSJean-Sébastien Pédron 535af9f67eaSJean-Sébastien Pédron /* 536af9f67eaSJean-Sébastien Pédron * We first compute each byte: each plan contains one bit of the 537af9f67eaSJean-Sébastien Pédron * color code for each of the 8 pixels. 538bdcaf97cSJean-Sébastien Pédron * 539af9f67eaSJean-Sébastien Pédron * For example, if the 8 pixels are like this: 540af9f67eaSJean-Sébastien Pédron * GBBBBBBY 541af9f67eaSJean-Sébastien Pédron * where: 542af9f67eaSJean-Sébastien Pédron * G (gray) = 0b0111 543af9f67eaSJean-Sébastien Pédron * B (black) = 0b0000 544af9f67eaSJean-Sébastien Pédron * Y (yellow) = 0b0011 545af9f67eaSJean-Sébastien Pédron * 546af9f67eaSJean-Sébastien Pédron * The corresponding for bytes are: 547af9f67eaSJean-Sébastien Pédron * GBBBBBBY 548af9f67eaSJean-Sébastien Pédron * Plan 0: 10000001 = 0x81 549af9f67eaSJean-Sébastien Pédron * Plan 1: 10000001 = 0x81 550af9f67eaSJean-Sébastien Pédron * Plan 2: 10000000 = 0x80 551af9f67eaSJean-Sébastien Pédron * Plan 3: 00000000 = 0x00 552af9f67eaSJean-Sébastien Pédron * | | | 553af9f67eaSJean-Sébastien Pédron * | | +-> 0b0011 (Y) 554af9f67eaSJean-Sébastien Pédron * | +-----> 0b0000 (B) 555af9f67eaSJean-Sébastien Pédron * +--------> 0b0111 (G) 556bdcaf97cSJean-Sébastien Pédron */ 557bdcaf97cSJean-Sébastien Pédron 558bdcaf97cSJean-Sébastien Pédron for (i = 0; i < height; ++i) { 559af9f67eaSJean-Sébastien Pédron for (color = 0; color < 16; ++color) { 560af9f67eaSJean-Sébastien Pédron mask = masks[i * 16 + color]; 561af9f67eaSJean-Sébastien Pédron if (mask == 0x00) 562bdcaf97cSJean-Sébastien Pédron continue; 563bdcaf97cSJean-Sébastien Pédron 564af9f67eaSJean-Sébastien Pédron for (j = 0; j < 8; ++j) { 565af9f67eaSJean-Sébastien Pédron if (!((mask >> (7 - j)) & 0x1)) 566af9f67eaSJean-Sébastien Pédron continue; 567bdcaf97cSJean-Sébastien Pédron 568af9f67eaSJean-Sébastien Pédron /* The pixel "j" uses color "color". */ 569af9f67eaSJean-Sébastien Pédron for (plan = 0; plan < 4; ++plan) 570af9f67eaSJean-Sébastien Pédron plans[i * 4 + plan] |= 571af9f67eaSJean-Sébastien Pédron ((color >> plan) & 0x1) << (7 - j); 572bdcaf97cSJean-Sébastien Pédron } 573af9f67eaSJean-Sébastien Pédron } 574af9f67eaSJean-Sébastien Pédron } 575af9f67eaSJean-Sébastien Pédron 576af9f67eaSJean-Sébastien Pédron /* 577af9f67eaSJean-Sébastien Pédron * The bytes are ready: we now switch to Write Mode 0 and write 578af9f67eaSJean-Sébastien Pédron * all bytes, one plan at a time. 579af9f67eaSJean-Sébastien Pédron */ 580af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 0); 581af9f67eaSJean-Sébastien Pédron 582af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 583af9f67eaSJean-Sébastien Pédron for (plan = 0; plan < 4; ++plan) { 584af9f67eaSJean-Sébastien Pédron /* Select plan. */ 585af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 586af9f67eaSJean-Sébastien Pédron 587af9f67eaSJean-Sébastien Pédron /* Write all bytes for this plan, from Y to Y+height. */ 588af9f67eaSJean-Sébastien Pédron for (i = 0; i < height; ++i) { 589af9f67eaSJean-Sébastien Pédron offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 590af9f67eaSJean-Sébastien Pédron MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 591bdcaf97cSJean-Sébastien Pédron } 592bdcaf97cSJean-Sébastien Pédron } 593bdcaf97cSJean-Sébastien Pédron } 594bdcaf97cSJean-Sébastien Pédron 595bdcaf97cSJean-Sébastien Pédron static void 596ab06c776SJean-Sébastien Pédron vga_bitblt_one_text_pixels_block(struct vt_device *vd, 597946d0288SJean-Sébastien Pédron const struct vt_window *vw, unsigned int x, unsigned int y) 598bdcaf97cSJean-Sébastien Pédron { 599ab06c776SJean-Sébastien Pédron const struct vt_buf *vb; 600ab06c776SJean-Sébastien Pédron const struct vt_font *vf; 601bdcaf97cSJean-Sébastien Pédron unsigned int i, col, row, src_x, x_count; 602bdcaf97cSJean-Sébastien Pédron unsigned int used_colors_list[16], used_colors; 603ab06c776SJean-Sébastien Pédron uint8_t pattern_2colors[vw->vw_font->vf_height]; 604ab06c776SJean-Sébastien Pédron uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 605bdcaf97cSJean-Sébastien Pédron term_char_t c; 606bdcaf97cSJean-Sébastien Pédron term_color_t fg, bg; 607bdcaf97cSJean-Sébastien Pédron const uint8_t *src; 608bdcaf97cSJean-Sébastien Pédron 609ab06c776SJean-Sébastien Pédron vb = &vw->vw_buf; 610ab06c776SJean-Sébastien Pédron vf = vw->vw_font; 611ab06c776SJean-Sébastien Pédron 612bdcaf97cSJean-Sébastien Pédron /* 613bdcaf97cSJean-Sébastien Pédron * The current pixels block. 614bdcaf97cSJean-Sébastien Pédron * 615bdcaf97cSJean-Sébastien Pédron * We fill it with portions of characters, because both "grids" 616bdcaf97cSJean-Sébastien Pédron * may not match. 617bdcaf97cSJean-Sébastien Pédron * 618bdcaf97cSJean-Sébastien Pédron * i is the index in this pixels block. 619bdcaf97cSJean-Sébastien Pédron */ 620bdcaf97cSJean-Sébastien Pédron 621bdcaf97cSJean-Sébastien Pédron i = x; 622bdcaf97cSJean-Sébastien Pédron used_colors = 0; 623bdcaf97cSJean-Sébastien Pédron memset(used_colors_list, 0, sizeof(used_colors_list)); 624bdcaf97cSJean-Sébastien Pédron memset(pattern_2colors, 0, sizeof(pattern_2colors)); 625bdcaf97cSJean-Sébastien Pédron memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 626bdcaf97cSJean-Sébastien Pédron 62783fbb296SJean-Sébastien Pédron if (i < vw->vw_draw_area.tr_begin.tp_col) { 628bdcaf97cSJean-Sébastien Pédron /* 629bdcaf97cSJean-Sébastien Pédron * i is in the margin used to center the text area on 630bdcaf97cSJean-Sébastien Pédron * the screen. 631bdcaf97cSJean-Sébastien Pédron */ 632bdcaf97cSJean-Sébastien Pédron 63383fbb296SJean-Sébastien Pédron i = vw->vw_draw_area.tr_begin.tp_col; 634bdcaf97cSJean-Sébastien Pédron } 635bdcaf97cSJean-Sébastien Pédron 63683fbb296SJean-Sébastien Pédron while (i < x + VT_VGA_PIXELS_BLOCK && 63783fbb296SJean-Sébastien Pédron i < vw->vw_draw_area.tr_end.tp_col) { 638bdcaf97cSJean-Sébastien Pédron /* 639bdcaf97cSJean-Sébastien Pédron * Find which character is drawn on this pixel in the 640bdcaf97cSJean-Sébastien Pédron * pixels block. 641bdcaf97cSJean-Sébastien Pédron * 642bdcaf97cSJean-Sébastien Pédron * While here, record what colors it uses. 643bdcaf97cSJean-Sébastien Pédron */ 644bdcaf97cSJean-Sébastien Pédron 64583fbb296SJean-Sébastien Pédron col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 64683fbb296SJean-Sébastien Pédron row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 647bdcaf97cSJean-Sébastien Pédron 648bdcaf97cSJean-Sébastien Pédron c = VTBUF_GET_FIELD(vb, row, col); 649bdcaf97cSJean-Sébastien Pédron src = vtfont_lookup(vf, c); 650bdcaf97cSJean-Sébastien Pédron 651bdcaf97cSJean-Sébastien Pédron vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 652bdcaf97cSJean-Sébastien Pédron if ((used_colors_list[fg] & 0x1) != 0x1) 653bdcaf97cSJean-Sébastien Pédron used_colors++; 654bdcaf97cSJean-Sébastien Pédron if ((used_colors_list[bg] & 0x2) != 0x2) 655bdcaf97cSJean-Sébastien Pédron used_colors++; 656bdcaf97cSJean-Sébastien Pédron used_colors_list[fg] |= 0x1; 657bdcaf97cSJean-Sébastien Pédron used_colors_list[bg] |= 0x2; 658bdcaf97cSJean-Sébastien Pédron 659bdcaf97cSJean-Sébastien Pédron /* 660bdcaf97cSJean-Sébastien Pédron * Compute the portion of the character we want to draw, 661bdcaf97cSJean-Sébastien Pédron * because the pixels block may start in the middle of a 662bdcaf97cSJean-Sébastien Pédron * character. 663bdcaf97cSJean-Sébastien Pédron * 664bdcaf97cSJean-Sébastien Pédron * The first pixel to draw in the character is 665bdcaf97cSJean-Sébastien Pédron * the current position - 666bdcaf97cSJean-Sébastien Pédron * the start position of the character 667bdcaf97cSJean-Sébastien Pédron * 668bdcaf97cSJean-Sébastien Pédron * The last pixel to draw is either 669bdcaf97cSJean-Sébastien Pédron * - the last pixel of the character, or 670bdcaf97cSJean-Sébastien Pédron * - the pixel of the character matching the end of 671bdcaf97cSJean-Sébastien Pédron * the pixels block 672bdcaf97cSJean-Sébastien Pédron * whichever comes first. This position is then 673bdcaf97cSJean-Sébastien Pédron * changed to be relative to the start position of the 674bdcaf97cSJean-Sébastien Pédron * character. 675bdcaf97cSJean-Sébastien Pédron */ 676bdcaf97cSJean-Sébastien Pédron 67783fbb296SJean-Sébastien Pédron src_x = i - 67883fbb296SJean-Sébastien Pédron (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 67983fbb296SJean-Sébastien Pédron x_count = min(min( 68083fbb296SJean-Sébastien Pédron (col + 1) * vf->vf_width + 68183fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_begin.tp_col, 68283fbb296SJean-Sébastien Pédron x + VT_VGA_PIXELS_BLOCK), 68383fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_end.tp_col); 68483fbb296SJean-Sébastien Pédron x_count -= col * vf->vf_width + 68583fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_begin.tp_col; 686bdcaf97cSJean-Sébastien Pédron x_count -= src_x; 687bdcaf97cSJean-Sébastien Pédron 688bdcaf97cSJean-Sébastien Pédron /* Copy a portion of the character. */ 689bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 690bdcaf97cSJean-Sébastien Pédron src, NULL, vf->vf_width, 691bdcaf97cSJean-Sébastien Pédron src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 692bdcaf97cSJean-Sébastien Pédron 0, 0, vf->vf_height, fg, bg, 0); 693bdcaf97cSJean-Sébastien Pédron 694bdcaf97cSJean-Sébastien Pédron /* We move to the next portion. */ 695bdcaf97cSJean-Sébastien Pédron i += x_count; 696bdcaf97cSJean-Sébastien Pédron } 697bdcaf97cSJean-Sébastien Pédron 698bdcaf97cSJean-Sébastien Pédron #ifndef SC_NO_CUTPASTE 699bdcaf97cSJean-Sébastien Pédron /* 700bdcaf97cSJean-Sébastien Pédron * Copy the mouse pointer bitmap if it's over the current pixels 701bdcaf97cSJean-Sébastien Pédron * block. 702bdcaf97cSJean-Sébastien Pédron * 703bdcaf97cSJean-Sébastien Pédron * We use the saved cursor position (saved in vt_flush()), because 704bdcaf97cSJean-Sébastien Pédron * the current position could be different than the one used 705bdcaf97cSJean-Sébastien Pédron * to mark the area dirty. 706bdcaf97cSJean-Sébastien Pédron */ 707946d0288SJean-Sébastien Pédron term_rect_t drawn_area; 708946d0288SJean-Sébastien Pédron 709946d0288SJean-Sébastien Pédron drawn_area.tr_begin.tp_col = x; 710946d0288SJean-Sébastien Pédron drawn_area.tr_begin.tp_row = y; 711946d0288SJean-Sébastien Pédron drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 712946d0288SJean-Sébastien Pédron drawn_area.tr_end.tp_row = y + vf->vf_height; 713946d0288SJean-Sébastien Pédron if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 714946d0288SJean-Sébastien Pédron struct vt_mouse_cursor *cursor; 715946d0288SJean-Sébastien Pédron unsigned int mx, my; 716bdcaf97cSJean-Sébastien Pédron unsigned int dst_x, src_y, dst_y, y_count; 717bdcaf97cSJean-Sébastien Pédron 718946d0288SJean-Sébastien Pédron cursor = vd->vd_mcursor; 71983fbb296SJean-Sébastien Pédron mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 72083fbb296SJean-Sébastien Pédron my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 721946d0288SJean-Sébastien Pédron 722bdcaf97cSJean-Sébastien Pédron /* Compute the portion of the cursor we want to copy. */ 723bdcaf97cSJean-Sébastien Pédron src_x = x > mx ? x - mx : 0; 724bdcaf97cSJean-Sébastien Pédron dst_x = mx > x ? mx - x : 0; 72583fbb296SJean-Sébastien Pédron x_count = min(min(min( 72683fbb296SJean-Sébastien Pédron cursor->width - src_x, 72783fbb296SJean-Sébastien Pédron x + VT_VGA_PIXELS_BLOCK - mx), 72883fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_end.tp_col - mx), 729bdcaf97cSJean-Sébastien Pédron VT_VGA_PIXELS_BLOCK); 730bdcaf97cSJean-Sébastien Pédron 731bdcaf97cSJean-Sébastien Pédron /* 732bdcaf97cSJean-Sébastien Pédron * The cursor isn't aligned on the Y-axis with 733bdcaf97cSJean-Sébastien Pédron * characters, so we need to compute the vertical 734bdcaf97cSJean-Sébastien Pédron * start/count. 735bdcaf97cSJean-Sébastien Pédron */ 736bdcaf97cSJean-Sébastien Pédron src_y = y > my ? y - my : 0; 737bdcaf97cSJean-Sébastien Pédron dst_y = my > y ? my - y : 0; 738bdcaf97cSJean-Sébastien Pédron y_count = min( 739bdcaf97cSJean-Sébastien Pédron min(cursor->height - src_y, y + vf->vf_height - my), 740bdcaf97cSJean-Sébastien Pédron vf->vf_height); 741bdcaf97cSJean-Sébastien Pédron 742bdcaf97cSJean-Sébastien Pédron /* Copy the cursor portion. */ 743bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 744bdcaf97cSJean-Sébastien Pédron cursor->map, cursor->mask, cursor->width, 745bdcaf97cSJean-Sébastien Pédron src_x, dst_x, x_count, src_y, dst_y, y_count, 7463235c9ebSJean-Sébastien Pédron vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 747bdcaf97cSJean-Sébastien Pédron 7483235c9ebSJean-Sébastien Pédron if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 749bdcaf97cSJean-Sébastien Pédron used_colors++; 7503235c9ebSJean-Sébastien Pédron if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 751bdcaf97cSJean-Sébastien Pédron used_colors++; 752bdcaf97cSJean-Sébastien Pédron } 753bdcaf97cSJean-Sébastien Pédron #endif 754bdcaf97cSJean-Sébastien Pédron 755bdcaf97cSJean-Sébastien Pédron /* 756bdcaf97cSJean-Sébastien Pédron * The pixels block is completed, we can now draw it on the 757bdcaf97cSJean-Sébastien Pédron * screen. 758bdcaf97cSJean-Sébastien Pédron */ 759bdcaf97cSJean-Sébastien Pédron if (used_colors == 2) 760bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 761bdcaf97cSJean-Sébastien Pédron x, y, vf->vf_height); 762bdcaf97cSJean-Sébastien Pédron else 763bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 764bdcaf97cSJean-Sébastien Pédron x, y, vf->vf_height); 765bdcaf97cSJean-Sébastien Pédron } 766bdcaf97cSJean-Sébastien Pédron 767bdcaf97cSJean-Sébastien Pédron static void 768ab06c776SJean-Sébastien Pédron vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 769946d0288SJean-Sébastien Pédron const term_rect_t *area) 770bdcaf97cSJean-Sébastien Pédron { 771ab06c776SJean-Sébastien Pédron const struct vt_font *vf; 772bdcaf97cSJean-Sébastien Pédron unsigned int col, row; 773bdcaf97cSJean-Sébastien Pédron unsigned int x1, y1, x2, y2, x, y; 774bdcaf97cSJean-Sébastien Pédron 775ab06c776SJean-Sébastien Pédron vf = vw->vw_font; 776ab06c776SJean-Sébastien Pédron 777bdcaf97cSJean-Sébastien Pédron /* 778bdcaf97cSJean-Sébastien Pédron * Compute the top-left pixel position aligned with the video 779bdcaf97cSJean-Sébastien Pédron * adapter pixels block size. 780bdcaf97cSJean-Sébastien Pédron * 781bdcaf97cSJean-Sébastien Pédron * This is calculated from the top-left column of te dirty area: 782bdcaf97cSJean-Sébastien Pédron * 783bdcaf97cSJean-Sébastien Pédron * 1. Compute the top-left pixel of the character: 784bdcaf97cSJean-Sébastien Pédron * col * font width + x offset 785bdcaf97cSJean-Sébastien Pédron * 786bdcaf97cSJean-Sébastien Pédron * NOTE: x offset is used to center the text area on the 787bdcaf97cSJean-Sébastien Pédron * screen. It's expressed in pixels, not in characters 788bdcaf97cSJean-Sébastien Pédron * col/row! 789bdcaf97cSJean-Sébastien Pédron * 790bdcaf97cSJean-Sébastien Pédron * 2. Find the pixel further on the left marking the start of 791bdcaf97cSJean-Sébastien Pédron * an aligned pixels block (eg. chunk of 8 pixels): 792bdcaf97cSJean-Sébastien Pédron * character's x / blocksize * blocksize 793bdcaf97cSJean-Sébastien Pédron * 794bdcaf97cSJean-Sébastien Pédron * The division, being made on integers, achieves the 795bdcaf97cSJean-Sébastien Pédron * alignment. 796bdcaf97cSJean-Sébastien Pédron * 797bdcaf97cSJean-Sébastien Pédron * For the Y-axis, we need to compute the character's y 798bdcaf97cSJean-Sébastien Pédron * coordinate, but we don't need to align it. 799bdcaf97cSJean-Sébastien Pédron */ 800bdcaf97cSJean-Sébastien Pédron 801bdcaf97cSJean-Sébastien Pédron col = area->tr_begin.tp_col; 802bdcaf97cSJean-Sébastien Pédron row = area->tr_begin.tp_row; 80383fbb296SJean-Sébastien Pédron x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 804bdcaf97cSJean-Sébastien Pédron / VT_VGA_PIXELS_BLOCK) 805bdcaf97cSJean-Sébastien Pédron * VT_VGA_PIXELS_BLOCK; 80683fbb296SJean-Sébastien Pédron y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 807bdcaf97cSJean-Sébastien Pédron 808bdcaf97cSJean-Sébastien Pédron /* 809bdcaf97cSJean-Sébastien Pédron * Compute the bottom right pixel position, again, aligned with 810bdcaf97cSJean-Sébastien Pédron * the pixels block size. 811bdcaf97cSJean-Sébastien Pédron * 812bdcaf97cSJean-Sébastien Pédron * The same rules apply, we just add 1 to base the computation 813bdcaf97cSJean-Sébastien Pédron * on the "right border" of the dirty area. 814bdcaf97cSJean-Sébastien Pédron */ 815bdcaf97cSJean-Sébastien Pédron 816bdcaf97cSJean-Sébastien Pédron col = area->tr_end.tp_col; 817bdcaf97cSJean-Sébastien Pédron row = area->tr_end.tp_row; 818057b4402SPedro F. Giffuni x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col, 819057b4402SPedro F. Giffuni VT_VGA_PIXELS_BLOCK) 820bdcaf97cSJean-Sébastien Pédron * VT_VGA_PIXELS_BLOCK; 82183fbb296SJean-Sébastien Pédron y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 822bdcaf97cSJean-Sébastien Pédron 82383fbb296SJean-Sébastien Pédron /* Clip the area to the screen size. */ 82483fbb296SJean-Sébastien Pédron x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 82583fbb296SJean-Sébastien Pédron y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 82637fcd291SJean-Sébastien Pédron 82737fcd291SJean-Sébastien Pédron /* 828bdcaf97cSJean-Sébastien Pédron * Now, we take care of N pixels line at a time (the first for 829bdcaf97cSJean-Sébastien Pédron * loop, N = font height), and for these lines, draw one pixels 830bdcaf97cSJean-Sébastien Pédron * block at a time (the second for loop), not a character at a 831bdcaf97cSJean-Sébastien Pédron * time. 832bdcaf97cSJean-Sébastien Pédron * 833bdcaf97cSJean-Sébastien Pédron * Therefore, on the X-axis, characters my be drawn partially if 834bdcaf97cSJean-Sébastien Pédron * they are not aligned on 8-pixels boundary. 835bdcaf97cSJean-Sébastien Pédron * 836bdcaf97cSJean-Sébastien Pédron * However, the operation is repeated for the full height of the 837bdcaf97cSJean-Sébastien Pédron * font before moving to the next character, because it allows 838bdcaf97cSJean-Sébastien Pédron * to keep the color settings and write mode, before perhaps 839bdcaf97cSJean-Sébastien Pédron * changing them with the next one. 840bdcaf97cSJean-Sébastien Pédron */ 841bdcaf97cSJean-Sébastien Pédron 842bdcaf97cSJean-Sébastien Pédron for (y = y1; y < y2; y += vf->vf_height) { 843bdcaf97cSJean-Sébastien Pédron for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 844946d0288SJean-Sébastien Pédron vga_bitblt_one_text_pixels_block(vd, vw, x, y); 845bdcaf97cSJean-Sébastien Pédron } 846bdcaf97cSJean-Sébastien Pédron } 847bdcaf97cSJean-Sébastien Pédron } 848bdcaf97cSJean-Sébastien Pédron 849bdcaf97cSJean-Sébastien Pédron static void 850ab06c776SJean-Sébastien Pédron vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 851946d0288SJean-Sébastien Pédron const term_rect_t *area) 852bdcaf97cSJean-Sébastien Pédron { 853bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 854ab06c776SJean-Sébastien Pédron const struct vt_buf *vb; 855bdcaf97cSJean-Sébastien Pédron unsigned int col, row; 856bdcaf97cSJean-Sébastien Pédron term_char_t c; 857bdcaf97cSJean-Sébastien Pédron term_color_t fg, bg; 858bdcaf97cSJean-Sébastien Pédron uint8_t ch, attr; 859bdcaf97cSJean-Sébastien Pédron 860bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 861ab06c776SJean-Sébastien Pédron vb = &vw->vw_buf; 862bdcaf97cSJean-Sébastien Pédron 863bdcaf97cSJean-Sébastien Pédron for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 864bdcaf97cSJean-Sébastien Pédron for (col = area->tr_begin.tp_col; 865bdcaf97cSJean-Sébastien Pédron col < area->tr_end.tp_col; 866bdcaf97cSJean-Sébastien Pédron ++col) { 867bdcaf97cSJean-Sébastien Pédron /* 868bdcaf97cSJean-Sébastien Pédron * Get next character and its associated fg/bg 869bdcaf97cSJean-Sébastien Pédron * colors. 870bdcaf97cSJean-Sébastien Pédron */ 871bdcaf97cSJean-Sébastien Pédron c = VTBUF_GET_FIELD(vb, row, col); 872bdcaf97cSJean-Sébastien Pédron vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 873bdcaf97cSJean-Sébastien Pédron &fg, &bg); 874bdcaf97cSJean-Sébastien Pédron 875bdcaf97cSJean-Sébastien Pédron /* 876bdcaf97cSJean-Sébastien Pédron * Convert character to CP437, which is the 877bdcaf97cSJean-Sébastien Pédron * character set used by the VGA hardware by 878bdcaf97cSJean-Sébastien Pédron * default. 879a401c53aSAleksandr Rybalko */ 88081788a2bSJean-Sébastien Pédron ch = vga_get_cp437(TCHAR_CHARACTER(c)); 881a401c53aSAleksandr Rybalko 882bdcaf97cSJean-Sébastien Pédron /* Convert colors to VGA attributes. */ 883a401c53aSAleksandr Rybalko attr = bg << 4 | fg; 884a401c53aSAleksandr Rybalko 8856280434fSMarcel Moolenaar MEM_WRITE1(sc, (row * 80 + col) * 2 + 0, 886bdcaf97cSJean-Sébastien Pédron ch); 8876280434fSMarcel Moolenaar MEM_WRITE1(sc, (row * 80 + col) * 2 + 1, 888bdcaf97cSJean-Sébastien Pédron attr); 889bdcaf97cSJean-Sébastien Pédron } 890bdcaf97cSJean-Sébastien Pédron } 891bdcaf97cSJean-Sébastien Pédron } 892bdcaf97cSJean-Sébastien Pédron 893bdcaf97cSJean-Sébastien Pédron static void 894ab06c776SJean-Sébastien Pédron vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 895946d0288SJean-Sébastien Pédron const term_rect_t *area) 896bdcaf97cSJean-Sébastien Pédron { 897bdcaf97cSJean-Sébastien Pédron 898bdcaf97cSJean-Sébastien Pédron if (!(vd->vd_flags & VDF_TEXTMODE)) { 899946d0288SJean-Sébastien Pédron vga_bitblt_text_gfxmode(vd, vw, area); 900bdcaf97cSJean-Sébastien Pédron } else { 901946d0288SJean-Sébastien Pédron vga_bitblt_text_txtmode(vd, vw, area); 902bdcaf97cSJean-Sébastien Pédron } 903a401c53aSAleksandr Rybalko } 904a401c53aSAleksandr Rybalko 905a401c53aSAleksandr Rybalko static void 906631bb572SJean-Sébastien Pédron vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 907631bb572SJean-Sébastien Pédron const uint8_t *pattern, const uint8_t *mask, 908631bb572SJean-Sébastien Pédron unsigned int width, unsigned int height, 909631bb572SJean-Sébastien Pédron unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 910631bb572SJean-Sébastien Pédron { 911631bb572SJean-Sébastien Pédron unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 9127e1770a7SJean-Sébastien Pédron uint8_t pattern_2colors; 913631bb572SJean-Sébastien Pédron 914631bb572SJean-Sébastien Pédron /* Align coordinates with the 8-pxels grid. */ 9154ed3c0e7SPedro F. Giffuni x1 = rounddown(x, VT_VGA_PIXELS_BLOCK); 916631bb572SJean-Sébastien Pédron y1 = y; 917631bb572SJean-Sébastien Pédron 918057b4402SPedro F. Giffuni x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK); 919631bb572SJean-Sébastien Pédron y2 = y + height; 920631bb572SJean-Sébastien Pédron x2 = min(x2, vd->vd_width - 1); 921631bb572SJean-Sébastien Pédron y2 = min(y2, vd->vd_height - 1); 922631bb572SJean-Sébastien Pédron 923631bb572SJean-Sébastien Pédron for (j = y1; j < y2; ++j) { 924631bb572SJean-Sébastien Pédron src_x = 0; 925631bb572SJean-Sébastien Pédron dst_x = x - x1; 926631bb572SJean-Sébastien Pédron x_count = VT_VGA_PIXELS_BLOCK - dst_x; 927631bb572SJean-Sébastien Pédron 9287e1770a7SJean-Sébastien Pédron for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 929631bb572SJean-Sébastien Pédron pattern_2colors = 0; 930631bb572SJean-Sébastien Pédron 931631bb572SJean-Sébastien Pédron vga_copy_bitmap_portion( 9327e1770a7SJean-Sébastien Pédron &pattern_2colors, NULL, 933631bb572SJean-Sébastien Pédron pattern, mask, width, 934631bb572SJean-Sébastien Pédron src_x, dst_x, x_count, 935631bb572SJean-Sébastien Pédron j - y1, 0, 1, fg, bg, 0); 936631bb572SJean-Sébastien Pédron 937631bb572SJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(vd, 938631bb572SJean-Sébastien Pédron &pattern_2colors, fg, bg, 939631bb572SJean-Sébastien Pédron i, j, 1); 940631bb572SJean-Sébastien Pédron 941631bb572SJean-Sébastien Pédron src_x += x_count; 942631bb572SJean-Sébastien Pédron dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 9437e1770a7SJean-Sébastien Pédron x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 944631bb572SJean-Sébastien Pédron } 945631bb572SJean-Sébastien Pédron } 946631bb572SJean-Sébastien Pédron } 947631bb572SJean-Sébastien Pédron 948631bb572SJean-Sébastien Pédron static void 949a401c53aSAleksandr Rybalko vga_initialize_graphics(struct vt_device *vd) 950a401c53aSAleksandr Rybalko { 951a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 952a401c53aSAleksandr Rybalko 953a401c53aSAleksandr Rybalko /* Clock select. */ 954a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 955a401c53aSAleksandr Rybalko VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 956a401c53aSAleksandr Rybalko /* Set sequencer clocking and memory mode. */ 957a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 958a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 959a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 960a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 961a401c53aSAleksandr Rybalko 962a401c53aSAleksandr Rybalko /* Set the graphics controller in graphics mode. */ 963a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 964a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 965a401c53aSAleksandr Rybalko /* Program the CRT controller. */ 966a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 967a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 968a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 969a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 970a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 971a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 972a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 973a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 974a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 975a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 976a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 977a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 978a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 979a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 980a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 981a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 982a401c53aSAleksandr Rybalko VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 983a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 984a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 985a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 986a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 987a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 988a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 989a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 990a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 991a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 992a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 993a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 994a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 995a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 996a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 997a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 998a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 999a401c53aSAleksandr Rybalko VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1000a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1001a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1002a401c53aSAleksandr Rybalko 1003a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1004a401c53aSAleksandr Rybalko 1005a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1006a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1007a401c53aSAleksandr Rybalko VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1008a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1009a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1010a401c53aSAleksandr Rybalko 1011a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1012a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1013a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1014a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1015a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1016a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1017a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1018a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1019a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1020a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1021a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1022a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1023a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1024a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1025a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1026a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1027a401c53aSAleksandr Rybalko } 1028a401c53aSAleksandr Rybalko 1029f0e31fe0SRoger Pau Monné static int 1030a401c53aSAleksandr Rybalko vga_initialize(struct vt_device *vd, int textmode) 1031a401c53aSAleksandr Rybalko { 1032a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 1033a401c53aSAleksandr Rybalko uint8_t x; 1034f0e31fe0SRoger Pau Monné int timeout; 1035a401c53aSAleksandr Rybalko 1036a401c53aSAleksandr Rybalko /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1037a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1038a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1039a401c53aSAleksandr Rybalko 1040a401c53aSAleksandr Rybalko /* Unprotect CRTC registers 0-7. */ 1041a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1042a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1043a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1044a401c53aSAleksandr Rybalko 1045a401c53aSAleksandr Rybalko /* 1046a401c53aSAleksandr Rybalko * Wait for the vertical retrace. 1047a401c53aSAleksandr Rybalko * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1048a401c53aSAleksandr Rybalko * the side-effect of clearing the internal flip-flip of the attribute 1049a401c53aSAleksandr Rybalko * controller's write register. This means that because this code is 1050a401c53aSAleksandr Rybalko * here, we know for sure that the first write to the attribute 1051a401c53aSAleksandr Rybalko * controller will be a write to the address register. Removing this 1052a401c53aSAleksandr Rybalko * code therefore also removes that guarantee and appropriate measures 1053a401c53aSAleksandr Rybalko * need to be taken. 1054a401c53aSAleksandr Rybalko */ 1055f0e31fe0SRoger Pau Monné timeout = 10000; 1056a401c53aSAleksandr Rybalko do { 1057f0e31fe0SRoger Pau Monné DELAY(10); 1058a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1059a401c53aSAleksandr Rybalko x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1060f0e31fe0SRoger Pau Monné } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1061f0e31fe0SRoger Pau Monné if (timeout == 0) { 1062f0e31fe0SRoger Pau Monné printf("Timeout initializing vt_vga\n"); 1063f0e31fe0SRoger Pau Monné return (ENXIO); 1064f0e31fe0SRoger Pau Monné } 1065a401c53aSAleksandr Rybalko 1066a401c53aSAleksandr Rybalko /* Now, disable the sync. signals. */ 1067a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1068a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1069a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1070a401c53aSAleksandr Rybalko 1071a401c53aSAleksandr Rybalko /* Asynchronous sequencer reset. */ 1072a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1073a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1074a401c53aSAleksandr Rybalko 1075a401c53aSAleksandr Rybalko if (!textmode) 1076a401c53aSAleksandr Rybalko vga_initialize_graphics(vd); 1077a401c53aSAleksandr Rybalko 1078a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1079a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1080a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1081a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1082a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1083a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1084a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1085a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1086a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1087a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1088a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1089a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1090a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1091a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1092a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1093a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1094a401c53aSAleksandr Rybalko 1095a401c53aSAleksandr Rybalko if (textmode) { 1096a401c53aSAleksandr Rybalko /* Set the attribute controller to blink disable. */ 1097a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1098a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1099a401c53aSAleksandr Rybalko } else { 1100a401c53aSAleksandr Rybalko /* Set the attribute controller in graphics mode. */ 1101a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1102a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1103a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1104a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1105a401c53aSAleksandr Rybalko } 1106a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1107a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1108a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1109a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1110a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1111a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1112a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1113a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1114a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1115a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1116a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1117a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1118a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1119a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1120a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1121a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1122a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1123a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1124a401c53aSAleksandr Rybalko VGA_AC_PAL_SB); 1125a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1126a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1127a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_R); 1128a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1129a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1130a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_G); 1131a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1132a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1133a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1134a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1135a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1136a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_B); 1137a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1138a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1139a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1140a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1141a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1142a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1143a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1144a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1145a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1146a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1147a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1148a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1149a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1150a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1151a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1152a401c53aSAleksandr Rybalko 1153a401c53aSAleksandr Rybalko if (!textmode) { 1154a401c53aSAleksandr Rybalko u_int ofs; 1155a401c53aSAleksandr Rybalko 1156a401c53aSAleksandr Rybalko /* 1157a401c53aSAleksandr Rybalko * Done. Clear the frame buffer. All bit planes are 1158a401c53aSAleksandr Rybalko * enabled, so a single-paged loop should clear all 1159a401c53aSAleksandr Rybalko * planes. 1160a401c53aSAleksandr Rybalko */ 1161a401c53aSAleksandr Rybalko for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1162a401c53aSAleksandr Rybalko MEM_WRITE1(sc, ofs, 0); 1163a401c53aSAleksandr Rybalko } 1164a401c53aSAleksandr Rybalko } 1165a401c53aSAleksandr Rybalko 1166a401c53aSAleksandr Rybalko /* Re-enable the sequencer. */ 1167a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1168a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1169a401c53aSAleksandr Rybalko /* Re-enable the sync signals. */ 1170a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1171a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1172a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1173a401c53aSAleksandr Rybalko 1174a401c53aSAleksandr Rybalko if (!textmode) { 1175a401c53aSAleksandr Rybalko /* Switch to write mode 3, because we'll mainly do bitblt. */ 1176a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1177a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 3); 1178af9f67eaSJean-Sébastien Pédron sc->vga_wmode = 3; 1179af9f67eaSJean-Sébastien Pédron 1180af9f67eaSJean-Sébastien Pédron /* 1181af9f67eaSJean-Sébastien Pédron * In Write Mode 3, Enable Set/Reset is ignored, but we 1182af9f67eaSJean-Sébastien Pédron * use Write Mode 0 to write a group of 8 pixels using 1183af9f67eaSJean-Sébastien Pédron * 3 or more colors. In this case, we want to disable 1184af9f67eaSJean-Sébastien Pédron * Set/Reset: set Enable Set/Reset to 0. 1185af9f67eaSJean-Sébastien Pédron */ 1186a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1187af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1188bdcaf97cSJean-Sébastien Pédron 1189bdcaf97cSJean-Sébastien Pédron /* 1190bdcaf97cSJean-Sébastien Pédron * Clear the colors we think are loaded into Set/Reset or 1191bdcaf97cSJean-Sébastien Pédron * the latches. 1192bdcaf97cSJean-Sébastien Pédron */ 1193bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = sc->vga_curbg = 0xff; 1194a401c53aSAleksandr Rybalko } 1195f0e31fe0SRoger Pau Monné 1196f0e31fe0SRoger Pau Monné return (0); 1197a401c53aSAleksandr Rybalko } 1198a401c53aSAleksandr Rybalko 1199a401c53aSAleksandr Rybalko static int 1200a401c53aSAleksandr Rybalko vga_probe(struct vt_device *vd) 1201a401c53aSAleksandr Rybalko { 1202a401c53aSAleksandr Rybalko 1203a401c53aSAleksandr Rybalko return (CN_INTERNAL); 1204a401c53aSAleksandr Rybalko } 1205a401c53aSAleksandr Rybalko 1206a401c53aSAleksandr Rybalko static int 1207a401c53aSAleksandr Rybalko vga_init(struct vt_device *vd) 1208a401c53aSAleksandr Rybalko { 1209a401c53aSAleksandr Rybalko struct vga_softc *sc; 1210a401c53aSAleksandr Rybalko int textmode; 1211a401c53aSAleksandr Rybalko 1212a401c53aSAleksandr Rybalko if (vd->vd_softc == NULL) 1213a401c53aSAleksandr Rybalko vd->vd_softc = (void *)&vga_conssoftc; 1214a401c53aSAleksandr Rybalko sc = vd->vd_softc; 1215a401c53aSAleksandr Rybalko 121676e2f976SJean-Sébastien Pédron if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 121776e2f976SJean-Sébastien Pédron vga_pci_repost(vd->vd_video_dev); 121876e2f976SJean-Sébastien Pédron 1219a401c53aSAleksandr Rybalko #if defined(__amd64__) || defined(__i386__) 1220a401c53aSAleksandr Rybalko sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1221a401c53aSAleksandr Rybalko sc->vga_reg_tag = X86_BUS_SPACE_IO; 1222a401c53aSAleksandr Rybalko #else 1223a401c53aSAleksandr Rybalko # error "Architecture not yet supported!" 1224a401c53aSAleksandr Rybalko #endif 1225a401c53aSAleksandr Rybalko 12267ef5e8bcSMarcel Moolenaar bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 12277ef5e8bcSMarcel Moolenaar &sc->vga_reg_handle); 12287ef5e8bcSMarcel Moolenaar 12299a4a2c61SSepherosa Ziehau /* 12309a4a2c61SSepherosa Ziehau * If "hw.vga.textmode" is not set and we're running on hypervisor, 12319a4a2c61SSepherosa Ziehau * we use text mode by default, this is because when we're on 12329a4a2c61SSepherosa Ziehau * hypervisor, vt(4) is usually much slower in graphics mode than 12339a4a2c61SSepherosa Ziehau * in text mode, especially when we're on Hyper-V. 12349a4a2c61SSepherosa Ziehau */ 12359a4a2c61SSepherosa Ziehau textmode = vm_guest != VM_GUEST_NO; 1236a401c53aSAleksandr Rybalko TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1237a401c53aSAleksandr Rybalko if (textmode) { 1238a401c53aSAleksandr Rybalko vd->vd_flags |= VDF_TEXTMODE; 1239a401c53aSAleksandr Rybalko vd->vd_width = 80; 1240a401c53aSAleksandr Rybalko vd->vd_height = 25; 12416280434fSMarcel Moolenaar bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 12426280434fSMarcel Moolenaar &sc->vga_fb_handle); 1243a401c53aSAleksandr Rybalko } else { 1244a401c53aSAleksandr Rybalko vd->vd_width = VT_VGA_WIDTH; 1245a401c53aSAleksandr Rybalko vd->vd_height = VT_VGA_HEIGHT; 12466280434fSMarcel Moolenaar bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 12476280434fSMarcel Moolenaar &sc->vga_fb_handle); 1248a401c53aSAleksandr Rybalko } 1249f0e31fe0SRoger Pau Monné if (vga_initialize(vd, textmode) != 0) 1250f0e31fe0SRoger Pau Monné return (CN_DEAD); 1251acb332a8SRoger Pau Monné sc->vga_enabled = true; 1252a401c53aSAleksandr Rybalko 1253a401c53aSAleksandr Rybalko return (CN_INTERNAL); 1254a401c53aSAleksandr Rybalko } 1255a401c53aSAleksandr Rybalko 1256a401c53aSAleksandr Rybalko static void 1257a401c53aSAleksandr Rybalko vga_postswitch(struct vt_device *vd) 1258a401c53aSAleksandr Rybalko { 1259a401c53aSAleksandr Rybalko 1260a401c53aSAleksandr Rybalko /* Reinit VGA mode, to restore view after app which change mode. */ 1261a401c53aSAleksandr Rybalko vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1262a401c53aSAleksandr Rybalko /* Ask vt(9) to update chars on visible area. */ 1263a401c53aSAleksandr Rybalko vd->vd_flags |= VDF_INVALID; 1264a401c53aSAleksandr Rybalko } 1265acb332a8SRoger Pau Monné 1266acb332a8SRoger Pau Monné /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1267acb332a8SRoger Pau Monné static void 1268acb332a8SRoger Pau Monné vtvga_identify(driver_t *driver, device_t parent) 1269acb332a8SRoger Pau Monné { 1270acb332a8SRoger Pau Monné 1271acb332a8SRoger Pau Monné if (!vga_conssoftc.vga_enabled) 1272acb332a8SRoger Pau Monné return; 1273acb332a8SRoger Pau Monné 1274acb332a8SRoger Pau Monné if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1275acb332a8SRoger Pau Monné panic("Unable to attach vt_vga console"); 1276acb332a8SRoger Pau Monné } 1277acb332a8SRoger Pau Monné 1278acb332a8SRoger Pau Monné static int 1279acb332a8SRoger Pau Monné vtvga_probe(device_t dev) 1280acb332a8SRoger Pau Monné { 1281acb332a8SRoger Pau Monné 1282bae1c14dSRui Paulo device_set_desc(dev, "VT VGA driver"); 1283bae1c14dSRui Paulo 1284acb332a8SRoger Pau Monné return (BUS_PROBE_NOWILDCARD); 1285acb332a8SRoger Pau Monné } 1286acb332a8SRoger Pau Monné 1287acb332a8SRoger Pau Monné static int 1288acb332a8SRoger Pau Monné vtvga_attach(device_t dev) 1289acb332a8SRoger Pau Monné { 1290acb332a8SRoger Pau Monné struct resource *pseudo_phys_res; 1291acb332a8SRoger Pau Monné int res_id; 1292acb332a8SRoger Pau Monné 1293acb332a8SRoger Pau Monné res_id = 0; 1294acb332a8SRoger Pau Monné pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1295bc59086cSRoger Pau Monné &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1296acb332a8SRoger Pau Monné VGA_MEM_SIZE, RF_ACTIVE); 1297acb332a8SRoger Pau Monné if (pseudo_phys_res == NULL) 1298acb332a8SRoger Pau Monné panic("Unable to reserve vt_vga memory"); 1299acb332a8SRoger Pau Monné return (0); 1300acb332a8SRoger Pau Monné } 1301acb332a8SRoger Pau Monné 1302acb332a8SRoger Pau Monné /*-------------------- Private Device Attachment Data -----------------------*/ 1303acb332a8SRoger Pau Monné static device_method_t vtvga_methods[] = { 1304acb332a8SRoger Pau Monné /* Device interface */ 1305acb332a8SRoger Pau Monné DEVMETHOD(device_identify, vtvga_identify), 1306acb332a8SRoger Pau Monné DEVMETHOD(device_probe, vtvga_probe), 1307acb332a8SRoger Pau Monné DEVMETHOD(device_attach, vtvga_attach), 1308acb332a8SRoger Pau Monné 1309acb332a8SRoger Pau Monné DEVMETHOD_END 1310acb332a8SRoger Pau Monné }; 1311acb332a8SRoger Pau Monné 1312acb332a8SRoger Pau Monné DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1313acb332a8SRoger Pau Monné devclass_t vtvga_devclass; 1314acb332a8SRoger Pau Monné 1315acb332a8SRoger Pau Monné DRIVER_MODULE(vtvga, nexus, vtvga_driver, vtvga_devclass, NULL, NULL); 1316