1a401c53aSAleksandr Rybalko /*- 2a401c53aSAleksandr Rybalko * Copyright (c) 2005 Marcel Moolenaar 3a401c53aSAleksandr Rybalko * All rights reserved. 4a401c53aSAleksandr Rybalko * 5a401c53aSAleksandr Rybalko * Copyright (c) 2009 The FreeBSD Foundation 6a401c53aSAleksandr Rybalko * All rights reserved. 7a401c53aSAleksandr Rybalko * 8a401c53aSAleksandr Rybalko * Portions of this software were developed by Ed Schouten 9a401c53aSAleksandr Rybalko * under sponsorship from the FreeBSD Foundation. 10a401c53aSAleksandr Rybalko * 11a401c53aSAleksandr Rybalko * Redistribution and use in source and binary forms, with or without 12a401c53aSAleksandr Rybalko * modification, are permitted provided that the following conditions 13a401c53aSAleksandr Rybalko * are met: 14a401c53aSAleksandr Rybalko * 1. Redistributions of source code must retain the above copyright 15a401c53aSAleksandr Rybalko * notice, this list of conditions and the following disclaimer. 16a401c53aSAleksandr Rybalko * 2. Redistributions in binary form must reproduce the above copyright 17a401c53aSAleksandr Rybalko * notice, this list of conditions and the following disclaimer in the 18a401c53aSAleksandr Rybalko * documentation and/or other materials provided with the distribution. 19a401c53aSAleksandr Rybalko * 20a401c53aSAleksandr Rybalko * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21a401c53aSAleksandr Rybalko * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22a401c53aSAleksandr Rybalko * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23a401c53aSAleksandr Rybalko * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24a401c53aSAleksandr Rybalko * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25a401c53aSAleksandr Rybalko * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26a401c53aSAleksandr Rybalko * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27a401c53aSAleksandr Rybalko * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28a401c53aSAleksandr Rybalko * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29a401c53aSAleksandr Rybalko * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30a401c53aSAleksandr Rybalko * SUCH DAMAGE. 31a401c53aSAleksandr Rybalko */ 32a401c53aSAleksandr Rybalko 33c2272faaSRoger Pau Monné #include "opt_acpi.h" 34c2272faaSRoger Pau Monné 35a401c53aSAleksandr Rybalko #include <sys/cdefs.h> 36a401c53aSAleksandr Rybalko __FBSDID("$FreeBSD$"); 37a401c53aSAleksandr Rybalko 38a401c53aSAleksandr Rybalko #include <sys/param.h> 39a401c53aSAleksandr Rybalko #include <sys/kernel.h> 40a401c53aSAleksandr Rybalko #include <sys/systm.h> 41acb332a8SRoger Pau Monné #include <sys/bus.h> 42acb332a8SRoger Pau Monné #include <sys/module.h> 43acb332a8SRoger Pau Monné #include <sys/rman.h> 44a401c53aSAleksandr Rybalko 45a401c53aSAleksandr Rybalko #include <dev/vt/vt.h> 465e251aecSJean-Sébastien Pédron #include <dev/vt/colors/vt_termcolors.h> 47a401c53aSAleksandr Rybalko #include <dev/vt/hw/vga/vt_vga_reg.h> 4876e2f976SJean-Sébastien Pédron #include <dev/pci/pcivar.h> 49a401c53aSAleksandr Rybalko 50a401c53aSAleksandr Rybalko #include <machine/bus.h> 51a401c53aSAleksandr Rybalko 52c2272faaSRoger Pau Monné #if ((defined(__amd64__) || defined(__i386__)) && defined(DEV_ACPI)) 53c2272faaSRoger Pau Monné #include <contrib/dev/acpica/include/acpi.h> 54c2272faaSRoger Pau Monné #endif 55c2272faaSRoger Pau Monné 56a401c53aSAleksandr Rybalko struct vga_softc { 57a401c53aSAleksandr Rybalko bus_space_tag_t vga_fb_tag; 58a401c53aSAleksandr Rybalko bus_space_handle_t vga_fb_handle; 59a401c53aSAleksandr Rybalko bus_space_tag_t vga_reg_tag; 60a401c53aSAleksandr Rybalko bus_space_handle_t vga_reg_handle; 61af9f67eaSJean-Sébastien Pédron int vga_wmode; 62bdcaf97cSJean-Sébastien Pédron term_color_t vga_curfg, vga_curbg; 63acb332a8SRoger Pau Monné boolean_t vga_enabled; 64a401c53aSAleksandr Rybalko }; 65a401c53aSAleksandr Rybalko 66a401c53aSAleksandr Rybalko /* Convenience macros. */ 67a401c53aSAleksandr Rybalko #define MEM_READ1(sc, ofs) \ 68a401c53aSAleksandr Rybalko bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 69a401c53aSAleksandr Rybalko #define MEM_WRITE1(sc, ofs, val) \ 70a401c53aSAleksandr Rybalko bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 71a401c53aSAleksandr Rybalko #define REG_READ1(sc, reg) \ 72a401c53aSAleksandr Rybalko bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 73a401c53aSAleksandr Rybalko #define REG_WRITE1(sc, reg, val) \ 74a401c53aSAleksandr Rybalko bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 75a401c53aSAleksandr Rybalko 76a401c53aSAleksandr Rybalko #define VT_VGA_WIDTH 640 77a401c53aSAleksandr Rybalko #define VT_VGA_HEIGHT 480 78a401c53aSAleksandr Rybalko #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 79a401c53aSAleksandr Rybalko 80bdcaf97cSJean-Sébastien Pédron /* 81bdcaf97cSJean-Sébastien Pédron * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 82bdcaf97cSJean-Sébastien Pédron * memory). 83bdcaf97cSJean-Sébastien Pédron */ 84bdcaf97cSJean-Sébastien Pédron #define VT_VGA_PIXELS_BLOCK 8 85bdcaf97cSJean-Sébastien Pédron 86bdcaf97cSJean-Sébastien Pédron /* 87bdcaf97cSJean-Sébastien Pédron * We use an off-screen addresses to: 88bdcaf97cSJean-Sébastien Pédron * o store the background color; 89bdcaf97cSJean-Sébastien Pédron * o store pixels pattern. 90bdcaf97cSJean-Sébastien Pédron * Those addresses are then loaded in the latches once. 91bdcaf97cSJean-Sébastien Pédron */ 92bdcaf97cSJean-Sébastien Pédron #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 93bdcaf97cSJean-Sébastien Pédron 94a401c53aSAleksandr Rybalko static vd_probe_t vga_probe; 95a401c53aSAleksandr Rybalko static vd_init_t vga_init; 96a401c53aSAleksandr Rybalko static vd_blank_t vga_blank; 97bdcaf97cSJean-Sébastien Pédron static vd_bitblt_text_t vga_bitblt_text; 98631bb572SJean-Sébastien Pédron static vd_bitblt_bmp_t vga_bitblt_bitmap; 99a401c53aSAleksandr Rybalko static vd_drawrect_t vga_drawrect; 100a401c53aSAleksandr Rybalko static vd_setpixel_t vga_setpixel; 101a401c53aSAleksandr Rybalko static vd_postswitch_t vga_postswitch; 102a401c53aSAleksandr Rybalko 103a401c53aSAleksandr Rybalko static const struct vt_driver vt_vga_driver = { 104a401c53aSAleksandr Rybalko .vd_name = "vga", 105a401c53aSAleksandr Rybalko .vd_probe = vga_probe, 106a401c53aSAleksandr Rybalko .vd_init = vga_init, 107a401c53aSAleksandr Rybalko .vd_blank = vga_blank, 108bdcaf97cSJean-Sébastien Pédron .vd_bitblt_text = vga_bitblt_text, 109631bb572SJean-Sébastien Pédron .vd_bitblt_bmp = vga_bitblt_bitmap, 110a401c53aSAleksandr Rybalko .vd_drawrect = vga_drawrect, 111a401c53aSAleksandr Rybalko .vd_setpixel = vga_setpixel, 112a401c53aSAleksandr Rybalko .vd_postswitch = vga_postswitch, 113a401c53aSAleksandr Rybalko .vd_priority = VD_PRIORITY_GENERIC, 114a401c53aSAleksandr Rybalko }; 115a401c53aSAleksandr Rybalko 116a401c53aSAleksandr Rybalko /* 117a401c53aSAleksandr Rybalko * Driver supports both text mode and graphics mode. Make sure the 118a401c53aSAleksandr Rybalko * buffer is always big enough to support both. 119a401c53aSAleksandr Rybalko */ 120a401c53aSAleksandr Rybalko static struct vga_softc vga_conssoftc; 121a401c53aSAleksandr Rybalko VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 122a401c53aSAleksandr Rybalko 123a401c53aSAleksandr Rybalko static inline void 124af9f67eaSJean-Sébastien Pédron vga_setwmode(struct vt_device *vd, int wmode) 125af9f67eaSJean-Sébastien Pédron { 126af9f67eaSJean-Sébastien Pédron struct vga_softc *sc = vd->vd_softc; 127af9f67eaSJean-Sébastien Pédron 128af9f67eaSJean-Sébastien Pédron if (sc->vga_wmode == wmode) 129af9f67eaSJean-Sébastien Pédron return; 130af9f67eaSJean-Sébastien Pédron 131af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 132af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, wmode); 133af9f67eaSJean-Sébastien Pédron sc->vga_wmode = wmode; 134af9f67eaSJean-Sébastien Pédron 135af9f67eaSJean-Sébastien Pédron switch (wmode) { 136af9f67eaSJean-Sébastien Pédron case 3: 137af9f67eaSJean-Sébastien Pédron /* Re-enable all plans. */ 138af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 139af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 140af9f67eaSJean-Sébastien Pédron VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 141af9f67eaSJean-Sébastien Pédron break; 142af9f67eaSJean-Sébastien Pédron } 143af9f67eaSJean-Sébastien Pédron } 144af9f67eaSJean-Sébastien Pédron 145af9f67eaSJean-Sébastien Pédron static inline void 146bdcaf97cSJean-Sébastien Pédron vga_setfg(struct vt_device *vd, term_color_t color) 147a401c53aSAleksandr Rybalko { 148a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 149a401c53aSAleksandr Rybalko 150af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 3); 151af9f67eaSJean-Sébastien Pédron 152af9f67eaSJean-Sébastien Pédron if (sc->vga_curfg == color) 153af9f67eaSJean-Sébastien Pédron return; 154af9f67eaSJean-Sébastien Pédron 155a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1565e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 157bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = color; 158a401c53aSAleksandr Rybalko } 159a401c53aSAleksandr Rybalko 160a401c53aSAleksandr Rybalko static inline void 161bdcaf97cSJean-Sébastien Pédron vga_setbg(struct vt_device *vd, term_color_t color) 162a401c53aSAleksandr Rybalko { 163a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 164a401c53aSAleksandr Rybalko 165af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 3); 166af9f67eaSJean-Sébastien Pédron 167af9f67eaSJean-Sébastien Pédron if (sc->vga_curbg == color) 168af9f67eaSJean-Sébastien Pédron return; 169af9f67eaSJean-Sébastien Pédron 170bdcaf97cSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1715e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 172a401c53aSAleksandr Rybalko 17334cb8c9fSAleksandr Rybalko /* 174af9f67eaSJean-Sébastien Pédron * Write 8 pixels using the background color to an off-screen 175af9f67eaSJean-Sébastien Pédron * byte in the video memory. 17634cb8c9fSAleksandr Rybalko */ 177bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 17834cb8c9fSAleksandr Rybalko 17934cb8c9fSAleksandr Rybalko /* 180af9f67eaSJean-Sébastien Pédron * Read those 8 pixels back to load the background color in the 181af9f67eaSJean-Sébastien Pédron * latches register. 18234cb8c9fSAleksandr Rybalko */ 183bdcaf97cSJean-Sébastien Pédron MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 18434cb8c9fSAleksandr Rybalko 185bdcaf97cSJean-Sébastien Pédron sc->vga_curbg = color; 18634cb8c9fSAleksandr Rybalko 187bdcaf97cSJean-Sébastien Pédron /* 188af9f67eaSJean-Sébastien Pédron * The Set/Reset register doesn't contain the fg color anymore, 189af9f67eaSJean-Sébastien Pédron * store an invalid color. 190bdcaf97cSJean-Sébastien Pédron */ 191bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = 0xff; 192a401c53aSAleksandr Rybalko } 193a401c53aSAleksandr Rybalko 194a401c53aSAleksandr Rybalko /* 195a401c53aSAleksandr Rybalko * Binary searchable table for Unicode to CP437 conversion. 196a401c53aSAleksandr Rybalko */ 197a401c53aSAleksandr Rybalko 198a401c53aSAleksandr Rybalko struct unicp437 { 199a401c53aSAleksandr Rybalko uint16_t unicode_base; 200a401c53aSAleksandr Rybalko uint8_t cp437_base; 201a401c53aSAleksandr Rybalko uint8_t length; 202a401c53aSAleksandr Rybalko }; 203a401c53aSAleksandr Rybalko 204a401c53aSAleksandr Rybalko static const struct unicp437 cp437table[] = { 205a401c53aSAleksandr Rybalko { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 206a401c53aSAleksandr Rybalko { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 207a401c53aSAleksandr Rybalko { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 208649d7b46SEd Maste { 0x00a6, 0x7c, 0x00 }, 209a401c53aSAleksandr Rybalko { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 210a401c53aSAleksandr Rybalko { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 211a401c53aSAleksandr Rybalko { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 212a401c53aSAleksandr Rybalko { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 213a401c53aSAleksandr Rybalko { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 214a401c53aSAleksandr Rybalko { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 215a401c53aSAleksandr Rybalko { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 216a401c53aSAleksandr Rybalko { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 217a401c53aSAleksandr Rybalko { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 218a401c53aSAleksandr Rybalko { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 219a401c53aSAleksandr Rybalko { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 220a401c53aSAleksandr Rybalko { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 221a401c53aSAleksandr Rybalko { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 222a401c53aSAleksandr Rybalko { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 223a401c53aSAleksandr Rybalko { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 224a401c53aSAleksandr Rybalko { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 225a401c53aSAleksandr Rybalko { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 226a401c53aSAleksandr Rybalko { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 227a401c53aSAleksandr Rybalko { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 228a401c53aSAleksandr Rybalko { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 229a401c53aSAleksandr Rybalko { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 230a401c53aSAleksandr Rybalko { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 231a401c53aSAleksandr Rybalko { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 232a401c53aSAleksandr Rybalko { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 233a401c53aSAleksandr Rybalko { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 234a401c53aSAleksandr Rybalko { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 235a401c53aSAleksandr Rybalko { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 236a401c53aSAleksandr Rybalko { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 237a401c53aSAleksandr Rybalko { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 238a401c53aSAleksandr Rybalko { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 239a401c53aSAleksandr Rybalko { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 240a401c53aSAleksandr Rybalko { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 241a401c53aSAleksandr Rybalko { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 242185aba2dSEd Maste { 0x2013, 0x2d, 0x00 }, 243a401c53aSAleksandr Rybalko { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 244a401c53aSAleksandr Rybalko { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 245a401c53aSAleksandr Rybalko { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 246a401c53aSAleksandr Rybalko { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 247a401c53aSAleksandr Rybalko { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 248a401c53aSAleksandr Rybalko { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 249a401c53aSAleksandr Rybalko { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 250a401c53aSAleksandr Rybalko { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 251a401c53aSAleksandr Rybalko { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 252a401c53aSAleksandr Rybalko { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 253a401c53aSAleksandr Rybalko { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 254a401c53aSAleksandr Rybalko { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 255a401c53aSAleksandr Rybalko { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 256a401c53aSAleksandr Rybalko { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 257a401c53aSAleksandr Rybalko { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 258a401c53aSAleksandr Rybalko { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 259a401c53aSAleksandr Rybalko { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 260a401c53aSAleksandr Rybalko { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 261a401c53aSAleksandr Rybalko { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 262a401c53aSAleksandr Rybalko { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 263a401c53aSAleksandr Rybalko { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 264a401c53aSAleksandr Rybalko { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 265a401c53aSAleksandr Rybalko { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 266a401c53aSAleksandr Rybalko { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 267a401c53aSAleksandr Rybalko { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 268a401c53aSAleksandr Rybalko { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 269a401c53aSAleksandr Rybalko { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 270a401c53aSAleksandr Rybalko { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 271a401c53aSAleksandr Rybalko { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 272a401c53aSAleksandr Rybalko { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 273a401c53aSAleksandr Rybalko { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 274a401c53aSAleksandr Rybalko { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 275a401c53aSAleksandr Rybalko { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 276a401c53aSAleksandr Rybalko { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 277a401c53aSAleksandr Rybalko { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 278a401c53aSAleksandr Rybalko { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 279a401c53aSAleksandr Rybalko { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 280a401c53aSAleksandr Rybalko { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 281a401c53aSAleksandr Rybalko { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 282a401c53aSAleksandr Rybalko { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 283a401c53aSAleksandr Rybalko { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 284a401c53aSAleksandr Rybalko { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 285a401c53aSAleksandr Rybalko { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 286a401c53aSAleksandr Rybalko { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 287a401c53aSAleksandr Rybalko { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 288a401c53aSAleksandr Rybalko { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 289a401c53aSAleksandr Rybalko { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 290a401c53aSAleksandr Rybalko { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 291649d7b46SEd Maste { 0x266c, 0x0e, 0x00 }, { 0x2713, 0xfb, 0x00 }, 292649d7b46SEd Maste { 0x27e8, 0x3c, 0x00 }, { 0x27e9, 0x3e, 0x00 }, 293a401c53aSAleksandr Rybalko }; 294a401c53aSAleksandr Rybalko 295a401c53aSAleksandr Rybalko static uint8_t 296a401c53aSAleksandr Rybalko vga_get_cp437(term_char_t c) 297a401c53aSAleksandr Rybalko { 298a401c53aSAleksandr Rybalko int min, mid, max; 299a401c53aSAleksandr Rybalko 300a401c53aSAleksandr Rybalko min = 0; 301e6b01ed7SEnji Cooper max = nitems(cp437table) - 1; 302a401c53aSAleksandr Rybalko 303a401c53aSAleksandr Rybalko if (c < cp437table[0].unicode_base || 304a401c53aSAleksandr Rybalko c > cp437table[max].unicode_base + cp437table[max].length) 305a401c53aSAleksandr Rybalko return '?'; 306a401c53aSAleksandr Rybalko 307a401c53aSAleksandr Rybalko while (max >= min) { 308a401c53aSAleksandr Rybalko mid = (min + max) / 2; 309a401c53aSAleksandr Rybalko if (c < cp437table[mid].unicode_base) 310a401c53aSAleksandr Rybalko max = mid - 1; 311a401c53aSAleksandr Rybalko else if (c > cp437table[mid].unicode_base + 312a401c53aSAleksandr Rybalko cp437table[mid].length) 313a401c53aSAleksandr Rybalko min = mid + 1; 314a401c53aSAleksandr Rybalko else 315a401c53aSAleksandr Rybalko return (c - cp437table[mid].unicode_base + 316a401c53aSAleksandr Rybalko cp437table[mid].cp437_base); 317a401c53aSAleksandr Rybalko } 318a401c53aSAleksandr Rybalko 319a401c53aSAleksandr Rybalko return '?'; 320a401c53aSAleksandr Rybalko } 321a401c53aSAleksandr Rybalko 322a401c53aSAleksandr Rybalko static void 323bdcaf97cSJean-Sébastien Pédron vga_blank(struct vt_device *vd, term_color_t color) 324a401c53aSAleksandr Rybalko { 325a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 326bdcaf97cSJean-Sébastien Pédron u_int ofs; 327bdcaf97cSJean-Sébastien Pédron 328bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, color); 329bdcaf97cSJean-Sébastien Pédron for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 330bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, ofs, 0xff); 331bdcaf97cSJean-Sébastien Pédron } 332bdcaf97cSJean-Sébastien Pédron 333bdcaf97cSJean-Sébastien Pédron static inline void 334bdcaf97cSJean-Sébastien Pédron vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 335bdcaf97cSJean-Sébastien Pédron uint8_t v) 336bdcaf97cSJean-Sébastien Pédron { 337bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc = vd->vd_softc; 338bdcaf97cSJean-Sébastien Pédron 339bdcaf97cSJean-Sébastien Pédron /* Skip empty writes, in order to avoid palette changes. */ 340bdcaf97cSJean-Sébastien Pédron if (v != 0x00) { 341bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, color); 342bdcaf97cSJean-Sébastien Pédron /* 343bdcaf97cSJean-Sébastien Pédron * When this MEM_READ1() gets disabled, all sorts of 344bdcaf97cSJean-Sébastien Pédron * artifacts occur. This is because this read loads the 345bdcaf97cSJean-Sébastien Pédron * set of 8 pixels that are about to be changed. There 346bdcaf97cSJean-Sébastien Pédron * is one scenario where we can avoid the read, namely 347bdcaf97cSJean-Sébastien Pédron * if all pixels are about to be overwritten anyway. 348bdcaf97cSJean-Sébastien Pédron */ 349bdcaf97cSJean-Sébastien Pédron if (v != 0xff) { 350bdcaf97cSJean-Sébastien Pédron MEM_READ1(sc, dst); 351bdcaf97cSJean-Sébastien Pédron 352bdcaf97cSJean-Sébastien Pédron /* The bg color was trashed by the reads. */ 353bdcaf97cSJean-Sébastien Pédron sc->vga_curbg = 0xff; 354bdcaf97cSJean-Sébastien Pédron } 355bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, dst, v); 356bdcaf97cSJean-Sébastien Pédron } 357bdcaf97cSJean-Sébastien Pédron } 358bdcaf97cSJean-Sébastien Pédron 359bdcaf97cSJean-Sébastien Pédron static void 360bdcaf97cSJean-Sébastien Pédron vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 361bdcaf97cSJean-Sébastien Pédron { 362bdcaf97cSJean-Sébastien Pédron 3636cbf3f62SJean-Sébastien Pédron if (vd->vd_flags & VDF_TEXTMODE) 3646cbf3f62SJean-Sébastien Pédron return; 3656cbf3f62SJean-Sébastien Pédron 366bdcaf97cSJean-Sébastien Pédron vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 367bdcaf97cSJean-Sébastien Pédron 0x80 >> (x % 8)); 368bdcaf97cSJean-Sébastien Pédron } 369bdcaf97cSJean-Sébastien Pédron 370bdcaf97cSJean-Sébastien Pédron static void 371bdcaf97cSJean-Sébastien Pédron vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 372bdcaf97cSJean-Sébastien Pédron term_color_t color) 373bdcaf97cSJean-Sébastien Pédron { 374bdcaf97cSJean-Sébastien Pédron int x, y; 375bdcaf97cSJean-Sébastien Pédron 3766cbf3f62SJean-Sébastien Pédron if (vd->vd_flags & VDF_TEXTMODE) 3776cbf3f62SJean-Sébastien Pédron return; 3786cbf3f62SJean-Sébastien Pédron 379bdcaf97cSJean-Sébastien Pédron for (y = y1; y <= y2; y++) { 380bdcaf97cSJean-Sébastien Pédron if (fill || (y == y1) || (y == y2)) { 381bdcaf97cSJean-Sébastien Pédron for (x = x1; x <= x2; x++) 382bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x, y, color); 383bdcaf97cSJean-Sébastien Pédron } else { 384bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x1, y, color); 385bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x2, y, color); 386bdcaf97cSJean-Sébastien Pédron } 387bdcaf97cSJean-Sébastien Pédron } 388bdcaf97cSJean-Sébastien Pédron } 389bdcaf97cSJean-Sébastien Pédron 390bdcaf97cSJean-Sébastien Pédron static void 391bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 392bdcaf97cSJean-Sébastien Pédron unsigned int src_x, unsigned int x_count, unsigned int dst_x, 393bdcaf97cSJean-Sébastien Pédron uint8_t *pattern, uint8_t *mask) 394bdcaf97cSJean-Sébastien Pédron { 395bdcaf97cSJean-Sébastien Pédron unsigned int n; 396bdcaf97cSJean-Sébastien Pédron 397bdcaf97cSJean-Sébastien Pédron n = src_x / 8; 398a401c53aSAleksandr Rybalko 399a401c53aSAleksandr Rybalko /* 400bdcaf97cSJean-Sébastien Pédron * This mask has bits set, where a pixel (ether 0 or 1) 401bdcaf97cSJean-Sébastien Pédron * comes from the source bitmap. 402bdcaf97cSJean-Sébastien Pédron */ 403bdcaf97cSJean-Sébastien Pédron if (mask != NULL) { 404bdcaf97cSJean-Sébastien Pédron *mask = (0xff 405bdcaf97cSJean-Sébastien Pédron >> (8 - x_count)) 406bdcaf97cSJean-Sébastien Pédron << (8 - x_count - dst_x); 407bdcaf97cSJean-Sébastien Pédron } 408bdcaf97cSJean-Sébastien Pédron 409bdcaf97cSJean-Sébastien Pédron if (n == (src_x + x_count - 1) / 8) { 410bdcaf97cSJean-Sébastien Pédron /* All the pixels we want are in the same byte. */ 411bdcaf97cSJean-Sébastien Pédron *pattern = src[n]; 412bdcaf97cSJean-Sébastien Pédron if (dst_x >= src_x) 413bdcaf97cSJean-Sébastien Pédron *pattern >>= (dst_x - src_x % 8); 414bdcaf97cSJean-Sébastien Pédron else 415bdcaf97cSJean-Sébastien Pédron *pattern <<= (src_x % 8 - dst_x); 416bdcaf97cSJean-Sébastien Pédron } else { 417bdcaf97cSJean-Sébastien Pédron /* The pixels we want are split into two bytes. */ 418bdcaf97cSJean-Sébastien Pédron if (dst_x >= src_x % 8) { 419bdcaf97cSJean-Sébastien Pédron *pattern = 420bdcaf97cSJean-Sébastien Pédron src[n] << (8 - dst_x - src_x % 8) | 421bdcaf97cSJean-Sébastien Pédron src[n + 1] >> (dst_x - src_x % 8); 422bdcaf97cSJean-Sébastien Pédron } else { 423bdcaf97cSJean-Sébastien Pédron *pattern = 424bdcaf97cSJean-Sébastien Pédron src[n] << (src_x % 8 - dst_x) | 425bdcaf97cSJean-Sébastien Pédron src[n + 1] >> (8 - src_x % 8 - dst_x); 426bdcaf97cSJean-Sébastien Pédron } 427bdcaf97cSJean-Sébastien Pédron } 428bdcaf97cSJean-Sébastien Pédron } 429bdcaf97cSJean-Sébastien Pédron 430bdcaf97cSJean-Sébastien Pédron static void 431bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 432bdcaf97cSJean-Sébastien Pédron const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 433bdcaf97cSJean-Sébastien Pédron unsigned int src_x, unsigned int dst_x, unsigned int x_count, 434bdcaf97cSJean-Sébastien Pédron unsigned int src_y, unsigned int dst_y, unsigned int y_count, 435bdcaf97cSJean-Sébastien Pédron term_color_t fg, term_color_t bg, int overwrite) 436bdcaf97cSJean-Sébastien Pédron { 437bdcaf97cSJean-Sébastien Pédron unsigned int i, bytes; 438bdcaf97cSJean-Sébastien Pédron uint8_t pattern, relevant_bits, mask; 439bdcaf97cSJean-Sébastien Pédron 440bdcaf97cSJean-Sébastien Pédron bytes = (src_width + 7) / 8; 441bdcaf97cSJean-Sébastien Pédron 442bdcaf97cSJean-Sébastien Pédron for (i = 0; i < y_count; ++i) { 443bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern(src + (src_y + i) * bytes, 444bdcaf97cSJean-Sébastien Pédron bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 445bdcaf97cSJean-Sébastien Pédron 446bdcaf97cSJean-Sébastien Pédron if (src_mask == NULL) { 447bdcaf97cSJean-Sébastien Pédron /* 448bdcaf97cSJean-Sébastien Pédron * No src mask. Consider that all wanted bits 449bdcaf97cSJean-Sébastien Pédron * from the source are "authoritative". 450bdcaf97cSJean-Sébastien Pédron */ 451bdcaf97cSJean-Sébastien Pédron mask = relevant_bits; 452bdcaf97cSJean-Sébastien Pédron } else { 453bdcaf97cSJean-Sébastien Pédron /* 454bdcaf97cSJean-Sébastien Pédron * There's an src mask. We shift it the same way 455bdcaf97cSJean-Sébastien Pédron * we shifted the source pattern. 456bdcaf97cSJean-Sébastien Pédron */ 457bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern( 458bdcaf97cSJean-Sébastien Pédron src_mask + (src_y + i) * bytes, 459bdcaf97cSJean-Sébastien Pédron bytes, src_x, x_count, dst_x, 460bdcaf97cSJean-Sébastien Pédron &mask, NULL); 461bdcaf97cSJean-Sébastien Pédron 462bdcaf97cSJean-Sébastien Pédron /* Now, only keep the wanted bits among them. */ 463bdcaf97cSJean-Sébastien Pédron mask &= relevant_bits; 464bdcaf97cSJean-Sébastien Pédron } 465bdcaf97cSJean-Sébastien Pédron 466bdcaf97cSJean-Sébastien Pédron /* 467bdcaf97cSJean-Sébastien Pédron * Clear bits from the pattern which must be 468bdcaf97cSJean-Sébastien Pédron * transparent, according to the source mask. 469bdcaf97cSJean-Sébastien Pédron */ 470bdcaf97cSJean-Sébastien Pédron pattern &= mask; 471bdcaf97cSJean-Sébastien Pédron 472bdcaf97cSJean-Sébastien Pédron /* Set the bits in the 2-colors array. */ 473bdcaf97cSJean-Sébastien Pédron if (overwrite) 474bdcaf97cSJean-Sébastien Pédron pattern_2colors[dst_y + i] &= ~mask; 475bdcaf97cSJean-Sébastien Pédron pattern_2colors[dst_y + i] |= pattern; 476bdcaf97cSJean-Sébastien Pédron 4777e1770a7SJean-Sébastien Pédron if (pattern_ncolors == NULL) 4787e1770a7SJean-Sébastien Pédron continue; 4797e1770a7SJean-Sébastien Pédron 480bdcaf97cSJean-Sébastien Pédron /* 481bdcaf97cSJean-Sébastien Pédron * Set the same bits in the n-colors array. This one 482bdcaf97cSJean-Sébastien Pédron * supports transparency, when a given bit is cleared in 483bdcaf97cSJean-Sébastien Pédron * all colors. 484bdcaf97cSJean-Sébastien Pédron */ 485bdcaf97cSJean-Sébastien Pédron if (overwrite) { 486bdcaf97cSJean-Sébastien Pédron /* 487bdcaf97cSJean-Sébastien Pédron * Ensure that the pixels used by this bitmap are 488bdcaf97cSJean-Sébastien Pédron * cleared in other colors. 489bdcaf97cSJean-Sébastien Pédron */ 490bdcaf97cSJean-Sébastien Pédron for (int j = 0; j < 16; ++j) 491bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + j] &= 492bdcaf97cSJean-Sébastien Pédron ~mask; 493bdcaf97cSJean-Sébastien Pédron } 494bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 495bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 496bdcaf97cSJean-Sébastien Pédron } 497bdcaf97cSJean-Sébastien Pédron } 498bdcaf97cSJean-Sébastien Pédron 499bdcaf97cSJean-Sébastien Pédron static void 500bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 501bdcaf97cSJean-Sébastien Pédron term_color_t fg, term_color_t bg, 502bdcaf97cSJean-Sébastien Pédron unsigned int x, unsigned int y, unsigned int height) 503bdcaf97cSJean-Sébastien Pédron { 504bdcaf97cSJean-Sébastien Pédron unsigned int i, offset; 505bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 506bdcaf97cSJean-Sébastien Pédron 507bdcaf97cSJean-Sébastien Pédron /* 508bdcaf97cSJean-Sébastien Pédron * The great advantage of Write Mode 3 is that we just need 509bdcaf97cSJean-Sébastien Pédron * to load the foreground in the Set/Reset register, load the 510bdcaf97cSJean-Sébastien Pédron * background color in the latches register (this is done 511bdcaf97cSJean-Sébastien Pédron * through a write in offscreen memory followed by a read of 512bdcaf97cSJean-Sébastien Pédron * that data), then write the pattern to video memory. This 513bdcaf97cSJean-Sébastien Pédron * pattern indicates if the pixel should use the foreground 514bdcaf97cSJean-Sébastien Pédron * color (bit set) or the background color (bit cleared). 515bdcaf97cSJean-Sébastien Pédron */ 516bdcaf97cSJean-Sébastien Pédron 517bdcaf97cSJean-Sébastien Pédron vga_setbg(vd, bg); 518bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, fg); 519bdcaf97cSJean-Sébastien Pédron 520bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 521bdcaf97cSJean-Sébastien Pédron offset = (VT_VGA_WIDTH * y + x) / 8; 522bdcaf97cSJean-Sébastien Pédron 523bdcaf97cSJean-Sébastien Pédron for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 524bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, offset, masks[i]); 525bdcaf97cSJean-Sébastien Pédron } 526bdcaf97cSJean-Sébastien Pédron } 527bdcaf97cSJean-Sébastien Pédron 528bdcaf97cSJean-Sébastien Pédron static void 529bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 530bdcaf97cSJean-Sébastien Pédron unsigned int x, unsigned int y, unsigned int height) 531bdcaf97cSJean-Sébastien Pédron { 532af9f67eaSJean-Sébastien Pédron unsigned int i, j, plan, color, offset; 533bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 534af9f67eaSJean-Sébastien Pédron uint8_t mask, plans[height * 4]; 535bdcaf97cSJean-Sébastien Pédron 536bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 537bdcaf97cSJean-Sébastien Pédron 538af9f67eaSJean-Sébastien Pédron memset(plans, 0, sizeof(plans)); 539af9f67eaSJean-Sébastien Pédron 540bdcaf97cSJean-Sébastien Pédron /* 541af9f67eaSJean-Sébastien Pédron * To write a group of pixels using 3 or more colors, we select 542af9f67eaSJean-Sébastien Pédron * Write Mode 0 and write one byte to each plan separately. 543af9f67eaSJean-Sébastien Pédron */ 544af9f67eaSJean-Sébastien Pédron 545af9f67eaSJean-Sébastien Pédron /* 546af9f67eaSJean-Sébastien Pédron * We first compute each byte: each plan contains one bit of the 547af9f67eaSJean-Sébastien Pédron * color code for each of the 8 pixels. 548bdcaf97cSJean-Sébastien Pédron * 549af9f67eaSJean-Sébastien Pédron * For example, if the 8 pixels are like this: 550af9f67eaSJean-Sébastien Pédron * GBBBBBBY 551af9f67eaSJean-Sébastien Pédron * where: 552af9f67eaSJean-Sébastien Pédron * G (gray) = 0b0111 553af9f67eaSJean-Sébastien Pédron * B (black) = 0b0000 554af9f67eaSJean-Sébastien Pédron * Y (yellow) = 0b0011 555af9f67eaSJean-Sébastien Pédron * 556af9f67eaSJean-Sébastien Pédron * The corresponding for bytes are: 557af9f67eaSJean-Sébastien Pédron * GBBBBBBY 558af9f67eaSJean-Sébastien Pédron * Plan 0: 10000001 = 0x81 559af9f67eaSJean-Sébastien Pédron * Plan 1: 10000001 = 0x81 560af9f67eaSJean-Sébastien Pédron * Plan 2: 10000000 = 0x80 561af9f67eaSJean-Sébastien Pédron * Plan 3: 00000000 = 0x00 562af9f67eaSJean-Sébastien Pédron * | | | 563af9f67eaSJean-Sébastien Pédron * | | +-> 0b0011 (Y) 564af9f67eaSJean-Sébastien Pédron * | +-----> 0b0000 (B) 565af9f67eaSJean-Sébastien Pédron * +--------> 0b0111 (G) 566bdcaf97cSJean-Sébastien Pédron */ 567bdcaf97cSJean-Sébastien Pédron 568bdcaf97cSJean-Sébastien Pédron for (i = 0; i < height; ++i) { 569af9f67eaSJean-Sébastien Pédron for (color = 0; color < 16; ++color) { 570af9f67eaSJean-Sébastien Pédron mask = masks[i * 16 + color]; 571af9f67eaSJean-Sébastien Pédron if (mask == 0x00) 572bdcaf97cSJean-Sébastien Pédron continue; 573bdcaf97cSJean-Sébastien Pédron 574af9f67eaSJean-Sébastien Pédron for (j = 0; j < 8; ++j) { 575af9f67eaSJean-Sébastien Pédron if (!((mask >> (7 - j)) & 0x1)) 576af9f67eaSJean-Sébastien Pédron continue; 577bdcaf97cSJean-Sébastien Pédron 578af9f67eaSJean-Sébastien Pédron /* The pixel "j" uses color "color". */ 579af9f67eaSJean-Sébastien Pédron for (plan = 0; plan < 4; ++plan) 580af9f67eaSJean-Sébastien Pédron plans[i * 4 + plan] |= 581af9f67eaSJean-Sébastien Pédron ((color >> plan) & 0x1) << (7 - j); 582bdcaf97cSJean-Sébastien Pédron } 583af9f67eaSJean-Sébastien Pédron } 584af9f67eaSJean-Sébastien Pédron } 585af9f67eaSJean-Sébastien Pédron 586af9f67eaSJean-Sébastien Pédron /* 587af9f67eaSJean-Sébastien Pédron * The bytes are ready: we now switch to Write Mode 0 and write 588af9f67eaSJean-Sébastien Pédron * all bytes, one plan at a time. 589af9f67eaSJean-Sébastien Pédron */ 590af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 0); 591af9f67eaSJean-Sébastien Pédron 592af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 593af9f67eaSJean-Sébastien Pédron for (plan = 0; plan < 4; ++plan) { 594af9f67eaSJean-Sébastien Pédron /* Select plan. */ 595af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 596af9f67eaSJean-Sébastien Pédron 597af9f67eaSJean-Sébastien Pédron /* Write all bytes for this plan, from Y to Y+height. */ 598af9f67eaSJean-Sébastien Pédron for (i = 0; i < height; ++i) { 599af9f67eaSJean-Sébastien Pédron offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 600af9f67eaSJean-Sébastien Pédron MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 601bdcaf97cSJean-Sébastien Pédron } 602bdcaf97cSJean-Sébastien Pédron } 603bdcaf97cSJean-Sébastien Pédron } 604bdcaf97cSJean-Sébastien Pédron 605bdcaf97cSJean-Sébastien Pédron static void 606ab06c776SJean-Sébastien Pédron vga_bitblt_one_text_pixels_block(struct vt_device *vd, 607946d0288SJean-Sébastien Pédron const struct vt_window *vw, unsigned int x, unsigned int y) 608bdcaf97cSJean-Sébastien Pédron { 609ab06c776SJean-Sébastien Pédron const struct vt_buf *vb; 610ab06c776SJean-Sébastien Pédron const struct vt_font *vf; 611bdcaf97cSJean-Sébastien Pédron unsigned int i, col, row, src_x, x_count; 612bdcaf97cSJean-Sébastien Pédron unsigned int used_colors_list[16], used_colors; 613ab06c776SJean-Sébastien Pédron uint8_t pattern_2colors[vw->vw_font->vf_height]; 614ab06c776SJean-Sébastien Pédron uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 615bdcaf97cSJean-Sébastien Pédron term_char_t c; 616bdcaf97cSJean-Sébastien Pédron term_color_t fg, bg; 617bdcaf97cSJean-Sébastien Pédron const uint8_t *src; 618bdcaf97cSJean-Sébastien Pédron 619ab06c776SJean-Sébastien Pédron vb = &vw->vw_buf; 620ab06c776SJean-Sébastien Pédron vf = vw->vw_font; 621ab06c776SJean-Sébastien Pédron 622bdcaf97cSJean-Sébastien Pédron /* 623bdcaf97cSJean-Sébastien Pédron * The current pixels block. 624bdcaf97cSJean-Sébastien Pédron * 625bdcaf97cSJean-Sébastien Pédron * We fill it with portions of characters, because both "grids" 626bdcaf97cSJean-Sébastien Pédron * may not match. 627bdcaf97cSJean-Sébastien Pédron * 628bdcaf97cSJean-Sébastien Pédron * i is the index in this pixels block. 629bdcaf97cSJean-Sébastien Pédron */ 630bdcaf97cSJean-Sébastien Pédron 631bdcaf97cSJean-Sébastien Pédron i = x; 632bdcaf97cSJean-Sébastien Pédron used_colors = 0; 633bdcaf97cSJean-Sébastien Pédron memset(used_colors_list, 0, sizeof(used_colors_list)); 634bdcaf97cSJean-Sébastien Pédron memset(pattern_2colors, 0, sizeof(pattern_2colors)); 635bdcaf97cSJean-Sébastien Pédron memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 636bdcaf97cSJean-Sébastien Pédron 63783fbb296SJean-Sébastien Pédron if (i < vw->vw_draw_area.tr_begin.tp_col) { 638bdcaf97cSJean-Sébastien Pédron /* 639bdcaf97cSJean-Sébastien Pédron * i is in the margin used to center the text area on 640bdcaf97cSJean-Sébastien Pédron * the screen. 641bdcaf97cSJean-Sébastien Pédron */ 642bdcaf97cSJean-Sébastien Pédron 64383fbb296SJean-Sébastien Pédron i = vw->vw_draw_area.tr_begin.tp_col; 644bdcaf97cSJean-Sébastien Pédron } 645bdcaf97cSJean-Sébastien Pédron 64683fbb296SJean-Sébastien Pédron while (i < x + VT_VGA_PIXELS_BLOCK && 64783fbb296SJean-Sébastien Pédron i < vw->vw_draw_area.tr_end.tp_col) { 648bdcaf97cSJean-Sébastien Pédron /* 649bdcaf97cSJean-Sébastien Pédron * Find which character is drawn on this pixel in the 650bdcaf97cSJean-Sébastien Pédron * pixels block. 651bdcaf97cSJean-Sébastien Pédron * 652bdcaf97cSJean-Sébastien Pédron * While here, record what colors it uses. 653bdcaf97cSJean-Sébastien Pédron */ 654bdcaf97cSJean-Sébastien Pédron 65583fbb296SJean-Sébastien Pédron col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 65683fbb296SJean-Sébastien Pédron row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 657bdcaf97cSJean-Sébastien Pédron 658bdcaf97cSJean-Sébastien Pédron c = VTBUF_GET_FIELD(vb, row, col); 659bdcaf97cSJean-Sébastien Pédron src = vtfont_lookup(vf, c); 660bdcaf97cSJean-Sébastien Pédron 661bdcaf97cSJean-Sébastien Pédron vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 662bdcaf97cSJean-Sébastien Pédron if ((used_colors_list[fg] & 0x1) != 0x1) 663bdcaf97cSJean-Sébastien Pédron used_colors++; 664bdcaf97cSJean-Sébastien Pédron if ((used_colors_list[bg] & 0x2) != 0x2) 665bdcaf97cSJean-Sébastien Pédron used_colors++; 666bdcaf97cSJean-Sébastien Pédron used_colors_list[fg] |= 0x1; 667bdcaf97cSJean-Sébastien Pédron used_colors_list[bg] |= 0x2; 668bdcaf97cSJean-Sébastien Pédron 669bdcaf97cSJean-Sébastien Pédron /* 670bdcaf97cSJean-Sébastien Pédron * Compute the portion of the character we want to draw, 671bdcaf97cSJean-Sébastien Pédron * because the pixels block may start in the middle of a 672bdcaf97cSJean-Sébastien Pédron * character. 673bdcaf97cSJean-Sébastien Pédron * 674bdcaf97cSJean-Sébastien Pédron * The first pixel to draw in the character is 675bdcaf97cSJean-Sébastien Pédron * the current position - 676bdcaf97cSJean-Sébastien Pédron * the start position of the character 677bdcaf97cSJean-Sébastien Pédron * 678bdcaf97cSJean-Sébastien Pédron * The last pixel to draw is either 679bdcaf97cSJean-Sébastien Pédron * - the last pixel of the character, or 680bdcaf97cSJean-Sébastien Pédron * - the pixel of the character matching the end of 681bdcaf97cSJean-Sébastien Pédron * the pixels block 682bdcaf97cSJean-Sébastien Pédron * whichever comes first. This position is then 683bdcaf97cSJean-Sébastien Pédron * changed to be relative to the start position of the 684bdcaf97cSJean-Sébastien Pédron * character. 685bdcaf97cSJean-Sébastien Pédron */ 686bdcaf97cSJean-Sébastien Pédron 68783fbb296SJean-Sébastien Pédron src_x = i - 68883fbb296SJean-Sébastien Pédron (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 68983fbb296SJean-Sébastien Pédron x_count = min(min( 69083fbb296SJean-Sébastien Pédron (col + 1) * vf->vf_width + 69183fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_begin.tp_col, 69283fbb296SJean-Sébastien Pédron x + VT_VGA_PIXELS_BLOCK), 69383fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_end.tp_col); 69483fbb296SJean-Sébastien Pédron x_count -= col * vf->vf_width + 69583fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_begin.tp_col; 696bdcaf97cSJean-Sébastien Pédron x_count -= src_x; 697bdcaf97cSJean-Sébastien Pédron 698bdcaf97cSJean-Sébastien Pédron /* Copy a portion of the character. */ 699bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 700bdcaf97cSJean-Sébastien Pédron src, NULL, vf->vf_width, 701bdcaf97cSJean-Sébastien Pédron src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 702bdcaf97cSJean-Sébastien Pédron 0, 0, vf->vf_height, fg, bg, 0); 703bdcaf97cSJean-Sébastien Pédron 704bdcaf97cSJean-Sébastien Pédron /* We move to the next portion. */ 705bdcaf97cSJean-Sébastien Pédron i += x_count; 706bdcaf97cSJean-Sébastien Pédron } 707bdcaf97cSJean-Sébastien Pédron 708bdcaf97cSJean-Sébastien Pédron #ifndef SC_NO_CUTPASTE 709bdcaf97cSJean-Sébastien Pédron /* 710bdcaf97cSJean-Sébastien Pédron * Copy the mouse pointer bitmap if it's over the current pixels 711bdcaf97cSJean-Sébastien Pédron * block. 712bdcaf97cSJean-Sébastien Pédron * 713bdcaf97cSJean-Sébastien Pédron * We use the saved cursor position (saved in vt_flush()), because 714bdcaf97cSJean-Sébastien Pédron * the current position could be different than the one used 715bdcaf97cSJean-Sébastien Pédron * to mark the area dirty. 716bdcaf97cSJean-Sébastien Pédron */ 717946d0288SJean-Sébastien Pédron term_rect_t drawn_area; 718946d0288SJean-Sébastien Pédron 719946d0288SJean-Sébastien Pédron drawn_area.tr_begin.tp_col = x; 720946d0288SJean-Sébastien Pédron drawn_area.tr_begin.tp_row = y; 721946d0288SJean-Sébastien Pédron drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 722946d0288SJean-Sébastien Pédron drawn_area.tr_end.tp_row = y + vf->vf_height; 723946d0288SJean-Sébastien Pédron if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 724946d0288SJean-Sébastien Pédron struct vt_mouse_cursor *cursor; 725946d0288SJean-Sébastien Pédron unsigned int mx, my; 726bdcaf97cSJean-Sébastien Pédron unsigned int dst_x, src_y, dst_y, y_count; 727bdcaf97cSJean-Sébastien Pédron 728946d0288SJean-Sébastien Pédron cursor = vd->vd_mcursor; 72983fbb296SJean-Sébastien Pédron mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 73083fbb296SJean-Sébastien Pédron my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 731946d0288SJean-Sébastien Pédron 732bdcaf97cSJean-Sébastien Pédron /* Compute the portion of the cursor we want to copy. */ 733bdcaf97cSJean-Sébastien Pédron src_x = x > mx ? x - mx : 0; 734bdcaf97cSJean-Sébastien Pédron dst_x = mx > x ? mx - x : 0; 73583fbb296SJean-Sébastien Pédron x_count = min(min(min( 73683fbb296SJean-Sébastien Pédron cursor->width - src_x, 73783fbb296SJean-Sébastien Pédron x + VT_VGA_PIXELS_BLOCK - mx), 73883fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_end.tp_col - mx), 739bdcaf97cSJean-Sébastien Pédron VT_VGA_PIXELS_BLOCK); 740bdcaf97cSJean-Sébastien Pédron 741bdcaf97cSJean-Sébastien Pédron /* 742bdcaf97cSJean-Sébastien Pédron * The cursor isn't aligned on the Y-axis with 743bdcaf97cSJean-Sébastien Pédron * characters, so we need to compute the vertical 744bdcaf97cSJean-Sébastien Pédron * start/count. 745bdcaf97cSJean-Sébastien Pédron */ 746bdcaf97cSJean-Sébastien Pédron src_y = y > my ? y - my : 0; 747bdcaf97cSJean-Sébastien Pédron dst_y = my > y ? my - y : 0; 748bdcaf97cSJean-Sébastien Pédron y_count = min( 749bdcaf97cSJean-Sébastien Pédron min(cursor->height - src_y, y + vf->vf_height - my), 750bdcaf97cSJean-Sébastien Pédron vf->vf_height); 751bdcaf97cSJean-Sébastien Pédron 752bdcaf97cSJean-Sébastien Pédron /* Copy the cursor portion. */ 753bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 754bdcaf97cSJean-Sébastien Pédron cursor->map, cursor->mask, cursor->width, 755bdcaf97cSJean-Sébastien Pédron src_x, dst_x, x_count, src_y, dst_y, y_count, 7563235c9ebSJean-Sébastien Pédron vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 757bdcaf97cSJean-Sébastien Pédron 7583235c9ebSJean-Sébastien Pédron if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 759bdcaf97cSJean-Sébastien Pédron used_colors++; 7603235c9ebSJean-Sébastien Pédron if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 761bdcaf97cSJean-Sébastien Pédron used_colors++; 762bdcaf97cSJean-Sébastien Pédron } 763bdcaf97cSJean-Sébastien Pédron #endif 764bdcaf97cSJean-Sébastien Pédron 765bdcaf97cSJean-Sébastien Pédron /* 766bdcaf97cSJean-Sébastien Pédron * The pixels block is completed, we can now draw it on the 767bdcaf97cSJean-Sébastien Pédron * screen. 768bdcaf97cSJean-Sébastien Pédron */ 769bdcaf97cSJean-Sébastien Pédron if (used_colors == 2) 770bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 771bdcaf97cSJean-Sébastien Pédron x, y, vf->vf_height); 772bdcaf97cSJean-Sébastien Pédron else 773bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 774bdcaf97cSJean-Sébastien Pédron x, y, vf->vf_height); 775bdcaf97cSJean-Sébastien Pédron } 776bdcaf97cSJean-Sébastien Pédron 777bdcaf97cSJean-Sébastien Pédron static void 778ab06c776SJean-Sébastien Pédron vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 779946d0288SJean-Sébastien Pédron const term_rect_t *area) 780bdcaf97cSJean-Sébastien Pédron { 781ab06c776SJean-Sébastien Pédron const struct vt_font *vf; 782bdcaf97cSJean-Sébastien Pédron unsigned int col, row; 783bdcaf97cSJean-Sébastien Pédron unsigned int x1, y1, x2, y2, x, y; 784bdcaf97cSJean-Sébastien Pédron 785ab06c776SJean-Sébastien Pédron vf = vw->vw_font; 786ab06c776SJean-Sébastien Pédron 787bdcaf97cSJean-Sébastien Pédron /* 788bdcaf97cSJean-Sébastien Pédron * Compute the top-left pixel position aligned with the video 789bdcaf97cSJean-Sébastien Pédron * adapter pixels block size. 790bdcaf97cSJean-Sébastien Pédron * 791bdcaf97cSJean-Sébastien Pédron * This is calculated from the top-left column of te dirty area: 792bdcaf97cSJean-Sébastien Pédron * 793bdcaf97cSJean-Sébastien Pédron * 1. Compute the top-left pixel of the character: 794bdcaf97cSJean-Sébastien Pédron * col * font width + x offset 795bdcaf97cSJean-Sébastien Pédron * 796bdcaf97cSJean-Sébastien Pédron * NOTE: x offset is used to center the text area on the 797bdcaf97cSJean-Sébastien Pédron * screen. It's expressed in pixels, not in characters 798bdcaf97cSJean-Sébastien Pédron * col/row! 799bdcaf97cSJean-Sébastien Pédron * 800bdcaf97cSJean-Sébastien Pédron * 2. Find the pixel further on the left marking the start of 801bdcaf97cSJean-Sébastien Pédron * an aligned pixels block (eg. chunk of 8 pixels): 802bdcaf97cSJean-Sébastien Pédron * character's x / blocksize * blocksize 803bdcaf97cSJean-Sébastien Pédron * 804bdcaf97cSJean-Sébastien Pédron * The division, being made on integers, achieves the 805bdcaf97cSJean-Sébastien Pédron * alignment. 806bdcaf97cSJean-Sébastien Pédron * 807bdcaf97cSJean-Sébastien Pédron * For the Y-axis, we need to compute the character's y 808bdcaf97cSJean-Sébastien Pédron * coordinate, but we don't need to align it. 809bdcaf97cSJean-Sébastien Pédron */ 810bdcaf97cSJean-Sébastien Pédron 811bdcaf97cSJean-Sébastien Pédron col = area->tr_begin.tp_col; 812bdcaf97cSJean-Sébastien Pédron row = area->tr_begin.tp_row; 81383fbb296SJean-Sébastien Pédron x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 814bdcaf97cSJean-Sébastien Pédron / VT_VGA_PIXELS_BLOCK) 815bdcaf97cSJean-Sébastien Pédron * VT_VGA_PIXELS_BLOCK; 81683fbb296SJean-Sébastien Pédron y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 817bdcaf97cSJean-Sébastien Pédron 818bdcaf97cSJean-Sébastien Pédron /* 819bdcaf97cSJean-Sébastien Pédron * Compute the bottom right pixel position, again, aligned with 820bdcaf97cSJean-Sébastien Pédron * the pixels block size. 821bdcaf97cSJean-Sébastien Pédron * 822bdcaf97cSJean-Sébastien Pédron * The same rules apply, we just add 1 to base the computation 823bdcaf97cSJean-Sébastien Pédron * on the "right border" of the dirty area. 824bdcaf97cSJean-Sébastien Pédron */ 825bdcaf97cSJean-Sébastien Pédron 826bdcaf97cSJean-Sébastien Pédron col = area->tr_end.tp_col; 827bdcaf97cSJean-Sébastien Pédron row = area->tr_end.tp_row; 828057b4402SPedro F. Giffuni x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col, 829057b4402SPedro F. Giffuni VT_VGA_PIXELS_BLOCK) 830bdcaf97cSJean-Sébastien Pédron * VT_VGA_PIXELS_BLOCK; 83183fbb296SJean-Sébastien Pédron y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 832bdcaf97cSJean-Sébastien Pédron 83383fbb296SJean-Sébastien Pédron /* Clip the area to the screen size. */ 83483fbb296SJean-Sébastien Pédron x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 83583fbb296SJean-Sébastien Pédron y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 83637fcd291SJean-Sébastien Pédron 83737fcd291SJean-Sébastien Pédron /* 838bdcaf97cSJean-Sébastien Pédron * Now, we take care of N pixels line at a time (the first for 839bdcaf97cSJean-Sébastien Pédron * loop, N = font height), and for these lines, draw one pixels 840bdcaf97cSJean-Sébastien Pédron * block at a time (the second for loop), not a character at a 841bdcaf97cSJean-Sébastien Pédron * time. 842bdcaf97cSJean-Sébastien Pédron * 843bdcaf97cSJean-Sébastien Pédron * Therefore, on the X-axis, characters my be drawn partially if 844bdcaf97cSJean-Sébastien Pédron * they are not aligned on 8-pixels boundary. 845bdcaf97cSJean-Sébastien Pédron * 846bdcaf97cSJean-Sébastien Pédron * However, the operation is repeated for the full height of the 847bdcaf97cSJean-Sébastien Pédron * font before moving to the next character, because it allows 848bdcaf97cSJean-Sébastien Pédron * to keep the color settings and write mode, before perhaps 849bdcaf97cSJean-Sébastien Pédron * changing them with the next one. 850bdcaf97cSJean-Sébastien Pédron */ 851bdcaf97cSJean-Sébastien Pédron 852bdcaf97cSJean-Sébastien Pédron for (y = y1; y < y2; y += vf->vf_height) { 853bdcaf97cSJean-Sébastien Pédron for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 854946d0288SJean-Sébastien Pédron vga_bitblt_one_text_pixels_block(vd, vw, x, y); 855bdcaf97cSJean-Sébastien Pédron } 856bdcaf97cSJean-Sébastien Pédron } 857bdcaf97cSJean-Sébastien Pédron } 858bdcaf97cSJean-Sébastien Pédron 859bdcaf97cSJean-Sébastien Pédron static void 860ab06c776SJean-Sébastien Pédron vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 861946d0288SJean-Sébastien Pédron const term_rect_t *area) 862bdcaf97cSJean-Sébastien Pédron { 863bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 864ab06c776SJean-Sébastien Pédron const struct vt_buf *vb; 865bdcaf97cSJean-Sébastien Pédron unsigned int col, row; 866bdcaf97cSJean-Sébastien Pédron term_char_t c; 867bdcaf97cSJean-Sébastien Pédron term_color_t fg, bg; 868bdcaf97cSJean-Sébastien Pédron uint8_t ch, attr; 869bdcaf97cSJean-Sébastien Pédron 870bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 871ab06c776SJean-Sébastien Pédron vb = &vw->vw_buf; 872bdcaf97cSJean-Sébastien Pédron 873bdcaf97cSJean-Sébastien Pédron for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 874bdcaf97cSJean-Sébastien Pédron for (col = area->tr_begin.tp_col; 875bdcaf97cSJean-Sébastien Pédron col < area->tr_end.tp_col; 876bdcaf97cSJean-Sébastien Pédron ++col) { 877bdcaf97cSJean-Sébastien Pédron /* 878bdcaf97cSJean-Sébastien Pédron * Get next character and its associated fg/bg 879bdcaf97cSJean-Sébastien Pédron * colors. 880bdcaf97cSJean-Sébastien Pédron */ 881bdcaf97cSJean-Sébastien Pédron c = VTBUF_GET_FIELD(vb, row, col); 882bdcaf97cSJean-Sébastien Pédron vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 883bdcaf97cSJean-Sébastien Pédron &fg, &bg); 884bdcaf97cSJean-Sébastien Pédron 885bdcaf97cSJean-Sébastien Pédron /* 886bdcaf97cSJean-Sébastien Pédron * Convert character to CP437, which is the 887bdcaf97cSJean-Sébastien Pédron * character set used by the VGA hardware by 888bdcaf97cSJean-Sébastien Pédron * default. 889a401c53aSAleksandr Rybalko */ 89081788a2bSJean-Sébastien Pédron ch = vga_get_cp437(TCHAR_CHARACTER(c)); 891a401c53aSAleksandr Rybalko 892bdcaf97cSJean-Sébastien Pédron /* Convert colors to VGA attributes. */ 8935e251aecSJean-Sébastien Pédron attr = 8945e251aecSJean-Sébastien Pédron cons_to_vga_colors[bg] << 4 | 8955e251aecSJean-Sébastien Pédron cons_to_vga_colors[fg]; 896a401c53aSAleksandr Rybalko 8976280434fSMarcel Moolenaar MEM_WRITE1(sc, (row * 80 + col) * 2 + 0, 898bdcaf97cSJean-Sébastien Pédron ch); 8996280434fSMarcel Moolenaar MEM_WRITE1(sc, (row * 80 + col) * 2 + 1, 900bdcaf97cSJean-Sébastien Pédron attr); 901bdcaf97cSJean-Sébastien Pédron } 902bdcaf97cSJean-Sébastien Pédron } 903bdcaf97cSJean-Sébastien Pédron } 904bdcaf97cSJean-Sébastien Pédron 905bdcaf97cSJean-Sébastien Pédron static void 906ab06c776SJean-Sébastien Pédron vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 907946d0288SJean-Sébastien Pédron const term_rect_t *area) 908bdcaf97cSJean-Sébastien Pédron { 909bdcaf97cSJean-Sébastien Pédron 910bdcaf97cSJean-Sébastien Pédron if (!(vd->vd_flags & VDF_TEXTMODE)) { 911946d0288SJean-Sébastien Pédron vga_bitblt_text_gfxmode(vd, vw, area); 912bdcaf97cSJean-Sébastien Pédron } else { 913946d0288SJean-Sébastien Pédron vga_bitblt_text_txtmode(vd, vw, area); 914bdcaf97cSJean-Sébastien Pédron } 915a401c53aSAleksandr Rybalko } 916a401c53aSAleksandr Rybalko 917a401c53aSAleksandr Rybalko static void 918631bb572SJean-Sébastien Pédron vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 919631bb572SJean-Sébastien Pédron const uint8_t *pattern, const uint8_t *mask, 920631bb572SJean-Sébastien Pédron unsigned int width, unsigned int height, 921631bb572SJean-Sébastien Pédron unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 922631bb572SJean-Sébastien Pédron { 923631bb572SJean-Sébastien Pédron unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 9247e1770a7SJean-Sébastien Pédron uint8_t pattern_2colors; 925631bb572SJean-Sébastien Pédron 926631bb572SJean-Sébastien Pédron /* Align coordinates with the 8-pxels grid. */ 9274ed3c0e7SPedro F. Giffuni x1 = rounddown(x, VT_VGA_PIXELS_BLOCK); 928631bb572SJean-Sébastien Pédron y1 = y; 929631bb572SJean-Sébastien Pédron 930057b4402SPedro F. Giffuni x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK); 931631bb572SJean-Sébastien Pédron y2 = y + height; 932631bb572SJean-Sébastien Pédron x2 = min(x2, vd->vd_width - 1); 933631bb572SJean-Sébastien Pédron y2 = min(y2, vd->vd_height - 1); 934631bb572SJean-Sébastien Pédron 935631bb572SJean-Sébastien Pédron for (j = y1; j < y2; ++j) { 936631bb572SJean-Sébastien Pédron src_x = 0; 937631bb572SJean-Sébastien Pédron dst_x = x - x1; 938631bb572SJean-Sébastien Pédron x_count = VT_VGA_PIXELS_BLOCK - dst_x; 939631bb572SJean-Sébastien Pédron 9407e1770a7SJean-Sébastien Pédron for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 941631bb572SJean-Sébastien Pédron pattern_2colors = 0; 942631bb572SJean-Sébastien Pédron 943631bb572SJean-Sébastien Pédron vga_copy_bitmap_portion( 9447e1770a7SJean-Sébastien Pédron &pattern_2colors, NULL, 945631bb572SJean-Sébastien Pédron pattern, mask, width, 946631bb572SJean-Sébastien Pédron src_x, dst_x, x_count, 947631bb572SJean-Sébastien Pédron j - y1, 0, 1, fg, bg, 0); 948631bb572SJean-Sébastien Pédron 949631bb572SJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(vd, 950631bb572SJean-Sébastien Pédron &pattern_2colors, fg, bg, 951631bb572SJean-Sébastien Pédron i, j, 1); 952631bb572SJean-Sébastien Pédron 953631bb572SJean-Sébastien Pédron src_x += x_count; 954631bb572SJean-Sébastien Pédron dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 9557e1770a7SJean-Sébastien Pédron x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 956631bb572SJean-Sébastien Pédron } 957631bb572SJean-Sébastien Pédron } 958631bb572SJean-Sébastien Pédron } 959631bb572SJean-Sébastien Pédron 960631bb572SJean-Sébastien Pédron static void 961a401c53aSAleksandr Rybalko vga_initialize_graphics(struct vt_device *vd) 962a401c53aSAleksandr Rybalko { 963a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 964a401c53aSAleksandr Rybalko 965a401c53aSAleksandr Rybalko /* Clock select. */ 966a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 967a401c53aSAleksandr Rybalko VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 968a401c53aSAleksandr Rybalko /* Set sequencer clocking and memory mode. */ 969a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 970a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 971a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 972a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 973a401c53aSAleksandr Rybalko 974a401c53aSAleksandr Rybalko /* Set the graphics controller in graphics mode. */ 975a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 976a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 977a401c53aSAleksandr Rybalko /* Program the CRT controller. */ 978a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 979a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 980a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 981a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 982a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 983a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 984a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 985a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 986a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 987a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 988a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 989a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 990a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 991a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 992a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 993a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 994a401c53aSAleksandr Rybalko VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 995a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 996a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 997a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 998a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 999a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1000a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 1001a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 1002a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 1003a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 1004a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 1005a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 1006a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 1007a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 1008a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 1009a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1010a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1011a401c53aSAleksandr Rybalko VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1012a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1013a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1014a401c53aSAleksandr Rybalko 1015a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1016a401c53aSAleksandr Rybalko 1017a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1018a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1019a401c53aSAleksandr Rybalko VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1020a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1021a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1022a401c53aSAleksandr Rybalko 1023a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1024a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1025a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1026a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1027a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1028a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1029a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1030a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1031a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1032a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1033a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1034a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1035a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1036a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1037a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1038a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1039a401c53aSAleksandr Rybalko } 1040a401c53aSAleksandr Rybalko 1041f0e31fe0SRoger Pau Monné static int 1042a401c53aSAleksandr Rybalko vga_initialize(struct vt_device *vd, int textmode) 1043a401c53aSAleksandr Rybalko { 1044a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 1045a401c53aSAleksandr Rybalko uint8_t x; 1046f0e31fe0SRoger Pau Monné int timeout; 1047a401c53aSAleksandr Rybalko 1048a401c53aSAleksandr Rybalko /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1049a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1050a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1051a401c53aSAleksandr Rybalko 1052a401c53aSAleksandr Rybalko /* Unprotect CRTC registers 0-7. */ 1053a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1054a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1055a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1056a401c53aSAleksandr Rybalko 1057a401c53aSAleksandr Rybalko /* 1058a401c53aSAleksandr Rybalko * Wait for the vertical retrace. 1059a401c53aSAleksandr Rybalko * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1060a401c53aSAleksandr Rybalko * the side-effect of clearing the internal flip-flip of the attribute 1061a401c53aSAleksandr Rybalko * controller's write register. This means that because this code is 1062a401c53aSAleksandr Rybalko * here, we know for sure that the first write to the attribute 1063a401c53aSAleksandr Rybalko * controller will be a write to the address register. Removing this 1064a401c53aSAleksandr Rybalko * code therefore also removes that guarantee and appropriate measures 1065a401c53aSAleksandr Rybalko * need to be taken. 1066a401c53aSAleksandr Rybalko */ 1067f0e31fe0SRoger Pau Monné timeout = 10000; 1068a401c53aSAleksandr Rybalko do { 1069f0e31fe0SRoger Pau Monné DELAY(10); 1070a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1071a401c53aSAleksandr Rybalko x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1072f0e31fe0SRoger Pau Monné } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1073f0e31fe0SRoger Pau Monné if (timeout == 0) { 1074f0e31fe0SRoger Pau Monné printf("Timeout initializing vt_vga\n"); 1075f0e31fe0SRoger Pau Monné return (ENXIO); 1076f0e31fe0SRoger Pau Monné } 1077a401c53aSAleksandr Rybalko 1078a401c53aSAleksandr Rybalko /* Now, disable the sync. signals. */ 1079a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1080a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1081a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1082a401c53aSAleksandr Rybalko 1083a401c53aSAleksandr Rybalko /* Asynchronous sequencer reset. */ 1084a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1085a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1086a401c53aSAleksandr Rybalko 1087a401c53aSAleksandr Rybalko if (!textmode) 1088a401c53aSAleksandr Rybalko vga_initialize_graphics(vd); 1089a401c53aSAleksandr Rybalko 1090a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1091a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1092a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1093a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1094a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1095a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1096a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1097a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1098a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1099a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1100a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1101a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1102a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1103a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1104a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1105a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1106a401c53aSAleksandr Rybalko 1107a401c53aSAleksandr Rybalko if (textmode) { 1108a401c53aSAleksandr Rybalko /* Set the attribute controller to blink disable. */ 1109a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1110a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1111a401c53aSAleksandr Rybalko } else { 1112a401c53aSAleksandr Rybalko /* Set the attribute controller in graphics mode. */ 1113a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1114a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1115a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1116a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1117a401c53aSAleksandr Rybalko } 1118a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1119a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1120a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 11215e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1122a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1123a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1124a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 11255e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1126a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 11275e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1128a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1129a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1130a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 11315e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1132a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1133a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 11345e251aecSJean-Sébastien Pédron 1135a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1136a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1137a401c53aSAleksandr Rybalko VGA_AC_PAL_SB); 1138a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1139a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 11405e251aecSJean-Sébastien Pédron VGA_AC_PAL_SB | VGA_AC_PAL_B); 1141a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1142a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1143a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_G); 1144a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1145a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 11465e251aecSJean-Sébastien Pédron VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1147a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1148a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 11495e251aecSJean-Sébastien Pédron VGA_AC_PAL_SB | VGA_AC_PAL_R); 1150a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1151a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1152a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1153a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1154a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 11555e251aecSJean-Sébastien Pédron VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1156a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1157a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1158a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 11595e251aecSJean-Sébastien Pédron 1160a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1161a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1162a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1163a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1164a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1165a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1166a401c53aSAleksandr Rybalko 1167a401c53aSAleksandr Rybalko if (!textmode) { 1168a401c53aSAleksandr Rybalko u_int ofs; 1169a401c53aSAleksandr Rybalko 1170a401c53aSAleksandr Rybalko /* 1171a401c53aSAleksandr Rybalko * Done. Clear the frame buffer. All bit planes are 1172a401c53aSAleksandr Rybalko * enabled, so a single-paged loop should clear all 1173a401c53aSAleksandr Rybalko * planes. 1174a401c53aSAleksandr Rybalko */ 1175a401c53aSAleksandr Rybalko for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1176a401c53aSAleksandr Rybalko MEM_WRITE1(sc, ofs, 0); 1177a401c53aSAleksandr Rybalko } 1178a401c53aSAleksandr Rybalko } 1179a401c53aSAleksandr Rybalko 1180a401c53aSAleksandr Rybalko /* Re-enable the sequencer. */ 1181a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1182a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1183a401c53aSAleksandr Rybalko /* Re-enable the sync signals. */ 1184a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1185a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1186a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1187a401c53aSAleksandr Rybalko 1188a401c53aSAleksandr Rybalko if (!textmode) { 1189a401c53aSAleksandr Rybalko /* Switch to write mode 3, because we'll mainly do bitblt. */ 1190a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1191a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 3); 1192af9f67eaSJean-Sébastien Pédron sc->vga_wmode = 3; 1193af9f67eaSJean-Sébastien Pédron 1194af9f67eaSJean-Sébastien Pédron /* 1195af9f67eaSJean-Sébastien Pédron * In Write Mode 3, Enable Set/Reset is ignored, but we 1196af9f67eaSJean-Sébastien Pédron * use Write Mode 0 to write a group of 8 pixels using 1197af9f67eaSJean-Sébastien Pédron * 3 or more colors. In this case, we want to disable 1198af9f67eaSJean-Sébastien Pédron * Set/Reset: set Enable Set/Reset to 0. 1199af9f67eaSJean-Sébastien Pédron */ 1200a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1201af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1202bdcaf97cSJean-Sébastien Pédron 1203bdcaf97cSJean-Sébastien Pédron /* 1204bdcaf97cSJean-Sébastien Pédron * Clear the colors we think are loaded into Set/Reset or 1205bdcaf97cSJean-Sébastien Pédron * the latches. 1206bdcaf97cSJean-Sébastien Pédron */ 1207bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = sc->vga_curbg = 0xff; 1208a401c53aSAleksandr Rybalko } 1209f0e31fe0SRoger Pau Monné 1210f0e31fe0SRoger Pau Monné return (0); 1211a401c53aSAleksandr Rybalko } 1212a401c53aSAleksandr Rybalko 1213c2272faaSRoger Pau Monné static bool 1214c2272faaSRoger Pau Monné vga_acpi_disabled(void) 1215c2272faaSRoger Pau Monné { 1216c2272faaSRoger Pau Monné #if ((defined(__amd64__) || defined(__i386__)) && defined(DEV_ACPI)) 1217c2272faaSRoger Pau Monné ACPI_TABLE_FADT *fadt; 1218c2272faaSRoger Pau Monné vm_paddr_t physaddr; 1219c2272faaSRoger Pau Monné uint16_t flags; 1220*8f62926eSRoger Pau Monné int ignore; 1221*8f62926eSRoger Pau Monné 1222*8f62926eSRoger Pau Monné TUNABLE_INT_FETCH("hw.vga.acpi_ignore_no_vga", &ignore); 1223*8f62926eSRoger Pau Monné 1224*8f62926eSRoger Pau Monné if (ignore) 1225*8f62926eSRoger Pau Monné return (false); 1226c2272faaSRoger Pau Monné 1227c2272faaSRoger Pau Monné physaddr = acpi_find_table(ACPI_SIG_FADT); 1228c2272faaSRoger Pau Monné if (physaddr == 0) 1229c2272faaSRoger Pau Monné return (false); 1230c2272faaSRoger Pau Monné 1231c2272faaSRoger Pau Monné fadt = acpi_map_table(physaddr, ACPI_SIG_FADT); 1232c2272faaSRoger Pau Monné if (fadt == NULL) { 1233c2272faaSRoger Pau Monné printf("vt_vga: unable to map FADT ACPI table\n"); 1234c2272faaSRoger Pau Monné return (false); 1235c2272faaSRoger Pau Monné } 1236c2272faaSRoger Pau Monné 1237c2272faaSRoger Pau Monné flags = fadt->BootFlags; 1238c2272faaSRoger Pau Monné acpi_unmap_table(fadt); 1239c2272faaSRoger Pau Monné 1240c2272faaSRoger Pau Monné if (flags & ACPI_FADT_NO_VGA) 1241c2272faaSRoger Pau Monné return (true); 1242c2272faaSRoger Pau Monné #endif 1243c2272faaSRoger Pau Monné 1244c2272faaSRoger Pau Monné return (false); 1245c2272faaSRoger Pau Monné } 1246c2272faaSRoger Pau Monné 1247a401c53aSAleksandr Rybalko static int 1248a401c53aSAleksandr Rybalko vga_probe(struct vt_device *vd) 1249a401c53aSAleksandr Rybalko { 1250a401c53aSAleksandr Rybalko 1251c2272faaSRoger Pau Monné return (vga_acpi_disabled() ? CN_DEAD : CN_INTERNAL); 1252a401c53aSAleksandr Rybalko } 1253a401c53aSAleksandr Rybalko 1254a401c53aSAleksandr Rybalko static int 1255a401c53aSAleksandr Rybalko vga_init(struct vt_device *vd) 1256a401c53aSAleksandr Rybalko { 1257a401c53aSAleksandr Rybalko struct vga_softc *sc; 1258a401c53aSAleksandr Rybalko int textmode; 1259a401c53aSAleksandr Rybalko 1260a401c53aSAleksandr Rybalko if (vd->vd_softc == NULL) 1261a401c53aSAleksandr Rybalko vd->vd_softc = (void *)&vga_conssoftc; 1262a401c53aSAleksandr Rybalko sc = vd->vd_softc; 1263a401c53aSAleksandr Rybalko 126476e2f976SJean-Sébastien Pédron if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 126576e2f976SJean-Sébastien Pédron vga_pci_repost(vd->vd_video_dev); 126676e2f976SJean-Sébastien Pédron 1267a401c53aSAleksandr Rybalko #if defined(__amd64__) || defined(__i386__) 1268a401c53aSAleksandr Rybalko sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1269a401c53aSAleksandr Rybalko sc->vga_reg_tag = X86_BUS_SPACE_IO; 1270a401c53aSAleksandr Rybalko #else 1271a401c53aSAleksandr Rybalko # error "Architecture not yet supported!" 1272a401c53aSAleksandr Rybalko #endif 1273a401c53aSAleksandr Rybalko 12747ef5e8bcSMarcel Moolenaar bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 12757ef5e8bcSMarcel Moolenaar &sc->vga_reg_handle); 12767ef5e8bcSMarcel Moolenaar 12779a4a2c61SSepherosa Ziehau /* 12789a4a2c61SSepherosa Ziehau * If "hw.vga.textmode" is not set and we're running on hypervisor, 12799a4a2c61SSepherosa Ziehau * we use text mode by default, this is because when we're on 12809a4a2c61SSepherosa Ziehau * hypervisor, vt(4) is usually much slower in graphics mode than 12819a4a2c61SSepherosa Ziehau * in text mode, especially when we're on Hyper-V. 12829a4a2c61SSepherosa Ziehau */ 12839a4a2c61SSepherosa Ziehau textmode = vm_guest != VM_GUEST_NO; 1284a401c53aSAleksandr Rybalko TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1285a401c53aSAleksandr Rybalko if (textmode) { 1286a401c53aSAleksandr Rybalko vd->vd_flags |= VDF_TEXTMODE; 1287a401c53aSAleksandr Rybalko vd->vd_width = 80; 1288a401c53aSAleksandr Rybalko vd->vd_height = 25; 12896280434fSMarcel Moolenaar bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 12906280434fSMarcel Moolenaar &sc->vga_fb_handle); 1291a401c53aSAleksandr Rybalko } else { 1292a401c53aSAleksandr Rybalko vd->vd_width = VT_VGA_WIDTH; 1293a401c53aSAleksandr Rybalko vd->vd_height = VT_VGA_HEIGHT; 12946280434fSMarcel Moolenaar bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 12956280434fSMarcel Moolenaar &sc->vga_fb_handle); 1296a401c53aSAleksandr Rybalko } 1297f0e31fe0SRoger Pau Monné if (vga_initialize(vd, textmode) != 0) 1298f0e31fe0SRoger Pau Monné return (CN_DEAD); 1299acb332a8SRoger Pau Monné sc->vga_enabled = true; 1300a401c53aSAleksandr Rybalko 1301a401c53aSAleksandr Rybalko return (CN_INTERNAL); 1302a401c53aSAleksandr Rybalko } 1303a401c53aSAleksandr Rybalko 1304a401c53aSAleksandr Rybalko static void 1305a401c53aSAleksandr Rybalko vga_postswitch(struct vt_device *vd) 1306a401c53aSAleksandr Rybalko { 1307a401c53aSAleksandr Rybalko 1308a401c53aSAleksandr Rybalko /* Reinit VGA mode, to restore view after app which change mode. */ 1309a401c53aSAleksandr Rybalko vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1310a401c53aSAleksandr Rybalko /* Ask vt(9) to update chars on visible area. */ 1311a401c53aSAleksandr Rybalko vd->vd_flags |= VDF_INVALID; 1312a401c53aSAleksandr Rybalko } 1313acb332a8SRoger Pau Monné 1314acb332a8SRoger Pau Monné /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1315acb332a8SRoger Pau Monné static void 1316acb332a8SRoger Pau Monné vtvga_identify(driver_t *driver, device_t parent) 1317acb332a8SRoger Pau Monné { 1318acb332a8SRoger Pau Monné 1319acb332a8SRoger Pau Monné if (!vga_conssoftc.vga_enabled) 1320acb332a8SRoger Pau Monné return; 1321acb332a8SRoger Pau Monné 1322acb332a8SRoger Pau Monné if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1323acb332a8SRoger Pau Monné panic("Unable to attach vt_vga console"); 1324acb332a8SRoger Pau Monné } 1325acb332a8SRoger Pau Monné 1326acb332a8SRoger Pau Monné static int 1327acb332a8SRoger Pau Monné vtvga_probe(device_t dev) 1328acb332a8SRoger Pau Monné { 1329acb332a8SRoger Pau Monné 1330bae1c14dSRui Paulo device_set_desc(dev, "VT VGA driver"); 1331bae1c14dSRui Paulo 1332acb332a8SRoger Pau Monné return (BUS_PROBE_NOWILDCARD); 1333acb332a8SRoger Pau Monné } 1334acb332a8SRoger Pau Monné 1335acb332a8SRoger Pau Monné static int 1336acb332a8SRoger Pau Monné vtvga_attach(device_t dev) 1337acb332a8SRoger Pau Monné { 1338acb332a8SRoger Pau Monné struct resource *pseudo_phys_res; 1339acb332a8SRoger Pau Monné int res_id; 1340acb332a8SRoger Pau Monné 1341acb332a8SRoger Pau Monné res_id = 0; 1342acb332a8SRoger Pau Monné pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1343bc59086cSRoger Pau Monné &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1344acb332a8SRoger Pau Monné VGA_MEM_SIZE, RF_ACTIVE); 1345acb332a8SRoger Pau Monné if (pseudo_phys_res == NULL) 1346acb332a8SRoger Pau Monné panic("Unable to reserve vt_vga memory"); 1347acb332a8SRoger Pau Monné return (0); 1348acb332a8SRoger Pau Monné } 1349acb332a8SRoger Pau Monné 1350acb332a8SRoger Pau Monné /*-------------------- Private Device Attachment Data -----------------------*/ 1351acb332a8SRoger Pau Monné static device_method_t vtvga_methods[] = { 1352acb332a8SRoger Pau Monné /* Device interface */ 1353acb332a8SRoger Pau Monné DEVMETHOD(device_identify, vtvga_identify), 1354acb332a8SRoger Pau Monné DEVMETHOD(device_probe, vtvga_probe), 1355acb332a8SRoger Pau Monné DEVMETHOD(device_attach, vtvga_attach), 1356acb332a8SRoger Pau Monné 1357acb332a8SRoger Pau Monné DEVMETHOD_END 1358acb332a8SRoger Pau Monné }; 1359acb332a8SRoger Pau Monné 1360acb332a8SRoger Pau Monné DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1361acb332a8SRoger Pau Monné devclass_t vtvga_devclass; 1362acb332a8SRoger Pau Monné 1363acb332a8SRoger Pau Monné DRIVER_MODULE(vtvga, nexus, vtvga_driver, vtvga_devclass, NULL, NULL); 1364