1a401c53aSAleksandr Rybalko /*- 2a401c53aSAleksandr Rybalko * Copyright (c) 2005 Marcel Moolenaar 3a401c53aSAleksandr Rybalko * All rights reserved. 4a401c53aSAleksandr Rybalko * 5a401c53aSAleksandr Rybalko * Copyright (c) 2009 The FreeBSD Foundation 6a401c53aSAleksandr Rybalko * All rights reserved. 7a401c53aSAleksandr Rybalko * 8a401c53aSAleksandr Rybalko * Portions of this software were developed by Ed Schouten 9a401c53aSAleksandr Rybalko * under sponsorship from the FreeBSD Foundation. 10a401c53aSAleksandr Rybalko * 11a401c53aSAleksandr Rybalko * Redistribution and use in source and binary forms, with or without 12a401c53aSAleksandr Rybalko * modification, are permitted provided that the following conditions 13a401c53aSAleksandr Rybalko * are met: 14a401c53aSAleksandr Rybalko * 1. Redistributions of source code must retain the above copyright 15a401c53aSAleksandr Rybalko * notice, this list of conditions and the following disclaimer. 16a401c53aSAleksandr Rybalko * 2. Redistributions in binary form must reproduce the above copyright 17a401c53aSAleksandr Rybalko * notice, this list of conditions and the following disclaimer in the 18a401c53aSAleksandr Rybalko * documentation and/or other materials provided with the distribution. 19a401c53aSAleksandr Rybalko * 20a401c53aSAleksandr Rybalko * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21a401c53aSAleksandr Rybalko * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22a401c53aSAleksandr Rybalko * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23a401c53aSAleksandr Rybalko * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24a401c53aSAleksandr Rybalko * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25a401c53aSAleksandr Rybalko * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26a401c53aSAleksandr Rybalko * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27a401c53aSAleksandr Rybalko * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28a401c53aSAleksandr Rybalko * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29a401c53aSAleksandr Rybalko * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30a401c53aSAleksandr Rybalko * SUCH DAMAGE. 31a401c53aSAleksandr Rybalko */ 32a401c53aSAleksandr Rybalko 33c2272faaSRoger Pau Monné #include "opt_acpi.h" 34c2272faaSRoger Pau Monné 35a401c53aSAleksandr Rybalko #include <sys/cdefs.h> 36a401c53aSAleksandr Rybalko __FBSDID("$FreeBSD$"); 37a401c53aSAleksandr Rybalko 38a401c53aSAleksandr Rybalko #include <sys/param.h> 39a401c53aSAleksandr Rybalko #include <sys/kernel.h> 40a401c53aSAleksandr Rybalko #include <sys/systm.h> 41acb332a8SRoger Pau Monné #include <sys/bus.h> 42acb332a8SRoger Pau Monné #include <sys/module.h> 43acb332a8SRoger Pau Monné #include <sys/rman.h> 44a401c53aSAleksandr Rybalko 45a401c53aSAleksandr Rybalko #include <dev/vt/vt.h> 465e251aecSJean-Sébastien Pédron #include <dev/vt/colors/vt_termcolors.h> 47a401c53aSAleksandr Rybalko #include <dev/vt/hw/vga/vt_vga_reg.h> 4876e2f976SJean-Sébastien Pédron #include <dev/pci/pcivar.h> 49a401c53aSAleksandr Rybalko 50a401c53aSAleksandr Rybalko #include <machine/bus.h> 517705dd4dSKonstantin Belousov #if defined(__amd64__) || defined(__i386__) 5228ebccd5SKonstantin Belousov #include <contrib/dev/acpica/include/acpi.h> 537705dd4dSKonstantin Belousov #include <machine/md_var.h> 54c2272faaSRoger Pau Monné #endif 55c2272faaSRoger Pau Monné 56a401c53aSAleksandr Rybalko struct vga_softc { 57a401c53aSAleksandr Rybalko bus_space_tag_t vga_fb_tag; 58a401c53aSAleksandr Rybalko bus_space_handle_t vga_fb_handle; 59a401c53aSAleksandr Rybalko bus_space_tag_t vga_reg_tag; 60a401c53aSAleksandr Rybalko bus_space_handle_t vga_reg_handle; 61af9f67eaSJean-Sébastien Pédron int vga_wmode; 62bdcaf97cSJean-Sébastien Pédron term_color_t vga_curfg, vga_curbg; 63acb332a8SRoger Pau Monné boolean_t vga_enabled; 64a401c53aSAleksandr Rybalko }; 65a401c53aSAleksandr Rybalko 66a401c53aSAleksandr Rybalko /* Convenience macros. */ 67a401c53aSAleksandr Rybalko #define MEM_READ1(sc, ofs) \ 68a401c53aSAleksandr Rybalko bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 69a401c53aSAleksandr Rybalko #define MEM_WRITE1(sc, ofs, val) \ 70a401c53aSAleksandr Rybalko bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 710b4d5eb8SColin Percival #define MEM_WRITE2(sc, ofs, val) \ 720b4d5eb8SColin Percival bus_space_write_2(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 73a401c53aSAleksandr Rybalko #define REG_READ1(sc, reg) \ 74a401c53aSAleksandr Rybalko bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 75a401c53aSAleksandr Rybalko #define REG_WRITE1(sc, reg, val) \ 76a401c53aSAleksandr Rybalko bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 77a401c53aSAleksandr Rybalko 78a401c53aSAleksandr Rybalko #define VT_VGA_WIDTH 640 79a401c53aSAleksandr Rybalko #define VT_VGA_HEIGHT 480 80a401c53aSAleksandr Rybalko #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 81a401c53aSAleksandr Rybalko 82bdcaf97cSJean-Sébastien Pédron /* 83bdcaf97cSJean-Sébastien Pédron * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 84bdcaf97cSJean-Sébastien Pédron * memory). 85bdcaf97cSJean-Sébastien Pédron */ 86bdcaf97cSJean-Sébastien Pédron #define VT_VGA_PIXELS_BLOCK 8 87bdcaf97cSJean-Sébastien Pédron 88bdcaf97cSJean-Sébastien Pédron /* 89bdcaf97cSJean-Sébastien Pédron * We use an off-screen addresses to: 90bdcaf97cSJean-Sébastien Pédron * o store the background color; 91bdcaf97cSJean-Sébastien Pédron * o store pixels pattern. 92bdcaf97cSJean-Sébastien Pédron * Those addresses are then loaded in the latches once. 93bdcaf97cSJean-Sébastien Pédron */ 94bdcaf97cSJean-Sébastien Pédron #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 95bdcaf97cSJean-Sébastien Pédron 96a401c53aSAleksandr Rybalko static vd_probe_t vga_probe; 97a401c53aSAleksandr Rybalko static vd_init_t vga_init; 98a401c53aSAleksandr Rybalko static vd_blank_t vga_blank; 99bdcaf97cSJean-Sébastien Pédron static vd_bitblt_text_t vga_bitblt_text; 100ee97b233SColin Percival static vd_invalidate_text_t vga_invalidate_text; 101631bb572SJean-Sébastien Pédron static vd_bitblt_bmp_t vga_bitblt_bitmap; 102a401c53aSAleksandr Rybalko static vd_drawrect_t vga_drawrect; 103a401c53aSAleksandr Rybalko static vd_setpixel_t vga_setpixel; 104a401c53aSAleksandr Rybalko static vd_postswitch_t vga_postswitch; 105a401c53aSAleksandr Rybalko 106a401c53aSAleksandr Rybalko static const struct vt_driver vt_vga_driver = { 107a401c53aSAleksandr Rybalko .vd_name = "vga", 108a401c53aSAleksandr Rybalko .vd_probe = vga_probe, 109a401c53aSAleksandr Rybalko .vd_init = vga_init, 110a401c53aSAleksandr Rybalko .vd_blank = vga_blank, 111bdcaf97cSJean-Sébastien Pédron .vd_bitblt_text = vga_bitblt_text, 112ee97b233SColin Percival .vd_invalidate_text = vga_invalidate_text, 113631bb572SJean-Sébastien Pédron .vd_bitblt_bmp = vga_bitblt_bitmap, 114a401c53aSAleksandr Rybalko .vd_drawrect = vga_drawrect, 115a401c53aSAleksandr Rybalko .vd_setpixel = vga_setpixel, 116a401c53aSAleksandr Rybalko .vd_postswitch = vga_postswitch, 117a401c53aSAleksandr Rybalko .vd_priority = VD_PRIORITY_GENERIC, 118a401c53aSAleksandr Rybalko }; 119a401c53aSAleksandr Rybalko 120a401c53aSAleksandr Rybalko /* 121a401c53aSAleksandr Rybalko * Driver supports both text mode and graphics mode. Make sure the 122a401c53aSAleksandr Rybalko * buffer is always big enough to support both. 123a401c53aSAleksandr Rybalko */ 124a401c53aSAleksandr Rybalko static struct vga_softc vga_conssoftc; 125a401c53aSAleksandr Rybalko VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 126a401c53aSAleksandr Rybalko 127a401c53aSAleksandr Rybalko static inline void 128af9f67eaSJean-Sébastien Pédron vga_setwmode(struct vt_device *vd, int wmode) 129af9f67eaSJean-Sébastien Pédron { 130af9f67eaSJean-Sébastien Pédron struct vga_softc *sc = vd->vd_softc; 131af9f67eaSJean-Sébastien Pédron 132af9f67eaSJean-Sébastien Pédron if (sc->vga_wmode == wmode) 133af9f67eaSJean-Sébastien Pédron return; 134af9f67eaSJean-Sébastien Pédron 135af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 136af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, wmode); 137af9f67eaSJean-Sébastien Pédron sc->vga_wmode = wmode; 138af9f67eaSJean-Sébastien Pédron 139af9f67eaSJean-Sébastien Pédron switch (wmode) { 140af9f67eaSJean-Sébastien Pédron case 3: 141731a929aSEd Maste /* Re-enable all planes. */ 142af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 143af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 144af9f67eaSJean-Sébastien Pédron VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 145af9f67eaSJean-Sébastien Pédron break; 146af9f67eaSJean-Sébastien Pédron } 147af9f67eaSJean-Sébastien Pédron } 148af9f67eaSJean-Sébastien Pédron 149af9f67eaSJean-Sébastien Pédron static inline void 150bdcaf97cSJean-Sébastien Pédron vga_setfg(struct vt_device *vd, term_color_t color) 151a401c53aSAleksandr Rybalko { 152a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 153a401c53aSAleksandr Rybalko 154af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 3); 155af9f67eaSJean-Sébastien Pédron 156af9f67eaSJean-Sébastien Pédron if (sc->vga_curfg == color) 157af9f67eaSJean-Sébastien Pédron return; 158af9f67eaSJean-Sébastien Pédron 159a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1605e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 161bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = color; 162a401c53aSAleksandr Rybalko } 163a401c53aSAleksandr Rybalko 164a401c53aSAleksandr Rybalko static inline void 165bdcaf97cSJean-Sébastien Pédron vga_setbg(struct vt_device *vd, term_color_t color) 166a401c53aSAleksandr Rybalko { 167a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 168a401c53aSAleksandr Rybalko 169af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 3); 170af9f67eaSJean-Sébastien Pédron 171af9f67eaSJean-Sébastien Pédron if (sc->vga_curbg == color) 172af9f67eaSJean-Sébastien Pédron return; 173af9f67eaSJean-Sébastien Pédron 174bdcaf97cSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1755e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]); 176a401c53aSAleksandr Rybalko 17734cb8c9fSAleksandr Rybalko /* 178af9f67eaSJean-Sébastien Pédron * Write 8 pixels using the background color to an off-screen 179af9f67eaSJean-Sébastien Pédron * byte in the video memory. 18034cb8c9fSAleksandr Rybalko */ 181bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 18234cb8c9fSAleksandr Rybalko 18334cb8c9fSAleksandr Rybalko /* 184af9f67eaSJean-Sébastien Pédron * Read those 8 pixels back to load the background color in the 185af9f67eaSJean-Sébastien Pédron * latches register. 18634cb8c9fSAleksandr Rybalko */ 187bdcaf97cSJean-Sébastien Pédron MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 18834cb8c9fSAleksandr Rybalko 189bdcaf97cSJean-Sébastien Pédron sc->vga_curbg = color; 19034cb8c9fSAleksandr Rybalko 191bdcaf97cSJean-Sébastien Pédron /* 192af9f67eaSJean-Sébastien Pédron * The Set/Reset register doesn't contain the fg color anymore, 193af9f67eaSJean-Sébastien Pédron * store an invalid color. 194bdcaf97cSJean-Sébastien Pédron */ 195bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = 0xff; 196a401c53aSAleksandr Rybalko } 197a401c53aSAleksandr Rybalko 198a401c53aSAleksandr Rybalko /* 199a401c53aSAleksandr Rybalko * Binary searchable table for Unicode to CP437 conversion. 200a401c53aSAleksandr Rybalko */ 201a401c53aSAleksandr Rybalko 202a401c53aSAleksandr Rybalko struct unicp437 { 203a401c53aSAleksandr Rybalko uint16_t unicode_base; 204a401c53aSAleksandr Rybalko uint8_t cp437_base; 205a401c53aSAleksandr Rybalko uint8_t length; 206a401c53aSAleksandr Rybalko }; 207a401c53aSAleksandr Rybalko 208a401c53aSAleksandr Rybalko static const struct unicp437 cp437table[] = { 209a401c53aSAleksandr Rybalko { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 210a401c53aSAleksandr Rybalko { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 211a401c53aSAleksandr Rybalko { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 212649d7b46SEd Maste { 0x00a6, 0x7c, 0x00 }, 213a401c53aSAleksandr Rybalko { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 214a401c53aSAleksandr Rybalko { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 215a401c53aSAleksandr Rybalko { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 216a401c53aSAleksandr Rybalko { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 217a401c53aSAleksandr Rybalko { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 218a401c53aSAleksandr Rybalko { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 219a401c53aSAleksandr Rybalko { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 220a401c53aSAleksandr Rybalko { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 221a401c53aSAleksandr Rybalko { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 222a401c53aSAleksandr Rybalko { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 223a401c53aSAleksandr Rybalko { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 224a401c53aSAleksandr Rybalko { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 225a401c53aSAleksandr Rybalko { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 226a401c53aSAleksandr Rybalko { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 227a401c53aSAleksandr Rybalko { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 228a401c53aSAleksandr Rybalko { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 229a401c53aSAleksandr Rybalko { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 230a401c53aSAleksandr Rybalko { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 231a401c53aSAleksandr Rybalko { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 232a401c53aSAleksandr Rybalko { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 233a401c53aSAleksandr Rybalko { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 234a401c53aSAleksandr Rybalko { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 235a401c53aSAleksandr Rybalko { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 236a401c53aSAleksandr Rybalko { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 237a401c53aSAleksandr Rybalko { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 238a401c53aSAleksandr Rybalko { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 239a401c53aSAleksandr Rybalko { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 240a401c53aSAleksandr Rybalko { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 241a401c53aSAleksandr Rybalko { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 242a401c53aSAleksandr Rybalko { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 243a401c53aSAleksandr Rybalko { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 244a401c53aSAleksandr Rybalko { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 245a401c53aSAleksandr Rybalko { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 246185aba2dSEd Maste { 0x2013, 0x2d, 0x00 }, 247a401c53aSAleksandr Rybalko { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 248a401c53aSAleksandr Rybalko { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 249a401c53aSAleksandr Rybalko { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 250a401c53aSAleksandr Rybalko { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 251a401c53aSAleksandr Rybalko { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 252a401c53aSAleksandr Rybalko { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 253a401c53aSAleksandr Rybalko { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 254a401c53aSAleksandr Rybalko { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 255a401c53aSAleksandr Rybalko { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 256a401c53aSAleksandr Rybalko { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 257a401c53aSAleksandr Rybalko { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 258a401c53aSAleksandr Rybalko { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 259a401c53aSAleksandr Rybalko { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 260a401c53aSAleksandr Rybalko { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 261a401c53aSAleksandr Rybalko { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 262a401c53aSAleksandr Rybalko { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 263a401c53aSAleksandr Rybalko { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 264a401c53aSAleksandr Rybalko { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 265a401c53aSAleksandr Rybalko { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 266a401c53aSAleksandr Rybalko { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 267a401c53aSAleksandr Rybalko { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 268a401c53aSAleksandr Rybalko { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 269a401c53aSAleksandr Rybalko { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 270a401c53aSAleksandr Rybalko { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 271a401c53aSAleksandr Rybalko { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 272a401c53aSAleksandr Rybalko { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 273a401c53aSAleksandr Rybalko { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 274a401c53aSAleksandr Rybalko { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 275a401c53aSAleksandr Rybalko { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 276a401c53aSAleksandr Rybalko { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 277a401c53aSAleksandr Rybalko { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 278a401c53aSAleksandr Rybalko { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 279a401c53aSAleksandr Rybalko { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 280a401c53aSAleksandr Rybalko { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 281a401c53aSAleksandr Rybalko { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 282a401c53aSAleksandr Rybalko { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 283a401c53aSAleksandr Rybalko { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 284a401c53aSAleksandr Rybalko { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 285a401c53aSAleksandr Rybalko { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 286a401c53aSAleksandr Rybalko { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 287a401c53aSAleksandr Rybalko { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 288a401c53aSAleksandr Rybalko { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 289a401c53aSAleksandr Rybalko { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 290a401c53aSAleksandr Rybalko { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 291a401c53aSAleksandr Rybalko { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 292a401c53aSAleksandr Rybalko { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 293a401c53aSAleksandr Rybalko { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 294a401c53aSAleksandr Rybalko { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 295649d7b46SEd Maste { 0x266c, 0x0e, 0x00 }, { 0x2713, 0xfb, 0x00 }, 296649d7b46SEd Maste { 0x27e8, 0x3c, 0x00 }, { 0x27e9, 0x3e, 0x00 }, 297a401c53aSAleksandr Rybalko }; 298a401c53aSAleksandr Rybalko 299a401c53aSAleksandr Rybalko static uint8_t 300a401c53aSAleksandr Rybalko vga_get_cp437(term_char_t c) 301a401c53aSAleksandr Rybalko { 302a401c53aSAleksandr Rybalko int min, mid, max; 303a401c53aSAleksandr Rybalko 304a401c53aSAleksandr Rybalko min = 0; 305e6b01ed7SEnji Cooper max = nitems(cp437table) - 1; 306a401c53aSAleksandr Rybalko 307a401c53aSAleksandr Rybalko if (c < cp437table[0].unicode_base || 308a401c53aSAleksandr Rybalko c > cp437table[max].unicode_base + cp437table[max].length) 309a401c53aSAleksandr Rybalko return '?'; 310a401c53aSAleksandr Rybalko 311a401c53aSAleksandr Rybalko while (max >= min) { 312a401c53aSAleksandr Rybalko mid = (min + max) / 2; 313a401c53aSAleksandr Rybalko if (c < cp437table[mid].unicode_base) 314a401c53aSAleksandr Rybalko max = mid - 1; 315a401c53aSAleksandr Rybalko else if (c > cp437table[mid].unicode_base + 316a401c53aSAleksandr Rybalko cp437table[mid].length) 317a401c53aSAleksandr Rybalko min = mid + 1; 318a401c53aSAleksandr Rybalko else 319a401c53aSAleksandr Rybalko return (c - cp437table[mid].unicode_base + 320a401c53aSAleksandr Rybalko cp437table[mid].cp437_base); 321a401c53aSAleksandr Rybalko } 322a401c53aSAleksandr Rybalko 323a401c53aSAleksandr Rybalko return '?'; 324a401c53aSAleksandr Rybalko } 325a401c53aSAleksandr Rybalko 326a401c53aSAleksandr Rybalko static void 327bdcaf97cSJean-Sébastien Pédron vga_blank(struct vt_device *vd, term_color_t color) 328a401c53aSAleksandr Rybalko { 329a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 330bdcaf97cSJean-Sébastien Pédron u_int ofs; 331bdcaf97cSJean-Sébastien Pédron 332bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, color); 333bdcaf97cSJean-Sébastien Pédron for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 334bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, ofs, 0xff); 335bdcaf97cSJean-Sébastien Pédron } 336bdcaf97cSJean-Sébastien Pédron 337bdcaf97cSJean-Sébastien Pédron static inline void 338bdcaf97cSJean-Sébastien Pédron vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 339bdcaf97cSJean-Sébastien Pédron uint8_t v) 340bdcaf97cSJean-Sébastien Pédron { 341bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc = vd->vd_softc; 342bdcaf97cSJean-Sébastien Pédron 343bdcaf97cSJean-Sébastien Pédron /* Skip empty writes, in order to avoid palette changes. */ 344bdcaf97cSJean-Sébastien Pédron if (v != 0x00) { 345bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, color); 346bdcaf97cSJean-Sébastien Pédron /* 347bdcaf97cSJean-Sébastien Pédron * When this MEM_READ1() gets disabled, all sorts of 348bdcaf97cSJean-Sébastien Pédron * artifacts occur. This is because this read loads the 349bdcaf97cSJean-Sébastien Pédron * set of 8 pixels that are about to be changed. There 350bdcaf97cSJean-Sébastien Pédron * is one scenario where we can avoid the read, namely 351bdcaf97cSJean-Sébastien Pédron * if all pixels are about to be overwritten anyway. 352bdcaf97cSJean-Sébastien Pédron */ 353bdcaf97cSJean-Sébastien Pédron if (v != 0xff) { 354bdcaf97cSJean-Sébastien Pédron MEM_READ1(sc, dst); 355bdcaf97cSJean-Sébastien Pédron 356bdcaf97cSJean-Sébastien Pédron /* The bg color was trashed by the reads. */ 357bdcaf97cSJean-Sébastien Pédron sc->vga_curbg = 0xff; 358bdcaf97cSJean-Sébastien Pédron } 359bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, dst, v); 360bdcaf97cSJean-Sébastien Pédron } 361bdcaf97cSJean-Sébastien Pédron } 362bdcaf97cSJean-Sébastien Pédron 363bdcaf97cSJean-Sébastien Pédron static void 364bdcaf97cSJean-Sébastien Pédron vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 365bdcaf97cSJean-Sébastien Pédron { 366bdcaf97cSJean-Sébastien Pédron 3676cbf3f62SJean-Sébastien Pédron if (vd->vd_flags & VDF_TEXTMODE) 3686cbf3f62SJean-Sébastien Pédron return; 3696cbf3f62SJean-Sébastien Pédron 370bdcaf97cSJean-Sébastien Pédron vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 371bdcaf97cSJean-Sébastien Pédron 0x80 >> (x % 8)); 372bdcaf97cSJean-Sébastien Pédron } 373bdcaf97cSJean-Sébastien Pédron 374bdcaf97cSJean-Sébastien Pédron static void 375bdcaf97cSJean-Sébastien Pédron vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 376bdcaf97cSJean-Sébastien Pédron term_color_t color) 377bdcaf97cSJean-Sébastien Pédron { 378bdcaf97cSJean-Sébastien Pédron int x, y; 379bdcaf97cSJean-Sébastien Pédron 3806cbf3f62SJean-Sébastien Pédron if (vd->vd_flags & VDF_TEXTMODE) 3816cbf3f62SJean-Sébastien Pédron return; 3826cbf3f62SJean-Sébastien Pédron 383bdcaf97cSJean-Sébastien Pédron for (y = y1; y <= y2; y++) { 384bdcaf97cSJean-Sébastien Pédron if (fill || (y == y1) || (y == y2)) { 385bdcaf97cSJean-Sébastien Pédron for (x = x1; x <= x2; x++) 386bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x, y, color); 387bdcaf97cSJean-Sébastien Pédron } else { 388bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x1, y, color); 389bdcaf97cSJean-Sébastien Pédron vga_setpixel(vd, x2, y, color); 390bdcaf97cSJean-Sébastien Pédron } 391bdcaf97cSJean-Sébastien Pédron } 392bdcaf97cSJean-Sébastien Pédron } 393bdcaf97cSJean-Sébastien Pédron 394bdcaf97cSJean-Sébastien Pédron static void 395bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 396bdcaf97cSJean-Sébastien Pédron unsigned int src_x, unsigned int x_count, unsigned int dst_x, 397bdcaf97cSJean-Sébastien Pédron uint8_t *pattern, uint8_t *mask) 398bdcaf97cSJean-Sébastien Pédron { 399bdcaf97cSJean-Sébastien Pédron unsigned int n; 400bdcaf97cSJean-Sébastien Pédron 401bdcaf97cSJean-Sébastien Pédron n = src_x / 8; 402a401c53aSAleksandr Rybalko 403a401c53aSAleksandr Rybalko /* 404bdcaf97cSJean-Sébastien Pédron * This mask has bits set, where a pixel (ether 0 or 1) 405bdcaf97cSJean-Sébastien Pédron * comes from the source bitmap. 406bdcaf97cSJean-Sébastien Pédron */ 407bdcaf97cSJean-Sébastien Pédron if (mask != NULL) { 408bdcaf97cSJean-Sébastien Pédron *mask = (0xff 409bdcaf97cSJean-Sébastien Pédron >> (8 - x_count)) 410bdcaf97cSJean-Sébastien Pédron << (8 - x_count - dst_x); 411bdcaf97cSJean-Sébastien Pédron } 412bdcaf97cSJean-Sébastien Pédron 413bdcaf97cSJean-Sébastien Pédron if (n == (src_x + x_count - 1) / 8) { 414bdcaf97cSJean-Sébastien Pédron /* All the pixels we want are in the same byte. */ 415bdcaf97cSJean-Sébastien Pédron *pattern = src[n]; 416bdcaf97cSJean-Sébastien Pédron if (dst_x >= src_x) 417bdcaf97cSJean-Sébastien Pédron *pattern >>= (dst_x - src_x % 8); 418bdcaf97cSJean-Sébastien Pédron else 419bdcaf97cSJean-Sébastien Pédron *pattern <<= (src_x % 8 - dst_x); 420bdcaf97cSJean-Sébastien Pédron } else { 421bdcaf97cSJean-Sébastien Pédron /* The pixels we want are split into two bytes. */ 422bdcaf97cSJean-Sébastien Pédron if (dst_x >= src_x % 8) { 423bdcaf97cSJean-Sébastien Pédron *pattern = 424bdcaf97cSJean-Sébastien Pédron src[n] << (8 - dst_x - src_x % 8) | 425bdcaf97cSJean-Sébastien Pédron src[n + 1] >> (dst_x - src_x % 8); 426bdcaf97cSJean-Sébastien Pédron } else { 427bdcaf97cSJean-Sébastien Pédron *pattern = 428bdcaf97cSJean-Sébastien Pédron src[n] << (src_x % 8 - dst_x) | 429bdcaf97cSJean-Sébastien Pédron src[n + 1] >> (8 - src_x % 8 - dst_x); 430bdcaf97cSJean-Sébastien Pédron } 431bdcaf97cSJean-Sébastien Pédron } 432bdcaf97cSJean-Sébastien Pédron } 433bdcaf97cSJean-Sébastien Pédron 434bdcaf97cSJean-Sébastien Pédron static void 435bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 436bdcaf97cSJean-Sébastien Pédron const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 437bdcaf97cSJean-Sébastien Pédron unsigned int src_x, unsigned int dst_x, unsigned int x_count, 438bdcaf97cSJean-Sébastien Pédron unsigned int src_y, unsigned int dst_y, unsigned int y_count, 439bdcaf97cSJean-Sébastien Pédron term_color_t fg, term_color_t bg, int overwrite) 440bdcaf97cSJean-Sébastien Pédron { 441bdcaf97cSJean-Sébastien Pédron unsigned int i, bytes; 442bdcaf97cSJean-Sébastien Pédron uint8_t pattern, relevant_bits, mask; 443bdcaf97cSJean-Sébastien Pédron 444bdcaf97cSJean-Sébastien Pédron bytes = (src_width + 7) / 8; 445bdcaf97cSJean-Sébastien Pédron 446bdcaf97cSJean-Sébastien Pédron for (i = 0; i < y_count; ++i) { 447bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern(src + (src_y + i) * bytes, 448bdcaf97cSJean-Sébastien Pédron bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 449bdcaf97cSJean-Sébastien Pédron 450bdcaf97cSJean-Sébastien Pédron if (src_mask == NULL) { 451bdcaf97cSJean-Sébastien Pédron /* 452bdcaf97cSJean-Sébastien Pédron * No src mask. Consider that all wanted bits 453bdcaf97cSJean-Sébastien Pédron * from the source are "authoritative". 454bdcaf97cSJean-Sébastien Pédron */ 455bdcaf97cSJean-Sébastien Pédron mask = relevant_bits; 456bdcaf97cSJean-Sébastien Pédron } else { 457bdcaf97cSJean-Sébastien Pédron /* 458bdcaf97cSJean-Sébastien Pédron * There's an src mask. We shift it the same way 459bdcaf97cSJean-Sébastien Pédron * we shifted the source pattern. 460bdcaf97cSJean-Sébastien Pédron */ 461bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern( 462bdcaf97cSJean-Sébastien Pédron src_mask + (src_y + i) * bytes, 463bdcaf97cSJean-Sébastien Pédron bytes, src_x, x_count, dst_x, 464bdcaf97cSJean-Sébastien Pédron &mask, NULL); 465bdcaf97cSJean-Sébastien Pédron 466bdcaf97cSJean-Sébastien Pédron /* Now, only keep the wanted bits among them. */ 467bdcaf97cSJean-Sébastien Pédron mask &= relevant_bits; 468bdcaf97cSJean-Sébastien Pédron } 469bdcaf97cSJean-Sébastien Pédron 470bdcaf97cSJean-Sébastien Pédron /* 471bdcaf97cSJean-Sébastien Pédron * Clear bits from the pattern which must be 472bdcaf97cSJean-Sébastien Pédron * transparent, according to the source mask. 473bdcaf97cSJean-Sébastien Pédron */ 474bdcaf97cSJean-Sébastien Pédron pattern &= mask; 475bdcaf97cSJean-Sébastien Pédron 476bdcaf97cSJean-Sébastien Pédron /* Set the bits in the 2-colors array. */ 477bdcaf97cSJean-Sébastien Pédron if (overwrite) 478bdcaf97cSJean-Sébastien Pédron pattern_2colors[dst_y + i] &= ~mask; 479bdcaf97cSJean-Sébastien Pédron pattern_2colors[dst_y + i] |= pattern; 480bdcaf97cSJean-Sébastien Pédron 4817e1770a7SJean-Sébastien Pédron if (pattern_ncolors == NULL) 4827e1770a7SJean-Sébastien Pédron continue; 4837e1770a7SJean-Sébastien Pédron 484bdcaf97cSJean-Sébastien Pédron /* 485bdcaf97cSJean-Sébastien Pédron * Set the same bits in the n-colors array. This one 486bdcaf97cSJean-Sébastien Pédron * supports transparency, when a given bit is cleared in 487bdcaf97cSJean-Sébastien Pédron * all colors. 488bdcaf97cSJean-Sébastien Pédron */ 489bdcaf97cSJean-Sébastien Pédron if (overwrite) { 490bdcaf97cSJean-Sébastien Pédron /* 491bdcaf97cSJean-Sébastien Pédron * Ensure that the pixels used by this bitmap are 492bdcaf97cSJean-Sébastien Pédron * cleared in other colors. 493bdcaf97cSJean-Sébastien Pédron */ 494bdcaf97cSJean-Sébastien Pédron for (int j = 0; j < 16; ++j) 495bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + j] &= 496bdcaf97cSJean-Sébastien Pédron ~mask; 497bdcaf97cSJean-Sébastien Pédron } 498bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 499bdcaf97cSJean-Sébastien Pédron pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 500bdcaf97cSJean-Sébastien Pédron } 501bdcaf97cSJean-Sébastien Pédron } 502bdcaf97cSJean-Sébastien Pédron 503bdcaf97cSJean-Sébastien Pédron static void 504bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 505bdcaf97cSJean-Sébastien Pédron term_color_t fg, term_color_t bg, 506bdcaf97cSJean-Sébastien Pédron unsigned int x, unsigned int y, unsigned int height) 507bdcaf97cSJean-Sébastien Pédron { 508bdcaf97cSJean-Sébastien Pédron unsigned int i, offset; 509bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 510bdcaf97cSJean-Sébastien Pédron 511bdcaf97cSJean-Sébastien Pédron /* 512bdcaf97cSJean-Sébastien Pédron * The great advantage of Write Mode 3 is that we just need 513bdcaf97cSJean-Sébastien Pédron * to load the foreground in the Set/Reset register, load the 514bdcaf97cSJean-Sébastien Pédron * background color in the latches register (this is done 515bdcaf97cSJean-Sébastien Pédron * through a write in offscreen memory followed by a read of 516bdcaf97cSJean-Sébastien Pédron * that data), then write the pattern to video memory. This 517bdcaf97cSJean-Sébastien Pédron * pattern indicates if the pixel should use the foreground 518bdcaf97cSJean-Sébastien Pédron * color (bit set) or the background color (bit cleared). 519bdcaf97cSJean-Sébastien Pédron */ 520bdcaf97cSJean-Sébastien Pédron 521bdcaf97cSJean-Sébastien Pédron vga_setbg(vd, bg); 522bdcaf97cSJean-Sébastien Pédron vga_setfg(vd, fg); 523bdcaf97cSJean-Sébastien Pédron 524bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 525bdcaf97cSJean-Sébastien Pédron offset = (VT_VGA_WIDTH * y + x) / 8; 526bdcaf97cSJean-Sébastien Pédron 527bdcaf97cSJean-Sébastien Pédron for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 528bdcaf97cSJean-Sébastien Pédron MEM_WRITE1(sc, offset, masks[i]); 529bdcaf97cSJean-Sébastien Pédron } 530bdcaf97cSJean-Sébastien Pédron } 531bdcaf97cSJean-Sébastien Pédron 532bdcaf97cSJean-Sébastien Pédron static void 533bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 534bdcaf97cSJean-Sébastien Pédron unsigned int x, unsigned int y, unsigned int height) 535bdcaf97cSJean-Sébastien Pédron { 536731a929aSEd Maste unsigned int i, j, plane, color, offset; 537bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 538731a929aSEd Maste uint8_t mask, planes[height * 4]; 539bdcaf97cSJean-Sébastien Pédron 540bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 541bdcaf97cSJean-Sébastien Pédron 542731a929aSEd Maste memset(planes, 0, sizeof(planes)); 543af9f67eaSJean-Sébastien Pédron 544bdcaf97cSJean-Sébastien Pédron /* 545af9f67eaSJean-Sébastien Pédron * To write a group of pixels using 3 or more colors, we select 546731a929aSEd Maste * Write Mode 0 and write one byte to each plane separately. 547af9f67eaSJean-Sébastien Pédron */ 548af9f67eaSJean-Sébastien Pédron 549af9f67eaSJean-Sébastien Pédron /* 550731a929aSEd Maste * We first compute each byte: each plane contains one bit of the 551af9f67eaSJean-Sébastien Pédron * color code for each of the 8 pixels. 552bdcaf97cSJean-Sébastien Pédron * 553af9f67eaSJean-Sébastien Pédron * For example, if the 8 pixels are like this: 554af9f67eaSJean-Sébastien Pédron * GBBBBBBY 555af9f67eaSJean-Sébastien Pédron * where: 556af9f67eaSJean-Sébastien Pédron * G (gray) = 0b0111 557af9f67eaSJean-Sébastien Pédron * B (black) = 0b0000 558af9f67eaSJean-Sébastien Pédron * Y (yellow) = 0b0011 559af9f67eaSJean-Sébastien Pédron * 560af9f67eaSJean-Sébastien Pédron * The corresponding for bytes are: 561af9f67eaSJean-Sébastien Pédron * GBBBBBBY 562731a929aSEd Maste * Plane 0: 10000001 = 0x81 563731a929aSEd Maste * Plane 1: 10000001 = 0x81 564731a929aSEd Maste * Plane 2: 10000000 = 0x80 565731a929aSEd Maste * Plane 3: 00000000 = 0x00 566af9f67eaSJean-Sébastien Pédron * | | | 567af9f67eaSJean-Sébastien Pédron * | | +-> 0b0011 (Y) 568af9f67eaSJean-Sébastien Pédron * | +-----> 0b0000 (B) 569af9f67eaSJean-Sébastien Pédron * +--------> 0b0111 (G) 570bdcaf97cSJean-Sébastien Pédron */ 571bdcaf97cSJean-Sébastien Pédron 572bdcaf97cSJean-Sébastien Pédron for (i = 0; i < height; ++i) { 573af9f67eaSJean-Sébastien Pédron for (color = 0; color < 16; ++color) { 574af9f67eaSJean-Sébastien Pédron mask = masks[i * 16 + color]; 575af9f67eaSJean-Sébastien Pédron if (mask == 0x00) 576bdcaf97cSJean-Sébastien Pédron continue; 577bdcaf97cSJean-Sébastien Pédron 578af9f67eaSJean-Sébastien Pédron for (j = 0; j < 8; ++j) { 579af9f67eaSJean-Sébastien Pédron if (!((mask >> (7 - j)) & 0x1)) 580af9f67eaSJean-Sébastien Pédron continue; 581bdcaf97cSJean-Sébastien Pédron 582af9f67eaSJean-Sébastien Pédron /* The pixel "j" uses color "color". */ 583731a929aSEd Maste for (plane = 0; plane < 4; ++plane) 584731a929aSEd Maste planes[i * 4 + plane] |= 585f266082fSEd Maste ((cons_to_vga_colors[color] >> 586f266082fSEd Maste plane) & 0x1) << (7 - j); 587bdcaf97cSJean-Sébastien Pédron } 588af9f67eaSJean-Sébastien Pédron } 589af9f67eaSJean-Sébastien Pédron } 590af9f67eaSJean-Sébastien Pédron 591af9f67eaSJean-Sébastien Pédron /* 592af9f67eaSJean-Sébastien Pédron * The bytes are ready: we now switch to Write Mode 0 and write 593731a929aSEd Maste * all bytes, one plane at a time. 594af9f67eaSJean-Sébastien Pédron */ 595af9f67eaSJean-Sébastien Pédron vga_setwmode(vd, 0); 596af9f67eaSJean-Sébastien Pédron 597af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 598731a929aSEd Maste for (plane = 0; plane < 4; ++plane) { 599731a929aSEd Maste /* Select plane. */ 600731a929aSEd Maste REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plane); 601af9f67eaSJean-Sébastien Pédron 602731a929aSEd Maste /* Write all bytes for this plane, from Y to Y+height. */ 603af9f67eaSJean-Sébastien Pédron for (i = 0; i < height; ++i) { 604af9f67eaSJean-Sébastien Pédron offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 605731a929aSEd Maste MEM_WRITE1(sc, offset, planes[i * 4 + plane]); 606bdcaf97cSJean-Sébastien Pédron } 607bdcaf97cSJean-Sébastien Pédron } 608bdcaf97cSJean-Sébastien Pédron } 609bdcaf97cSJean-Sébastien Pédron 610bdcaf97cSJean-Sébastien Pédron static void 611ab06c776SJean-Sébastien Pédron vga_bitblt_one_text_pixels_block(struct vt_device *vd, 612946d0288SJean-Sébastien Pédron const struct vt_window *vw, unsigned int x, unsigned int y) 613bdcaf97cSJean-Sébastien Pédron { 614ab06c776SJean-Sébastien Pédron const struct vt_buf *vb; 615ab06c776SJean-Sébastien Pédron const struct vt_font *vf; 616bdcaf97cSJean-Sébastien Pédron unsigned int i, col, row, src_x, x_count; 617bdcaf97cSJean-Sébastien Pédron unsigned int used_colors_list[16], used_colors; 618ab06c776SJean-Sébastien Pédron uint8_t pattern_2colors[vw->vw_font->vf_height]; 619ab06c776SJean-Sébastien Pédron uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 620bdcaf97cSJean-Sébastien Pédron term_char_t c; 621bdcaf97cSJean-Sébastien Pédron term_color_t fg, bg; 622bdcaf97cSJean-Sébastien Pédron const uint8_t *src; 623bdcaf97cSJean-Sébastien Pédron 624ab06c776SJean-Sébastien Pédron vb = &vw->vw_buf; 625ab06c776SJean-Sébastien Pédron vf = vw->vw_font; 626ab06c776SJean-Sébastien Pédron 627bdcaf97cSJean-Sébastien Pédron /* 628bdcaf97cSJean-Sébastien Pédron * The current pixels block. 629bdcaf97cSJean-Sébastien Pédron * 630bdcaf97cSJean-Sébastien Pédron * We fill it with portions of characters, because both "grids" 631bdcaf97cSJean-Sébastien Pédron * may not match. 632bdcaf97cSJean-Sébastien Pédron * 633bdcaf97cSJean-Sébastien Pédron * i is the index in this pixels block. 634bdcaf97cSJean-Sébastien Pédron */ 635bdcaf97cSJean-Sébastien Pédron 636bdcaf97cSJean-Sébastien Pédron i = x; 637bdcaf97cSJean-Sébastien Pédron used_colors = 0; 638bdcaf97cSJean-Sébastien Pédron memset(used_colors_list, 0, sizeof(used_colors_list)); 639bdcaf97cSJean-Sébastien Pédron memset(pattern_2colors, 0, sizeof(pattern_2colors)); 640bdcaf97cSJean-Sébastien Pédron memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 641bdcaf97cSJean-Sébastien Pédron 64283fbb296SJean-Sébastien Pédron if (i < vw->vw_draw_area.tr_begin.tp_col) { 643bdcaf97cSJean-Sébastien Pédron /* 644bdcaf97cSJean-Sébastien Pédron * i is in the margin used to center the text area on 645bdcaf97cSJean-Sébastien Pédron * the screen. 646bdcaf97cSJean-Sébastien Pédron */ 647bdcaf97cSJean-Sébastien Pédron 64883fbb296SJean-Sébastien Pédron i = vw->vw_draw_area.tr_begin.tp_col; 649bdcaf97cSJean-Sébastien Pédron } 650bdcaf97cSJean-Sébastien Pédron 65183fbb296SJean-Sébastien Pédron while (i < x + VT_VGA_PIXELS_BLOCK && 65283fbb296SJean-Sébastien Pédron i < vw->vw_draw_area.tr_end.tp_col) { 653bdcaf97cSJean-Sébastien Pédron /* 654bdcaf97cSJean-Sébastien Pédron * Find which character is drawn on this pixel in the 655bdcaf97cSJean-Sébastien Pédron * pixels block. 656bdcaf97cSJean-Sébastien Pédron * 657bdcaf97cSJean-Sébastien Pédron * While here, record what colors it uses. 658bdcaf97cSJean-Sébastien Pédron */ 659bdcaf97cSJean-Sébastien Pédron 66083fbb296SJean-Sébastien Pédron col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 66183fbb296SJean-Sébastien Pédron row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 662bdcaf97cSJean-Sébastien Pédron 663bdcaf97cSJean-Sébastien Pédron c = VTBUF_GET_FIELD(vb, row, col); 664bdcaf97cSJean-Sébastien Pédron src = vtfont_lookup(vf, c); 665bdcaf97cSJean-Sébastien Pédron 666bdcaf97cSJean-Sébastien Pédron vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 667bdcaf97cSJean-Sébastien Pédron if ((used_colors_list[fg] & 0x1) != 0x1) 668bdcaf97cSJean-Sébastien Pédron used_colors++; 669bdcaf97cSJean-Sébastien Pédron if ((used_colors_list[bg] & 0x2) != 0x2) 670bdcaf97cSJean-Sébastien Pédron used_colors++; 671bdcaf97cSJean-Sébastien Pédron used_colors_list[fg] |= 0x1; 672bdcaf97cSJean-Sébastien Pédron used_colors_list[bg] |= 0x2; 673bdcaf97cSJean-Sébastien Pédron 674bdcaf97cSJean-Sébastien Pédron /* 675bdcaf97cSJean-Sébastien Pédron * Compute the portion of the character we want to draw, 676bdcaf97cSJean-Sébastien Pédron * because the pixels block may start in the middle of a 677bdcaf97cSJean-Sébastien Pédron * character. 678bdcaf97cSJean-Sébastien Pédron * 679bdcaf97cSJean-Sébastien Pédron * The first pixel to draw in the character is 680bdcaf97cSJean-Sébastien Pédron * the current position - 681bdcaf97cSJean-Sébastien Pédron * the start position of the character 682bdcaf97cSJean-Sébastien Pédron * 683bdcaf97cSJean-Sébastien Pédron * The last pixel to draw is either 684bdcaf97cSJean-Sébastien Pédron * - the last pixel of the character, or 685bdcaf97cSJean-Sébastien Pédron * - the pixel of the character matching the end of 686bdcaf97cSJean-Sébastien Pédron * the pixels block 687bdcaf97cSJean-Sébastien Pédron * whichever comes first. This position is then 688bdcaf97cSJean-Sébastien Pédron * changed to be relative to the start position of the 689bdcaf97cSJean-Sébastien Pédron * character. 690bdcaf97cSJean-Sébastien Pédron */ 691bdcaf97cSJean-Sébastien Pédron 69283fbb296SJean-Sébastien Pédron src_x = i - 69383fbb296SJean-Sébastien Pédron (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 69483fbb296SJean-Sébastien Pédron x_count = min(min( 69583fbb296SJean-Sébastien Pédron (col + 1) * vf->vf_width + 69683fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_begin.tp_col, 69783fbb296SJean-Sébastien Pédron x + VT_VGA_PIXELS_BLOCK), 69883fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_end.tp_col); 69983fbb296SJean-Sébastien Pédron x_count -= col * vf->vf_width + 70083fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_begin.tp_col; 701bdcaf97cSJean-Sébastien Pédron x_count -= src_x; 702bdcaf97cSJean-Sébastien Pédron 703bdcaf97cSJean-Sébastien Pédron /* Copy a portion of the character. */ 704bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 705bdcaf97cSJean-Sébastien Pédron src, NULL, vf->vf_width, 706bdcaf97cSJean-Sébastien Pédron src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 707bdcaf97cSJean-Sébastien Pédron 0, 0, vf->vf_height, fg, bg, 0); 708bdcaf97cSJean-Sébastien Pédron 709bdcaf97cSJean-Sébastien Pédron /* We move to the next portion. */ 710bdcaf97cSJean-Sébastien Pédron i += x_count; 711bdcaf97cSJean-Sébastien Pédron } 712bdcaf97cSJean-Sébastien Pédron 713bdcaf97cSJean-Sébastien Pédron #ifndef SC_NO_CUTPASTE 714bdcaf97cSJean-Sébastien Pédron /* 715bdcaf97cSJean-Sébastien Pédron * Copy the mouse pointer bitmap if it's over the current pixels 716bdcaf97cSJean-Sébastien Pédron * block. 717bdcaf97cSJean-Sébastien Pédron * 718bdcaf97cSJean-Sébastien Pédron * We use the saved cursor position (saved in vt_flush()), because 719bdcaf97cSJean-Sébastien Pédron * the current position could be different than the one used 720bdcaf97cSJean-Sébastien Pédron * to mark the area dirty. 721bdcaf97cSJean-Sébastien Pédron */ 722946d0288SJean-Sébastien Pédron term_rect_t drawn_area; 723946d0288SJean-Sébastien Pédron 724946d0288SJean-Sébastien Pédron drawn_area.tr_begin.tp_col = x; 725946d0288SJean-Sébastien Pédron drawn_area.tr_begin.tp_row = y; 726946d0288SJean-Sébastien Pédron drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 727946d0288SJean-Sébastien Pédron drawn_area.tr_end.tp_row = y + vf->vf_height; 728946d0288SJean-Sébastien Pédron if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 729946d0288SJean-Sébastien Pédron struct vt_mouse_cursor *cursor; 730946d0288SJean-Sébastien Pédron unsigned int mx, my; 731bdcaf97cSJean-Sébastien Pédron unsigned int dst_x, src_y, dst_y, y_count; 732bdcaf97cSJean-Sébastien Pédron 733946d0288SJean-Sébastien Pédron cursor = vd->vd_mcursor; 73483fbb296SJean-Sébastien Pédron mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 73583fbb296SJean-Sébastien Pédron my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 736946d0288SJean-Sébastien Pédron 737bdcaf97cSJean-Sébastien Pédron /* Compute the portion of the cursor we want to copy. */ 738bdcaf97cSJean-Sébastien Pédron src_x = x > mx ? x - mx : 0; 739bdcaf97cSJean-Sébastien Pédron dst_x = mx > x ? mx - x : 0; 74083fbb296SJean-Sébastien Pédron x_count = min(min(min( 74183fbb296SJean-Sébastien Pédron cursor->width - src_x, 74283fbb296SJean-Sébastien Pédron x + VT_VGA_PIXELS_BLOCK - mx), 74383fbb296SJean-Sébastien Pédron vw->vw_draw_area.tr_end.tp_col - mx), 744bdcaf97cSJean-Sébastien Pédron VT_VGA_PIXELS_BLOCK); 745bdcaf97cSJean-Sébastien Pédron 746bdcaf97cSJean-Sébastien Pédron /* 747bdcaf97cSJean-Sébastien Pédron * The cursor isn't aligned on the Y-axis with 748bdcaf97cSJean-Sébastien Pédron * characters, so we need to compute the vertical 749bdcaf97cSJean-Sébastien Pédron * start/count. 750bdcaf97cSJean-Sébastien Pédron */ 751bdcaf97cSJean-Sébastien Pédron src_y = y > my ? y - my : 0; 752bdcaf97cSJean-Sébastien Pédron dst_y = my > y ? my - y : 0; 753bdcaf97cSJean-Sébastien Pédron y_count = min( 754bdcaf97cSJean-Sébastien Pédron min(cursor->height - src_y, y + vf->vf_height - my), 755bdcaf97cSJean-Sébastien Pédron vf->vf_height); 756bdcaf97cSJean-Sébastien Pédron 757bdcaf97cSJean-Sébastien Pédron /* Copy the cursor portion. */ 758bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 759bdcaf97cSJean-Sébastien Pédron cursor->map, cursor->mask, cursor->width, 760bdcaf97cSJean-Sébastien Pédron src_x, dst_x, x_count, src_y, dst_y, y_count, 7613235c9ebSJean-Sébastien Pédron vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 762bdcaf97cSJean-Sébastien Pédron 7633235c9ebSJean-Sébastien Pédron if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 764bdcaf97cSJean-Sébastien Pédron used_colors++; 7653235c9ebSJean-Sébastien Pédron if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 766bdcaf97cSJean-Sébastien Pédron used_colors++; 767bdcaf97cSJean-Sébastien Pédron } 768bdcaf97cSJean-Sébastien Pédron #endif 769bdcaf97cSJean-Sébastien Pédron 770bdcaf97cSJean-Sébastien Pédron /* 771bdcaf97cSJean-Sébastien Pédron * The pixels block is completed, we can now draw it on the 772bdcaf97cSJean-Sébastien Pédron * screen. 773bdcaf97cSJean-Sébastien Pédron */ 774bdcaf97cSJean-Sébastien Pédron if (used_colors == 2) 775bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 776bdcaf97cSJean-Sébastien Pédron x, y, vf->vf_height); 777bdcaf97cSJean-Sébastien Pédron else 778bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 779bdcaf97cSJean-Sébastien Pédron x, y, vf->vf_height); 780bdcaf97cSJean-Sébastien Pédron } 781bdcaf97cSJean-Sébastien Pédron 782bdcaf97cSJean-Sébastien Pédron static void 783ab06c776SJean-Sébastien Pédron vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 784946d0288SJean-Sébastien Pédron const term_rect_t *area) 785bdcaf97cSJean-Sébastien Pédron { 786ab06c776SJean-Sébastien Pédron const struct vt_font *vf; 787bdcaf97cSJean-Sébastien Pédron unsigned int col, row; 788bdcaf97cSJean-Sébastien Pédron unsigned int x1, y1, x2, y2, x, y; 789bdcaf97cSJean-Sébastien Pédron 790ab06c776SJean-Sébastien Pédron vf = vw->vw_font; 791ab06c776SJean-Sébastien Pédron 792bdcaf97cSJean-Sébastien Pédron /* 793bdcaf97cSJean-Sébastien Pédron * Compute the top-left pixel position aligned with the video 794bdcaf97cSJean-Sébastien Pédron * adapter pixels block size. 795bdcaf97cSJean-Sébastien Pédron * 796bdcaf97cSJean-Sébastien Pédron * This is calculated from the top-left column of te dirty area: 797bdcaf97cSJean-Sébastien Pédron * 798bdcaf97cSJean-Sébastien Pédron * 1. Compute the top-left pixel of the character: 799bdcaf97cSJean-Sébastien Pédron * col * font width + x offset 800bdcaf97cSJean-Sébastien Pédron * 801bdcaf97cSJean-Sébastien Pédron * NOTE: x offset is used to center the text area on the 802bdcaf97cSJean-Sébastien Pédron * screen. It's expressed in pixels, not in characters 803bdcaf97cSJean-Sébastien Pédron * col/row! 804bdcaf97cSJean-Sébastien Pédron * 805bdcaf97cSJean-Sébastien Pédron * 2. Find the pixel further on the left marking the start of 806bdcaf97cSJean-Sébastien Pédron * an aligned pixels block (eg. chunk of 8 pixels): 807bdcaf97cSJean-Sébastien Pédron * character's x / blocksize * blocksize 808bdcaf97cSJean-Sébastien Pédron * 809bdcaf97cSJean-Sébastien Pédron * The division, being made on integers, achieves the 810bdcaf97cSJean-Sébastien Pédron * alignment. 811bdcaf97cSJean-Sébastien Pédron * 812bdcaf97cSJean-Sébastien Pédron * For the Y-axis, we need to compute the character's y 813bdcaf97cSJean-Sébastien Pédron * coordinate, but we don't need to align it. 814bdcaf97cSJean-Sébastien Pédron */ 815bdcaf97cSJean-Sébastien Pédron 816bdcaf97cSJean-Sébastien Pédron col = area->tr_begin.tp_col; 817bdcaf97cSJean-Sébastien Pédron row = area->tr_begin.tp_row; 81883fbb296SJean-Sébastien Pédron x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 819bdcaf97cSJean-Sébastien Pédron / VT_VGA_PIXELS_BLOCK) 820bdcaf97cSJean-Sébastien Pédron * VT_VGA_PIXELS_BLOCK; 82183fbb296SJean-Sébastien Pédron y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 822bdcaf97cSJean-Sébastien Pédron 823bdcaf97cSJean-Sébastien Pédron /* 824bdcaf97cSJean-Sébastien Pédron * Compute the bottom right pixel position, again, aligned with 825bdcaf97cSJean-Sébastien Pédron * the pixels block size. 826bdcaf97cSJean-Sébastien Pédron * 827bdcaf97cSJean-Sébastien Pédron * The same rules apply, we just add 1 to base the computation 828bdcaf97cSJean-Sébastien Pédron * on the "right border" of the dirty area. 829bdcaf97cSJean-Sébastien Pédron */ 830bdcaf97cSJean-Sébastien Pédron 831bdcaf97cSJean-Sébastien Pédron col = area->tr_end.tp_col; 832bdcaf97cSJean-Sébastien Pédron row = area->tr_end.tp_row; 833057b4402SPedro F. Giffuni x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col, 834057b4402SPedro F. Giffuni VT_VGA_PIXELS_BLOCK) 835bdcaf97cSJean-Sébastien Pédron * VT_VGA_PIXELS_BLOCK; 83683fbb296SJean-Sébastien Pédron y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 837bdcaf97cSJean-Sébastien Pédron 83883fbb296SJean-Sébastien Pédron /* Clip the area to the screen size. */ 83983fbb296SJean-Sébastien Pédron x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 84083fbb296SJean-Sébastien Pédron y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 84137fcd291SJean-Sébastien Pédron 84237fcd291SJean-Sébastien Pédron /* 843bdcaf97cSJean-Sébastien Pédron * Now, we take care of N pixels line at a time (the first for 844bdcaf97cSJean-Sébastien Pédron * loop, N = font height), and for these lines, draw one pixels 845bdcaf97cSJean-Sébastien Pédron * block at a time (the second for loop), not a character at a 846bdcaf97cSJean-Sébastien Pédron * time. 847bdcaf97cSJean-Sébastien Pédron * 848bdcaf97cSJean-Sébastien Pédron * Therefore, on the X-axis, characters my be drawn partially if 849bdcaf97cSJean-Sébastien Pédron * they are not aligned on 8-pixels boundary. 850bdcaf97cSJean-Sébastien Pédron * 851bdcaf97cSJean-Sébastien Pédron * However, the operation is repeated for the full height of the 852bdcaf97cSJean-Sébastien Pédron * font before moving to the next character, because it allows 853bdcaf97cSJean-Sébastien Pédron * to keep the color settings and write mode, before perhaps 854bdcaf97cSJean-Sébastien Pédron * changing them with the next one. 855bdcaf97cSJean-Sébastien Pédron */ 856bdcaf97cSJean-Sébastien Pédron 857bdcaf97cSJean-Sébastien Pédron for (y = y1; y < y2; y += vf->vf_height) { 858bdcaf97cSJean-Sébastien Pédron for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 859946d0288SJean-Sébastien Pédron vga_bitblt_one_text_pixels_block(vd, vw, x, y); 860bdcaf97cSJean-Sébastien Pédron } 861bdcaf97cSJean-Sébastien Pédron } 862bdcaf97cSJean-Sébastien Pédron } 863bdcaf97cSJean-Sébastien Pédron 864bdcaf97cSJean-Sébastien Pédron static void 865ab06c776SJean-Sébastien Pédron vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 866946d0288SJean-Sébastien Pédron const term_rect_t *area) 867bdcaf97cSJean-Sébastien Pédron { 868bdcaf97cSJean-Sébastien Pédron struct vga_softc *sc; 869ab06c776SJean-Sébastien Pédron const struct vt_buf *vb; 870bdcaf97cSJean-Sébastien Pédron unsigned int col, row; 871bdcaf97cSJean-Sébastien Pédron term_char_t c; 872bdcaf97cSJean-Sébastien Pédron term_color_t fg, bg; 873bdcaf97cSJean-Sébastien Pédron uint8_t ch, attr; 874ee97b233SColin Percival size_t z; 875bdcaf97cSJean-Sébastien Pédron 876bdcaf97cSJean-Sébastien Pédron sc = vd->vd_softc; 877ab06c776SJean-Sébastien Pédron vb = &vw->vw_buf; 878bdcaf97cSJean-Sébastien Pédron 879bdcaf97cSJean-Sébastien Pédron for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 880bdcaf97cSJean-Sébastien Pédron for (col = area->tr_begin.tp_col; 881bdcaf97cSJean-Sébastien Pédron col < area->tr_end.tp_col; 882bdcaf97cSJean-Sébastien Pédron ++col) { 883bdcaf97cSJean-Sébastien Pédron /* 884bdcaf97cSJean-Sébastien Pédron * Get next character and its associated fg/bg 885bdcaf97cSJean-Sébastien Pédron * colors. 886bdcaf97cSJean-Sébastien Pédron */ 887bdcaf97cSJean-Sébastien Pédron c = VTBUF_GET_FIELD(vb, row, col); 888bdcaf97cSJean-Sébastien Pédron vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 889bdcaf97cSJean-Sébastien Pédron &fg, &bg); 890bdcaf97cSJean-Sébastien Pédron 891ee97b233SColin Percival z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col; 892dbc7ca59SEd Maste if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) * 893dbc7ca59SEd Maste PIXEL_WIDTH(VT_FB_MAX_WIDTH)) 894dbc7ca59SEd Maste continue; 895ee97b233SColin Percival if (vd->vd_drawn && (vd->vd_drawn[z] == c) && 896ee97b233SColin Percival vd->vd_drawnfg && (vd->vd_drawnfg[z] == fg) && 897ee97b233SColin Percival vd->vd_drawnbg && (vd->vd_drawnbg[z] == bg)) 898ee97b233SColin Percival continue; 899ee97b233SColin Percival 900bdcaf97cSJean-Sébastien Pédron /* 901bdcaf97cSJean-Sébastien Pédron * Convert character to CP437, which is the 902bdcaf97cSJean-Sébastien Pédron * character set used by the VGA hardware by 903bdcaf97cSJean-Sébastien Pédron * default. 904a401c53aSAleksandr Rybalko */ 90581788a2bSJean-Sébastien Pédron ch = vga_get_cp437(TCHAR_CHARACTER(c)); 906a401c53aSAleksandr Rybalko 907bdcaf97cSJean-Sébastien Pédron /* Convert colors to VGA attributes. */ 9085e251aecSJean-Sébastien Pédron attr = 9095e251aecSJean-Sébastien Pédron cons_to_vga_colors[bg] << 4 | 9105e251aecSJean-Sébastien Pédron cons_to_vga_colors[fg]; 911a401c53aSAleksandr Rybalko 9120b4d5eb8SColin Percival MEM_WRITE2(sc, (row * 80 + col) * 2 + 0, 9130b4d5eb8SColin Percival ch + ((uint16_t)(attr) << 8)); 914ee97b233SColin Percival 915ee97b233SColin Percival if (vd->vd_drawn) 916ee97b233SColin Percival vd->vd_drawn[z] = c; 917ee97b233SColin Percival if (vd->vd_drawnfg) 918ee97b233SColin Percival vd->vd_drawnfg[z] = fg; 919ee97b233SColin Percival if (vd->vd_drawnbg) 920ee97b233SColin Percival vd->vd_drawnbg[z] = bg; 921bdcaf97cSJean-Sébastien Pédron } 922bdcaf97cSJean-Sébastien Pédron } 923bdcaf97cSJean-Sébastien Pédron } 924bdcaf97cSJean-Sébastien Pédron 925bdcaf97cSJean-Sébastien Pédron static void 926ab06c776SJean-Sébastien Pédron vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 927946d0288SJean-Sébastien Pédron const term_rect_t *area) 928bdcaf97cSJean-Sébastien Pédron { 929bdcaf97cSJean-Sébastien Pédron 930bdcaf97cSJean-Sébastien Pédron if (!(vd->vd_flags & VDF_TEXTMODE)) { 931946d0288SJean-Sébastien Pédron vga_bitblt_text_gfxmode(vd, vw, area); 932bdcaf97cSJean-Sébastien Pédron } else { 933946d0288SJean-Sébastien Pédron vga_bitblt_text_txtmode(vd, vw, area); 934bdcaf97cSJean-Sébastien Pédron } 935a401c53aSAleksandr Rybalko } 936a401c53aSAleksandr Rybalko 937ee97b233SColin Percival void 938ee97b233SColin Percival vga_invalidate_text(struct vt_device *vd, const term_rect_t *area) 939ee97b233SColin Percival { 940ee97b233SColin Percival unsigned int col, row; 941ee97b233SColin Percival size_t z; 942ee97b233SColin Percival 943ee97b233SColin Percival for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 944ee97b233SColin Percival for (col = area->tr_begin.tp_col; 945ee97b233SColin Percival col < area->tr_end.tp_col; 946ee97b233SColin Percival ++col) { 947ee97b233SColin Percival z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col; 948dbc7ca59SEd Maste if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) * 949dbc7ca59SEd Maste PIXEL_WIDTH(VT_FB_MAX_WIDTH)) 950dbc7ca59SEd Maste continue; 951ee97b233SColin Percival if (vd->vd_drawn) 952ee97b233SColin Percival vd->vd_drawn[z] = 0; 953ee97b233SColin Percival if (vd->vd_drawnfg) 954ee97b233SColin Percival vd->vd_drawnfg[z] = 0; 955ee97b233SColin Percival if (vd->vd_drawnbg) 956ee97b233SColin Percival vd->vd_drawnbg[z] = 0; 957ee97b233SColin Percival } 958ee97b233SColin Percival } 959ee97b233SColin Percival } 960ee97b233SColin Percival 961a401c53aSAleksandr Rybalko static void 962631bb572SJean-Sébastien Pédron vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 963631bb572SJean-Sébastien Pédron const uint8_t *pattern, const uint8_t *mask, 964631bb572SJean-Sébastien Pédron unsigned int width, unsigned int height, 965631bb572SJean-Sébastien Pédron unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 966631bb572SJean-Sébastien Pédron { 967631bb572SJean-Sébastien Pédron unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 9687e1770a7SJean-Sébastien Pédron uint8_t pattern_2colors; 969631bb572SJean-Sébastien Pédron 970631bb572SJean-Sébastien Pédron /* Align coordinates with the 8-pxels grid. */ 9714ed3c0e7SPedro F. Giffuni x1 = rounddown(x, VT_VGA_PIXELS_BLOCK); 972631bb572SJean-Sébastien Pédron y1 = y; 973631bb572SJean-Sébastien Pédron 974057b4402SPedro F. Giffuni x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK); 975631bb572SJean-Sébastien Pédron y2 = y + height; 976631bb572SJean-Sébastien Pédron x2 = min(x2, vd->vd_width - 1); 977631bb572SJean-Sébastien Pédron y2 = min(y2, vd->vd_height - 1); 978631bb572SJean-Sébastien Pédron 979631bb572SJean-Sébastien Pédron for (j = y1; j < y2; ++j) { 980631bb572SJean-Sébastien Pédron src_x = 0; 981631bb572SJean-Sébastien Pédron dst_x = x - x1; 982631bb572SJean-Sébastien Pédron x_count = VT_VGA_PIXELS_BLOCK - dst_x; 983631bb572SJean-Sébastien Pédron 9847e1770a7SJean-Sébastien Pédron for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 985631bb572SJean-Sébastien Pédron pattern_2colors = 0; 986631bb572SJean-Sébastien Pédron 987631bb572SJean-Sébastien Pédron vga_copy_bitmap_portion( 9887e1770a7SJean-Sébastien Pédron &pattern_2colors, NULL, 989631bb572SJean-Sébastien Pédron pattern, mask, width, 990631bb572SJean-Sébastien Pédron src_x, dst_x, x_count, 991631bb572SJean-Sébastien Pédron j - y1, 0, 1, fg, bg, 0); 992631bb572SJean-Sébastien Pédron 993631bb572SJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(vd, 994631bb572SJean-Sébastien Pédron &pattern_2colors, fg, bg, 995631bb572SJean-Sébastien Pédron i, j, 1); 996631bb572SJean-Sébastien Pédron 997631bb572SJean-Sébastien Pédron src_x += x_count; 998631bb572SJean-Sébastien Pédron dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 9997e1770a7SJean-Sébastien Pédron x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 1000631bb572SJean-Sébastien Pédron } 1001631bb572SJean-Sébastien Pédron } 1002631bb572SJean-Sébastien Pédron } 1003631bb572SJean-Sébastien Pédron 1004631bb572SJean-Sébastien Pédron static void 1005a401c53aSAleksandr Rybalko vga_initialize_graphics(struct vt_device *vd) 1006a401c53aSAleksandr Rybalko { 1007a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 1008a401c53aSAleksandr Rybalko 1009a401c53aSAleksandr Rybalko /* Clock select. */ 1010a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 1011a401c53aSAleksandr Rybalko VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 1012a401c53aSAleksandr Rybalko /* Set sequencer clocking and memory mode. */ 1013a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 1014a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 1015a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 1016a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 1017a401c53aSAleksandr Rybalko 1018a401c53aSAleksandr Rybalko /* Set the graphics controller in graphics mode. */ 1019a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 1020a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 1021a401c53aSAleksandr Rybalko /* Program the CRT controller. */ 1022a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 1023a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 1024a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 1025a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 1026a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 1027a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 1028a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 1029a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 1030a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 1031a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 1032a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 1033a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 1034a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 1035a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 1036a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 1037a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 1038a401c53aSAleksandr Rybalko VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 1039a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 1040a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 1041a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 1042a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 1043a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1044a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 1045a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 1046a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 1047a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 1048a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 1049a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 1050a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 1051a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 1052a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 1053a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1054a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1055a401c53aSAleksandr Rybalko VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1056a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1057a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1058a401c53aSAleksandr Rybalko 1059a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1060a401c53aSAleksandr Rybalko 1061a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1062a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1063a401c53aSAleksandr Rybalko VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1064a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1065a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1066a401c53aSAleksandr Rybalko 1067a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1068a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1069a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1070a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1071a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1072a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1073a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1074a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1075a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1076a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1077a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1078a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0); 1079a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1080a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1081a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1082a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1083a401c53aSAleksandr Rybalko } 1084a401c53aSAleksandr Rybalko 1085f0e31fe0SRoger Pau Monné static int 1086a401c53aSAleksandr Rybalko vga_initialize(struct vt_device *vd, int textmode) 1087a401c53aSAleksandr Rybalko { 1088a401c53aSAleksandr Rybalko struct vga_softc *sc = vd->vd_softc; 1089a401c53aSAleksandr Rybalko uint8_t x; 1090f0e31fe0SRoger Pau Monné int timeout; 1091a401c53aSAleksandr Rybalko 1092a401c53aSAleksandr Rybalko /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1093a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1094a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1095a401c53aSAleksandr Rybalko 1096a401c53aSAleksandr Rybalko /* Unprotect CRTC registers 0-7. */ 1097a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1098a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1099a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1100a401c53aSAleksandr Rybalko 1101a401c53aSAleksandr Rybalko /* 1102a401c53aSAleksandr Rybalko * Wait for the vertical retrace. 1103a401c53aSAleksandr Rybalko * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1104a401c53aSAleksandr Rybalko * the side-effect of clearing the internal flip-flip of the attribute 1105a401c53aSAleksandr Rybalko * controller's write register. This means that because this code is 1106a401c53aSAleksandr Rybalko * here, we know for sure that the first write to the attribute 1107a401c53aSAleksandr Rybalko * controller will be a write to the address register. Removing this 1108a401c53aSAleksandr Rybalko * code therefore also removes that guarantee and appropriate measures 1109a401c53aSAleksandr Rybalko * need to be taken. 1110a401c53aSAleksandr Rybalko */ 1111f0e31fe0SRoger Pau Monné timeout = 10000; 1112a401c53aSAleksandr Rybalko do { 1113f0e31fe0SRoger Pau Monné DELAY(10); 1114a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1115a401c53aSAleksandr Rybalko x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1116f0e31fe0SRoger Pau Monné } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1117f0e31fe0SRoger Pau Monné if (timeout == 0) { 1118f0e31fe0SRoger Pau Monné printf("Timeout initializing vt_vga\n"); 1119f0e31fe0SRoger Pau Monné return (ENXIO); 1120f0e31fe0SRoger Pau Monné } 1121a401c53aSAleksandr Rybalko 1122a401c53aSAleksandr Rybalko /* Now, disable the sync. signals. */ 1123a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1124a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1125a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1126a401c53aSAleksandr Rybalko 1127a401c53aSAleksandr Rybalko /* Asynchronous sequencer reset. */ 1128a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1129a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1130a401c53aSAleksandr Rybalko 1131a401c53aSAleksandr Rybalko if (!textmode) 1132a401c53aSAleksandr Rybalko vga_initialize_graphics(vd); 1133a401c53aSAleksandr Rybalko 1134a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1135a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1136a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1137a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1138a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1139a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1140a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1141a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1142a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1143a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1144a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1145a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1146a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1147a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1148a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1149a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1150a401c53aSAleksandr Rybalko 1151a401c53aSAleksandr Rybalko if (textmode) { 1152a401c53aSAleksandr Rybalko /* Set the attribute controller to blink disable. */ 1153a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1154a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1155a401c53aSAleksandr Rybalko } else { 1156a401c53aSAleksandr Rybalko /* Set the attribute controller in graphics mode. */ 1157a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1158a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1159a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1160a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1161a401c53aSAleksandr Rybalko } 1162a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1163a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1164a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 11655e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1166a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1167a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1168a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 11695e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1170a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 11715e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1172a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1173a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1174a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 11755e251aecSJean-Sébastien Pédron REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1176a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1177a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 11785e251aecSJean-Sébastien Pédron 1179a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1180a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1181a401c53aSAleksandr Rybalko VGA_AC_PAL_SB); 1182a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1183a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 11845e251aecSJean-Sébastien Pédron VGA_AC_PAL_SB | VGA_AC_PAL_B); 1185a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1186a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1187a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_G); 1188a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1189a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 11905e251aecSJean-Sébastien Pédron VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1191a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1192a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 11935e251aecSJean-Sébastien Pédron VGA_AC_PAL_SB | VGA_AC_PAL_R); 1194a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1195a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1196a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1197a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1198a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 11995e251aecSJean-Sébastien Pédron VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1200a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1201a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1202a401c53aSAleksandr Rybalko VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 12035e251aecSJean-Sébastien Pédron 1204a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1205a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1206a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1207a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1208a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1209a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_AC_WRITE, 0); 1210a401c53aSAleksandr Rybalko 1211a401c53aSAleksandr Rybalko if (!textmode) { 1212a401c53aSAleksandr Rybalko u_int ofs; 1213a401c53aSAleksandr Rybalko 1214a401c53aSAleksandr Rybalko /* 1215a401c53aSAleksandr Rybalko * Done. Clear the frame buffer. All bit planes are 1216a401c53aSAleksandr Rybalko * enabled, so a single-paged loop should clear all 1217a401c53aSAleksandr Rybalko * planes. 1218a401c53aSAleksandr Rybalko */ 1219a401c53aSAleksandr Rybalko for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1220a401c53aSAleksandr Rybalko MEM_WRITE1(sc, ofs, 0); 1221a401c53aSAleksandr Rybalko } 1222a401c53aSAleksandr Rybalko } 1223a401c53aSAleksandr Rybalko 1224a401c53aSAleksandr Rybalko /* Re-enable the sequencer. */ 1225a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1226a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1227a401c53aSAleksandr Rybalko /* Re-enable the sync signals. */ 1228a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1229a401c53aSAleksandr Rybalko x = REG_READ1(sc, VGA_CRTC_DATA); 1230a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1231a401c53aSAleksandr Rybalko 1232a401c53aSAleksandr Rybalko if (!textmode) { 1233a401c53aSAleksandr Rybalko /* Switch to write mode 3, because we'll mainly do bitblt. */ 1234a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1235a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_DATA, 3); 1236af9f67eaSJean-Sébastien Pédron sc->vga_wmode = 3; 1237af9f67eaSJean-Sébastien Pédron 1238af9f67eaSJean-Sébastien Pédron /* 1239af9f67eaSJean-Sébastien Pédron * In Write Mode 3, Enable Set/Reset is ignored, but we 1240af9f67eaSJean-Sébastien Pédron * use Write Mode 0 to write a group of 8 pixels using 1241af9f67eaSJean-Sébastien Pédron * 3 or more colors. In this case, we want to disable 1242af9f67eaSJean-Sébastien Pédron * Set/Reset: set Enable Set/Reset to 0. 1243af9f67eaSJean-Sébastien Pédron */ 1244a401c53aSAleksandr Rybalko REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1245af9f67eaSJean-Sébastien Pédron REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1246bdcaf97cSJean-Sébastien Pédron 1247bdcaf97cSJean-Sébastien Pédron /* 1248bdcaf97cSJean-Sébastien Pédron * Clear the colors we think are loaded into Set/Reset or 1249bdcaf97cSJean-Sébastien Pédron * the latches. 1250bdcaf97cSJean-Sébastien Pédron */ 1251bdcaf97cSJean-Sébastien Pédron sc->vga_curfg = sc->vga_curbg = 0xff; 1252a401c53aSAleksandr Rybalko } 1253f0e31fe0SRoger Pau Monné 1254f0e31fe0SRoger Pau Monné return (0); 1255a401c53aSAleksandr Rybalko } 1256a401c53aSAleksandr Rybalko 1257c2272faaSRoger Pau Monné static bool 1258c2272faaSRoger Pau Monné vga_acpi_disabled(void) 1259c2272faaSRoger Pau Monné { 126028ebccd5SKonstantin Belousov #if defined(__amd64__) || defined(__i386__) 1261c2272faaSRoger Pau Monné uint16_t flags; 12628f62926eSRoger Pau Monné int ignore; 12638f62926eSRoger Pau Monné 1264*05188320SRoger Pau Monné /* 1265*05188320SRoger Pau Monné * Ignore the flag on real hardware: there's a lot of buggy firmware 1266*05188320SRoger Pau Monné * that will wrongly set it. 1267*05188320SRoger Pau Monné */ 1268*05188320SRoger Pau Monné ignore = (vm_guest == VM_GUEST_NO); 12698f62926eSRoger Pau Monné TUNABLE_INT_FETCH("hw.vga.acpi_ignore_no_vga", &ignore); 12707705dd4dSKonstantin Belousov if (ignore || !acpi_get_fadt_bootflags(&flags)) 12718f62926eSRoger Pau Monné return (false); 12727705dd4dSKonstantin Belousov return ((flags & ACPI_FADT_NO_VGA) != 0); 12737705dd4dSKonstantin Belousov #else 1274c2272faaSRoger Pau Monné return (false); 1275c2272faaSRoger Pau Monné #endif 1276c2272faaSRoger Pau Monné } 1277c2272faaSRoger Pau Monné 1278a401c53aSAleksandr Rybalko static int 1279a401c53aSAleksandr Rybalko vga_probe(struct vt_device *vd) 1280a401c53aSAleksandr Rybalko { 1281a401c53aSAleksandr Rybalko 1282c2272faaSRoger Pau Monné return (vga_acpi_disabled() ? CN_DEAD : CN_INTERNAL); 1283a401c53aSAleksandr Rybalko } 1284a401c53aSAleksandr Rybalko 1285a401c53aSAleksandr Rybalko static int 1286a401c53aSAleksandr Rybalko vga_init(struct vt_device *vd) 1287a401c53aSAleksandr Rybalko { 1288a401c53aSAleksandr Rybalko struct vga_softc *sc; 1289a401c53aSAleksandr Rybalko int textmode; 1290a401c53aSAleksandr Rybalko 1291a401c53aSAleksandr Rybalko if (vd->vd_softc == NULL) 1292a401c53aSAleksandr Rybalko vd->vd_softc = (void *)&vga_conssoftc; 1293a401c53aSAleksandr Rybalko sc = vd->vd_softc; 1294a401c53aSAleksandr Rybalko 129576e2f976SJean-Sébastien Pédron if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 129676e2f976SJean-Sébastien Pédron vga_pci_repost(vd->vd_video_dev); 129776e2f976SJean-Sébastien Pédron 1298a401c53aSAleksandr Rybalko #if defined(__amd64__) || defined(__i386__) 1299a401c53aSAleksandr Rybalko sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1300a401c53aSAleksandr Rybalko sc->vga_reg_tag = X86_BUS_SPACE_IO; 1301a401c53aSAleksandr Rybalko #else 1302a401c53aSAleksandr Rybalko # error "Architecture not yet supported!" 1303a401c53aSAleksandr Rybalko #endif 1304a401c53aSAleksandr Rybalko 13057ef5e8bcSMarcel Moolenaar bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 13067ef5e8bcSMarcel Moolenaar &sc->vga_reg_handle); 13077ef5e8bcSMarcel Moolenaar 13089a4a2c61SSepherosa Ziehau /* 13099a4a2c61SSepherosa Ziehau * If "hw.vga.textmode" is not set and we're running on hypervisor, 13109a4a2c61SSepherosa Ziehau * we use text mode by default, this is because when we're on 13119a4a2c61SSepherosa Ziehau * hypervisor, vt(4) is usually much slower in graphics mode than 13129a4a2c61SSepherosa Ziehau * in text mode, especially when we're on Hyper-V. 13139a4a2c61SSepherosa Ziehau */ 13149a4a2c61SSepherosa Ziehau textmode = vm_guest != VM_GUEST_NO; 1315a401c53aSAleksandr Rybalko TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1316a401c53aSAleksandr Rybalko if (textmode) { 1317a401c53aSAleksandr Rybalko vd->vd_flags |= VDF_TEXTMODE; 1318a401c53aSAleksandr Rybalko vd->vd_width = 80; 1319a401c53aSAleksandr Rybalko vd->vd_height = 25; 13206280434fSMarcel Moolenaar bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 13216280434fSMarcel Moolenaar &sc->vga_fb_handle); 1322a401c53aSAleksandr Rybalko } else { 1323a401c53aSAleksandr Rybalko vd->vd_width = VT_VGA_WIDTH; 1324a401c53aSAleksandr Rybalko vd->vd_height = VT_VGA_HEIGHT; 13256280434fSMarcel Moolenaar bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 13266280434fSMarcel Moolenaar &sc->vga_fb_handle); 1327a401c53aSAleksandr Rybalko } 1328f0e31fe0SRoger Pau Monné if (vga_initialize(vd, textmode) != 0) 1329f0e31fe0SRoger Pau Monné return (CN_DEAD); 1330acb332a8SRoger Pau Monné sc->vga_enabled = true; 1331a401c53aSAleksandr Rybalko 1332a401c53aSAleksandr Rybalko return (CN_INTERNAL); 1333a401c53aSAleksandr Rybalko } 1334a401c53aSAleksandr Rybalko 1335a401c53aSAleksandr Rybalko static void 1336a401c53aSAleksandr Rybalko vga_postswitch(struct vt_device *vd) 1337a401c53aSAleksandr Rybalko { 1338a401c53aSAleksandr Rybalko 1339a401c53aSAleksandr Rybalko /* Reinit VGA mode, to restore view after app which change mode. */ 1340a401c53aSAleksandr Rybalko vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1341a401c53aSAleksandr Rybalko /* Ask vt(9) to update chars on visible area. */ 1342a401c53aSAleksandr Rybalko vd->vd_flags |= VDF_INVALID; 1343a401c53aSAleksandr Rybalko } 1344acb332a8SRoger Pau Monné 1345acb332a8SRoger Pau Monné /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1346acb332a8SRoger Pau Monné static void 1347acb332a8SRoger Pau Monné vtvga_identify(driver_t *driver, device_t parent) 1348acb332a8SRoger Pau Monné { 1349acb332a8SRoger Pau Monné 1350acb332a8SRoger Pau Monné if (!vga_conssoftc.vga_enabled) 1351acb332a8SRoger Pau Monné return; 1352acb332a8SRoger Pau Monné 1353acb332a8SRoger Pau Monné if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1354acb332a8SRoger Pau Monné panic("Unable to attach vt_vga console"); 1355acb332a8SRoger Pau Monné } 1356acb332a8SRoger Pau Monné 1357acb332a8SRoger Pau Monné static int 1358acb332a8SRoger Pau Monné vtvga_probe(device_t dev) 1359acb332a8SRoger Pau Monné { 1360acb332a8SRoger Pau Monné 1361bae1c14dSRui Paulo device_set_desc(dev, "VT VGA driver"); 1362bae1c14dSRui Paulo 1363acb332a8SRoger Pau Monné return (BUS_PROBE_NOWILDCARD); 1364acb332a8SRoger Pau Monné } 1365acb332a8SRoger Pau Monné 1366acb332a8SRoger Pau Monné static int 1367acb332a8SRoger Pau Monné vtvga_attach(device_t dev) 1368acb332a8SRoger Pau Monné { 1369acb332a8SRoger Pau Monné struct resource *pseudo_phys_res; 1370acb332a8SRoger Pau Monné int res_id; 1371acb332a8SRoger Pau Monné 1372acb332a8SRoger Pau Monné res_id = 0; 1373acb332a8SRoger Pau Monné pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1374bc59086cSRoger Pau Monné &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1375acb332a8SRoger Pau Monné VGA_MEM_SIZE, RF_ACTIVE); 1376acb332a8SRoger Pau Monné if (pseudo_phys_res == NULL) 1377acb332a8SRoger Pau Monné panic("Unable to reserve vt_vga memory"); 1378acb332a8SRoger Pau Monné return (0); 1379acb332a8SRoger Pau Monné } 1380acb332a8SRoger Pau Monné 1381acb332a8SRoger Pau Monné /*-------------------- Private Device Attachment Data -----------------------*/ 1382acb332a8SRoger Pau Monné static device_method_t vtvga_methods[] = { 1383acb332a8SRoger Pau Monné /* Device interface */ 1384acb332a8SRoger Pau Monné DEVMETHOD(device_identify, vtvga_identify), 1385acb332a8SRoger Pau Monné DEVMETHOD(device_probe, vtvga_probe), 1386acb332a8SRoger Pau Monné DEVMETHOD(device_attach, vtvga_attach), 1387acb332a8SRoger Pau Monné 1388acb332a8SRoger Pau Monné DEVMETHOD_END 1389acb332a8SRoger Pau Monné }; 1390acb332a8SRoger Pau Monné 1391acb332a8SRoger Pau Monné DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1392acb332a8SRoger Pau Monné devclass_t vtvga_devclass; 1393acb332a8SRoger Pau Monné 1394acb332a8SRoger Pau Monné DRIVER_MODULE(vtvga, nexus, vtvga_driver, vtvga_devclass, NULL, NULL); 1395