1 /*- 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* 37 * VIA Rhine fast ethernet PCI NIC driver 38 * 39 * Supports various network adapters based on the VIA Rhine 40 * and Rhine II PCI controllers, including the D-Link DFE530TX. 41 * Datasheets are available at http://www.via.com.tw. 42 * 43 * Written by Bill Paul <wpaul@ctr.columbia.edu> 44 * Electrical Engineering Department 45 * Columbia University, New York City 46 */ 47 48 /* 49 * The VIA Rhine controllers are similar in some respects to the 50 * the DEC tulip chips, except less complicated. The controller 51 * uses an MII bus and an external physical layer interface. The 52 * receiver has a one entry perfect filter and a 64-bit hash table 53 * multicast filter. Transmit and receive descriptors are similar 54 * to the tulip. 55 * 56 * Some Rhine chips has a serious flaw in its transmit DMA mechanism: 57 * transmit buffers must be longword aligned. Unfortunately, 58 * FreeBSD doesn't guarantee that mbufs will be filled in starting 59 * at longword boundaries, so we have to do a buffer copy before 60 * transmission. 61 */ 62 63 #ifdef HAVE_KERNEL_OPTION_HEADERS 64 #include "opt_device_polling.h" 65 #endif 66 67 #include <sys/param.h> 68 #include <sys/systm.h> 69 #include <sys/sockio.h> 70 #include <sys/mbuf.h> 71 #include <sys/malloc.h> 72 #include <sys/kernel.h> 73 #include <sys/module.h> 74 #include <sys/socket.h> 75 76 #include <net/if.h> 77 #include <net/ethernet.h> 78 #include <net/if_dl.h> 79 #include <net/if_media.h> 80 #include <net/if_types.h> 81 82 #include <net/bpf.h> 83 84 #include <vm/vm.h> /* for vtophys */ 85 #include <vm/pmap.h> /* for vtophys */ 86 #include <machine/bus.h> 87 #include <machine/resource.h> 88 #include <sys/bus.h> 89 #include <sys/rman.h> 90 91 #include <dev/mii/miivar.h> 92 93 #include <dev/pci/pcivar.h> 94 95 #define VR_USEIOSPACE 96 97 #include <pci/if_vrreg.h> 98 99 MODULE_DEPEND(vr, pci, 1, 1, 1); 100 MODULE_DEPEND(vr, ether, 1, 1, 1); 101 MODULE_DEPEND(vr, miibus, 1, 1, 1); 102 103 /* "device miibus" required. See GENERIC if you get errors here. */ 104 #include "miibus_if.h" 105 106 /* 107 * Various supported device vendors/types, their names & quirks 108 */ 109 110 #define VR_Q_NEEDALIGN (1<<0) 111 #define VR_Q_CSUM (1<<1) 112 113 static struct vr_type { 114 u_int16_t vr_vid; 115 u_int16_t vr_did; 116 int vr_quirks; 117 char *vr_name; 118 } vr_devs[] = { 119 { VIA_VENDORID, VIA_DEVICEID_RHINE, 120 VR_Q_NEEDALIGN, 121 "VIA VT3043 Rhine I 10/100BaseTX" }, 122 { VIA_VENDORID, VIA_DEVICEID_RHINE_II, 123 VR_Q_NEEDALIGN, 124 "VIA VT86C100A Rhine II 10/100BaseTX" }, 125 { VIA_VENDORID, VIA_DEVICEID_RHINE_II_2, 126 0, 127 "VIA VT6102 Rhine II 10/100BaseTX" }, 128 { VIA_VENDORID, VIA_DEVICEID_RHINE_III, 129 0, 130 "VIA VT6105 Rhine III 10/100BaseTX" }, 131 { VIA_VENDORID, VIA_DEVICEID_RHINE_III_M, 132 VR_Q_CSUM, 133 "VIA VT6105M Rhine III 10/100BaseTX" }, 134 { DELTA_VENDORID, DELTA_DEVICEID_RHINE_II, 135 VR_Q_NEEDALIGN, 136 "Delta Electronics Rhine II 10/100BaseTX" }, 137 { ADDTRON_VENDORID, ADDTRON_DEVICEID_RHINE_II, 138 VR_Q_NEEDALIGN, 139 "Addtron Technology Rhine II 10/100BaseTX" }, 140 { 0, 0, 0, NULL } 141 }; 142 143 struct vr_list_data { 144 struct vr_desc vr_rx_list[VR_RX_LIST_CNT]; 145 struct vr_desc vr_tx_list[VR_TX_LIST_CNT]; 146 }; 147 148 struct vr_softc { 149 struct ifnet *vr_ifp; /* interface info */ 150 device_t vr_dev; 151 struct resource *vr_res; 152 struct resource *vr_irq; 153 void *vr_intrhand; 154 device_t vr_miibus; 155 u_int8_t vr_revid; /* Rhine chip revision */ 156 u_int8_t vr_flags; /* See VR_F_* below */ 157 struct vr_list_data *vr_ldata; 158 struct callout vr_stat_callout; 159 struct mtx vr_mtx; 160 int vr_suspended; /* if 1, sleeping/detaching */ 161 int vr_quirks; 162 struct vr_desc *vr_rx_head; 163 struct vr_desc *vr_tx_cons; 164 struct vr_desc *vr_tx_prod; 165 #ifdef DEVICE_POLLING 166 int rxcycles; 167 #endif 168 }; 169 170 static int vr_probe(device_t); 171 static int vr_attach(device_t); 172 static int vr_detach(device_t); 173 174 static int vr_newbuf(struct vr_desc *, struct mbuf *); 175 176 static void vr_rxeof(struct vr_softc *); 177 static void vr_rxeoc(struct vr_softc *); 178 static void vr_txeof(struct vr_softc *); 179 static void vr_tick(void *); 180 static void vr_intr(void *); 181 static void vr_start(struct ifnet *); 182 static void vr_start_locked(struct ifnet *); 183 static int vr_ioctl(struct ifnet *, u_long, caddr_t); 184 static void vr_init(void *); 185 static void vr_init_locked(struct vr_softc *); 186 static void vr_stop(struct vr_softc *); 187 static void vr_watchdog(struct ifnet *); 188 static void vr_shutdown(device_t); 189 static int vr_ifmedia_upd(struct ifnet *); 190 static void vr_ifmedia_sts(struct ifnet *, struct ifmediareq *); 191 192 static int vr_mii_readreg(const struct vr_softc *, struct vr_mii_frame *); 193 static int vr_mii_writereg(const struct vr_softc *, const struct vr_mii_frame *); 194 static int vr_miibus_readreg(device_t, uint16_t, uint16_t); 195 static int vr_miibus_writereg(device_t, uint16_t, uint16_t, uint16_t); 196 static void vr_miibus_statchg(device_t); 197 198 static void vr_setcfg(struct vr_softc *, int); 199 static void vr_setmulti(struct vr_softc *); 200 static void vr_reset(const struct vr_softc *); 201 static int vr_list_rx_init(struct vr_softc *); 202 static int vr_list_tx_init(struct vr_softc *); 203 204 #ifdef VR_USEIOSPACE 205 #define VR_RES SYS_RES_IOPORT 206 #define VR_RID VR_PCI_LOIO 207 #else 208 #define VR_RES SYS_RES_MEMORY 209 #define VR_RID VR_PCI_LOMEM 210 #endif 211 212 static device_method_t vr_methods[] = { 213 /* Device interface */ 214 DEVMETHOD(device_probe, vr_probe), 215 DEVMETHOD(device_attach, vr_attach), 216 DEVMETHOD(device_detach, vr_detach), 217 DEVMETHOD(device_shutdown, vr_shutdown), 218 219 /* bus interface */ 220 DEVMETHOD(bus_print_child, bus_generic_print_child), 221 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 222 223 /* MII interface */ 224 DEVMETHOD(miibus_readreg, vr_miibus_readreg), 225 DEVMETHOD(miibus_writereg, vr_miibus_writereg), 226 DEVMETHOD(miibus_statchg, vr_miibus_statchg), 227 228 { 0, 0 } 229 }; 230 231 static driver_t vr_driver = { 232 "vr", 233 vr_methods, 234 sizeof(struct vr_softc) 235 }; 236 237 static devclass_t vr_devclass; 238 239 DRIVER_MODULE(vr, pci, vr_driver, vr_devclass, 0, 0); 240 DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0); 241 #define VR_F_RESTART 0x01 /* Restart unit on next tick */ 242 243 #define VR_LOCK(_sc) mtx_lock(&(_sc)->vr_mtx) 244 #define VR_UNLOCK(_sc) mtx_unlock(&(_sc)->vr_mtx) 245 #define VR_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vr_mtx, MA_OWNED) 246 247 /* 248 * register space access macros 249 */ 250 #define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->vr_res, reg, val) 251 #define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val) 252 #define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val) 253 254 #define CSR_READ_2(sc, reg) bus_read_2(sc->vr_res, reg) 255 #define CSR_READ_1(sc, reg) bus_read_1(sc->vr_res, reg) 256 257 #define VR_SETBIT(sc, reg, x) CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x)) 258 #define VR_CLRBIT(sc, reg, x) CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x)) 259 260 #define VR_SETBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x)) 261 #define VR_CLRBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x)) 262 263 264 /* 265 * Read an PHY register through the MII. 266 */ 267 static int 268 vr_mii_readreg(const struct vr_softc *sc, struct vr_mii_frame *frame) 269 { 270 int i; 271 272 /* Set the PHY address. */ 273 CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)| 274 frame->mii_phyaddr); 275 276 /* Set the register address. */ 277 CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr); 278 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_READ_ENB); 279 280 for (i = 0; i < 10000; i++) { 281 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_READ_ENB) == 0) 282 break; 283 DELAY(1); 284 } 285 frame->mii_data = CSR_READ_2(sc, VR_MIIDATA); 286 287 return (0); 288 } 289 290 291 /* 292 * Write to a PHY register through the MII. 293 */ 294 static int 295 vr_mii_writereg(const struct vr_softc *sc, const struct vr_mii_frame *frame) 296 { 297 int i; 298 299 /* Set the PHY address. */ 300 CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)| 301 frame->mii_phyaddr); 302 303 /* Set the register address and data to write. */ 304 CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr); 305 CSR_WRITE_2(sc, VR_MIIDATA, frame->mii_data); 306 307 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_WRITE_ENB); 308 309 for (i = 0; i < 10000; i++) { 310 if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_WRITE_ENB) == 0) 311 break; 312 DELAY(1); 313 } 314 315 return (0); 316 } 317 318 static int 319 vr_miibus_readreg(device_t dev, uint16_t phy, uint16_t reg) 320 { 321 struct vr_mii_frame frame; 322 struct vr_softc *sc = device_get_softc(dev); 323 324 if (sc->vr_revid == REV_ID_VT6102_APOLLO && phy != 1) 325 return (0); 326 327 bzero((char *)&frame, sizeof(frame)); 328 frame.mii_phyaddr = phy; 329 frame.mii_regaddr = reg; 330 vr_mii_readreg(sc, &frame); 331 return (frame.mii_data); 332 } 333 334 static int 335 vr_miibus_writereg(device_t dev, uint16_t phy, uint16_t reg, uint16_t data) 336 { 337 struct vr_mii_frame frame; 338 struct vr_softc *sc = device_get_softc(dev); 339 340 if (sc->vr_revid == REV_ID_VT6102_APOLLO && phy != 1) 341 return (0); 342 343 bzero((char *)&frame, sizeof(frame)); 344 frame.mii_phyaddr = phy; 345 frame.mii_regaddr = reg; 346 frame.mii_data = data; 347 vr_mii_writereg(sc, &frame); 348 349 return (0); 350 } 351 352 static void 353 vr_miibus_statchg(device_t dev) 354 { 355 struct mii_data *mii; 356 struct vr_softc *sc = device_get_softc(dev); 357 358 mii = device_get_softc(sc->vr_miibus); 359 vr_setcfg(sc, mii->mii_media_active); 360 } 361 362 /* 363 * Program the 64-bit multicast hash filter. 364 */ 365 static void 366 vr_setmulti(struct vr_softc *sc) 367 { 368 struct ifnet *ifp = sc->vr_ifp; 369 int h = 0; 370 uint32_t hashes[2] = { 0, 0 }; 371 struct ifmultiaddr *ifma; 372 uint8_t rxfilt; 373 int mcnt = 0; 374 375 VR_LOCK_ASSERT(sc); 376 377 rxfilt = CSR_READ_1(sc, VR_RXCFG); 378 379 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 380 rxfilt |= VR_RXCFG_RX_MULTI; 381 CSR_WRITE_1(sc, VR_RXCFG, rxfilt); 382 CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF); 383 CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF); 384 return; 385 } 386 387 /* First, zero out all the existing hash bits. */ 388 CSR_WRITE_4(sc, VR_MAR0, 0); 389 CSR_WRITE_4(sc, VR_MAR1, 0); 390 391 /* Now program new ones. */ 392 IF_ADDR_LOCK(ifp); 393 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 394 if (ifma->ifma_addr->sa_family != AF_LINK) 395 continue; 396 h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 397 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 398 if (h < 32) 399 hashes[0] |= (1 << h); 400 else 401 hashes[1] |= (1 << (h - 32)); 402 mcnt++; 403 } 404 IF_ADDR_UNLOCK(ifp); 405 406 if (mcnt) 407 rxfilt |= VR_RXCFG_RX_MULTI; 408 else 409 rxfilt &= ~VR_RXCFG_RX_MULTI; 410 411 CSR_WRITE_4(sc, VR_MAR0, hashes[0]); 412 CSR_WRITE_4(sc, VR_MAR1, hashes[1]); 413 CSR_WRITE_1(sc, VR_RXCFG, rxfilt); 414 } 415 416 /* 417 * In order to fiddle with the 418 * 'full-duplex' and '100Mbps' bits in the netconfig register, we 419 * first have to put the transmit and/or receive logic in the idle state. 420 */ 421 static void 422 vr_setcfg(struct vr_softc *sc, int media) 423 { 424 int restart = 0; 425 426 VR_LOCK_ASSERT(sc); 427 428 if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON|VR_CMD_RX_ON)) { 429 restart = 1; 430 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON)); 431 } 432 433 if ((media & IFM_GMASK) == IFM_FDX) 434 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX); 435 else 436 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX); 437 438 if (restart) 439 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON); 440 } 441 442 static void 443 vr_reset(const struct vr_softc *sc) 444 { 445 register int i; 446 447 /*VR_LOCK_ASSERT(sc);*/ /* XXX: Called during attach w/o lock. */ 448 449 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET); 450 451 for (i = 0; i < VR_TIMEOUT; i++) { 452 DELAY(10); 453 if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET)) 454 break; 455 } 456 if (i == VR_TIMEOUT) { 457 if (sc->vr_revid < REV_ID_VT3065_A) 458 device_printf(sc->vr_dev, "reset never completed!\n"); 459 else { 460 /* Use newer force reset command */ 461 device_printf(sc->vr_dev, "Using force reset command.\n"); 462 VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST); 463 } 464 } 465 466 /* Wait a little while for the chip to get its brains in order. */ 467 DELAY(1000); 468 } 469 470 /* 471 * Probe for a VIA Rhine chip. Check the PCI vendor and device 472 * IDs against our list and return a match or NULL 473 */ 474 static struct vr_type * 475 vr_match(device_t dev) 476 { 477 struct vr_type *t = vr_devs; 478 479 for (t = vr_devs; t->vr_name != NULL; t++) 480 if ((pci_get_vendor(dev) == t->vr_vid) && 481 (pci_get_device(dev) == t->vr_did)) 482 return (t); 483 return (NULL); 484 } 485 486 /* 487 * Probe for a VIA Rhine chip. Check the PCI vendor and device 488 * IDs against our list and return a device name if we find a match. 489 */ 490 static int 491 vr_probe(device_t dev) 492 { 493 struct vr_type *t; 494 495 t = vr_match(dev); 496 if (t != NULL) { 497 device_set_desc(dev, t->vr_name); 498 return (BUS_PROBE_DEFAULT); 499 } 500 return (ENXIO); 501 } 502 503 /* 504 * Attach the interface. Allocate softc structures, do ifmedia 505 * setup and ethernet/BPF attach. 506 */ 507 static int 508 vr_attach(device_t dev) 509 { 510 int i; 511 u_char eaddr[ETHER_ADDR_LEN]; 512 struct vr_softc *sc; 513 struct ifnet *ifp; 514 int error = 0, rid; 515 struct vr_type *t; 516 517 sc = device_get_softc(dev); 518 sc->vr_dev = dev; 519 t = vr_match(dev); 520 KASSERT(t != NULL, ("Lost if_vr device match")); 521 sc->vr_quirks = t->vr_quirks; 522 device_printf(dev, "Quirks: 0x%x\n", sc->vr_quirks); 523 524 mtx_init(&sc->vr_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 525 MTX_DEF); 526 callout_init_mtx(&sc->vr_stat_callout, &sc->vr_mtx, 0); 527 528 /* 529 * Map control/status registers. 530 */ 531 pci_enable_busmaster(dev); 532 sc->vr_revid = pci_read_config(dev, VR_PCI_REVID, 4) & 0x000000FF; 533 534 rid = VR_RID; 535 sc->vr_res = bus_alloc_resource_any(dev, VR_RES, &rid, RF_ACTIVE); 536 537 if (sc->vr_res == NULL) { 538 device_printf(dev, "couldn't map ports/memory\n"); 539 error = ENXIO; 540 goto fail; 541 } 542 543 /* Allocate interrupt */ 544 rid = 0; 545 sc->vr_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 546 RF_SHAREABLE | RF_ACTIVE); 547 548 if (sc->vr_irq == NULL) { 549 device_printf(dev, "couldn't map interrupt\n"); 550 error = ENXIO; 551 goto fail; 552 } 553 554 /* Allocate ifnet structure. */ 555 ifp = sc->vr_ifp = if_alloc(IFT_ETHER); 556 if (ifp == NULL) { 557 device_printf(dev, "can not if_alloc()\n"); 558 error = ENOSPC; 559 goto fail; 560 } 561 ifp->if_softc = sc; 562 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 563 ifp->if_mtu = ETHERMTU; 564 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 565 ifp->if_ioctl = vr_ioctl; 566 ifp->if_start = vr_start; 567 ifp->if_watchdog = vr_watchdog; 568 ifp->if_init = vr_init; 569 IFQ_SET_MAXLEN(&ifp->if_snd, VR_TX_LIST_CNT - 1); 570 ifp->if_snd.ifq_maxlen = VR_TX_LIST_CNT - 1; 571 IFQ_SET_READY(&ifp->if_snd); 572 573 if (sc->vr_quirks & VR_Q_CSUM) { 574 ifp->if_hwassist = (CSUM_IP | CSUM_TCP | CSUM_UDP); 575 ifp->if_capabilities |= IFCAP_HWCSUM; 576 } 577 578 ifp->if_capabilities |= IFCAP_VLAN_MTU; 579 ifp->if_capenable = ifp->if_capabilities; 580 if (ifp->if_capenable & IFCAP_TXCSUM) 581 ifp->if_hwassist = (CSUM_IP | CSUM_TCP | CSUM_UDP); 582 else 583 ifp->if_hwassist = 0; 584 585 #ifdef DEVICE_POLLING 586 ifp->if_capabilities |= IFCAP_POLLING; 587 #endif 588 589 /* 590 * Windows may put the chip in suspend mode when it 591 * shuts down. Be sure to kick it in the head to wake it 592 * up again. 593 */ 594 VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1)); 595 596 /* Reset the adapter. */ 597 vr_reset(sc); 598 599 /* 600 * Turn on bit2 (MIION) in PCI configuration register 0x53 during 601 * initialization and disable AUTOPOLL. 602 */ 603 pci_write_config(dev, VR_PCI_MODE, 604 pci_read_config(dev, VR_PCI_MODE, 4) | (VR_MODE3_MIION << 24), 4); 605 VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL); 606 607 /* 608 * Get station address. The way the Rhine chips work, 609 * you're not allowed to directly access the EEPROM once 610 * they've been programmed a special way. Consequently, 611 * we need to read the node address from the PAR0 and PAR1 612 * registers. 613 */ 614 VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD); 615 DELAY(200); 616 for (i = 0; i < ETHER_ADDR_LEN; i++) 617 eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i); 618 619 sc->vr_ldata = contigmalloc(sizeof(struct vr_list_data), M_DEVBUF, 620 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0); 621 622 if (sc->vr_ldata == NULL) { 623 device_printf(dev, "no memory for list buffers!\n"); 624 error = ENXIO; 625 goto fail; 626 } 627 628 /* Do MII setup. */ 629 if (mii_phy_probe(dev, &sc->vr_miibus, 630 vr_ifmedia_upd, vr_ifmedia_sts)) { 631 device_printf(dev, "MII without any phy!\n"); 632 error = ENXIO; 633 goto fail; 634 } 635 636 /* Call MI attach routine. */ 637 ether_ifattach(ifp, eaddr); 638 639 sc->vr_suspended = 0; 640 641 /* Hook interrupt last to avoid having to lock softc */ 642 error = bus_setup_intr(dev, sc->vr_irq, INTR_TYPE_NET | INTR_MPSAFE, 643 NULL, vr_intr, sc, &sc->vr_intrhand); 644 645 if (error) { 646 device_printf(dev, "couldn't set up irq\n"); 647 ether_ifdetach(ifp); 648 goto fail; 649 } 650 651 fail: 652 if (error) 653 vr_detach(dev); 654 655 return (error); 656 } 657 658 /* 659 * Shutdown hardware and free up resources. This can be called any 660 * time after the mutex has been initialized. It is called in both 661 * the error case in attach and the normal detach case so it needs 662 * to be careful about only freeing resources that have actually been 663 * allocated. 664 */ 665 static int 666 vr_detach(device_t dev) 667 { 668 struct vr_softc *sc = device_get_softc(dev); 669 struct ifnet *ifp = sc->vr_ifp; 670 671 KASSERT(mtx_initialized(&sc->vr_mtx), ("vr mutex not initialized")); 672 673 #ifdef DEVICE_POLLING 674 if (ifp->if_capenable & IFCAP_POLLING) 675 ether_poll_deregister(ifp); 676 #endif 677 678 /* These should only be active if attach succeeded */ 679 if (device_is_attached(dev)) { 680 VR_LOCK(sc); 681 sc->vr_suspended = 1; 682 vr_stop(sc); 683 VR_UNLOCK(sc); 684 callout_drain(&sc->vr_stat_callout); 685 ether_ifdetach(ifp); 686 } 687 if (sc->vr_miibus) 688 device_delete_child(dev, sc->vr_miibus); 689 bus_generic_detach(dev); 690 691 if (sc->vr_intrhand) 692 bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand); 693 if (sc->vr_irq) 694 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq); 695 if (sc->vr_res) 696 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res); 697 698 if (ifp) 699 if_free(ifp); 700 701 if (sc->vr_ldata) 702 contigfree(sc->vr_ldata, sizeof(struct vr_list_data), M_DEVBUF); 703 704 mtx_destroy(&sc->vr_mtx); 705 706 return (0); 707 } 708 709 /* 710 * Initialize the transmit descriptors. 711 */ 712 static int 713 vr_list_tx_init(struct vr_softc *sc) 714 { 715 struct vr_list_data *ld; 716 int i; 717 718 ld = sc->vr_ldata; 719 for (i = 0; i < VR_TX_LIST_CNT; i++) { 720 if (i == (VR_TX_LIST_CNT - 1)) { 721 ld->vr_tx_list[i].vr_next = 722 &ld->vr_tx_list[0]; 723 ld->vr_tx_list[i].vr_nextphys = 724 vtophys(&ld->vr_tx_list[0]); 725 } else { 726 ld->vr_tx_list[i].vr_next = 727 &ld->vr_tx_list[i + 1]; 728 ld->vr_tx_list[i].vr_nextphys = 729 vtophys(&ld->vr_tx_list[i + 1]); 730 } 731 } 732 sc->vr_tx_cons = sc->vr_tx_prod = &ld->vr_tx_list[0]; 733 734 return (0); 735 } 736 737 738 /* 739 * Initialize the RX descriptors and allocate mbufs for them. Note that 740 * we arrange the descriptors in a closed ring, so that the last descriptor 741 * points back to the first. 742 */ 743 static int 744 vr_list_rx_init(struct vr_softc *sc) 745 { 746 struct vr_list_data *ld; 747 int i; 748 749 VR_LOCK_ASSERT(sc); 750 751 ld = sc->vr_ldata; 752 753 for (i = 0; i < VR_RX_LIST_CNT; i++) { 754 if (vr_newbuf(&ld->vr_rx_list[i], NULL) == ENOBUFS) 755 return (ENOBUFS); 756 if (i == (VR_RX_LIST_CNT - 1)) { 757 ld->vr_rx_list[i].vr_next = &ld->vr_rx_list[0]; 758 ld->vr_rx_list[i].vr_nextphys = 759 vtophys(&ld->vr_rx_list[0]); 760 } else { 761 ld->vr_rx_list[i].vr_next = 762 &ld->vr_rx_list[i + 1]; 763 ld->vr_rx_list[i].vr_nextphys = 764 vtophys(&ld->vr_rx_list[i + 1]); 765 } 766 } 767 768 sc->vr_rx_head = &ld->vr_rx_list[0]; 769 770 return (0); 771 } 772 773 /* 774 * Initialize an RX descriptor and attach an MBUF cluster. 775 * Note: the length fields are only 11 bits wide, which means the 776 * largest size we can specify is 2047. This is important because 777 * MCLBYTES is 2048, so we have to subtract one otherwise we'll 778 * overflow the field and make a mess. 779 */ 780 static int 781 vr_newbuf(struct vr_desc *c, struct mbuf *m) 782 { 783 struct mbuf *m_new = NULL; 784 785 if (m == NULL) { 786 m_new = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 787 if (m_new == NULL) 788 return (ENOBUFS); 789 } else { 790 m_new = m; 791 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 792 m_new->m_data = m_new->m_ext.ext_buf; 793 } 794 795 m_adj(m_new, sizeof(uint64_t)); 796 797 c->vr_mbuf = m_new; 798 c->vr_status = VR_RXSTAT; 799 c->vr_data = vtophys(mtod(m_new, caddr_t)); 800 c->vr_ctl = VR_RXCTL | VR_RXLEN; 801 802 return (0); 803 } 804 805 /* 806 * A frame has been uploaded: pass the resulting mbuf chain up to 807 * the higher level protocols. 808 */ 809 static void 810 vr_rxeof(struct vr_softc *sc) 811 { 812 struct mbuf *m, *m0; 813 struct ifnet *ifp; 814 struct vr_desc *cur_rx; 815 int total_len = 0; 816 uint32_t rxstat, rxctl; 817 818 VR_LOCK_ASSERT(sc); 819 ifp = sc->vr_ifp; 820 821 while (!((rxstat = sc->vr_rx_head->vr_status) & 822 VR_RXSTAT_OWN)) { 823 #ifdef DEVICE_POLLING 824 if (ifp->if_capenable & IFCAP_POLLING) { 825 if (sc->rxcycles <= 0) 826 break; 827 sc->rxcycles--; 828 } 829 #endif 830 m0 = NULL; 831 cur_rx = sc->vr_rx_head; 832 sc->vr_rx_head = cur_rx->vr_next; 833 m = cur_rx->vr_mbuf; 834 835 /* 836 * If an error occurs, update stats, clear the 837 * status word and leave the mbuf cluster in place: 838 * it should simply get re-used next time this descriptor 839 * comes up in the ring. 840 */ 841 if (rxstat & VR_RXSTAT_RXERR) { 842 ifp->if_ierrors++; 843 device_printf(sc->vr_dev, 844 "rx error (%02x):", rxstat & 0x000000ff); 845 if (rxstat & VR_RXSTAT_CRCERR) 846 printf(" crc error"); 847 if (rxstat & VR_RXSTAT_FRAMEALIGNERR) 848 printf(" frame alignment error\n"); 849 if (rxstat & VR_RXSTAT_FIFOOFLOW) 850 printf(" FIFO overflow"); 851 if (rxstat & VR_RXSTAT_GIANT) 852 printf(" received giant packet"); 853 if (rxstat & VR_RXSTAT_RUNT) 854 printf(" received runt packet"); 855 if (rxstat & VR_RXSTAT_BUSERR) 856 printf(" system bus error"); 857 if (rxstat & VR_RXSTAT_BUFFERR) 858 printf("rx buffer error"); 859 printf("\n"); 860 vr_newbuf(cur_rx, m); 861 continue; 862 } 863 864 /* No errors; receive the packet. */ 865 total_len = VR_RXBYTES(cur_rx->vr_status); 866 if (ifp->if_capenable & IFCAP_RXCSUM) { 867 rxctl = cur_rx->vr_ctl; 868 if ((rxctl & VR_RXCTL_GOODIP) == VR_RXCTL_GOODIP) 869 m->m_pkthdr.csum_flags |= 870 CSUM_IP_CHECKED | CSUM_IP_VALID; 871 if ((rxctl & VR_RXCTL_GOODTCPUDP)) { 872 m->m_pkthdr.csum_flags |= 873 CSUM_DATA_VALID | CSUM_PSEUDO_HDR; 874 m->m_pkthdr.csum_data = 0xffff; 875 } 876 } 877 878 /* 879 * XXX The VIA Rhine chip includes the CRC with every 880 * received frame, and there's no way to turn this 881 * behavior off (at least, I can't find anything in 882 * the manual that explains how to do it) so we have 883 * to trim off the CRC manually. 884 */ 885 total_len -= ETHER_CRC_LEN; 886 887 m0 = m_devget(mtod(m, char *), total_len, ETHER_ALIGN, ifp, 888 NULL); 889 vr_newbuf(cur_rx, m); 890 if (m0 == NULL) { 891 ifp->if_ierrors++; 892 continue; 893 } 894 m = m0; 895 896 ifp->if_ipackets++; 897 VR_UNLOCK(sc); 898 (*ifp->if_input)(ifp, m); 899 VR_LOCK(sc); 900 } 901 } 902 903 static void 904 vr_rxeoc(struct vr_softc *sc) 905 { 906 struct ifnet *ifp = sc->vr_ifp; 907 int i; 908 909 VR_LOCK_ASSERT(sc); 910 911 ifp->if_ierrors++; 912 913 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON); 914 DELAY(10000); 915 916 /* Wait for receiver to stop */ 917 for (i = 0x400; 918 i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON); 919 i--) { 920 ; 921 } 922 923 if (!i) { 924 device_printf(sc->vr_dev, "rx shutdown error!\n"); 925 sc->vr_flags |= VR_F_RESTART; 926 return; 927 } 928 929 vr_rxeof(sc); 930 931 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_rx_head)); 932 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON); 933 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO); 934 } 935 936 /* 937 * A frame was downloaded to the chip. It's safe for us to clean up 938 * the list buffers. 939 */ 940 static void 941 vr_txeof(struct vr_softc *sc) 942 { 943 struct vr_desc *cur_tx; 944 struct ifnet *ifp = sc->vr_ifp; 945 946 VR_LOCK_ASSERT(sc); 947 948 /* 949 * Go through our tx list and free mbufs for those 950 * frames that have been transmitted. 951 */ 952 cur_tx = sc->vr_tx_cons; 953 while (cur_tx != sc->vr_tx_prod) { 954 uint32_t txstat; 955 int i; 956 957 txstat = cur_tx->vr_status; 958 959 if ((txstat & VR_TXSTAT_ABRT) || 960 (txstat & VR_TXSTAT_UDF)) { 961 for (i = 0x400; 962 i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_TX_ON); 963 i--) 964 ; /* Wait for chip to shutdown */ 965 if (!i) { 966 device_printf(sc->vr_dev, "tx shutdown timeout\n"); 967 sc->vr_flags |= VR_F_RESTART; 968 break; 969 } 970 atomic_set_acq_32(&cur_tx->vr_status, VR_TXSTAT_OWN); 971 CSR_WRITE_4(sc, VR_TXADDR, vtophys(cur_tx)); 972 break; 973 } 974 975 if (txstat & VR_TXSTAT_OWN) 976 break; 977 978 if (txstat & VR_TXSTAT_ERRSUM) { 979 ifp->if_oerrors++; 980 if (txstat & VR_TXSTAT_DEFER) 981 ifp->if_collisions++; 982 if (txstat & VR_TXSTAT_LATECOLL) 983 ifp->if_collisions++; 984 } 985 986 ifp->if_collisions +=(txstat & VR_TXSTAT_COLLCNT) >> 3; 987 988 ifp->if_opackets++; 989 if (cur_tx->vr_mbuf != NULL) 990 m_freem(cur_tx->vr_mbuf); 991 cur_tx->vr_mbuf = NULL; 992 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 993 994 cur_tx = cur_tx->vr_next; 995 } 996 sc->vr_tx_cons = cur_tx; 997 if (cur_tx->vr_mbuf == NULL) 998 ifp->if_timer = 0; 999 } 1000 1001 static void 1002 vr_tick(void *xsc) 1003 { 1004 struct vr_softc *sc = xsc; 1005 struct mii_data *mii; 1006 1007 VR_LOCK_ASSERT(sc); 1008 1009 if (sc->vr_flags & VR_F_RESTART) { 1010 device_printf(sc->vr_dev, "restarting\n"); 1011 vr_stop(sc); 1012 vr_reset(sc); 1013 vr_init_locked(sc); 1014 sc->vr_flags &= ~VR_F_RESTART; 1015 } 1016 1017 mii = device_get_softc(sc->vr_miibus); 1018 mii_tick(mii); 1019 callout_reset(&sc->vr_stat_callout, hz, vr_tick, sc); 1020 } 1021 1022 #ifdef DEVICE_POLLING 1023 static poll_handler_t vr_poll; 1024 static poll_handler_t vr_poll_locked; 1025 1026 static void 1027 vr_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1028 { 1029 struct vr_softc *sc = ifp->if_softc; 1030 1031 VR_LOCK(sc); 1032 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1033 vr_poll_locked(ifp, cmd, count); 1034 VR_UNLOCK(sc); 1035 } 1036 1037 static void 1038 vr_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count) 1039 { 1040 struct vr_softc *sc = ifp->if_softc; 1041 1042 VR_LOCK_ASSERT(sc); 1043 1044 sc->rxcycles = count; 1045 vr_rxeof(sc); 1046 vr_txeof(sc); 1047 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1048 vr_start_locked(ifp); 1049 1050 if (cmd == POLL_AND_CHECK_STATUS) { 1051 uint16_t status; 1052 1053 /* Also check status register. */ 1054 status = CSR_READ_2(sc, VR_ISR); 1055 if (status) 1056 CSR_WRITE_2(sc, VR_ISR, status); 1057 1058 if ((status & VR_INTRS) == 0) 1059 return; 1060 1061 if (status & VR_ISR_RX_DROPPED) { 1062 if_printf(ifp, "rx packet lost\n"); 1063 ifp->if_ierrors++; 1064 } 1065 1066 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) || 1067 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) { 1068 if_printf(ifp, "receive error (%04x)", status); 1069 if (status & VR_ISR_RX_NOBUF) 1070 printf(" no buffers"); 1071 if (status & VR_ISR_RX_OFLOW) 1072 printf(" overflow"); 1073 if (status & VR_ISR_RX_DROPPED) 1074 printf(" packet lost"); 1075 printf("\n"); 1076 vr_rxeoc(sc); 1077 } 1078 1079 if ((status & VR_ISR_BUSERR) || 1080 (status & VR_ISR_TX_UNDERRUN)) { 1081 vr_reset(sc); 1082 vr_init_locked(sc); 1083 return; 1084 } 1085 1086 if ((status & VR_ISR_UDFI) || 1087 (status & VR_ISR_TX_ABRT2) || 1088 (status & VR_ISR_TX_ABRT)) { 1089 ifp->if_oerrors++; 1090 if (sc->vr_tx_cons->vr_mbuf != NULL) { 1091 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON); 1092 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_GO); 1093 } 1094 } 1095 } 1096 } 1097 #endif /* DEVICE_POLLING */ 1098 1099 static void 1100 vr_intr(void *arg) 1101 { 1102 struct vr_softc *sc = arg; 1103 struct ifnet *ifp = sc->vr_ifp; 1104 uint16_t status; 1105 1106 VR_LOCK(sc); 1107 1108 if (sc->vr_suspended) { 1109 /* 1110 * Forcibly disable interrupts. 1111 * XXX: Mobile VIA based platforms may need 1112 * interrupt re-enable on resume. 1113 */ 1114 CSR_WRITE_2(sc, VR_IMR, 0x0000); 1115 goto done_locked; 1116 } 1117 1118 #ifdef DEVICE_POLLING 1119 if (ifp->if_capenable & IFCAP_POLLING) 1120 goto done_locked; 1121 #endif 1122 1123 /* Suppress unwanted interrupts. */ 1124 if (!(ifp->if_flags & IFF_UP)) { 1125 vr_stop(sc); 1126 goto done_locked; 1127 } 1128 1129 /* Disable interrupts. */ 1130 CSR_WRITE_2(sc, VR_IMR, 0x0000); 1131 1132 for (;;) { 1133 status = CSR_READ_2(sc, VR_ISR); 1134 1135 if (status) 1136 CSR_WRITE_2(sc, VR_ISR, status); 1137 1138 if ((status & VR_INTRS) == 0) 1139 break; 1140 1141 if (status & VR_ISR_RX_OK) 1142 vr_rxeof(sc); 1143 1144 if (status & VR_ISR_RX_DROPPED) { 1145 device_printf(sc->vr_dev, "rx packet lost\n"); 1146 ifp->if_ierrors++; 1147 } 1148 1149 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) || 1150 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW)) { 1151 device_printf(sc->vr_dev, "receive error (%04x)", status); 1152 if (status & VR_ISR_RX_NOBUF) 1153 printf(" no buffers"); 1154 if (status & VR_ISR_RX_OFLOW) 1155 printf(" overflow"); 1156 if (status & VR_ISR_RX_DROPPED) 1157 printf(" packet lost"); 1158 printf("\n"); 1159 vr_rxeoc(sc); 1160 } 1161 1162 if ((status & VR_ISR_BUSERR) || (status & VR_ISR_TX_UNDERRUN)) { 1163 vr_reset(sc); 1164 vr_init_locked(sc); 1165 break; 1166 } 1167 1168 if ((status & VR_ISR_TX_OK) || (status & VR_ISR_TX_ABRT) || 1169 (status & VR_ISR_TX_ABRT2) || (status & VR_ISR_UDFI)) { 1170 vr_txeof(sc); 1171 if ((status & VR_ISR_UDFI) || 1172 (status & VR_ISR_TX_ABRT2) || 1173 (status & VR_ISR_TX_ABRT)) { 1174 ifp->if_oerrors++; 1175 if (sc->vr_tx_cons->vr_mbuf != NULL) { 1176 VR_SETBIT16(sc, VR_COMMAND, 1177 VR_CMD_TX_ON); 1178 VR_SETBIT16(sc, VR_COMMAND, 1179 VR_CMD_TX_GO); 1180 } 1181 } 1182 } 1183 } 1184 1185 /* Re-enable interrupts. */ 1186 CSR_WRITE_2(sc, VR_IMR, VR_INTRS); 1187 1188 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1189 vr_start_locked(ifp); 1190 1191 done_locked: 1192 VR_UNLOCK(sc); 1193 } 1194 1195 /* 1196 * Main transmit routine. To avoid having to do mbuf copies, we put pointers 1197 * to the mbuf data regions directly in the transmit lists. We also save a 1198 * copy of the pointers since the transmit list fragment pointers are 1199 * physical addresses. 1200 */ 1201 1202 static void 1203 vr_start(struct ifnet *ifp) 1204 { 1205 struct vr_softc *sc = ifp->if_softc; 1206 1207 VR_LOCK(sc); 1208 vr_start_locked(ifp); 1209 VR_UNLOCK(sc); 1210 } 1211 1212 static void 1213 vr_start_locked(struct ifnet *ifp) 1214 { 1215 struct vr_softc *sc = ifp->if_softc; 1216 struct mbuf *m, *m_head; 1217 struct vr_desc *cur_tx, *n_tx; 1218 struct vr_desc *f = NULL; 1219 uint32_t cval; 1220 1221 if (ifp->if_drv_flags & IFF_DRV_OACTIVE) 1222 return; 1223 1224 for (cur_tx = sc->vr_tx_prod; 1225 cur_tx->vr_next != sc->vr_tx_cons; ) { 1226 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 1227 if (m_head == NULL) 1228 break; 1229 1230 VR_LOCK_ASSERT(sc); 1231 /* 1232 * Some VIA Rhine wants packet buffers to be longword 1233 * aligned, but very often our mbufs aren't. Rather than 1234 * waste time trying to decide when to copy and when not 1235 * to copy, just do it all the time. 1236 */ 1237 if (sc->vr_quirks & VR_Q_NEEDALIGN) { 1238 m = m_defrag(m_head, M_DONTWAIT); 1239 if (m == NULL) { 1240 /* Rollback, send what we were able to encap. */ 1241 IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 1242 break; 1243 } 1244 m_head = m; 1245 } 1246 1247 /* 1248 * The Rhine chip doesn't auto-pad, so we have to make 1249 * sure to pad short frames out to the minimum frame length 1250 * ourselves. 1251 */ 1252 if (m_head->m_pkthdr.len < VR_MIN_FRAMELEN) { 1253 if (m_head->m_next != NULL) 1254 m_head = m_defrag(m_head, M_DONTWAIT); 1255 m_head->m_pkthdr.len += VR_MIN_FRAMELEN - m_head->m_len; 1256 m_head->m_len = m_head->m_pkthdr.len; 1257 /* XXX: bzero the padding bytes */ 1258 } 1259 1260 n_tx = cur_tx; 1261 for (m = m_head; m != NULL; m = m->m_next) { 1262 if (m->m_len == 0) 1263 continue; 1264 if (n_tx->vr_next == sc->vr_tx_cons) { 1265 IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 1266 sc->vr_tx_prod = cur_tx; 1267 return; 1268 } 1269 KASSERT(n_tx->vr_mbuf == NULL, ("if_vr_tx overrun")); 1270 1271 f = n_tx; 1272 f->vr_data = vtophys(mtod(m, caddr_t)); 1273 cval = m->m_len; 1274 cval |= VR_TXCTL_TLINK; 1275 1276 if ((ifp->if_capenable & IFCAP_TXCSUM) && 1277 m_head->m_pkthdr.csum_flags) { 1278 if (m_head->m_pkthdr.csum_flags & CSUM_IP) 1279 cval |= VR_TXCTL_IPCSUM; 1280 if (m_head->m_pkthdr.csum_flags & CSUM_TCP) 1281 cval |= VR_TXCTL_TCPCSUM; 1282 if (m_head->m_pkthdr.csum_flags & CSUM_UDP) 1283 cval |= VR_TXCTL_UDPCSUM; 1284 } 1285 1286 if (m == m_head) 1287 cval |= VR_TXCTL_FIRSTFRAG; 1288 f->vr_ctl = cval; 1289 f->vr_status = 0; 1290 n_tx = n_tx->vr_next; 1291 } 1292 1293 KASSERT(f != NULL, ("if_vr: no packet processed")); 1294 f->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT; 1295 cur_tx->vr_mbuf = m_head; 1296 atomic_set_acq_32(&cur_tx->vr_status, VR_TXSTAT_OWN); 1297 1298 /* Tell the chip to start transmitting. */ 1299 VR_SETBIT16(sc, VR_COMMAND, /*VR_CMD_TX_ON|*/ VR_CMD_TX_GO); 1300 1301 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1302 ifp->if_timer = 5; 1303 1304 /* 1305 * If there's a BPF listener, bounce a copy of this frame 1306 * to him. 1307 */ 1308 BPF_MTAP(ifp, m_head); 1309 cur_tx = n_tx; 1310 } 1311 sc->vr_tx_prod = cur_tx; 1312 } 1313 1314 static void 1315 vr_init(void *xsc) 1316 { 1317 struct vr_softc *sc = xsc; 1318 1319 VR_LOCK(sc); 1320 vr_init_locked(sc); 1321 VR_UNLOCK(sc); 1322 } 1323 1324 static void 1325 vr_init_locked(struct vr_softc *sc) 1326 { 1327 struct ifnet *ifp = sc->vr_ifp; 1328 struct mii_data *mii; 1329 int i; 1330 1331 VR_LOCK_ASSERT(sc); 1332 1333 mii = device_get_softc(sc->vr_miibus); 1334 1335 /* Cancel pending I/O and free all RX/TX buffers. */ 1336 vr_stop(sc); 1337 vr_reset(sc); 1338 1339 /* Set our station address. */ 1340 for (i = 0; i < ETHER_ADDR_LEN; i++) 1341 CSR_WRITE_1(sc, VR_PAR0 + i, IF_LLADDR(sc->vr_ifp)[i]); 1342 1343 /* Set DMA size. */ 1344 VR_CLRBIT(sc, VR_BCR0, VR_BCR0_DMA_LENGTH); 1345 VR_SETBIT(sc, VR_BCR0, VR_BCR0_DMA_STORENFWD); 1346 1347 /* 1348 * BCR0 and BCR1 can override the RXCFG and TXCFG registers, 1349 * so we must set both. 1350 */ 1351 VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH); 1352 VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTHRESH128BYTES); 1353 1354 VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH); 1355 VR_SETBIT(sc, VR_BCR1, VR_BCR1_TXTHRESHSTORENFWD); 1356 1357 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH); 1358 VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_128BYTES); 1359 1360 VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH); 1361 VR_SETBIT(sc, VR_TXCFG, VR_TXTHRESH_STORENFWD); 1362 1363 /* Init circular RX list. */ 1364 if (vr_list_rx_init(sc) == ENOBUFS) { 1365 device_printf(sc->vr_dev, 1366 "initialization failed: no memory for rx buffers\n"); 1367 vr_stop(sc); 1368 return; 1369 } 1370 1371 /* Init tx descriptors. */ 1372 vr_list_tx_init(sc); 1373 1374 /* If we want promiscuous mode, set the allframes bit. */ 1375 if (ifp->if_flags & IFF_PROMISC) 1376 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC); 1377 else 1378 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC); 1379 1380 /* Set capture broadcast bit to capture broadcast frames. */ 1381 if (ifp->if_flags & IFF_BROADCAST) 1382 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD); 1383 else 1384 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD); 1385 1386 /* 1387 * Program the multicast filter, if necessary. 1388 */ 1389 vr_setmulti(sc); 1390 1391 /* 1392 * Load the address of the RX list. 1393 */ 1394 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_rx_head)); 1395 1396 /* Enable receiver and transmitter. */ 1397 CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START| 1398 VR_CMD_TX_ON|VR_CMD_RX_ON| 1399 VR_CMD_RX_GO); 1400 1401 CSR_WRITE_4(sc, VR_TXADDR, vtophys(&sc->vr_ldata->vr_tx_list[0])); 1402 1403 CSR_WRITE_2(sc, VR_ISR, 0xFFFF); 1404 #ifdef DEVICE_POLLING 1405 /* 1406 * Disable interrupts if we are polling. 1407 */ 1408 if (ifp->if_capenable & IFCAP_POLLING) 1409 CSR_WRITE_2(sc, VR_IMR, 0); 1410 else 1411 #endif 1412 /* 1413 * Enable interrupts. 1414 */ 1415 CSR_WRITE_2(sc, VR_IMR, VR_INTRS); 1416 1417 mii_mediachg(mii); 1418 1419 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1420 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1421 1422 callout_reset(&sc->vr_stat_callout, hz, vr_tick, sc); 1423 } 1424 1425 /* 1426 * Set media options. 1427 */ 1428 static int 1429 vr_ifmedia_upd(struct ifnet *ifp) 1430 { 1431 struct vr_softc *sc = ifp->if_softc; 1432 1433 if (ifp->if_flags & IFF_UP) 1434 vr_init(sc); 1435 1436 return (0); 1437 } 1438 1439 /* 1440 * Report current media status. 1441 */ 1442 static void 1443 vr_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1444 { 1445 struct vr_softc *sc = ifp->if_softc; 1446 struct mii_data *mii; 1447 1448 mii = device_get_softc(sc->vr_miibus); 1449 VR_LOCK(sc); 1450 mii_pollstat(mii); 1451 VR_UNLOCK(sc); 1452 ifmr->ifm_active = mii->mii_media_active; 1453 ifmr->ifm_status = mii->mii_media_status; 1454 } 1455 1456 static int 1457 vr_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1458 { 1459 struct vr_softc *sc = ifp->if_softc; 1460 struct ifreq *ifr = (struct ifreq *) data; 1461 struct mii_data *mii; 1462 int error = 0; 1463 1464 switch (command) { 1465 case SIOCSIFFLAGS: 1466 VR_LOCK(sc); 1467 if (ifp->if_flags & IFF_UP) { 1468 vr_init_locked(sc); 1469 } else { 1470 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1471 vr_stop(sc); 1472 } 1473 VR_UNLOCK(sc); 1474 error = 0; 1475 break; 1476 case SIOCADDMULTI: 1477 case SIOCDELMULTI: 1478 VR_LOCK(sc); 1479 vr_setmulti(sc); 1480 VR_UNLOCK(sc); 1481 error = 0; 1482 break; 1483 case SIOCGIFMEDIA: 1484 case SIOCSIFMEDIA: 1485 mii = device_get_softc(sc->vr_miibus); 1486 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); 1487 break; 1488 case SIOCSIFCAP: 1489 #ifdef DEVICE_POLLING 1490 if (ifr->ifr_reqcap & IFCAP_POLLING && 1491 !(ifp->if_capenable & IFCAP_POLLING)) { 1492 error = ether_poll_register(vr_poll, ifp); 1493 if (error) 1494 return(error); 1495 VR_LOCK(sc); 1496 /* Disable interrupts */ 1497 CSR_WRITE_2(sc, VR_IMR, 0x0000); 1498 ifp->if_capenable |= IFCAP_POLLING; 1499 VR_UNLOCK(sc); 1500 return (error); 1501 1502 } 1503 if (!(ifr->ifr_reqcap & IFCAP_POLLING) && 1504 ifp->if_capenable & IFCAP_POLLING) { 1505 error = ether_poll_deregister(ifp); 1506 /* Enable interrupts. */ 1507 VR_LOCK(sc); 1508 CSR_WRITE_2(sc, VR_IMR, VR_INTRS); 1509 ifp->if_capenable &= ~IFCAP_POLLING; 1510 VR_UNLOCK(sc); 1511 return (error); 1512 } 1513 #endif /* DEVICE_POLLING */ 1514 ifp->if_capenable = ifr->ifr_reqcap; 1515 if (ifp->if_capenable & IFCAP_TXCSUM) 1516 ifp->if_hwassist = (CSUM_IP | CSUM_TCP | CSUM_UDP); 1517 else 1518 ifp->if_hwassist = 0; 1519 break; 1520 default: 1521 error = ether_ioctl(ifp, command, data); 1522 break; 1523 } 1524 1525 return (error); 1526 } 1527 1528 static void 1529 vr_watchdog(struct ifnet *ifp) 1530 { 1531 struct vr_softc *sc = ifp->if_softc; 1532 1533 VR_LOCK(sc); 1534 1535 ifp->if_oerrors++; 1536 if_printf(ifp, "watchdog timeout\n"); 1537 1538 vr_stop(sc); 1539 vr_reset(sc); 1540 vr_init_locked(sc); 1541 1542 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1543 vr_start_locked(ifp); 1544 1545 VR_UNLOCK(sc); 1546 } 1547 1548 /* 1549 * Stop the adapter and free any mbufs allocated to the 1550 * RX and TX lists. 1551 */ 1552 static void 1553 vr_stop(struct vr_softc *sc) 1554 { 1555 register int i; 1556 struct ifnet *ifp; 1557 1558 VR_LOCK_ASSERT(sc); 1559 1560 ifp = sc->vr_ifp; 1561 ifp->if_timer = 0; 1562 1563 callout_stop(&sc->vr_stat_callout); 1564 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1565 1566 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP); 1567 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON)); 1568 CSR_WRITE_2(sc, VR_IMR, 0x0000); 1569 CSR_WRITE_4(sc, VR_TXADDR, 0x00000000); 1570 CSR_WRITE_4(sc, VR_RXADDR, 0x00000000); 1571 1572 /* 1573 * Free data in the RX lists. 1574 */ 1575 for (i = 0; i < VR_RX_LIST_CNT; i++) 1576 if (sc->vr_ldata->vr_rx_list[i].vr_mbuf != NULL) 1577 m_freem(sc->vr_ldata->vr_rx_list[i].vr_mbuf); 1578 bzero((char *)&sc->vr_ldata->vr_rx_list, 1579 sizeof(sc->vr_ldata->vr_rx_list)); 1580 1581 /* 1582 * Free the TX list buffers. 1583 */ 1584 for (i = 0; i < VR_TX_LIST_CNT; i++) 1585 if (sc->vr_ldata->vr_tx_list[i].vr_mbuf != NULL) 1586 m_freem(sc->vr_ldata->vr_tx_list[i].vr_mbuf); 1587 bzero((char *)&sc->vr_ldata->vr_tx_list, 1588 sizeof(sc->vr_ldata->vr_tx_list)); 1589 } 1590 1591 /* 1592 * Stop all chip I/O so that the kernel's probe routines don't 1593 * get confused by errant DMAs when rebooting. 1594 */ 1595 static void 1596 vr_shutdown(device_t dev) 1597 { 1598 1599 vr_detach(dev); 1600 } 1601