1 /* 2 * Copyright (C) 2015 Cavium Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include "opt_inet.h" 33 #include "opt_inet6.h" 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/bitset.h> 38 #include <sys/bitstring.h> 39 #include <sys/bus.h> 40 #include <sys/endian.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/mbuf.h> 44 #include <sys/module.h> 45 #include <sys/rman.h> 46 #include <sys/pciio.h> 47 #include <sys/pcpu.h> 48 #include <sys/proc.h> 49 #include <sys/socket.h> 50 #include <sys/sockio.h> 51 #include <sys/stdatomic.h> 52 #include <sys/cpuset.h> 53 #include <sys/lock.h> 54 #include <sys/mutex.h> 55 #include <sys/smp.h> 56 #include <sys/taskqueue.h> 57 58 #include <net/bpf.h> 59 #include <net/ethernet.h> 60 #include <net/if.h> 61 #include <net/if_var.h> 62 #include <net/if_arp.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_types.h> 66 #include <net/if_vlan_var.h> 67 68 #include <netinet/in.h> 69 #include <netinet/ip.h> 70 #include <netinet/if_ether.h> 71 #include <netinet/tcp_lro.h> 72 73 #include <dev/pci/pcireg.h> 74 #include <dev/pci/pcivar.h> 75 76 #include <sys/dnv.h> 77 #include <sys/nv.h> 78 #include <sys/iov_schema.h> 79 80 #include <machine/bus.h> 81 82 #include "thunder_bgx.h" 83 #include "nic_reg.h" 84 #include "nic.h" 85 #include "nicvf_queues.h" 86 87 #define VNIC_VF_DEVSTR "Cavium Thunder NIC Virtual Function Driver" 88 89 #define VNIC_VF_REG_RID PCIR_BAR(PCI_CFG_REG_BAR_NUM) 90 91 /* Lock for core interface settings */ 92 #define NICVF_CORE_LOCK_INIT(nic) \ 93 sx_init(&(nic)->core_sx, device_get_nameunit((nic)->dev)) 94 95 #define NICVF_CORE_LOCK_DESTROY(nic) \ 96 sx_destroy(&(nic)->core_sx) 97 98 #define NICVF_CORE_LOCK(nic) sx_xlock(&(nic)->core_sx) 99 #define NICVF_CORE_UNLOCK(nic) sx_xunlock(&(nic)->core_sx) 100 101 #define NICVF_CORE_LOCK_ASSERT(nic) sx_assert(&(nic)->core_sx, SA_XLOCKED) 102 103 #define SPEED_10 10 104 #define SPEED_100 100 105 #define SPEED_1000 1000 106 #define SPEED_10000 10000 107 #define SPEED_40000 40000 108 109 MALLOC_DEFINE(M_NICVF, "nicvf", "ThunderX VNIC VF dynamic memory"); 110 111 static int nicvf_probe(device_t); 112 static int nicvf_attach(device_t); 113 static int nicvf_detach(device_t); 114 115 static device_method_t nicvf_methods[] = { 116 /* Device interface */ 117 DEVMETHOD(device_probe, nicvf_probe), 118 DEVMETHOD(device_attach, nicvf_attach), 119 DEVMETHOD(device_detach, nicvf_detach), 120 121 DEVMETHOD_END, 122 }; 123 124 static driver_t nicvf_driver = { 125 "vnic", 126 nicvf_methods, 127 sizeof(struct nicvf), 128 }; 129 130 static devclass_t nicvf_devclass; 131 132 DRIVER_MODULE(nicvf, pci, nicvf_driver, nicvf_devclass, 0, 0); 133 MODULE_DEPEND(nicvf, pci, 1, 1, 1); 134 MODULE_DEPEND(nicvf, ether, 1, 1, 1); 135 MODULE_DEPEND(nicvf, vnic_pf, 1, 1, 1); 136 137 static int nicvf_allocate_misc_interrupt(struct nicvf *); 138 static int nicvf_enable_misc_interrupt(struct nicvf *); 139 static int nicvf_allocate_net_interrupts(struct nicvf *); 140 static void nicvf_release_all_interrupts(struct nicvf *); 141 static int nicvf_hw_set_mac_addr(struct nicvf *, uint8_t *); 142 static void nicvf_config_cpi(struct nicvf *); 143 static int nicvf_init_resources(struct nicvf *); 144 145 static int nicvf_setup_ifnet(struct nicvf *); 146 static int nicvf_setup_ifmedia(struct nicvf *); 147 static void nicvf_hw_addr_random(uint8_t *); 148 149 static int nicvf_if_ioctl(struct ifnet *, u_long, caddr_t); 150 static void nicvf_if_init(void *); 151 static void nicvf_if_init_locked(struct nicvf *); 152 static int nicvf_if_transmit(struct ifnet *, struct mbuf *); 153 static void nicvf_if_qflush(struct ifnet *); 154 static uint64_t nicvf_if_getcounter(struct ifnet *, ift_counter); 155 156 static int nicvf_stop_locked(struct nicvf *); 157 158 static void nicvf_media_status(struct ifnet *, struct ifmediareq *); 159 static int nicvf_media_change(struct ifnet *); 160 161 static void nicvf_tick_stats(void *); 162 163 static int 164 nicvf_probe(device_t dev) 165 { 166 uint16_t vendor_id; 167 uint16_t device_id; 168 169 vendor_id = pci_get_vendor(dev); 170 device_id = pci_get_device(dev); 171 172 if (vendor_id != PCI_VENDOR_ID_CAVIUM) 173 return (ENXIO); 174 175 if (device_id == PCI_DEVICE_ID_THUNDER_NIC_VF || 176 device_id == PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF) { 177 device_set_desc(dev, VNIC_VF_DEVSTR); 178 return (BUS_PROBE_DEFAULT); 179 } 180 181 return (ENXIO); 182 } 183 184 static int 185 nicvf_attach(device_t dev) 186 { 187 struct nicvf *nic; 188 int rid, qcount; 189 int err = 0; 190 uint8_t hwaddr[ETHER_ADDR_LEN]; 191 uint8_t zeromac[] = {[0 ... (ETHER_ADDR_LEN - 1)] = 0}; 192 193 nic = device_get_softc(dev); 194 nic->dev = dev; 195 nic->pnicvf = nic; 196 197 NICVF_CORE_LOCK_INIT(nic); 198 /* Enable HW TSO on Pass2 */ 199 if (!pass1_silicon(dev)) 200 nic->hw_tso = TRUE; 201 202 rid = VNIC_VF_REG_RID; 203 nic->reg_base = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 204 RF_ACTIVE); 205 if (nic->reg_base == NULL) { 206 device_printf(dev, "Could not allocate registers memory\n"); 207 return (ENXIO); 208 } 209 210 qcount = MAX_CMP_QUEUES_PER_QS; 211 nic->max_queues = qcount; 212 213 err = nicvf_set_qset_resources(nic); 214 if (err != 0) 215 goto err_free_res; 216 217 /* Check if PF is alive and get MAC address for this VF */ 218 err = nicvf_allocate_misc_interrupt(nic); 219 if (err != 0) 220 goto err_free_res; 221 222 NICVF_CORE_LOCK(nic); 223 err = nicvf_enable_misc_interrupt(nic); 224 NICVF_CORE_UNLOCK(nic); 225 if (err != 0) 226 goto err_release_intr; 227 228 err = nicvf_allocate_net_interrupts(nic); 229 if (err != 0) { 230 device_printf(dev, 231 "Could not allocate network interface interrupts\n"); 232 goto err_free_ifnet; 233 } 234 235 /* If no MAC address was obtained we generate random one */ 236 if (memcmp(nic->hwaddr, zeromac, ETHER_ADDR_LEN) == 0) { 237 nicvf_hw_addr_random(hwaddr); 238 memcpy(nic->hwaddr, hwaddr, ETHER_ADDR_LEN); 239 NICVF_CORE_LOCK(nic); 240 nicvf_hw_set_mac_addr(nic, hwaddr); 241 NICVF_CORE_UNLOCK(nic); 242 } 243 244 /* Configure CPI alorithm */ 245 nic->cpi_alg = CPI_ALG_NONE; 246 NICVF_CORE_LOCK(nic); 247 nicvf_config_cpi(nic); 248 NICVF_CORE_UNLOCK(nic); 249 250 err = nicvf_setup_ifnet(nic); 251 if (err != 0) { 252 device_printf(dev, "Could not set-up ifnet\n"); 253 goto err_release_intr; 254 } 255 256 err = nicvf_setup_ifmedia(nic); 257 if (err != 0) { 258 device_printf(dev, "Could not set-up ifmedia\n"); 259 goto err_free_ifnet; 260 } 261 262 mtx_init(&nic->stats_mtx, "VNIC stats", NULL, MTX_DEF); 263 callout_init_mtx(&nic->stats_callout, &nic->stats_mtx, 0); 264 265 ether_ifattach(nic->ifp, nic->hwaddr); 266 267 return (0); 268 269 err_free_ifnet: 270 if_free(nic->ifp); 271 err_release_intr: 272 nicvf_release_all_interrupts(nic); 273 err_free_res: 274 bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(nic->reg_base), 275 nic->reg_base); 276 277 return (err); 278 } 279 280 static int 281 nicvf_detach(device_t dev) 282 { 283 struct nicvf *nic; 284 285 nic = device_get_softc(dev); 286 287 NICVF_CORE_LOCK(nic); 288 /* Shut down the port and release ring resources */ 289 nicvf_stop_locked(nic); 290 /* Release stats lock */ 291 mtx_destroy(&nic->stats_mtx); 292 /* Release interrupts */ 293 nicvf_release_all_interrupts(nic); 294 /* Release memory resource */ 295 if (nic->reg_base != NULL) { 296 bus_release_resource(dev, SYS_RES_MEMORY, 297 rman_get_rid(nic->reg_base), nic->reg_base); 298 } 299 300 /* Remove all ifmedia configurations */ 301 ifmedia_removeall(&nic->if_media); 302 /* Free this ifnet */ 303 if_free(nic->ifp); 304 NICVF_CORE_UNLOCK(nic); 305 /* Finally destroy the lock */ 306 NICVF_CORE_LOCK_DESTROY(nic); 307 308 return (0); 309 } 310 311 static void 312 nicvf_hw_addr_random(uint8_t *hwaddr) 313 { 314 uint32_t rnd; 315 uint8_t addr[ETHER_ADDR_LEN]; 316 317 /* 318 * Create randomized MAC address. 319 * Set 'bsd' + random 24 low-order bits. 320 */ 321 rnd = arc4random() & 0x00ffffff; 322 addr[0] = 'b'; 323 addr[1] = 's'; 324 addr[2] = 'd'; 325 addr[3] = rnd >> 16; 326 addr[4] = rnd >> 8; 327 addr[5] = rnd >> 0; 328 329 memcpy(hwaddr, addr, ETHER_ADDR_LEN); 330 } 331 332 static int 333 nicvf_setup_ifnet(struct nicvf *nic) 334 { 335 struct ifnet *ifp; 336 337 ifp = if_alloc(IFT_ETHER); 338 if (ifp == NULL) { 339 device_printf(nic->dev, "Could not allocate ifnet structure\n"); 340 return (ENOMEM); 341 } 342 343 nic->ifp = ifp; 344 345 if_setsoftc(ifp, nic); 346 if_initname(ifp, device_get_name(nic->dev), device_get_unit(nic->dev)); 347 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX); 348 349 if_settransmitfn(ifp, nicvf_if_transmit); 350 if_setqflushfn(ifp, nicvf_if_qflush); 351 if_setioctlfn(ifp, nicvf_if_ioctl); 352 if_setinitfn(ifp, nicvf_if_init); 353 if_setgetcounterfn(ifp, nicvf_if_getcounter); 354 355 if_setmtu(ifp, ETHERMTU); 356 357 /* Reset caps */ 358 if_setcapabilities(ifp, 0); 359 360 /* Set the default values */ 361 if_setcapabilitiesbit(ifp, IFCAP_VLAN_MTU, 0); 362 if_setcapabilitiesbit(ifp, IFCAP_LRO, 0); 363 if (nic->hw_tso) { 364 /* TSO */ 365 if_setcapabilitiesbit(ifp, IFCAP_TSO4, 0); 366 /* TSO parameters */ 367 ifp->if_hw_tsomax = NICVF_TSO_MAXSIZE; 368 ifp->if_hw_tsomaxsegcount = NICVF_TSO_NSEGS; 369 ifp->if_hw_tsomaxsegsize = MCLBYTES; 370 } 371 /* IP/TCP/UDP HW checksums */ 372 if_setcapabilitiesbit(ifp, IFCAP_HWCSUM, 0); 373 if_setcapabilitiesbit(ifp, IFCAP_HWSTATS, 0); 374 /* 375 * HW offload enable 376 */ 377 if_clearhwassist(ifp); 378 if_sethwassistbits(ifp, (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_SCTP), 0); 379 if (nic->hw_tso) 380 if_sethwassistbits(ifp, (CSUM_TSO), 0); 381 if_setcapenable(ifp, if_getcapabilities(ifp)); 382 383 return (0); 384 } 385 386 static int 387 nicvf_setup_ifmedia(struct nicvf *nic) 388 { 389 390 ifmedia_init(&nic->if_media, IFM_IMASK, nicvf_media_change, 391 nicvf_media_status); 392 393 /* 394 * Advertise availability of all possible connection types, 395 * even though not all are possible at the same time. 396 */ 397 398 ifmedia_add(&nic->if_media, (IFM_ETHER | IFM_10_T | IFM_FDX), 399 0, NULL); 400 ifmedia_add(&nic->if_media, (IFM_ETHER | IFM_100_TX | IFM_FDX), 401 0, NULL); 402 ifmedia_add(&nic->if_media, (IFM_ETHER | IFM_1000_T | IFM_FDX), 403 0, NULL); 404 ifmedia_add(&nic->if_media, (IFM_ETHER | IFM_10G_SR | IFM_FDX), 405 0, NULL); 406 ifmedia_add(&nic->if_media, (IFM_ETHER | IFM_40G_CR4 | IFM_FDX), 407 0, NULL); 408 ifmedia_add(&nic->if_media, (IFM_ETHER | IFM_AUTO | IFM_FDX), 409 0, NULL); 410 411 ifmedia_set(&nic->if_media, (IFM_ETHER | IFM_AUTO | IFM_FDX)); 412 413 return (0); 414 } 415 416 static int 417 nicvf_if_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 418 { 419 struct nicvf *nic; 420 struct rcv_queue *rq; 421 struct ifreq *ifr; 422 uint32_t flags; 423 int mask, err; 424 int rq_idx; 425 #if defined(INET) || defined(INET6) 426 struct ifaddr *ifa; 427 boolean_t avoid_reset = FALSE; 428 #endif 429 430 nic = if_getsoftc(ifp); 431 ifr = (struct ifreq *)data; 432 #if defined(INET) || defined(INET6) 433 ifa = (struct ifaddr *)data; 434 #endif 435 err = 0; 436 switch (cmd) { 437 case SIOCSIFADDR: 438 #ifdef INET 439 if (ifa->ifa_addr->sa_family == AF_INET) 440 avoid_reset = TRUE; 441 #endif 442 #ifdef INET6 443 if (ifa->ifa_addr->sa_family == AF_INET6) 444 avoid_reset = TRUE; 445 #endif 446 447 #if defined(INET) || defined(INET6) 448 /* Avoid reinitialization unless it's necessary */ 449 if (avoid_reset) { 450 ifp->if_flags |= IFF_UP; 451 if (!(if_getdrvflags(ifp) & IFF_DRV_RUNNING)) 452 nicvf_if_init(nic); 453 #ifdef INET 454 if (!(if_getflags(ifp) & IFF_NOARP)) 455 arp_ifinit(ifp, ifa); 456 #endif 457 458 return (0); 459 } 460 #endif 461 err = ether_ioctl(ifp, cmd, data); 462 break; 463 case SIOCSIFMTU: 464 /* 465 * ARM64TODO: Needs to be implemented. 466 * Currently ETHERMTU is set by default. 467 */ 468 err = ether_ioctl(ifp, cmd, data); 469 break; 470 case SIOCSIFFLAGS: 471 NICVF_CORE_LOCK(nic); 472 if (if_getflags(ifp) & IFF_UP) { 473 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) { 474 flags = ifp->if_flags ^ nic->if_flags; 475 if ((nic->if_flags & ifp->if_flags) & 476 IFF_PROMISC) { 477 /* Change promiscous mode */ 478 #if 0 479 /* ARM64TODO */ 480 nicvf_set_promiscous(nic); 481 #endif 482 } 483 484 if ((nic->if_flags ^ ifp->if_flags) & 485 IFF_ALLMULTI) { 486 /* Change multicasting settings */ 487 #if 0 488 /* ARM64TODO */ 489 nicvf_set_multicast(nic); 490 #endif 491 } 492 } else { 493 nicvf_if_init_locked(nic); 494 } 495 } else if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 496 nicvf_stop_locked(nic); 497 498 nic->if_flags = ifp->if_flags; 499 NICVF_CORE_UNLOCK(nic); 500 break; 501 502 case SIOCADDMULTI: 503 case SIOCDELMULTI: 504 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) { 505 #if 0 506 NICVF_CORE_LOCK(nic); 507 /* ARM64TODO */ 508 nicvf_set_multicast(nic); 509 NICVF_CORE_UNLOCK(nic); 510 #endif 511 } 512 break; 513 514 case SIOCSIFMEDIA: 515 case SIOCGIFMEDIA: 516 err = ifmedia_ioctl(ifp, ifr, &nic->if_media, cmd); 517 break; 518 519 case SIOCSIFCAP: 520 mask = ifp->if_capenable ^ ifr->ifr_reqcap; 521 if (mask & IFCAP_VLAN_MTU) { 522 /* No work to do except acknowledge the change took. */ 523 ifp->if_capenable ^= IFCAP_VLAN_MTU; 524 } 525 if (mask & IFCAP_TXCSUM) 526 ifp->if_capenable ^= IFCAP_TXCSUM; 527 if (mask & IFCAP_RXCSUM) 528 ifp->if_capenable ^= IFCAP_RXCSUM; 529 if ((mask & IFCAP_TSO4) && nic->hw_tso) 530 ifp->if_capenable ^= IFCAP_TSO4; 531 if (mask & IFCAP_LRO) { 532 /* 533 * Lock the driver for a moment to avoid 534 * mismatch in per-queue settings. 535 */ 536 NICVF_CORE_LOCK(nic); 537 ifp->if_capenable ^= IFCAP_LRO; 538 if ((if_getdrvflags(nic->ifp) & IFF_DRV_RUNNING) != 0) { 539 /* 540 * Now disable LRO for subsequent packets. 541 * Atomicity of this change is not necessary 542 * as we don't need precise toggle of this 543 * feature for all threads processing the 544 * completion queue. 545 */ 546 for (rq_idx = 0; 547 rq_idx < nic->qs->rq_cnt; rq_idx++) { 548 rq = &nic->qs->rq[rq_idx]; 549 rq->lro_enabled = !rq->lro_enabled; 550 } 551 } 552 NICVF_CORE_UNLOCK(nic); 553 } 554 555 break; 556 557 default: 558 err = ether_ioctl(ifp, cmd, data); 559 break; 560 } 561 562 return (err); 563 } 564 565 static void 566 nicvf_if_init_locked(struct nicvf *nic) 567 { 568 struct queue_set *qs = nic->qs; 569 struct ifnet *ifp; 570 int qidx; 571 int err; 572 caddr_t if_addr; 573 574 NICVF_CORE_LOCK_ASSERT(nic); 575 ifp = nic->ifp; 576 577 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) 578 nicvf_stop_locked(nic); 579 580 err = nicvf_enable_misc_interrupt(nic); 581 if (err != 0) { 582 if_printf(ifp, "Could not reenable Mbox interrupt\n"); 583 return; 584 } 585 586 /* Get the latest MAC address */ 587 if_addr = if_getlladdr(ifp); 588 /* Update MAC address if changed */ 589 if (memcmp(nic->hwaddr, if_addr, ETHER_ADDR_LEN) != 0) { 590 memcpy(nic->hwaddr, if_addr, ETHER_ADDR_LEN); 591 nicvf_hw_set_mac_addr(nic, if_addr); 592 } 593 594 /* Initialize the queues */ 595 err = nicvf_init_resources(nic); 596 if (err != 0) 597 goto error; 598 599 /* Make sure queue initialization is written */ 600 wmb(); 601 602 nicvf_reg_write(nic, NIC_VF_INT, ~0UL); 603 /* Enable Qset err interrupt */ 604 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0); 605 606 /* Enable completion queue interrupt */ 607 for (qidx = 0; qidx < qs->cq_cnt; qidx++) 608 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx); 609 610 /* Enable RBDR threshold interrupt */ 611 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) 612 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx); 613 614 nic->drv_stats.txq_stop = 0; 615 nic->drv_stats.txq_wake = 0; 616 617 /* Activate network interface */ 618 if_setdrvflagbits(ifp, IFF_DRV_RUNNING, IFF_DRV_OACTIVE); 619 620 /* Schedule callout to update stats */ 621 callout_reset(&nic->stats_callout, hz, nicvf_tick_stats, nic); 622 623 return; 624 625 error: 626 /* Something went very wrong. Disable this ifnet for good */ 627 if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); 628 } 629 630 static void 631 nicvf_if_init(void *if_softc) 632 { 633 struct nicvf *nic = if_softc; 634 635 NICVF_CORE_LOCK(nic); 636 nicvf_if_init_locked(nic); 637 NICVF_CORE_UNLOCK(nic); 638 } 639 640 static int 641 nicvf_if_transmit(struct ifnet *ifp, struct mbuf *mbuf) 642 { 643 struct nicvf *nic = if_getsoftc(ifp); 644 struct queue_set *qs = nic->qs; 645 struct snd_queue *sq; 646 struct mbuf *mtmp; 647 int qidx; 648 int err = 0; 649 650 651 if (__predict_false(qs == NULL)) { 652 panic("%s: missing queue set for %s", __func__, 653 device_get_nameunit(nic->dev)); 654 } 655 656 /* Select queue */ 657 if (M_HASHTYPE_GET(mbuf) != M_HASHTYPE_NONE) 658 qidx = mbuf->m_pkthdr.flowid % qs->sq_cnt; 659 else 660 qidx = curcpu % qs->sq_cnt; 661 662 sq = &qs->sq[qidx]; 663 664 if (mbuf->m_next != NULL && 665 (mbuf->m_pkthdr.csum_flags & 666 (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_SCTP)) != 0) { 667 if (M_WRITABLE(mbuf) == 0) { 668 mtmp = m_dup(mbuf, M_NOWAIT); 669 m_freem(mbuf); 670 if (mtmp == NULL) 671 return (ENOBUFS); 672 mbuf = mtmp; 673 } 674 } 675 676 err = drbr_enqueue(ifp, sq->br, mbuf); 677 if (((if_getdrvflags(ifp) & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 678 IFF_DRV_RUNNING) || !nic->link_up || (err != 0)) { 679 /* 680 * Try to enqueue packet to the ring buffer. 681 * If the driver is not active, link down or enqueue operation 682 * failed, return with the appropriate error code. 683 */ 684 return (err); 685 } 686 687 if (NICVF_TX_TRYLOCK(sq) != 0) { 688 err = nicvf_xmit_locked(sq); 689 NICVF_TX_UNLOCK(sq); 690 return (err); 691 } else 692 taskqueue_enqueue(sq->snd_taskq, &sq->snd_task); 693 694 return (0); 695 } 696 697 static void 698 nicvf_if_qflush(struct ifnet *ifp) 699 { 700 struct nicvf *nic; 701 struct queue_set *qs; 702 struct snd_queue *sq; 703 struct mbuf *mbuf; 704 size_t idx; 705 706 nic = if_getsoftc(ifp); 707 qs = nic->qs; 708 709 for (idx = 0; idx < qs->sq_cnt; idx++) { 710 sq = &qs->sq[idx]; 711 NICVF_TX_LOCK(sq); 712 while ((mbuf = buf_ring_dequeue_sc(sq->br)) != NULL) 713 m_freem(mbuf); 714 NICVF_TX_UNLOCK(sq); 715 } 716 if_qflush(ifp); 717 } 718 719 static uint64_t 720 nicvf_if_getcounter(struct ifnet *ifp, ift_counter cnt) 721 { 722 struct nicvf *nic; 723 struct nicvf_hw_stats *hw_stats; 724 struct nicvf_drv_stats *drv_stats; 725 726 nic = if_getsoftc(ifp); 727 hw_stats = &nic->hw_stats; 728 drv_stats = &nic->drv_stats; 729 730 switch (cnt) { 731 case IFCOUNTER_IPACKETS: 732 return (drv_stats->rx_frames_ok); 733 case IFCOUNTER_OPACKETS: 734 return (drv_stats->tx_frames_ok); 735 case IFCOUNTER_IBYTES: 736 return (hw_stats->rx_bytes); 737 case IFCOUNTER_OBYTES: 738 return (hw_stats->tx_bytes_ok); 739 case IFCOUNTER_IMCASTS: 740 return (hw_stats->rx_mcast_frames); 741 case IFCOUNTER_COLLISIONS: 742 return (0); 743 case IFCOUNTER_IQDROPS: 744 return (drv_stats->rx_drops); 745 case IFCOUNTER_OQDROPS: 746 return (drv_stats->tx_drops); 747 default: 748 return (if_get_counter_default(ifp, cnt)); 749 } 750 751 } 752 753 static void 754 nicvf_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 755 { 756 struct nicvf *nic = if_getsoftc(ifp); 757 758 NICVF_CORE_LOCK(nic); 759 760 ifmr->ifm_status = IFM_AVALID; 761 ifmr->ifm_active = IFM_ETHER; 762 763 if (nic->link_up) { 764 /* Device attached to working network */ 765 ifmr->ifm_status |= IFM_ACTIVE; 766 } 767 768 switch (nic->speed) { 769 case SPEED_10: 770 ifmr->ifm_active |= IFM_10_T; 771 break; 772 case SPEED_100: 773 ifmr->ifm_active |= IFM_100_TX; 774 break; 775 case SPEED_1000: 776 ifmr->ifm_active |= IFM_1000_T; 777 break; 778 case SPEED_10000: 779 ifmr->ifm_active |= IFM_10G_SR; 780 break; 781 case SPEED_40000: 782 ifmr->ifm_active |= IFM_40G_CR4; 783 break; 784 default: 785 ifmr->ifm_active |= IFM_AUTO; 786 break; 787 } 788 789 if (nic->duplex) 790 ifmr->ifm_active |= IFM_FDX; 791 else 792 ifmr->ifm_active |= IFM_HDX; 793 794 NICVF_CORE_UNLOCK(nic); 795 } 796 797 static int 798 nicvf_media_change(struct ifnet *ifp __unused) 799 { 800 801 return (0); 802 } 803 804 /* Register read/write APIs */ 805 void 806 nicvf_reg_write(struct nicvf *nic, bus_space_handle_t offset, uint64_t val) 807 { 808 809 bus_write_8(nic->reg_base, offset, val); 810 } 811 812 uint64_t 813 nicvf_reg_read(struct nicvf *nic, uint64_t offset) 814 { 815 816 return (bus_read_8(nic->reg_base, offset)); 817 } 818 819 void 820 nicvf_queue_reg_write(struct nicvf *nic, bus_space_handle_t offset, 821 uint64_t qidx, uint64_t val) 822 { 823 824 bus_write_8(nic->reg_base, offset + (qidx << NIC_Q_NUM_SHIFT), val); 825 } 826 827 uint64_t 828 nicvf_queue_reg_read(struct nicvf *nic, bus_space_handle_t offset, 829 uint64_t qidx) 830 { 831 832 return (bus_read_8(nic->reg_base, offset + (qidx << NIC_Q_NUM_SHIFT))); 833 } 834 835 /* VF -> PF mailbox communication */ 836 static void 837 nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx) 838 { 839 uint64_t *msg = (uint64_t *)mbx; 840 841 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]); 842 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]); 843 } 844 845 int 846 nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx) 847 { 848 int timeout = NIC_MBOX_MSG_TIMEOUT * 10; 849 int sleep = 2; 850 851 NICVF_CORE_LOCK_ASSERT(nic); 852 853 nic->pf_acked = FALSE; 854 nic->pf_nacked = FALSE; 855 856 nicvf_write_to_mbx(nic, mbx); 857 858 /* Wait for previous message to be acked, timeout 2sec */ 859 while (!nic->pf_acked) { 860 if (nic->pf_nacked) 861 return (EINVAL); 862 863 DELAY(sleep * 1000); 864 865 if (nic->pf_acked) 866 break; 867 timeout -= sleep; 868 if (!timeout) { 869 device_printf(nic->dev, 870 "PF didn't ack to mbox msg %d from VF%d\n", 871 (mbx->msg.msg & 0xFF), nic->vf_id); 872 873 return (EBUSY); 874 } 875 } 876 return (0); 877 } 878 879 /* 880 * Checks if VF is able to comminicate with PF 881 * and also gets the VNIC number this VF is associated to. 882 */ 883 static int 884 nicvf_check_pf_ready(struct nicvf *nic) 885 { 886 union nic_mbx mbx = {}; 887 888 mbx.msg.msg = NIC_MBOX_MSG_READY; 889 if (nicvf_send_msg_to_pf(nic, &mbx)) { 890 device_printf(nic->dev, 891 "PF didn't respond to READY msg\n"); 892 return 0; 893 } 894 895 return 1; 896 } 897 898 static void 899 nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx) 900 { 901 902 if (bgx->rx) 903 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats; 904 else 905 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats; 906 } 907 908 static void 909 nicvf_handle_mbx_intr(struct nicvf *nic) 910 { 911 union nic_mbx mbx = {}; 912 uint64_t *mbx_data; 913 uint64_t mbx_addr; 914 int i; 915 916 mbx_addr = NIC_VF_PF_MAILBOX_0_1; 917 mbx_data = (uint64_t *)&mbx; 918 919 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) { 920 *mbx_data = nicvf_reg_read(nic, mbx_addr); 921 mbx_data++; 922 mbx_addr += sizeof(uint64_t); 923 } 924 925 switch (mbx.msg.msg) { 926 case NIC_MBOX_MSG_READY: 927 nic->pf_acked = TRUE; 928 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F; 929 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F; 930 nic->node = mbx.nic_cfg.node_id; 931 memcpy(nic->hwaddr, mbx.nic_cfg.mac_addr, ETHER_ADDR_LEN); 932 nic->loopback_supported = mbx.nic_cfg.loopback_supported; 933 nic->link_up = FALSE; 934 nic->duplex = 0; 935 nic->speed = 0; 936 break; 937 case NIC_MBOX_MSG_ACK: 938 nic->pf_acked = TRUE; 939 break; 940 case NIC_MBOX_MSG_NACK: 941 nic->pf_nacked = TRUE; 942 break; 943 case NIC_MBOX_MSG_BGX_STATS: 944 nicvf_read_bgx_stats(nic, &mbx.bgx_stats); 945 nic->pf_acked = TRUE; 946 break; 947 case NIC_MBOX_MSG_BGX_LINK_CHANGE: 948 nic->pf_acked = TRUE; 949 nic->link_up = mbx.link_status.link_up; 950 nic->duplex = mbx.link_status.duplex; 951 nic->speed = mbx.link_status.speed; 952 if (nic->link_up) { 953 if_setbaudrate(nic->ifp, nic->speed * 1000000); 954 if_link_state_change(nic->ifp, LINK_STATE_UP); 955 } else { 956 if_setbaudrate(nic->ifp, 0); 957 if_link_state_change(nic->ifp, LINK_STATE_DOWN); 958 } 959 break; 960 default: 961 device_printf(nic->dev, 962 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg); 963 break; 964 } 965 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0); 966 } 967 968 static int 969 nicvf_hw_set_mac_addr(struct nicvf *nic, uint8_t *hwaddr) 970 { 971 union nic_mbx mbx = {}; 972 973 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC; 974 mbx.mac.vf_id = nic->vf_id; 975 memcpy(mbx.mac.mac_addr, hwaddr, ETHER_ADDR_LEN); 976 977 return (nicvf_send_msg_to_pf(nic, &mbx)); 978 } 979 980 static void 981 nicvf_config_cpi(struct nicvf *nic) 982 { 983 union nic_mbx mbx = {}; 984 985 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG; 986 mbx.cpi_cfg.vf_id = nic->vf_id; 987 mbx.cpi_cfg.cpi_alg = nic->cpi_alg; 988 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt; 989 990 nicvf_send_msg_to_pf(nic, &mbx); 991 } 992 993 static int 994 nicvf_init_resources(struct nicvf *nic) 995 { 996 int err; 997 union nic_mbx mbx = {}; 998 999 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE; 1000 1001 /* Enable Qset */ 1002 nicvf_qset_config(nic, TRUE); 1003 1004 /* Initialize queues and HW for data transfer */ 1005 err = nicvf_config_data_transfer(nic, TRUE); 1006 if (err) { 1007 device_printf(nic->dev, 1008 "Failed to alloc/config VF's QSet resources\n"); 1009 return (err); 1010 } 1011 1012 /* Send VF config done msg to PF */ 1013 nicvf_write_to_mbx(nic, &mbx); 1014 1015 return (0); 1016 } 1017 1018 static void 1019 nicvf_misc_intr_handler(void *arg) 1020 { 1021 struct nicvf *nic = (struct nicvf *)arg; 1022 uint64_t intr; 1023 1024 intr = nicvf_reg_read(nic, NIC_VF_INT); 1025 /* Check for spurious interrupt */ 1026 if (!(intr & NICVF_INTR_MBOX_MASK)) 1027 return; 1028 1029 nicvf_handle_mbx_intr(nic); 1030 } 1031 1032 static int 1033 nicvf_intr_handler(void *arg) 1034 { 1035 struct nicvf *nic; 1036 struct cmp_queue *cq; 1037 int qidx; 1038 1039 cq = (struct cmp_queue *)arg; 1040 nic = cq->nic; 1041 qidx = cq->idx; 1042 1043 /* Disable interrupts */ 1044 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx); 1045 1046 taskqueue_enqueue(cq->cmp_taskq, &cq->cmp_task); 1047 1048 /* Clear interrupt */ 1049 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx); 1050 1051 return (FILTER_HANDLED); 1052 } 1053 1054 static void 1055 nicvf_rbdr_intr_handler(void *arg) 1056 { 1057 struct nicvf *nic; 1058 struct queue_set *qs; 1059 struct rbdr *rbdr; 1060 int qidx; 1061 1062 nic = (struct nicvf *)arg; 1063 1064 /* Disable RBDR interrupt and schedule softirq */ 1065 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) { 1066 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx)) 1067 continue; 1068 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx); 1069 1070 qs = nic->qs; 1071 rbdr = &qs->rbdr[qidx]; 1072 taskqueue_enqueue(rbdr->rbdr_taskq, &rbdr->rbdr_task_nowait); 1073 /* Clear interrupt */ 1074 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx); 1075 } 1076 } 1077 1078 static void 1079 nicvf_qs_err_intr_handler(void *arg) 1080 { 1081 struct nicvf *nic = (struct nicvf *)arg; 1082 struct queue_set *qs = nic->qs; 1083 1084 /* Disable Qset err interrupt and schedule softirq */ 1085 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0); 1086 taskqueue_enqueue(qs->qs_err_taskq, &qs->qs_err_task); 1087 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0); 1088 1089 } 1090 1091 static int 1092 nicvf_enable_msix(struct nicvf *nic) 1093 { 1094 struct pci_devinfo *dinfo; 1095 int rid, count; 1096 int ret; 1097 1098 dinfo = device_get_ivars(nic->dev); 1099 rid = dinfo->cfg.msix.msix_table_bar; 1100 nic->msix_table_res = 1101 bus_alloc_resource_any(nic->dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 1102 if (nic->msix_table_res == NULL) { 1103 device_printf(nic->dev, 1104 "Could not allocate memory for MSI-X table\n"); 1105 return (ENXIO); 1106 } 1107 1108 count = nic->num_vec = NIC_VF_MSIX_VECTORS; 1109 1110 ret = pci_alloc_msix(nic->dev, &count); 1111 if ((ret != 0) || (count != nic->num_vec)) { 1112 device_printf(nic->dev, 1113 "Request for #%d msix vectors failed, error: %d\n", 1114 nic->num_vec, ret); 1115 return (ret); 1116 } 1117 1118 nic->msix_enabled = 1; 1119 return (0); 1120 } 1121 1122 static void 1123 nicvf_disable_msix(struct nicvf *nic) 1124 { 1125 1126 if (nic->msix_enabled) { 1127 pci_release_msi(nic->dev); 1128 nic->msix_enabled = 0; 1129 nic->num_vec = 0; 1130 } 1131 } 1132 1133 static void 1134 nicvf_release_all_interrupts(struct nicvf *nic) 1135 { 1136 struct resource *res; 1137 int irq; 1138 int err; 1139 1140 /* Free registered interrupts */ 1141 for (irq = 0; irq < nic->num_vec; irq++) { 1142 res = nic->msix_entries[irq].irq_res; 1143 if (res == NULL) 1144 continue; 1145 /* Teardown interrupt first */ 1146 if (nic->msix_entries[irq].handle != NULL) { 1147 err = bus_teardown_intr(nic->dev, 1148 nic->msix_entries[irq].irq_res, 1149 nic->msix_entries[irq].handle); 1150 KASSERT(err == 0, 1151 ("ERROR: Unable to teardown interrupt %d", irq)); 1152 nic->msix_entries[irq].handle = NULL; 1153 } 1154 1155 bus_release_resource(nic->dev, SYS_RES_IRQ, 1156 rman_get_rid(res), nic->msix_entries[irq].irq_res); 1157 nic->msix_entries[irq].irq_res = NULL; 1158 } 1159 /* Disable MSI-X */ 1160 nicvf_disable_msix(nic); 1161 } 1162 1163 /* 1164 * Initialize MSIX vectors and register MISC interrupt. 1165 * Send READY message to PF to check if its alive 1166 */ 1167 static int 1168 nicvf_allocate_misc_interrupt(struct nicvf *nic) 1169 { 1170 struct resource *res; 1171 int irq, rid; 1172 int ret = 0; 1173 1174 /* Return if mailbox interrupt is already registered */ 1175 if (nic->msix_enabled) 1176 return (0); 1177 1178 /* Enable MSI-X */ 1179 if (nicvf_enable_msix(nic) != 0) 1180 return (ENXIO); 1181 1182 irq = NICVF_INTR_ID_MISC; 1183 rid = irq + 1; 1184 nic->msix_entries[irq].irq_res = bus_alloc_resource_any(nic->dev, 1185 SYS_RES_IRQ, &rid, (RF_SHAREABLE | RF_ACTIVE)); 1186 if (nic->msix_entries[irq].irq_res == NULL) { 1187 device_printf(nic->dev, 1188 "Could not allocate Mbox interrupt for VF%d\n", 1189 device_get_unit(nic->dev)); 1190 return (ENXIO); 1191 } 1192 1193 ret = bus_setup_intr(nic->dev, nic->msix_entries[irq].irq_res, 1194 (INTR_MPSAFE | INTR_TYPE_MISC), NULL, nicvf_misc_intr_handler, nic, 1195 &nic->msix_entries[irq].handle); 1196 if (ret != 0) { 1197 res = nic->msix_entries[irq].irq_res; 1198 bus_release_resource(nic->dev, SYS_RES_IRQ, 1199 rman_get_rid(res), res); 1200 nic->msix_entries[irq].irq_res = NULL; 1201 return (ret); 1202 } 1203 1204 return (0); 1205 } 1206 1207 static int 1208 nicvf_enable_misc_interrupt(struct nicvf *nic) 1209 { 1210 1211 /* Enable mailbox interrupt */ 1212 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0); 1213 1214 /* Check if VF is able to communicate with PF */ 1215 if (!nicvf_check_pf_ready(nic)) { 1216 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0); 1217 return (ENXIO); 1218 } 1219 1220 return (0); 1221 } 1222 1223 static void 1224 nicvf_release_net_interrupts(struct nicvf *nic) 1225 { 1226 struct resource *res; 1227 int irq; 1228 int err; 1229 1230 for_each_cq_irq(irq) { 1231 res = nic->msix_entries[irq].irq_res; 1232 if (res == NULL) 1233 continue; 1234 /* Teardown active interrupts first */ 1235 if (nic->msix_entries[irq].handle != NULL) { 1236 err = bus_teardown_intr(nic->dev, 1237 nic->msix_entries[irq].irq_res, 1238 nic->msix_entries[irq].handle); 1239 KASSERT(err == 0, 1240 ("ERROR: Unable to teardown CQ interrupt %d", 1241 (irq - NICVF_INTR_ID_CQ))); 1242 if (err != 0) 1243 continue; 1244 } 1245 1246 /* Release resource */ 1247 bus_release_resource(nic->dev, SYS_RES_IRQ, rman_get_rid(res), 1248 res); 1249 nic->msix_entries[irq].irq_res = NULL; 1250 } 1251 1252 for_each_rbdr_irq(irq) { 1253 res = nic->msix_entries[irq].irq_res; 1254 if (res == NULL) 1255 continue; 1256 /* Teardown active interrupts first */ 1257 if (nic->msix_entries[irq].handle != NULL) { 1258 err = bus_teardown_intr(nic->dev, 1259 nic->msix_entries[irq].irq_res, 1260 nic->msix_entries[irq].handle); 1261 KASSERT(err == 0, 1262 ("ERROR: Unable to teardown RDBR interrupt %d", 1263 (irq - NICVF_INTR_ID_RBDR))); 1264 if (err != 0) 1265 continue; 1266 } 1267 1268 /* Release resource */ 1269 bus_release_resource(nic->dev, SYS_RES_IRQ, rman_get_rid(res), 1270 res); 1271 nic->msix_entries[irq].irq_res = NULL; 1272 } 1273 1274 irq = NICVF_INTR_ID_QS_ERR; 1275 res = nic->msix_entries[irq].irq_res; 1276 if (res != NULL) { 1277 /* Teardown active interrupts first */ 1278 if (nic->msix_entries[irq].handle != NULL) { 1279 err = bus_teardown_intr(nic->dev, 1280 nic->msix_entries[irq].irq_res, 1281 nic->msix_entries[irq].handle); 1282 KASSERT(err == 0, 1283 ("ERROR: Unable to teardown QS Error interrupt %d", 1284 irq)); 1285 if (err != 0) 1286 return; 1287 } 1288 1289 /* Release resource */ 1290 bus_release_resource(nic->dev, SYS_RES_IRQ, rman_get_rid(res), 1291 res); 1292 nic->msix_entries[irq].irq_res = NULL; 1293 } 1294 } 1295 1296 static int 1297 nicvf_allocate_net_interrupts(struct nicvf *nic) 1298 { 1299 int irq, rid; 1300 int qidx; 1301 int ret = 0; 1302 1303 /* MSI-X must be configured by now */ 1304 if (!nic->msix_enabled) { 1305 device_printf(nic->dev, "Cannot alloacte queue interrups. " 1306 "MSI-X interrupts disabled.\n"); 1307 return (ENXIO); 1308 } 1309 1310 /* Register CQ interrupts */ 1311 for_each_cq_irq(irq) { 1312 if (irq >= (NICVF_INTR_ID_CQ + nic->qs->cq_cnt)) 1313 break; 1314 1315 qidx = irq - NICVF_INTR_ID_CQ; 1316 rid = irq + 1; 1317 nic->msix_entries[irq].irq_res = bus_alloc_resource_any(nic->dev, 1318 SYS_RES_IRQ, &rid, (RF_SHAREABLE | RF_ACTIVE)); 1319 if (nic->msix_entries[irq].irq_res == NULL) { 1320 device_printf(nic->dev, 1321 "Could not allocate CQ interrupt %d for VF%d\n", 1322 (irq - NICVF_INTR_ID_CQ), device_get_unit(nic->dev)); 1323 ret = ENXIO; 1324 goto error; 1325 } 1326 ret = bus_setup_intr(nic->dev, nic->msix_entries[irq].irq_res, 1327 (INTR_MPSAFE | INTR_TYPE_NET), nicvf_intr_handler, 1328 NULL, &nic->qs->cq[qidx], &nic->msix_entries[irq].handle); 1329 if (ret != 0) { 1330 device_printf(nic->dev, 1331 "Could not setup CQ interrupt %d for VF%d\n", 1332 (irq - NICVF_INTR_ID_CQ), device_get_unit(nic->dev)); 1333 goto error; 1334 } 1335 } 1336 1337 /* Register RBDR interrupt */ 1338 for_each_rbdr_irq(irq) { 1339 if (irq >= (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt)) 1340 break; 1341 1342 rid = irq + 1; 1343 nic->msix_entries[irq].irq_res = bus_alloc_resource_any(nic->dev, 1344 SYS_RES_IRQ, &rid, (RF_SHAREABLE | RF_ACTIVE)); 1345 if (nic->msix_entries[irq].irq_res == NULL) { 1346 device_printf(nic->dev, 1347 "Could not allocate RBDR interrupt %d for VF%d\n", 1348 (irq - NICVF_INTR_ID_RBDR), 1349 device_get_unit(nic->dev)); 1350 ret = ENXIO; 1351 goto error; 1352 } 1353 ret = bus_setup_intr(nic->dev, nic->msix_entries[irq].irq_res, 1354 (INTR_MPSAFE | INTR_TYPE_NET), NULL, 1355 nicvf_rbdr_intr_handler, nic, 1356 &nic->msix_entries[irq].handle); 1357 if (ret != 0) { 1358 device_printf(nic->dev, 1359 "Could not setup RBDR interrupt %d for VF%d\n", 1360 (irq - NICVF_INTR_ID_RBDR), 1361 device_get_unit(nic->dev)); 1362 goto error; 1363 } 1364 } 1365 1366 /* Register QS error interrupt */ 1367 irq = NICVF_INTR_ID_QS_ERR; 1368 rid = irq + 1; 1369 nic->msix_entries[irq].irq_res = bus_alloc_resource_any(nic->dev, 1370 SYS_RES_IRQ, &rid, (RF_SHAREABLE | RF_ACTIVE)); 1371 if (nic->msix_entries[irq].irq_res == NULL) { 1372 device_printf(nic->dev, 1373 "Could not allocate QS Error interrupt for VF%d\n", 1374 device_get_unit(nic->dev)); 1375 ret = ENXIO; 1376 goto error; 1377 } 1378 ret = bus_setup_intr(nic->dev, nic->msix_entries[irq].irq_res, 1379 (INTR_MPSAFE | INTR_TYPE_NET), NULL, nicvf_qs_err_intr_handler, 1380 nic, &nic->msix_entries[irq].handle); 1381 if (ret != 0) { 1382 device_printf(nic->dev, 1383 "Could not setup QS Error interrupt for VF%d\n", 1384 device_get_unit(nic->dev)); 1385 goto error; 1386 } 1387 1388 return (0); 1389 error: 1390 nicvf_release_net_interrupts(nic); 1391 return (ret); 1392 } 1393 1394 static int 1395 nicvf_stop_locked(struct nicvf *nic) 1396 { 1397 struct ifnet *ifp; 1398 int qidx; 1399 struct queue_set *qs = nic->qs; 1400 union nic_mbx mbx = {}; 1401 1402 NICVF_CORE_LOCK_ASSERT(nic); 1403 /* Stop callout. Can block here since holding SX lock */ 1404 callout_drain(&nic->stats_callout); 1405 1406 ifp = nic->ifp; 1407 1408 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN; 1409 nicvf_send_msg_to_pf(nic, &mbx); 1410 1411 /* Disable RBDR & QS error interrupts */ 1412 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) { 1413 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx); 1414 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx); 1415 } 1416 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0); 1417 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0); 1418 1419 /* Deactivate network interface */ 1420 if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); 1421 1422 /* Free resources */ 1423 nicvf_config_data_transfer(nic, FALSE); 1424 1425 /* Disable HW Qset */ 1426 nicvf_qset_config(nic, FALSE); 1427 1428 /* disable mailbox interrupt */ 1429 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0); 1430 1431 return (0); 1432 } 1433 1434 static void 1435 nicvf_update_stats(struct nicvf *nic) 1436 { 1437 int qidx; 1438 struct nicvf_hw_stats *stats = &nic->hw_stats; 1439 struct nicvf_drv_stats *drv_stats = &nic->drv_stats; 1440 struct queue_set *qs = nic->qs; 1441 1442 #define GET_RX_STATS(reg) \ 1443 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | ((reg) << 3)) 1444 #define GET_TX_STATS(reg) \ 1445 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | ((reg) << 3)) 1446 1447 stats->rx_bytes = GET_RX_STATS(RX_OCTS); 1448 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST); 1449 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST); 1450 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST); 1451 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS); 1452 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR); 1453 stats->rx_drop_red = GET_RX_STATS(RX_RED); 1454 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS); 1455 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN); 1456 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS); 1457 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST); 1458 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST); 1459 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST); 1460 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST); 1461 1462 stats->tx_bytes_ok = GET_TX_STATS(TX_OCTS); 1463 stats->tx_ucast_frames_ok = GET_TX_STATS(TX_UCAST); 1464 stats->tx_bcast_frames_ok = GET_TX_STATS(TX_BCAST); 1465 stats->tx_mcast_frames_ok = GET_TX_STATS(TX_MCAST); 1466 stats->tx_drops = GET_TX_STATS(TX_DROP); 1467 1468 drv_stats->tx_frames_ok = stats->tx_ucast_frames_ok + 1469 stats->tx_bcast_frames_ok + stats->tx_mcast_frames_ok; 1470 drv_stats->rx_drops = stats->rx_drop_red + stats->rx_drop_overrun; 1471 drv_stats->tx_drops = stats->tx_drops; 1472 1473 /* Update RQ and SQ stats */ 1474 for (qidx = 0; qidx < qs->rq_cnt; qidx++) 1475 nicvf_update_rq_stats(nic, qidx); 1476 for (qidx = 0; qidx < qs->sq_cnt; qidx++) 1477 nicvf_update_sq_stats(nic, qidx); 1478 } 1479 1480 static void 1481 nicvf_tick_stats(void *arg) 1482 { 1483 struct nicvf *nic; 1484 1485 nic = (struct nicvf *)arg; 1486 1487 /* Read the statistics */ 1488 nicvf_update_stats(nic); 1489 1490 callout_reset(&nic->stats_callout, hz, nicvf_tick_stats, nic); 1491 } 1492