xref: /freebsd/sys/dev/vmware/vmxnet3/if_vmxvar.h (revision 2f513db72b034fd5ef7f080b11be5c711c15186a)
1 /*-
2  * Copyright (c) 2013 Tsubai Masanari
3  * Copyright (c) 2013 Bryan Venteicher <bryanv@FreeBSD.org>
4  * Copyright (c) 2018 Patrick Kelsey
5  *
6  * Permission to use, copy, modify, and distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  *
18  * $FreeBSD$
19  */
20 
21 #ifndef _IF_VMXVAR_H
22 #define _IF_VMXVAR_H
23 
24 struct vmxnet3_softc;
25 
26 /*
27  * The number of Rx/Tx queues this driver prefers.
28  */
29 #define VMXNET3_DEF_RX_QUEUES	8
30 #define VMXNET3_DEF_TX_QUEUES	8
31 
32 /*
33  * The number of Rx rings in each Rx queue.
34  */
35 #define VMXNET3_RXRINGS_PERQ	2
36 
37 /*
38  * The number of descriptors in each Rx/Tx ring.
39  */
40 #define VMXNET3_DEF_TX_NDESC		512
41 #define VMXNET3_MAX_TX_NDESC		4096
42 #define VMXNET3_MIN_TX_NDESC		32
43 #define VMXNET3_MASK_TX_NDESC		0x1F
44 #define VMXNET3_DEF_RX_NDESC		256
45 #define VMXNET3_MAX_RX_NDESC		2048
46 #define VMXNET3_MIN_RX_NDESC		32
47 #define VMXNET3_MASK_RX_NDESC		0x1F
48 
49 #define VMXNET3_MAX_TX_NCOMPDESC	VMXNET3_MAX_TX_NDESC
50 #define VMXNET3_MAX_RX_NCOMPDESC \
51     (VMXNET3_MAX_RX_NDESC * VMXNET3_RXRINGS_PERQ)
52 
53 struct vmxnet3_txring {
54 	u_int			 vxtxr_next;
55 	u_int			 vxtxr_ndesc;
56 	int			 vxtxr_gen;
57 	struct vmxnet3_txdesc	*vxtxr_txd;
58 	bus_addr_t		 vxtxr_paddr;
59 };
60 
61 struct vmxnet3_rxring {
62 	struct vmxnet3_rxdesc	*vxrxr_rxd;
63 	u_int			 vxrxr_ndesc;
64 	int			 vxrxr_gen;
65 	bus_addr_t		 vxrxr_paddr;
66 };
67 
68 struct vmxnet3_comp_ring {
69 	union {
70 		struct vmxnet3_txcompdesc *txcd;
71 		struct vmxnet3_rxcompdesc *rxcd;
72 	}			 vxcr_u;
73 	/*
74 	 * vxcr_next is used on the transmit side to track the next index to
75 	 * begin cleaning at.  It is not used on the receive side.
76 	 */
77 	u_int			 vxcr_next;
78 	u_int			 vxcr_ndesc;
79 	int			 vxcr_gen;
80 	bus_addr_t		 vxcr_paddr;
81 };
82 
83 struct vmxnet3_txqueue {
84 	struct vmxnet3_softc		*vxtxq_sc;
85 	int				 vxtxq_id;
86 	int				 vxtxq_last_flush;
87 	int				 vxtxq_intr_idx;
88 	struct vmxnet3_txring		 vxtxq_cmd_ring;
89 	struct vmxnet3_comp_ring	 vxtxq_comp_ring;
90 	struct vmxnet3_txq_shared	*vxtxq_ts;
91 	struct sysctl_oid_list		*vxtxq_sysctl;
92 	char				 vxtxq_name[16];
93 } __aligned(CACHE_LINE_SIZE);
94 
95 struct vmxnet3_rxqueue {
96 	struct vmxnet3_softc		*vxrxq_sc;
97 	int				 vxrxq_id;
98 	int				 vxrxq_intr_idx;
99 	struct if_irq			 vxrxq_irq;
100 	struct vmxnet3_rxring		 vxrxq_cmd_ring[VMXNET3_RXRINGS_PERQ];
101 	struct vmxnet3_comp_ring	 vxrxq_comp_ring;
102 	struct vmxnet3_rxq_shared	*vxrxq_rs;
103 	struct sysctl_oid_list		*vxrxq_sysctl;
104 	char				 vxrxq_name[16];
105 } __aligned(CACHE_LINE_SIZE);
106 
107 struct vmxnet3_softc {
108 	device_t			 vmx_dev;
109 	if_ctx_t			 vmx_ctx;
110 	if_shared_ctx_t			 vmx_sctx;
111 	if_softc_ctx_t			 vmx_scctx;
112 	struct ifnet			*vmx_ifp;
113 	struct vmxnet3_driver_shared	*vmx_ds;
114 	uint32_t			 vmx_flags;
115 #define VMXNET3_FLAG_RSS	0x0002
116 #define VMXNET3_FLAG_SOFT_RSS	0x0004		/* Software RSS is enabled with
117 						   compatible algorithm. */
118 
119 	struct vmxnet3_rxqueue		*vmx_rxq;
120 	struct vmxnet3_txqueue		*vmx_txq;
121 
122 	struct resource			*vmx_res0;
123 	bus_space_tag_t			 vmx_iot0;
124 	bus_space_handle_t		 vmx_ioh0;
125 	struct resource			*vmx_res1;
126 	bus_space_tag_t			 vmx_iot1;
127 	bus_space_handle_t		 vmx_ioh1;
128 
129 	int				 vmx_link_active;
130 
131 	int				 vmx_intr_mask_mode;
132 	int				 vmx_event_intr_idx;
133 	struct if_irq			 vmx_event_intr_irq;
134 
135 	uint8_t				*vmx_mcast;
136 	struct vmxnet3_rss_shared	*vmx_rss;
137 	struct iflib_dma_info		 vmx_ds_dma;
138 	struct iflib_dma_info		 vmx_qs_dma;
139 	struct iflib_dma_info		 vmx_mcast_dma;
140 	struct iflib_dma_info		 vmx_rss_dma;
141 	struct ifmedia			*vmx_media;
142 	uint32_t			 vmx_vlan_filter[4096/32];
143 	uint8_t				 vmx_lladdr[ETHER_ADDR_LEN];
144 };
145 
146 /*
147  * Our driver version we report to the hypervisor; we just keep
148  * this value constant.
149  */
150 #define VMXNET3_DRIVER_VERSION 0x00010000
151 
152 /*
153  * Max descriptors per Tx packet. We must limit the size of the
154  * any TSO packets based on the number of segments.
155  */
156 #define VMXNET3_TX_MAXSEGS		32  /* 64K @ 2K segment size */
157 #define VMXNET3_TX_MAXSIZE		(VMXNET3_TX_MAXSEGS * MCLBYTES)
158 #define VMXNET3_TSO_MAXSIZE		(VMXNET3_TX_MAXSIZE - ETHER_VLAN_ENCAP_LEN)
159 
160 /*
161  * Maximum supported Tx segment size. The length field in the
162  * Tx descriptor is 14 bits.
163  *
164  * XXX It's possible a descriptor length field of 0 means 2^14, but this
165  * isn't confirmed, so limit to 2^14 - 1 for now.
166  */
167 #define VMXNET3_TX_MAXSEGSIZE		((1 << 14) - 1)
168 
169 /*
170  * Maximum supported Rx segment size. The length field in the
171  * Rx descriptor is 14 bits.
172  *
173  * The reference drivers skip zero-length descriptors, which seems to be a
174  * strong indication that on the receive side, a descriptor length field of
175  * zero does not mean 2^14.
176  */
177 #define VMXNET3_RX_MAXSEGSIZE		((1 << 14) - 1)
178 
179 /*
180  * Predetermined size of the multicast MACs filter table. If the
181  * number of multicast addresses exceeds this size, then the
182  * ALL_MULTI mode is use instead.
183  */
184 #define VMXNET3_MULTICAST_MAX		32
185 
186 /*
187  * IP protocols that we can perform Tx checksum offloading of.
188  */
189 #define VMXNET3_CSUM_OFFLOAD		(CSUM_TCP | CSUM_UDP)
190 #define VMXNET3_CSUM_OFFLOAD_IPV6	(CSUM_TCP_IPV6 | CSUM_UDP_IPV6)
191 
192 #define VMXNET3_CSUM_ALL_OFFLOAD	\
193     (VMXNET3_CSUM_OFFLOAD | VMXNET3_CSUM_OFFLOAD_IPV6 | CSUM_TSO)
194 
195 #endif /* _IF_VMXVAR_H */
196