1*9da9560cSBryan Venteicher /* 2*9da9560cSBryan Venteicher * SPDX-License-Identifier: BSD-3-Clause 3*9da9560cSBryan Venteicher * 4*9da9560cSBryan Venteicher * Copyright IBM Corp. 2007 5*9da9560cSBryan Venteicher * 6*9da9560cSBryan Venteicher * Authors: 7*9da9560cSBryan Venteicher * Anthony Liguori <aliguori@us.ibm.com> 8*9da9560cSBryan Venteicher * 9*9da9560cSBryan Venteicher * This header is BSD licensed so anyone can use the definitions to implement 10*9da9560cSBryan Venteicher * compatible drivers/servers. 11*9da9560cSBryan Venteicher * 12*9da9560cSBryan Venteicher * Redistribution and use in source and binary forms, with or without 13*9da9560cSBryan Venteicher * modification, are permitted provided that the following conditions 14*9da9560cSBryan Venteicher * are met: 15*9da9560cSBryan Venteicher * 1. Redistributions of source code must retain the above copyright 16*9da9560cSBryan Venteicher * notice, this list of conditions and the following disclaimer. 17*9da9560cSBryan Venteicher * 2. Redistributions in binary form must reproduce the above copyright 18*9da9560cSBryan Venteicher * notice, this list of conditions and the following disclaimer in the 19*9da9560cSBryan Venteicher * documentation and/or other materials provided with the distribution. 20*9da9560cSBryan Venteicher * 3. Neither the name of IBM nor the names of its contributors 21*9da9560cSBryan Venteicher * may be used to endorse or promote products derived from this software 22*9da9560cSBryan Venteicher * without specific prior written permission. 23*9da9560cSBryan Venteicher * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 24*9da9560cSBryan Venteicher * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25*9da9560cSBryan Venteicher * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26*9da9560cSBryan Venteicher * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE 27*9da9560cSBryan Venteicher * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28*9da9560cSBryan Venteicher * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29*9da9560cSBryan Venteicher * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30*9da9560cSBryan Venteicher * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31*9da9560cSBryan Venteicher * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32*9da9560cSBryan Venteicher * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33*9da9560cSBryan Venteicher * SUCH DAMAGE. 34*9da9560cSBryan Venteicher */ 35*9da9560cSBryan Venteicher 36*9da9560cSBryan Venteicher #ifndef _VIRTIO_PCI_MODERN_VAR_H 37*9da9560cSBryan Venteicher #define _VIRTIO_PCI_MODERN_VAR_H 38*9da9560cSBryan Venteicher 39*9da9560cSBryan Venteicher #include <dev/virtio/pci/virtio_pci_var.h> 40*9da9560cSBryan Venteicher 41*9da9560cSBryan Venteicher /* IDs for different capabilities. Must all exist. */ 42*9da9560cSBryan Venteicher /* Common configuration */ 43*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_COMMON_CFG 1 44*9da9560cSBryan Venteicher /* Notifications */ 45*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_NOTIFY_CFG 2 46*9da9560cSBryan Venteicher /* ISR access */ 47*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_ISR_CFG 3 48*9da9560cSBryan Venteicher /* Device specific configuration */ 49*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_DEVICE_CFG 4 50*9da9560cSBryan Venteicher /* PCI configuration access */ 51*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_PCI_CFG 5 52*9da9560cSBryan Venteicher 53*9da9560cSBryan Venteicher /* This is the PCI capability header: */ 54*9da9560cSBryan Venteicher struct virtio_pci_cap { 55*9da9560cSBryan Venteicher uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 56*9da9560cSBryan Venteicher uint8_t cap_next; /* Generic PCI field: next ptr. */ 57*9da9560cSBryan Venteicher uint8_t cap_len; /* Generic PCI field: capability length */ 58*9da9560cSBryan Venteicher uint8_t cfg_type; /* Identifies the structure. */ 59*9da9560cSBryan Venteicher uint8_t bar; /* Where to find it. */ 60*9da9560cSBryan Venteicher uint8_t padding[3]; /* Pad to full dword. */ 61*9da9560cSBryan Venteicher uint32_t offset; /* Offset within bar. */ 62*9da9560cSBryan Venteicher uint32_t length; /* Length of the structure, in bytes. */ 63*9da9560cSBryan Venteicher }; 64*9da9560cSBryan Venteicher 65*9da9560cSBryan Venteicher struct virtio_pci_notify_cap { 66*9da9560cSBryan Venteicher struct virtio_pci_cap cap; 67*9da9560cSBryan Venteicher uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 68*9da9560cSBryan Venteicher }; 69*9da9560cSBryan Venteicher 70*9da9560cSBryan Venteicher /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ 71*9da9560cSBryan Venteicher struct virtio_pci_common_cfg { 72*9da9560cSBryan Venteicher /* About the whole device. */ 73*9da9560cSBryan Venteicher uint32_t device_feature_select; /* read-write */ 74*9da9560cSBryan Venteicher uint32_t device_feature; /* read-only */ 75*9da9560cSBryan Venteicher uint32_t guest_feature_select; /* read-write */ 76*9da9560cSBryan Venteicher uint32_t guest_feature; /* read-write */ 77*9da9560cSBryan Venteicher uint16_t msix_config; /* read-write */ 78*9da9560cSBryan Venteicher uint16_t num_queues; /* read-only */ 79*9da9560cSBryan Venteicher uint8_t device_status; /* read-write */ 80*9da9560cSBryan Venteicher uint8_t config_generation; /* read-only */ 81*9da9560cSBryan Venteicher 82*9da9560cSBryan Venteicher /* About a specific virtqueue. */ 83*9da9560cSBryan Venteicher uint16_t queue_select; /* read-write */ 84*9da9560cSBryan Venteicher uint16_t queue_size; /* read-write, power of 2. */ 85*9da9560cSBryan Venteicher uint16_t queue_msix_vector; /* read-write */ 86*9da9560cSBryan Venteicher uint16_t queue_enable; /* read-write */ 87*9da9560cSBryan Venteicher uint16_t queue_notify_off; /* read-only */ 88*9da9560cSBryan Venteicher uint32_t queue_desc_lo; /* read-write */ 89*9da9560cSBryan Venteicher uint32_t queue_desc_hi; /* read-write */ 90*9da9560cSBryan Venteicher uint32_t queue_avail_lo; /* read-write */ 91*9da9560cSBryan Venteicher uint32_t queue_avail_hi; /* read-write */ 92*9da9560cSBryan Venteicher uint32_t queue_used_lo; /* read-write */ 93*9da9560cSBryan Venteicher uint32_t queue_used_hi; /* read-write */ 94*9da9560cSBryan Venteicher }; 95*9da9560cSBryan Venteicher 96*9da9560cSBryan Venteicher /* Fields in VIRTIO_PCI_CAP_PCI_CFG: */ 97*9da9560cSBryan Venteicher struct virtio_pci_cfg_cap { 98*9da9560cSBryan Venteicher struct virtio_pci_cap cap; 99*9da9560cSBryan Venteicher uint8_t pci_cfg_data[4]; /* Data for BAR access. */ 100*9da9560cSBryan Venteicher }; 101*9da9560cSBryan Venteicher 102*9da9560cSBryan Venteicher /* Macro versions of offsets for the Old Timers! */ 103*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_VNDR 0 104*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_NEXT 1 105*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_LEN 2 106*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_CFG_TYPE 3 107*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_BAR 4 108*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_OFFSET 8 109*9da9560cSBryan Venteicher #define VIRTIO_PCI_CAP_LENGTH 12 110*9da9560cSBryan Venteicher 111*9da9560cSBryan Venteicher #define VIRTIO_PCI_NOTIFY_CAP_MULT 16 112*9da9560cSBryan Venteicher 113*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_DFSELECT 0 114*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_DF 4 115*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_GFSELECT 8 116*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_GF 12 117*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_MSIX 16 118*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_NUMQ 18 119*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_STATUS 20 120*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_CFGGENERATION 21 121*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_SELECT 22 122*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_SIZE 24 123*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_MSIX 26 124*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_ENABLE 28 125*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_NOFF 30 126*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_DESCLO 32 127*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_DESCHI 36 128*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_AVAILLO 40 129*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_AVAILHI 44 130*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_USEDLO 48 131*9da9560cSBryan Venteicher #define VIRTIO_PCI_COMMON_Q_USEDHI 52 132*9da9560cSBryan Venteicher 133*9da9560cSBryan Venteicher #endif /* _VIRTIO_PCI_MODERN_VAR_H */ 134