1 /*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <sys/cdefs.h> 18 __FBSDID("$FreeBSD$"); 19 #include <sys/param.h> 20 #include <sys/sockio.h> 21 #include <sys/sysctl.h> 22 #include <sys/lock.h> 23 #include <sys/mutex.h> 24 #include <sys/mbuf.h> 25 #include <sys/kernel.h> 26 #include <sys/socket.h> 27 #include <sys/systm.h> 28 #include <sys/malloc.h> 29 #include <sys/module.h> 30 #include <sys/bus.h> 31 #include <sys/endian.h> 32 #include <sys/kdb.h> 33 34 #include <machine/bus.h> 35 #include <machine/resource.h> 36 #include <sys/rman.h> 37 38 #include <net/if.h> 39 #include <net/if_var.h> 40 #include <net/if_arp.h> 41 #include <net/ethernet.h> 42 #include <net/if_dl.h> 43 #include <net/if_media.h> 44 #include <net/if_types.h> 45 46 #ifdef INET 47 #include <netinet/in.h> 48 #include <netinet/in_systm.h> 49 #include <netinet/in_var.h> 50 #include <netinet/if_ether.h> 51 #include <netinet/ip.h> 52 #endif 53 54 #include <net80211/ieee80211_var.h> 55 #include <net80211/ieee80211_regdomain.h> 56 #include <net80211/ieee80211_radiotap.h> 57 58 #include <dev/usb/usb.h> 59 #include <dev/usb/usbdi.h> 60 #include "usbdevs.h" 61 62 #include <dev/usb/wlan/if_urtwreg.h> 63 #include <dev/usb/wlan/if_urtwvar.h> 64 65 static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 66 #ifdef URTW_DEBUG 67 int urtw_debug = 0; 68 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0, 69 "control debugging printfs"); 70 enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 72 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 73 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 74 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 75 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 76 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 77 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 78 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 79 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 80 URTW_DEBUG_ANY = 0xffffffff 81 }; 82 #define DPRINTF(sc, m, fmt, ...) do { \ 83 if (sc->sc_debug & (m)) \ 84 printf(fmt, __VA_ARGS__); \ 85 } while (0) 86 #else 87 #define DPRINTF(sc, m, fmt, ...) do { \ 88 (void) sc; \ 89 } while (0) 90 #endif 91 static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 92 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN, 93 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 94 95 /* recognized device vendors/products */ 96 #define urtw_lookup(v, p) \ 97 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 98 #define URTW_DEV_B(v,p) \ 99 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 100 #define URTW_DEV_L(v,p) \ 101 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 102 #define URTW_REV_RTL8187B 0 103 #define URTW_REV_RTL8187L 1 104 static const STRUCT_USB_HOST_ID urtw_devs[] = { 105 URTW_DEV_B(NETGEAR, WG111V3), 106 URTW_DEV_B(REALTEK, RTL8187B_0), 107 URTW_DEV_B(REALTEK, RTL8187B_1), 108 URTW_DEV_B(REALTEK, RTL8187B_2), 109 URTW_DEV_B(SITECOMEU, WL168V4), 110 URTW_DEV_L(ASUS, P5B_WIFI), 111 URTW_DEV_L(BELKIN, F5D7050E), 112 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 113 URTW_DEV_L(NETGEAR, WG111V2), 114 URTW_DEV_L(REALTEK, RTL8187), 115 URTW_DEV_L(SITECOMEU, WL168V1), 116 URTW_DEV_L(SURECOM, EP9001G2A), 117 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 122 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 124 #undef URTW_DEV_L 125 #undef URTW_DEV_B 126 }; 127 128 #define urtw_read8_m(sc, val, data) do { \ 129 error = urtw_read8_c(sc, val, data); \ 130 if (error != 0) \ 131 goto fail; \ 132 } while (0) 133 #define urtw_write8_m(sc, val, data) do { \ 134 error = urtw_write8_c(sc, val, data); \ 135 if (error != 0) \ 136 goto fail; \ 137 } while (0) 138 #define urtw_read16_m(sc, val, data) do { \ 139 error = urtw_read16_c(sc, val, data); \ 140 if (error != 0) \ 141 goto fail; \ 142 } while (0) 143 #define urtw_write16_m(sc, val, data) do { \ 144 error = urtw_write16_c(sc, val, data); \ 145 if (error != 0) \ 146 goto fail; \ 147 } while (0) 148 #define urtw_read32_m(sc, val, data) do { \ 149 error = urtw_read32_c(sc, val, data); \ 150 if (error != 0) \ 151 goto fail; \ 152 } while (0) 153 #define urtw_write32_m(sc, val, data) do { \ 154 error = urtw_write32_c(sc, val, data); \ 155 if (error != 0) \ 156 goto fail; \ 157 } while (0) 158 #define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 159 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 160 if (error != 0) \ 161 goto fail; \ 162 } while (0) 163 #define urtw_8187_write_phy_cck(sc, val, data) do { \ 164 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 165 if (error != 0) \ 166 goto fail; \ 167 } while (0) 168 #define urtw_8225_write(sc, val, data) do { \ 169 error = urtw_8225_write_c(sc, val, data); \ 170 if (error != 0) \ 171 goto fail; \ 172 } while (0) 173 174 struct urtw_pair { 175 uint32_t reg; 176 uint32_t val; 177 }; 178 179 static uint8_t urtw_8225_agc[] = { 180 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 181 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 182 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 183 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 184 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 185 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 186 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 187 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 188 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 189 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 190 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 191 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 192 }; 193 194 static uint8_t urtw_8225z2_agc[] = { 195 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 196 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 197 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 198 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 199 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 200 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 201 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 202 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 203 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 204 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 205 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 206 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 207 }; 208 209 static uint32_t urtw_8225_channel[] = { 210 0x0000, /* dummy channel 0 */ 211 0x085c, /* 1 */ 212 0x08dc, /* 2 */ 213 0x095c, /* 3 */ 214 0x09dc, /* 4 */ 215 0x0a5c, /* 5 */ 216 0x0adc, /* 6 */ 217 0x0b5c, /* 7 */ 218 0x0bdc, /* 8 */ 219 0x0c5c, /* 9 */ 220 0x0cdc, /* 10 */ 221 0x0d5c, /* 11 */ 222 0x0ddc, /* 12 */ 223 0x0e5c, /* 13 */ 224 0x0f72, /* 14 */ 225 }; 226 227 static uint8_t urtw_8225_gain[] = { 228 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 229 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 230 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 231 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 232 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 233 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 234 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 235 }; 236 237 static struct urtw_pair urtw_8225_rf_part1[] = { 238 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 239 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 240 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 241 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 242 }; 243 244 static struct urtw_pair urtw_8225_rf_part2[] = { 245 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 246 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 247 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 248 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 249 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 250 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 251 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 252 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 253 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 254 { 0x27, 0x88 } 255 }; 256 257 static struct urtw_pair urtw_8225_rf_part3[] = { 258 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 259 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 260 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 261 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 262 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 263 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 264 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 265 }; 266 267 static uint16_t urtw_8225_rxgain[] = { 268 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 269 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 270 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 271 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 272 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 273 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 274 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 275 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 276 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 277 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 278 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 279 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 280 }; 281 282 static uint8_t urtw_8225_threshold[] = { 283 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 284 }; 285 286 static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 287 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 288 }; 289 290 static uint8_t urtw_8225_txpwr_cck[] = { 291 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 292 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 293 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 294 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 295 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 296 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 297 }; 298 299 static uint8_t urtw_8225_txpwr_cck_ch14[] = { 300 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 301 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 302 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 303 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 304 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 305 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 306 }; 307 308 static uint8_t urtw_8225_txpwr_ofdm[]={ 309 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 310 }; 311 312 static uint8_t urtw_8225v2_gain_bg[]={ 313 0x23, 0x15, 0xa5, /* -82-1dbm */ 314 0x23, 0x15, 0xb5, /* -82-2dbm */ 315 0x23, 0x15, 0xc5, /* -82-3dbm */ 316 0x33, 0x15, 0xc5, /* -78dbm */ 317 0x43, 0x15, 0xc5, /* -74dbm */ 318 0x53, 0x15, 0xc5, /* -70dbm */ 319 0x63, 0x15, 0xc5, /* -66dbm */ 320 }; 321 322 static struct urtw_pair urtw_8225v2_rf_part1[] = { 323 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 324 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 325 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 326 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 327 }; 328 329 static struct urtw_pair urtw_8225v2b_rf_part0[] = { 330 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 331 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 332 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 333 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 334 }; 335 336 static struct urtw_pair urtw_8225v2b_rf_part1[] = { 337 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 338 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 339 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 340 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 341 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 342 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 343 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 344 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 345 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 346 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 347 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 348 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 349 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 350 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 351 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 352 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 353 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 354 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 355 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 356 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 357 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 358 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 359 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 360 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 361 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 362 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 363 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 364 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 365 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 366 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 367 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 368 }; 369 370 static struct urtw_pair urtw_8225v2_rf_part2[] = { 371 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 372 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 373 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 374 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 375 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 376 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 377 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 378 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 379 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 380 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 381 }; 382 383 static struct urtw_pair urtw_8225v2b_rf_part2[] = { 384 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 385 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 386 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 387 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 388 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 389 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 390 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 391 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 392 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 393 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 394 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 395 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 396 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 397 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 398 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 399 }; 400 401 static struct urtw_pair urtw_8225v2_rf_part3[] = { 402 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 403 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 404 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 405 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 406 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 407 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 408 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 409 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 410 }; 411 412 static uint16_t urtw_8225v2_rxgain[] = { 413 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 414 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 415 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 416 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 417 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 418 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 419 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 420 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 421 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 422 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 423 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 424 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 425 }; 426 427 static uint16_t urtw_8225v2b_rxgain[] = { 428 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 429 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 430 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 431 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 432 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 433 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 434 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 435 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 436 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 437 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 438 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 439 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 440 }; 441 442 static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 443 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 444 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 445 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 446 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 447 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 448 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 449 }; 450 451 static uint8_t urtw_8225v2_txpwr_cck[] = { 452 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 453 }; 454 455 static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 456 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 457 }; 458 459 static uint8_t urtw_8225v2b_txpwr_cck[] = { 460 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 461 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 462 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 463 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 464 }; 465 466 static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 467 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 468 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 469 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 470 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 471 }; 472 473 static struct urtw_pair urtw_ratetable[] = { 474 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 475 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 476 { 96, 10 }, { 108, 11 } 477 }; 478 479 #if 0 480 static const uint8_t urtw_8187b_reg_table[][3] = { 481 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 482 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 483 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 484 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 485 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 486 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 487 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 488 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 489 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 490 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 491 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 492 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 493 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 494 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 495 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 496 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 497 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 498 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 499 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 500 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 501 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 502 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 503 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 504 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 505 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 506 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 507 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 508 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 509 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 510 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 511 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 512 }; 513 #endif 514 515 static usb_callback_t urtw_bulk_rx_callback; 516 static usb_callback_t urtw_bulk_tx_callback; 517 static usb_callback_t urtw_bulk_tx_status_callback; 518 519 static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 520 [URTW_8187B_BULK_RX] = { 521 .type = UE_BULK, 522 .endpoint = 0x83, 523 .direction = UE_DIR_IN, 524 .bufsize = MCLBYTES, 525 .flags = { 526 .ext_buffer = 1, 527 .pipe_bof = 1, 528 .short_xfer_ok = 1 529 }, 530 .callback = urtw_bulk_rx_callback 531 }, 532 [URTW_8187B_BULK_TX_STATUS] = { 533 .type = UE_BULK, 534 .endpoint = 0x89, 535 .direction = UE_DIR_IN, 536 .bufsize = sizeof(uint64_t), 537 .flags = { 538 .pipe_bof = 1, 539 .short_xfer_ok = 1 540 }, 541 .callback = urtw_bulk_tx_status_callback 542 }, 543 [URTW_8187B_BULK_TX_BE] = { 544 .type = UE_BULK, 545 .endpoint = URTW_8187B_TXPIPE_BE, 546 .direction = UE_DIR_OUT, 547 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 548 .flags = { 549 .force_short_xfer = 1, 550 .pipe_bof = 1, 551 }, 552 .callback = urtw_bulk_tx_callback, 553 .timeout = URTW_DATA_TIMEOUT 554 }, 555 [URTW_8187B_BULK_TX_BK] = { 556 .type = UE_BULK, 557 .endpoint = URTW_8187B_TXPIPE_BK, 558 .direction = UE_DIR_OUT, 559 .bufsize = URTW_TX_MAXSIZE, 560 .flags = { 561 .ext_buffer = 1, 562 .force_short_xfer = 1, 563 .pipe_bof = 1, 564 }, 565 .callback = urtw_bulk_tx_callback, 566 .timeout = URTW_DATA_TIMEOUT 567 }, 568 [URTW_8187B_BULK_TX_VI] = { 569 .type = UE_BULK, 570 .endpoint = URTW_8187B_TXPIPE_VI, 571 .direction = UE_DIR_OUT, 572 .bufsize = URTW_TX_MAXSIZE, 573 .flags = { 574 .ext_buffer = 1, 575 .force_short_xfer = 1, 576 .pipe_bof = 1, 577 }, 578 .callback = urtw_bulk_tx_callback, 579 .timeout = URTW_DATA_TIMEOUT 580 }, 581 [URTW_8187B_BULK_TX_VO] = { 582 .type = UE_BULK, 583 .endpoint = URTW_8187B_TXPIPE_VO, 584 .direction = UE_DIR_OUT, 585 .bufsize = URTW_TX_MAXSIZE, 586 .flags = { 587 .ext_buffer = 1, 588 .force_short_xfer = 1, 589 .pipe_bof = 1, 590 }, 591 .callback = urtw_bulk_tx_callback, 592 .timeout = URTW_DATA_TIMEOUT 593 }, 594 [URTW_8187B_BULK_TX_EP12] = { 595 .type = UE_BULK, 596 .endpoint = 0xc, 597 .direction = UE_DIR_OUT, 598 .bufsize = URTW_TX_MAXSIZE, 599 .flags = { 600 .ext_buffer = 1, 601 .force_short_xfer = 1, 602 .pipe_bof = 1, 603 }, 604 .callback = urtw_bulk_tx_callback, 605 .timeout = URTW_DATA_TIMEOUT 606 } 607 }; 608 609 static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 610 [URTW_8187L_BULK_RX] = { 611 .type = UE_BULK, 612 .endpoint = 0x81, 613 .direction = UE_DIR_IN, 614 .bufsize = MCLBYTES, 615 .flags = { 616 .ext_buffer = 1, 617 .pipe_bof = 1, 618 .short_xfer_ok = 1 619 }, 620 .callback = urtw_bulk_rx_callback 621 }, 622 [URTW_8187L_BULK_TX_LOW] = { 623 .type = UE_BULK, 624 .endpoint = 0x2, 625 .direction = UE_DIR_OUT, 626 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 627 .flags = { 628 .force_short_xfer = 1, 629 .pipe_bof = 1, 630 }, 631 .callback = urtw_bulk_tx_callback, 632 .timeout = URTW_DATA_TIMEOUT 633 }, 634 [URTW_8187L_BULK_TX_NORMAL] = { 635 .type = UE_BULK, 636 .endpoint = 0x3, 637 .direction = UE_DIR_OUT, 638 .bufsize = URTW_TX_MAXSIZE, 639 .flags = { 640 .ext_buffer = 1, 641 .force_short_xfer = 1, 642 .pipe_bof = 1, 643 }, 644 .callback = urtw_bulk_tx_callback, 645 .timeout = URTW_DATA_TIMEOUT 646 }, 647 }; 648 649 static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 650 const char [IFNAMSIZ], int, enum ieee80211_opmode, 651 int, const uint8_t [IEEE80211_ADDR_LEN], 652 const uint8_t [IEEE80211_ADDR_LEN]); 653 static void urtw_vap_delete(struct ieee80211vap *); 654 static void urtw_init(struct urtw_softc *); 655 static void urtw_stop(struct urtw_softc *); 656 static void urtw_parent(struct ieee80211com *); 657 static int urtw_transmit(struct ieee80211com *, struct mbuf *); 658 static void urtw_start(struct urtw_softc *); 659 static int urtw_alloc_rx_data_list(struct urtw_softc *); 660 static int urtw_alloc_tx_data_list(struct urtw_softc *); 661 static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 662 const struct ieee80211_bpf_params *); 663 static void urtw_scan_start(struct ieee80211com *); 664 static void urtw_scan_end(struct ieee80211com *); 665 static void urtw_set_channel(struct ieee80211com *); 666 static void urtw_update_mcast(struct ieee80211com *); 667 static int urtw_tx_start(struct urtw_softc *, 668 struct ieee80211_node *, struct mbuf *, 669 struct urtw_data *, int); 670 static int urtw_newstate(struct ieee80211vap *, 671 enum ieee80211_state, int); 672 static void urtw_led_ch(void *); 673 static void urtw_ledtask(void *, int); 674 static void urtw_watchdog(void *); 675 static void urtw_set_multi(void *); 676 static int urtw_isbmode(uint16_t); 677 static uint16_t urtw_rate2rtl(uint32_t); 678 static uint16_t urtw_rtl2rate(uint32_t); 679 static usb_error_t urtw_set_rate(struct urtw_softc *); 680 static usb_error_t urtw_update_msr(struct urtw_softc *); 681 static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 682 static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 683 static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 684 static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 685 static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 686 static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 687 static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 688 static usb_error_t urtw_eprom_ck(struct urtw_softc *); 689 static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 690 int); 691 static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 692 uint32_t *); 693 static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 694 static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 695 static usb_error_t urtw_get_macaddr(struct urtw_softc *); 696 static usb_error_t urtw_get_txpwr(struct urtw_softc *); 697 static usb_error_t urtw_get_rfchip(struct urtw_softc *); 698 static usb_error_t urtw_led_init(struct urtw_softc *); 699 static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 700 static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 701 static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 702 uint32_t); 703 static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 704 uint8_t, uint32_t); 705 static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 706 uint32_t); 707 static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 708 static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 709 static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 710 uint16_t); 711 static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 712 uint16_t *); 713 static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 714 uint32_t *); 715 static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 716 static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 717 static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 718 static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 719 static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 720 static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 721 static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 722 static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 723 static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 724 static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 725 static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 726 static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 727 static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 728 static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 729 static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 730 static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 731 static usb_error_t urtw_intr_enable(struct urtw_softc *); 732 static usb_error_t urtw_intr_disable(struct urtw_softc *); 733 static usb_error_t urtw_reset(struct urtw_softc *); 734 static usb_error_t urtw_led_on(struct urtw_softc *, int); 735 static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 736 static usb_error_t urtw_led_blink(struct urtw_softc *); 737 static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 738 static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 739 static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 740 static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 741 static usb_error_t urtw_rx_setconf(struct urtw_softc *); 742 static usb_error_t urtw_rx_enable(struct urtw_softc *); 743 static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 744 static void urtw_free_tx_data_list(struct urtw_softc *); 745 static void urtw_free_rx_data_list(struct urtw_softc *); 746 static void urtw_free_data_list(struct urtw_softc *, 747 struct urtw_data data[], int, int); 748 static usb_error_t urtw_adapter_start(struct urtw_softc *); 749 static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 750 static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 751 static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 752 static usb_error_t urtw_do_request(struct urtw_softc *, 753 struct usb_device_request *, void *); 754 static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 755 static usb_error_t urtw_led_off(struct urtw_softc *, int); 756 static void urtw_abort_xfers(struct urtw_softc *); 757 static struct urtw_data * 758 urtw_getbuf(struct urtw_softc *sc); 759 static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 760 uint8_t); 761 static void urtw_updateslot(struct ieee80211com *); 762 static void urtw_updateslottask(void *, int); 763 static void urtw_sysctl_node(struct urtw_softc *); 764 765 static int 766 urtw_match(device_t dev) 767 { 768 struct usb_attach_arg *uaa = device_get_ivars(dev); 769 770 if (uaa->usb_mode != USB_MODE_HOST) 771 return (ENXIO); 772 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 773 return (ENXIO); 774 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 775 return (ENXIO); 776 777 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 778 } 779 780 static int 781 urtw_attach(device_t dev) 782 { 783 const struct usb_config *setup_start; 784 int ret = ENXIO; 785 struct urtw_softc *sc = device_get_softc(dev); 786 struct usb_attach_arg *uaa = device_get_ivars(dev); 787 struct ieee80211com *ic = &sc->sc_ic; 788 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 789 uint16_t n_setup; 790 uint32_t data; 791 usb_error_t error; 792 793 device_set_usb_desc(dev); 794 795 sc->sc_dev = dev; 796 sc->sc_udev = uaa->device; 797 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 798 sc->sc_flags |= URTW_RTL8187B; 799 #ifdef URTW_DEBUG 800 sc->sc_debug = urtw_debug; 801 #endif 802 803 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 804 MTX_DEF); 805 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 806 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 807 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 808 callout_init(&sc->sc_watchdog_ch, 0); 809 mbufq_init(&sc->sc_snd, ifqmaxlen); 810 811 if (sc->sc_flags & URTW_RTL8187B) { 812 setup_start = urtw_8187b_usbconfig; 813 n_setup = URTW_8187B_N_XFERS; 814 } else { 815 setup_start = urtw_8187l_usbconfig; 816 n_setup = URTW_8187L_N_XFERS; 817 } 818 819 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 820 setup_start, n_setup, sc, &sc->sc_mtx); 821 if (error) { 822 device_printf(dev, "could not allocate USB transfers, " 823 "err=%s\n", usbd_errstr(error)); 824 ret = ENXIO; 825 goto fail0; 826 } 827 828 if (sc->sc_flags & URTW_RTL8187B) { 829 sc->sc_tx_dma_buf = 830 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 831 URTW_8187B_BULK_TX_BE], 0); 832 } else { 833 sc->sc_tx_dma_buf = 834 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 835 URTW_8187L_BULK_TX_LOW], 0); 836 } 837 838 URTW_LOCK(sc); 839 840 urtw_read32_m(sc, URTW_RX, &data); 841 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 842 URTW_EEPROM_93C46; 843 844 error = urtw_get_rfchip(sc); 845 if (error != 0) 846 goto fail; 847 error = urtw_get_macaddr(sc); 848 if (error != 0) 849 goto fail; 850 error = urtw_get_txpwr(sc); 851 if (error != 0) 852 goto fail; 853 error = urtw_led_init(sc); 854 if (error != 0) 855 goto fail; 856 857 URTW_UNLOCK(sc); 858 859 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 860 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 861 sc->sc_currate = 3; 862 sc->sc_preamble_mode = urtw_preamble_mode; 863 864 ic->ic_softc = sc; 865 ic->ic_name = device_get_nameunit(dev); 866 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 867 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 868 869 /* set device capabilities */ 870 ic->ic_caps = 871 IEEE80211_C_STA | /* station mode */ 872 IEEE80211_C_MONITOR | /* monitor mode supported */ 873 IEEE80211_C_TXPMGT | /* tx power management */ 874 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 875 IEEE80211_C_SHSLOT | /* short slot time supported */ 876 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 877 IEEE80211_C_WPA; /* 802.11i */ 878 879 bands = 0; 880 setbit(&bands, IEEE80211_MODE_11B); 881 setbit(&bands, IEEE80211_MODE_11G); 882 ieee80211_init_channels(ic, NULL, &bands); 883 884 ieee80211_ifattach(ic); 885 ic->ic_raw_xmit = urtw_raw_xmit; 886 ic->ic_scan_start = urtw_scan_start; 887 ic->ic_scan_end = urtw_scan_end; 888 ic->ic_set_channel = urtw_set_channel; 889 ic->ic_updateslot = urtw_updateslot; 890 ic->ic_vap_create = urtw_vap_create; 891 ic->ic_vap_delete = urtw_vap_delete; 892 ic->ic_update_mcast = urtw_update_mcast; 893 ic->ic_parent = urtw_parent; 894 ic->ic_transmit = urtw_transmit; 895 896 ieee80211_radiotap_attach(ic, 897 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 898 URTW_TX_RADIOTAP_PRESENT, 899 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 900 URTW_RX_RADIOTAP_PRESENT); 901 902 urtw_sysctl_node(sc); 903 904 if (bootverbose) 905 ieee80211_announce(ic); 906 return (0); 907 908 fail: 909 URTW_UNLOCK(sc); 910 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 911 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 912 fail0: 913 return (ret); 914 } 915 916 static int 917 urtw_detach(device_t dev) 918 { 919 struct urtw_softc *sc = device_get_softc(dev); 920 struct ieee80211com *ic = &sc->sc_ic; 921 unsigned int x; 922 unsigned int n_xfers; 923 924 /* Prevent further ioctls */ 925 URTW_LOCK(sc); 926 sc->sc_flags |= URTW_DETACHED; 927 urtw_stop(sc); 928 URTW_UNLOCK(sc); 929 930 ieee80211_draintask(ic, &sc->sc_updateslot_task); 931 ieee80211_draintask(ic, &sc->sc_led_task); 932 933 usb_callout_drain(&sc->sc_led_ch); 934 callout_drain(&sc->sc_watchdog_ch); 935 936 n_xfers = (sc->sc_flags & URTW_RTL8187B) ? 937 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS; 938 939 /* prevent further allocations from RX/TX data lists */ 940 URTW_LOCK(sc); 941 STAILQ_INIT(&sc->sc_tx_active); 942 STAILQ_INIT(&sc->sc_tx_inactive); 943 STAILQ_INIT(&sc->sc_tx_pending); 944 945 STAILQ_INIT(&sc->sc_rx_active); 946 STAILQ_INIT(&sc->sc_rx_inactive); 947 URTW_UNLOCK(sc); 948 949 /* drain USB transfers */ 950 for (x = 0; x != n_xfers; x++) 951 usbd_transfer_drain(sc->sc_xfer[x]); 952 953 /* free data buffers */ 954 URTW_LOCK(sc); 955 urtw_free_tx_data_list(sc); 956 urtw_free_rx_data_list(sc); 957 URTW_UNLOCK(sc); 958 959 /* free USB transfers and some data buffers */ 960 usbd_transfer_unsetup(sc->sc_xfer, n_xfers); 961 962 ieee80211_ifdetach(ic); 963 mbufq_drain(&sc->sc_snd); 964 mtx_destroy(&sc->sc_mtx); 965 return (0); 966 } 967 968 static void 969 urtw_free_tx_data_list(struct urtw_softc *sc) 970 { 971 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 972 } 973 974 static void 975 urtw_free_rx_data_list(struct urtw_softc *sc) 976 { 977 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 978 } 979 980 static void 981 urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 982 int fillmbuf) 983 { 984 int i; 985 986 for (i = 0; i < ndata; i++) { 987 struct urtw_data *dp = &data[i]; 988 989 if (fillmbuf == 1) { 990 if (dp->m != NULL) { 991 m_freem(dp->m); 992 dp->m = NULL; 993 dp->buf = NULL; 994 } 995 } else { 996 dp->buf = NULL; 997 } 998 if (dp->ni != NULL) { 999 ieee80211_free_node(dp->ni); 1000 dp->ni = NULL; 1001 } 1002 } 1003 } 1004 1005 static struct ieee80211vap * 1006 urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1007 enum ieee80211_opmode opmode, int flags, 1008 const uint8_t bssid[IEEE80211_ADDR_LEN], 1009 const uint8_t mac[IEEE80211_ADDR_LEN]) 1010 { 1011 struct urtw_vap *uvp; 1012 struct ieee80211vap *vap; 1013 1014 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1015 return (NULL); 1016 uvp = malloc(sizeof(struct urtw_vap), M_80211_VAP, M_WAITOK | M_ZERO); 1017 vap = &uvp->vap; 1018 /* enable s/w bmiss handling for sta mode */ 1019 1020 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 1021 flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 1022 /* out of memory */ 1023 free(uvp, M_80211_VAP); 1024 return (NULL); 1025 } 1026 1027 /* override state transition machine */ 1028 uvp->newstate = vap->iv_newstate; 1029 vap->iv_newstate = urtw_newstate; 1030 1031 /* complete setup */ 1032 ieee80211_vap_attach(vap, ieee80211_media_change, 1033 ieee80211_media_status, mac); 1034 ic->ic_opmode = opmode; 1035 return (vap); 1036 } 1037 1038 static void 1039 urtw_vap_delete(struct ieee80211vap *vap) 1040 { 1041 struct urtw_vap *uvp = URTW_VAP(vap); 1042 1043 ieee80211_vap_detach(vap); 1044 free(uvp, M_80211_VAP); 1045 } 1046 1047 static void 1048 urtw_init(struct urtw_softc *sc) 1049 { 1050 usb_error_t error; 1051 int ret; 1052 1053 URTW_ASSERT_LOCKED(sc); 1054 1055 if (sc->sc_flags & URTW_RUNNING) 1056 urtw_stop(sc); 1057 1058 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1059 urtw_adapter_start(sc); 1060 if (error != 0) 1061 goto fail; 1062 1063 /* reset softc variables */ 1064 sc->sc_txtimer = 0; 1065 1066 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1067 ret = urtw_alloc_rx_data_list(sc); 1068 if (ret != 0) 1069 goto fail; 1070 ret = urtw_alloc_tx_data_list(sc); 1071 if (ret != 0) 1072 goto fail; 1073 sc->sc_flags |= URTW_INIT_ONCE; 1074 } 1075 1076 error = urtw_rx_enable(sc); 1077 if (error != 0) 1078 goto fail; 1079 error = urtw_tx_enable(sc); 1080 if (error != 0) 1081 goto fail; 1082 1083 if (sc->sc_flags & URTW_RTL8187B) 1084 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1085 1086 sc->sc_flags |= URTW_RUNNING; 1087 1088 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1089 fail: 1090 return; 1091 } 1092 1093 static usb_error_t 1094 urtw_adapter_start_b(struct urtw_softc *sc) 1095 { 1096 #define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1097 uint8_t data8; 1098 usb_error_t error; 1099 1100 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1101 if (error) 1102 goto fail; 1103 1104 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1105 urtw_write8_m(sc, URTW_CONFIG3, 1106 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1107 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1108 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1109 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1110 1111 urtw_write8_m(sc, 0x61, 0x10); 1112 urtw_read8_m(sc, 0x62, &data8); 1113 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1114 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1115 1116 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1117 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1118 urtw_write8_m(sc, URTW_CONFIG3, data8); 1119 1120 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1121 if (error) 1122 goto fail; 1123 1124 error = urtw_8187b_cmd_reset(sc); 1125 if (error) 1126 goto fail; 1127 1128 error = sc->sc_rf_init(sc); 1129 if (error != 0) 1130 goto fail; 1131 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1132 1133 /* fix RTL8187B RX stall */ 1134 error = urtw_intr_enable(sc); 1135 if (error) 1136 goto fail; 1137 1138 error = urtw_write8e(sc, 0x41, 0xf4); 1139 if (error) 1140 goto fail; 1141 error = urtw_write8e(sc, 0x40, 0x00); 1142 if (error) 1143 goto fail; 1144 error = urtw_write8e(sc, 0x42, 0x00); 1145 if (error) 1146 goto fail; 1147 error = urtw_write8e(sc, 0x42, 0x01); 1148 if (error) 1149 goto fail; 1150 error = urtw_write8e(sc, 0x40, 0x0f); 1151 if (error) 1152 goto fail; 1153 error = urtw_write8e(sc, 0x42, 0x00); 1154 if (error) 1155 goto fail; 1156 error = urtw_write8e(sc, 0x42, 0x01); 1157 if (error) 1158 goto fail; 1159 1160 urtw_read8_m(sc, 0xdb, &data8); 1161 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1162 urtw_write16_m(sc, 0x372, 0x59fa); 1163 urtw_write16_m(sc, 0x374, 0x59d2); 1164 urtw_write16_m(sc, 0x376, 0x59d2); 1165 urtw_write16_m(sc, 0x378, 0x19fa); 1166 urtw_write16_m(sc, 0x37a, 0x19fa); 1167 urtw_write16_m(sc, 0x37c, 0x00d0); 1168 urtw_write8_m(sc, 0x61, 0); 1169 1170 urtw_write8_m(sc, 0x180, 0x0f); 1171 urtw_write8_m(sc, 0x183, 0x03); 1172 urtw_write8_m(sc, 0xda, 0x10); 1173 urtw_write8_m(sc, 0x24d, 0x08); 1174 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1175 1176 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1177 fail: 1178 return (error); 1179 #undef N 1180 } 1181 1182 static usb_error_t 1183 urtw_adapter_start(struct urtw_softc *sc) 1184 { 1185 struct ieee80211com *ic = &sc->sc_ic; 1186 usb_error_t error; 1187 1188 error = urtw_reset(sc); 1189 if (error) 1190 goto fail; 1191 1192 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1193 urtw_write8_m(sc, URTW_GPIO, 0); 1194 1195 /* for led */ 1196 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1197 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1198 if (error != 0) 1199 goto fail; 1200 1201 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1202 if (error) 1203 goto fail; 1204 /* applying MAC address again. */ 1205 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]); 1206 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0xffff); 1207 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1208 if (error) 1209 goto fail; 1210 1211 error = urtw_update_msr(sc); 1212 if (error) 1213 goto fail; 1214 1215 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1216 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1217 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1218 error = urtw_set_rate(sc); 1219 if (error != 0) 1220 goto fail; 1221 1222 error = sc->sc_rf_init(sc); 1223 if (error != 0) 1224 goto fail; 1225 if (sc->sc_rf_set_sens != NULL) 1226 sc->sc_rf_set_sens(sc, sc->sc_sens); 1227 1228 /* XXX correct? to call write16 */ 1229 urtw_write16_m(sc, URTW_PSR, 1); 1230 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1231 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1232 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1233 /* XXX correct? to call write16 */ 1234 urtw_write16_m(sc, URTW_PSR, 0); 1235 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1236 1237 error = urtw_intr_enable(sc); 1238 if (error != 0) 1239 goto fail; 1240 1241 fail: 1242 return (error); 1243 } 1244 1245 static usb_error_t 1246 urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1247 { 1248 uint8_t data; 1249 usb_error_t error; 1250 1251 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1252 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1253 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1254 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1255 fail: 1256 return (error); 1257 } 1258 1259 static usb_error_t 1260 urtw_8187b_cmd_reset(struct urtw_softc *sc) 1261 { 1262 int i; 1263 uint8_t data8; 1264 usb_error_t error; 1265 1266 /* XXX the code can be duplicate with urtw_reset(). */ 1267 urtw_read8_m(sc, URTW_CMD, &data8); 1268 data8 = (data8 & 0x2) | URTW_CMD_RST; 1269 urtw_write8_m(sc, URTW_CMD, data8); 1270 1271 for (i = 0; i < 20; i++) { 1272 usb_pause_mtx(&sc->sc_mtx, 2); 1273 urtw_read8_m(sc, URTW_CMD, &data8); 1274 if (!(data8 & URTW_CMD_RST)) 1275 break; 1276 } 1277 if (i >= 20) { 1278 device_printf(sc->sc_dev, "reset timeout\n"); 1279 goto fail; 1280 } 1281 fail: 1282 return (error); 1283 } 1284 1285 static usb_error_t 1286 urtw_do_request(struct urtw_softc *sc, 1287 struct usb_device_request *req, void *data) 1288 { 1289 usb_error_t err; 1290 int ntries = 10; 1291 1292 URTW_ASSERT_LOCKED(sc); 1293 1294 while (ntries--) { 1295 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1296 req, data, 0, NULL, 250 /* ms */); 1297 if (err == 0) 1298 break; 1299 1300 DPRINTF(sc, URTW_DEBUG_INIT, 1301 "Control request failed, %s (retrying)\n", 1302 usbd_errstr(err)); 1303 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1304 } 1305 return (err); 1306 } 1307 1308 static void 1309 urtw_stop(struct urtw_softc *sc) 1310 { 1311 uint8_t data8; 1312 usb_error_t error; 1313 1314 URTW_ASSERT_LOCKED(sc); 1315 1316 sc->sc_flags &= ~URTW_RUNNING; 1317 1318 error = urtw_intr_disable(sc); 1319 if (error) 1320 goto fail; 1321 urtw_read8_m(sc, URTW_CMD, &data8); 1322 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1323 urtw_write8_m(sc, URTW_CMD, data8); 1324 1325 error = sc->sc_rf_stop(sc); 1326 if (error != 0) 1327 goto fail; 1328 1329 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1330 if (error) 1331 goto fail; 1332 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1333 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1334 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1335 if (error) 1336 goto fail; 1337 fail: 1338 if (error) 1339 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1340 usbd_errstr(error)); 1341 1342 usb_callout_stop(&sc->sc_led_ch); 1343 callout_stop(&sc->sc_watchdog_ch); 1344 1345 urtw_abort_xfers(sc); 1346 } 1347 1348 static void 1349 urtw_abort_xfers(struct urtw_softc *sc) 1350 { 1351 int i, max; 1352 1353 URTW_ASSERT_LOCKED(sc); 1354 1355 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1356 URTW_8187L_N_XFERS; 1357 1358 /* abort any pending transfers */ 1359 for (i = 0; i < max; i++) 1360 usbd_transfer_stop(sc->sc_xfer[i]); 1361 } 1362 1363 static void 1364 urtw_parent(struct ieee80211com *ic) 1365 { 1366 struct urtw_softc *sc = ic->ic_softc; 1367 int startall = 0; 1368 1369 URTW_LOCK(sc); 1370 if (sc->sc_flags & URTW_DETACHED) { 1371 URTW_UNLOCK(sc); 1372 return; 1373 } 1374 1375 if (ic->ic_nrunning > 0) { 1376 if (sc->sc_flags & URTW_RUNNING) { 1377 if (ic->ic_promisc > 0 || ic->ic_allmulti > 0) 1378 urtw_set_multi(sc); 1379 } else { 1380 urtw_init(sc); 1381 startall = 1; 1382 } 1383 } else if (sc->sc_flags & URTW_RUNNING) 1384 urtw_stop(sc); 1385 URTW_UNLOCK(sc); 1386 if (startall) 1387 ieee80211_start_all(ic); 1388 } 1389 1390 static int 1391 urtw_transmit(struct ieee80211com *ic, struct mbuf *m) 1392 { 1393 struct urtw_softc *sc = ic->ic_softc; 1394 int error; 1395 1396 URTW_LOCK(sc); 1397 if ((sc->sc_flags & URTW_RUNNING) == 0) { 1398 URTW_UNLOCK(sc); 1399 return (ENXIO); 1400 } 1401 error = mbufq_enqueue(&sc->sc_snd, m); 1402 if (error) { 1403 URTW_UNLOCK(sc); 1404 return (error); 1405 } 1406 urtw_start(sc); 1407 URTW_UNLOCK(sc); 1408 1409 return (0); 1410 } 1411 1412 static void 1413 urtw_start(struct urtw_softc *sc) 1414 { 1415 struct urtw_data *bf; 1416 struct ieee80211_node *ni; 1417 struct mbuf *m; 1418 1419 URTW_ASSERT_LOCKED(sc); 1420 1421 if ((sc->sc_flags & URTW_RUNNING) == 0) 1422 return; 1423 1424 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1425 bf = urtw_getbuf(sc); 1426 if (bf == NULL) { 1427 mbufq_prepend(&sc->sc_snd, m); 1428 break; 1429 } 1430 1431 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1432 m->m_pkthdr.rcvif = NULL; 1433 1434 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1435 if_inc_counter(ni->ni_vap->iv_ifp, 1436 IFCOUNTER_OERRORS, 1); 1437 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1438 ieee80211_free_node(ni); 1439 break; 1440 } 1441 1442 sc->sc_txtimer = 5; 1443 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1444 } 1445 } 1446 1447 static int 1448 urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1449 int ndata, int maxsz, void *dma_buf) 1450 { 1451 int i, error; 1452 1453 for (i = 0; i < ndata; i++) { 1454 struct urtw_data *dp = &data[i]; 1455 1456 dp->sc = sc; 1457 if (dma_buf == NULL) { 1458 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1459 if (dp->m == NULL) { 1460 device_printf(sc->sc_dev, 1461 "could not allocate rx mbuf\n"); 1462 error = ENOMEM; 1463 goto fail; 1464 } 1465 dp->buf = mtod(dp->m, uint8_t *); 1466 } else { 1467 dp->m = NULL; 1468 dp->buf = ((uint8_t *)dma_buf) + 1469 (i * maxsz); 1470 } 1471 dp->ni = NULL; 1472 } 1473 return (0); 1474 1475 fail: urtw_free_data_list(sc, data, ndata, 1); 1476 return (error); 1477 } 1478 1479 static int 1480 urtw_alloc_rx_data_list(struct urtw_softc *sc) 1481 { 1482 int error, i; 1483 1484 error = urtw_alloc_data_list(sc, 1485 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1486 MCLBYTES, NULL /* mbufs */); 1487 if (error != 0) 1488 return (error); 1489 1490 STAILQ_INIT(&sc->sc_rx_active); 1491 STAILQ_INIT(&sc->sc_rx_inactive); 1492 1493 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1494 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1495 1496 return (0); 1497 } 1498 1499 static int 1500 urtw_alloc_tx_data_list(struct urtw_softc *sc) 1501 { 1502 int error, i; 1503 1504 error = urtw_alloc_data_list(sc, 1505 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1506 sc->sc_tx_dma_buf /* no mbufs */); 1507 if (error != 0) 1508 return (error); 1509 1510 STAILQ_INIT(&sc->sc_tx_active); 1511 STAILQ_INIT(&sc->sc_tx_inactive); 1512 STAILQ_INIT(&sc->sc_tx_pending); 1513 1514 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1515 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1516 next); 1517 1518 return (0); 1519 } 1520 1521 static int 1522 urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1523 const struct ieee80211_bpf_params *params) 1524 { 1525 struct ieee80211com *ic = ni->ni_ic; 1526 struct urtw_softc *sc = ic->ic_softc; 1527 struct urtw_data *bf; 1528 1529 /* prevent management frames from being sent if we're not ready */ 1530 if (!(sc->sc_flags & URTW_RUNNING)) { 1531 m_freem(m); 1532 ieee80211_free_node(ni); 1533 return ENETDOWN; 1534 } 1535 URTW_LOCK(sc); 1536 bf = urtw_getbuf(sc); 1537 if (bf == NULL) { 1538 ieee80211_free_node(ni); 1539 m_freem(m); 1540 URTW_UNLOCK(sc); 1541 return (ENOBUFS); /* XXX */ 1542 } 1543 1544 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1545 ieee80211_free_node(ni); 1546 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1547 URTW_UNLOCK(sc); 1548 return (EIO); 1549 } 1550 URTW_UNLOCK(sc); 1551 1552 sc->sc_txtimer = 5; 1553 return (0); 1554 } 1555 1556 static void 1557 urtw_scan_start(struct ieee80211com *ic) 1558 { 1559 1560 /* XXX do nothing? */ 1561 } 1562 1563 static void 1564 urtw_scan_end(struct ieee80211com *ic) 1565 { 1566 1567 /* XXX do nothing? */ 1568 } 1569 1570 static void 1571 urtw_set_channel(struct ieee80211com *ic) 1572 { 1573 struct urtw_softc *sc = ic->ic_softc; 1574 uint32_t data, orig; 1575 usb_error_t error; 1576 1577 /* 1578 * if the user set a channel explicitly using ifconfig(8) this function 1579 * can be called earlier than we're expected that in some cases the 1580 * initialization would be failed if setting a channel is called before 1581 * the init have done. 1582 */ 1583 if (!(sc->sc_flags & URTW_RUNNING)) 1584 return; 1585 1586 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1587 return; 1588 1589 URTW_LOCK(sc); 1590 1591 /* 1592 * during changing th channel we need to temporarily be disable 1593 * TX. 1594 */ 1595 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1596 data = orig & ~URTW_TX_LOOPBACK_MASK; 1597 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1598 1599 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1600 if (error != 0) 1601 goto fail; 1602 usb_pause_mtx(&sc->sc_mtx, 10); 1603 urtw_write32_m(sc, URTW_TX_CONF, orig); 1604 1605 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1606 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1607 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1608 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1609 1610 fail: 1611 URTW_UNLOCK(sc); 1612 1613 sc->sc_curchan = ic->ic_curchan; 1614 1615 if (error != 0) 1616 device_printf(sc->sc_dev, "could not change the channel\n"); 1617 } 1618 1619 static void 1620 urtw_update_mcast(struct ieee80211com *ic) 1621 { 1622 1623 /* XXX do nothing? */ 1624 } 1625 1626 static int 1627 urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1628 struct urtw_data *data, int prior) 1629 { 1630 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1631 struct ieee80211_key *k; 1632 const struct ieee80211_txparam *tp; 1633 struct ieee80211com *ic = &sc->sc_ic; 1634 struct ieee80211vap *vap = ni->ni_vap; 1635 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1636 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1637 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1638 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1639 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1640 }; 1641 struct usb_xfer *xfer; 1642 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1643 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1644 uint16_t acktime, rtstime, ctstime; 1645 uint32_t flags; 1646 usb_error_t error; 1647 1648 URTW_ASSERT_LOCKED(sc); 1649 1650 /* 1651 * Software crypto. 1652 */ 1653 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1654 k = ieee80211_crypto_encap(ni, m0); 1655 if (k == NULL) { 1656 device_printf(sc->sc_dev, 1657 "ieee80211_crypto_encap returns NULL.\n"); 1658 /* XXX we don't expect the fragmented frames */ 1659 m_freem(m0); 1660 return (ENOBUFS); 1661 } 1662 1663 /* in case packet header moved, reset pointer */ 1664 wh = mtod(m0, struct ieee80211_frame *); 1665 } 1666 1667 if (ieee80211_radiotap_active_vap(vap)) { 1668 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1669 1670 /* XXX Are variables correct? */ 1671 tap->wt_flags = 0; 1672 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1673 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1674 1675 ieee80211_radiotap_tx(vap, m0); 1676 } 1677 1678 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1679 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1680 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1681 rate = tp->mgmtrate; 1682 } else { 1683 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1684 /* for data frames */ 1685 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1686 rate = tp->mcastrate; 1687 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1688 rate = tp->ucastrate; 1689 else 1690 rate = urtw_rtl2rate(sc->sc_currate); 1691 } 1692 1693 sc->sc_stats.txrates[sc->sc_currate]++; 1694 1695 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1696 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1697 IEEE80211_CRC_LEN, rate, 0, 0); 1698 else { 1699 acktime = urtw_compute_txtime(14, 2,0, 0); 1700 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1701 rtsenable = 1; 1702 ctsenable = 0; 1703 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1704 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1705 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1706 IEEE80211_CRC_LEN, rate, 0, isshort); 1707 rtsdur = ctstime + pkttime + acktime + 1708 3 * URTW_ASIFS_TIME; 1709 txdur = rtstime + rtsdur; 1710 } else { 1711 rtsenable = ctsenable = rtsdur = 0; 1712 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1713 IEEE80211_CRC_LEN, rate, 0, isshort); 1714 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1715 } 1716 1717 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1718 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1719 IEEE80211_CRC_LEN, rate, 0, isshort) + 1720 3 * URTW_ASIFS_TIME + 1721 2 * acktime; 1722 else 1723 dur = URTW_ASIFS_TIME + acktime; 1724 } 1725 USETW(wh->i_dur, dur); 1726 1727 xferlen = m0->m_pkthdr.len; 1728 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1729 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1730 xferlen += 1; 1731 1732 memset(data->buf, 0, URTW_TX_MAXSIZE); 1733 flags = m0->m_pkthdr.len & 0xfff; 1734 flags |= URTW_TX_FLAG_NO_ENC; 1735 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1736 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1737 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1738 (sc->sc_currate != 0)) 1739 flags |= URTW_TX_FLAG_SPLCP; 1740 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1741 flags |= URTW_TX_FLAG_MOREFRAG; 1742 1743 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1744 1745 if (sc->sc_flags & URTW_RTL8187B) { 1746 struct urtw_8187b_txhdr *tx; 1747 1748 tx = (struct urtw_8187b_txhdr *)data->buf; 1749 if (ctsenable) 1750 flags |= URTW_TX_FLAG_CTS; 1751 if (rtsenable) { 1752 flags |= URTW_TX_FLAG_RTS; 1753 flags |= (urtw_rate2rtl(11) & 0xf) << 1754 URTW_TX_FLAG_RTSRATE_SHIFT; 1755 tx->rtsdur = rtsdur; 1756 } 1757 tx->flag = htole32(flags); 1758 tx->txdur = txdur; 1759 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1760 IEEE80211_FC0_TYPE_MGT && 1761 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1762 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1763 tx->retry = 1; 1764 else 1765 tx->retry = URTW_TX_MAXRETRY; 1766 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1767 } else { 1768 struct urtw_8187l_txhdr *tx; 1769 1770 tx = (struct urtw_8187l_txhdr *)data->buf; 1771 if (rtsenable) { 1772 flags |= URTW_TX_FLAG_RTS; 1773 tx->rtsdur = rtsdur; 1774 } 1775 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1776 tx->flag = htole32(flags); 1777 tx->retry = 3; /* CW minimum */ 1778 tx->retry = 7 << 4; /* CW maximum */ 1779 tx->retry = URTW_TX_MAXRETRY << 8; /* retry limitation */ 1780 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1781 } 1782 1783 data->buflen = xferlen; 1784 data->ni = ni; 1785 data->m = m0; 1786 1787 if (sc->sc_flags & URTW_RTL8187B) { 1788 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1789 case IEEE80211_FC0_TYPE_CTL: 1790 case IEEE80211_FC0_TYPE_MGT: 1791 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1792 break; 1793 default: 1794 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1795 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1796 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1797 break; 1798 } 1799 } else 1800 xfer = (prior == URTW_PRIORITY_LOW) ? 1801 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1802 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1803 1804 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1805 usbd_transfer_start(xfer); 1806 1807 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1808 if (error != 0) 1809 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1810 error); 1811 return (0); 1812 } 1813 1814 static int 1815 urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1816 { 1817 struct ieee80211com *ic = vap->iv_ic; 1818 struct urtw_softc *sc = ic->ic_softc; 1819 struct urtw_vap *uvp = URTW_VAP(vap); 1820 struct ieee80211_node *ni; 1821 usb_error_t error = 0; 1822 1823 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1824 ieee80211_state_name[vap->iv_state], 1825 ieee80211_state_name[nstate]); 1826 1827 sc->sc_state = nstate; 1828 1829 IEEE80211_UNLOCK(ic); 1830 URTW_LOCK(sc); 1831 usb_callout_stop(&sc->sc_led_ch); 1832 callout_stop(&sc->sc_watchdog_ch); 1833 1834 switch (nstate) { 1835 case IEEE80211_S_INIT: 1836 case IEEE80211_S_SCAN: 1837 case IEEE80211_S_AUTH: 1838 case IEEE80211_S_ASSOC: 1839 break; 1840 case IEEE80211_S_RUN: 1841 ni = ieee80211_ref_node(vap->iv_bss); 1842 /* setting bssid. */ 1843 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1844 urtw_write16_m(sc, URTW_BSSID + 4, 1845 ((uint16_t *)ni->ni_bssid)[2]); 1846 urtw_update_msr(sc); 1847 /* XXX maybe the below would be incorrect. */ 1848 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1849 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1850 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1851 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1852 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1853 if (error != 0) 1854 device_printf(sc->sc_dev, 1855 "could not control LED (%d)\n", error); 1856 ieee80211_free_node(ni); 1857 break; 1858 default: 1859 break; 1860 } 1861 fail: 1862 URTW_UNLOCK(sc); 1863 IEEE80211_LOCK(ic); 1864 return (uvp->newstate(vap, nstate, arg)); 1865 } 1866 1867 static void 1868 urtw_watchdog(void *arg) 1869 { 1870 struct urtw_softc *sc = arg; 1871 1872 if (sc->sc_txtimer > 0) { 1873 if (--sc->sc_txtimer == 0) { 1874 device_printf(sc->sc_dev, "device timeout\n"); 1875 counter_u64_add(sc->sc_ic.ic_oerrors, 1); 1876 return; 1877 } 1878 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1879 } 1880 } 1881 1882 static void 1883 urtw_set_multi(void *arg) 1884 { 1885 /* XXX don't know how to set a device. Lack of docs. */ 1886 } 1887 1888 static usb_error_t 1889 urtw_set_rate(struct urtw_softc *sc) 1890 { 1891 int i, basic_rate, min_rr_rate, max_rr_rate; 1892 uint16_t data; 1893 usb_error_t error; 1894 1895 basic_rate = urtw_rate2rtl(48); 1896 min_rr_rate = urtw_rate2rtl(12); 1897 max_rr_rate = urtw_rate2rtl(48); 1898 1899 urtw_write8_m(sc, URTW_RESP_RATE, 1900 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1901 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1902 1903 urtw_read16_m(sc, URTW_BRSR, &data); 1904 data &= ~URTW_BRSR_MBR_8185; 1905 1906 for (i = 0; i <= basic_rate; i++) 1907 data |= (1 << i); 1908 1909 urtw_write16_m(sc, URTW_BRSR, data); 1910 fail: 1911 return (error); 1912 } 1913 1914 static uint16_t 1915 urtw_rate2rtl(uint32_t rate) 1916 { 1917 #define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1918 int i; 1919 1920 for (i = 0; i < N(urtw_ratetable); i++) { 1921 if (rate == urtw_ratetable[i].reg) 1922 return urtw_ratetable[i].val; 1923 } 1924 1925 return (3); 1926 #undef N 1927 } 1928 1929 static uint16_t 1930 urtw_rtl2rate(uint32_t rate) 1931 { 1932 #define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1933 int i; 1934 1935 for (i = 0; i < N(urtw_ratetable); i++) { 1936 if (rate == urtw_ratetable[i].val) 1937 return urtw_ratetable[i].reg; 1938 } 1939 1940 return (0); 1941 #undef N 1942 } 1943 1944 static usb_error_t 1945 urtw_update_msr(struct urtw_softc *sc) 1946 { 1947 struct ieee80211com *ic = &sc->sc_ic; 1948 uint8_t data; 1949 usb_error_t error; 1950 1951 urtw_read8_m(sc, URTW_MSR, &data); 1952 data &= ~URTW_MSR_LINK_MASK; 1953 1954 if (sc->sc_state == IEEE80211_S_RUN) { 1955 switch (ic->ic_opmode) { 1956 case IEEE80211_M_STA: 1957 case IEEE80211_M_MONITOR: 1958 data |= URTW_MSR_LINK_STA; 1959 if (sc->sc_flags & URTW_RTL8187B) 1960 data |= URTW_MSR_LINK_ENEDCA; 1961 break; 1962 case IEEE80211_M_IBSS: 1963 data |= URTW_MSR_LINK_ADHOC; 1964 break; 1965 case IEEE80211_M_HOSTAP: 1966 data |= URTW_MSR_LINK_HOSTAP; 1967 break; 1968 default: 1969 DPRINTF(sc, URTW_DEBUG_STATE, 1970 "unsupported operation mode 0x%x\n", 1971 ic->ic_opmode); 1972 error = USB_ERR_INVAL; 1973 goto fail; 1974 } 1975 } else 1976 data |= URTW_MSR_LINK_NONE; 1977 1978 urtw_write8_m(sc, URTW_MSR, data); 1979 fail: 1980 return (error); 1981 } 1982 1983 static usb_error_t 1984 urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 1985 { 1986 struct usb_device_request req; 1987 usb_error_t error; 1988 1989 URTW_ASSERT_LOCKED(sc); 1990 1991 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1992 req.bRequest = URTW_8187_GETREGS_REQ; 1993 USETW(req.wValue, (val & 0xff) | 0xff00); 1994 USETW(req.wIndex, (val >> 8) & 0x3); 1995 USETW(req.wLength, sizeof(uint8_t)); 1996 1997 error = urtw_do_request(sc, &req, data); 1998 return (error); 1999 } 2000 2001 static usb_error_t 2002 urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2003 { 2004 struct usb_device_request req; 2005 usb_error_t error; 2006 2007 URTW_ASSERT_LOCKED(sc); 2008 2009 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2010 req.bRequest = URTW_8187_GETREGS_REQ; 2011 USETW(req.wValue, (val & 0xff) | 0xff00); 2012 USETW(req.wIndex, (val >> 8) & 0x3); 2013 USETW(req.wLength, sizeof(uint16_t)); 2014 2015 error = urtw_do_request(sc, &req, data); 2016 return (error); 2017 } 2018 2019 static usb_error_t 2020 urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2021 { 2022 struct usb_device_request req; 2023 usb_error_t error; 2024 2025 URTW_ASSERT_LOCKED(sc); 2026 2027 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2028 req.bRequest = URTW_8187_GETREGS_REQ; 2029 USETW(req.wValue, (val & 0xff) | 0xff00); 2030 USETW(req.wIndex, (val >> 8) & 0x3); 2031 USETW(req.wLength, sizeof(uint32_t)); 2032 2033 error = urtw_do_request(sc, &req, data); 2034 return (error); 2035 } 2036 2037 static usb_error_t 2038 urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2039 { 2040 struct usb_device_request req; 2041 2042 URTW_ASSERT_LOCKED(sc); 2043 2044 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2045 req.bRequest = URTW_8187_SETREGS_REQ; 2046 USETW(req.wValue, (val & 0xff) | 0xff00); 2047 USETW(req.wIndex, (val >> 8) & 0x3); 2048 USETW(req.wLength, sizeof(uint8_t)); 2049 2050 return (urtw_do_request(sc, &req, &data)); 2051 } 2052 2053 static usb_error_t 2054 urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2055 { 2056 struct usb_device_request req; 2057 2058 URTW_ASSERT_LOCKED(sc); 2059 2060 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2061 req.bRequest = URTW_8187_SETREGS_REQ; 2062 USETW(req.wValue, (val & 0xff) | 0xff00); 2063 USETW(req.wIndex, (val >> 8) & 0x3); 2064 USETW(req.wLength, sizeof(uint16_t)); 2065 2066 return (urtw_do_request(sc, &req, &data)); 2067 } 2068 2069 static usb_error_t 2070 urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2071 { 2072 struct usb_device_request req; 2073 2074 URTW_ASSERT_LOCKED(sc); 2075 2076 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2077 req.bRequest = URTW_8187_SETREGS_REQ; 2078 USETW(req.wValue, (val & 0xff) | 0xff00); 2079 USETW(req.wIndex, (val >> 8) & 0x3); 2080 USETW(req.wLength, sizeof(uint32_t)); 2081 2082 return (urtw_do_request(sc, &req, &data)); 2083 } 2084 2085 static usb_error_t 2086 urtw_get_macaddr(struct urtw_softc *sc) 2087 { 2088 struct ieee80211com *ic = &sc->sc_ic; 2089 uint32_t data; 2090 usb_error_t error; 2091 2092 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2093 if (error != 0) 2094 goto fail; 2095 ic->ic_macaddr[0] = data & 0xff; 2096 ic->ic_macaddr[1] = (data & 0xff00) >> 8; 2097 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2098 if (error != 0) 2099 goto fail; 2100 ic->ic_macaddr[2] = data & 0xff; 2101 ic->ic_macaddr[3] = (data & 0xff00) >> 8; 2102 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2103 if (error != 0) 2104 goto fail; 2105 ic->ic_macaddr[4] = data & 0xff; 2106 ic->ic_macaddr[5] = (data & 0xff00) >> 8; 2107 fail: 2108 return (error); 2109 } 2110 2111 static usb_error_t 2112 urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2113 { 2114 #define URTW_READCMD_LEN 3 2115 int addrlen, i; 2116 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2117 usb_error_t error; 2118 2119 /* NB: make sure the buffer is initialized */ 2120 *data = 0; 2121 2122 /* enable EPROM programming */ 2123 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2124 DELAY(URTW_EPROM_DELAY); 2125 2126 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2127 if (error != 0) 2128 goto fail; 2129 error = urtw_eprom_ck(sc); 2130 if (error != 0) 2131 goto fail; 2132 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2133 if (error != 0) 2134 goto fail; 2135 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2136 addrlen = 8; 2137 addrstr[0] = addr & (1 << 7); 2138 addrstr[1] = addr & (1 << 6); 2139 addrstr[2] = addr & (1 << 5); 2140 addrstr[3] = addr & (1 << 4); 2141 addrstr[4] = addr & (1 << 3); 2142 addrstr[5] = addr & (1 << 2); 2143 addrstr[6] = addr & (1 << 1); 2144 addrstr[7] = addr & (1 << 0); 2145 } else { 2146 addrlen=6; 2147 addrstr[0] = addr & (1 << 5); 2148 addrstr[1] = addr & (1 << 4); 2149 addrstr[2] = addr & (1 << 3); 2150 addrstr[3] = addr & (1 << 2); 2151 addrstr[4] = addr & (1 << 1); 2152 addrstr[5] = addr & (1 << 0); 2153 } 2154 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2155 if (error != 0) 2156 goto fail; 2157 2158 error = urtw_eprom_writebit(sc, 0); 2159 if (error != 0) 2160 goto fail; 2161 2162 for (i = 0; i < 16; i++) { 2163 error = urtw_eprom_ck(sc); 2164 if (error != 0) 2165 goto fail; 2166 error = urtw_eprom_readbit(sc, &data16); 2167 if (error != 0) 2168 goto fail; 2169 2170 (*data) |= (data16 << (15 - i)); 2171 } 2172 2173 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2174 if (error != 0) 2175 goto fail; 2176 error = urtw_eprom_ck(sc); 2177 if (error != 0) 2178 goto fail; 2179 2180 /* now disable EPROM programming */ 2181 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2182 fail: 2183 return (error); 2184 #undef URTW_READCMD_LEN 2185 } 2186 2187 static usb_error_t 2188 urtw_eprom_cs(struct urtw_softc *sc, int able) 2189 { 2190 uint8_t data; 2191 usb_error_t error; 2192 2193 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2194 if (able == URTW_EPROM_ENABLE) 2195 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2196 else 2197 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2198 DELAY(URTW_EPROM_DELAY); 2199 fail: 2200 return (error); 2201 } 2202 2203 static usb_error_t 2204 urtw_eprom_ck(struct urtw_softc *sc) 2205 { 2206 uint8_t data; 2207 usb_error_t error; 2208 2209 /* masking */ 2210 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2211 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2212 DELAY(URTW_EPROM_DELAY); 2213 /* unmasking */ 2214 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2215 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2216 DELAY(URTW_EPROM_DELAY); 2217 fail: 2218 return (error); 2219 } 2220 2221 static usb_error_t 2222 urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2223 { 2224 uint8_t data8; 2225 usb_error_t error; 2226 2227 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2228 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2229 DELAY(URTW_EPROM_DELAY); 2230 2231 fail: 2232 return (error); 2233 } 2234 2235 static usb_error_t 2236 urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2237 { 2238 uint8_t data; 2239 usb_error_t error; 2240 2241 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2242 if (bit != 0) 2243 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2244 else 2245 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2246 DELAY(URTW_EPROM_DELAY); 2247 fail: 2248 return (error); 2249 } 2250 2251 static usb_error_t 2252 urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2253 { 2254 int i = 0; 2255 usb_error_t error = 0; 2256 2257 for (i = 0; i < buflen; i++) { 2258 error = urtw_eprom_writebit(sc, buf[i]); 2259 if (error != 0) 2260 goto fail; 2261 error = urtw_eprom_ck(sc); 2262 if (error != 0) 2263 goto fail; 2264 } 2265 fail: 2266 return (error); 2267 } 2268 2269 2270 static usb_error_t 2271 urtw_get_txpwr(struct urtw_softc *sc) 2272 { 2273 int i, j; 2274 uint32_t data; 2275 usb_error_t error; 2276 2277 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2278 if (error != 0) 2279 goto fail; 2280 sc->sc_txpwr_cck_base = data & 0xf; 2281 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2282 2283 for (i = 1, j = 0; i < 6; i += 2, j++) { 2284 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2285 if (error != 0) 2286 goto fail; 2287 sc->sc_txpwr_cck[i] = data & 0xf; 2288 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2289 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2290 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2291 } 2292 for (i = 1, j = 0; i < 4; i += 2, j++) { 2293 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2294 if (error != 0) 2295 goto fail; 2296 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2297 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2298 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2299 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2300 } 2301 if (sc->sc_flags & URTW_RTL8187B) { 2302 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2303 if (error != 0) 2304 goto fail; 2305 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2306 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2307 error = urtw_eprom_read32(sc, 0x0a, &data); 2308 if (error != 0) 2309 goto fail; 2310 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2311 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2312 error = urtw_eprom_read32(sc, 0x1c, &data); 2313 if (error != 0) 2314 goto fail; 2315 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2316 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2317 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2318 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2319 } else { 2320 for (i = 1, j = 0; i < 4; i += 2, j++) { 2321 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2322 &data); 2323 if (error != 0) 2324 goto fail; 2325 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2326 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2327 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2328 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2329 } 2330 } 2331 fail: 2332 return (error); 2333 } 2334 2335 2336 static usb_error_t 2337 urtw_get_rfchip(struct urtw_softc *sc) 2338 { 2339 int ret; 2340 uint8_t data8; 2341 uint32_t data; 2342 usb_error_t error; 2343 2344 if (sc->sc_flags & URTW_RTL8187B) { 2345 urtw_read8_m(sc, 0xe1, &data8); 2346 switch (data8) { 2347 case 0: 2348 sc->sc_flags |= URTW_RTL8187B_REV_B; 2349 break; 2350 case 1: 2351 sc->sc_flags |= URTW_RTL8187B_REV_D; 2352 break; 2353 case 2: 2354 sc->sc_flags |= URTW_RTL8187B_REV_E; 2355 break; 2356 default: 2357 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2358 sc->sc_flags |= URTW_RTL8187B_REV_B; 2359 break; 2360 } 2361 } else { 2362 urtw_read32_m(sc, URTW_TX_CONF, &data); 2363 switch (data & URTW_TX_HWMASK) { 2364 case URTW_TX_R8187vD_B: 2365 sc->sc_flags |= URTW_RTL8187B; 2366 break; 2367 case URTW_TX_R8187vD: 2368 break; 2369 default: 2370 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2371 data & URTW_TX_HWMASK); 2372 break; 2373 } 2374 } 2375 2376 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2377 if (error != 0) 2378 goto fail; 2379 switch (data & 0xff) { 2380 case URTW_EPROM_RFCHIPID_RTL8225U: 2381 error = urtw_8225_isv2(sc, &ret); 2382 if (error != 0) 2383 goto fail; 2384 if (ret == 0) { 2385 sc->sc_rf_init = urtw_8225_rf_init; 2386 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2387 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2388 sc->sc_rf_stop = urtw_8225_rf_stop; 2389 } else { 2390 sc->sc_rf_init = urtw_8225v2_rf_init; 2391 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2392 sc->sc_rf_stop = urtw_8225_rf_stop; 2393 } 2394 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2395 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2396 break; 2397 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2398 sc->sc_rf_init = urtw_8225v2b_rf_init; 2399 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2400 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2401 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2402 sc->sc_rf_stop = urtw_8225_rf_stop; 2403 break; 2404 default: 2405 DPRINTF(sc, URTW_DEBUG_STATE, 2406 "unsupported RF chip %d\n", data & 0xff); 2407 error = USB_ERR_INVAL; 2408 goto fail; 2409 } 2410 2411 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2412 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2413 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2414 "rtl8225z2", 2415 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2416 (data8 == 1) ? "d" : "e") : "none"); 2417 2418 fail: 2419 return (error); 2420 } 2421 2422 2423 static usb_error_t 2424 urtw_led_init(struct urtw_softc *sc) 2425 { 2426 uint32_t rev; 2427 usb_error_t error; 2428 2429 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2430 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2431 if (error != 0) 2432 goto fail; 2433 2434 switch (rev & URTW_EPROM_CID_MASK) { 2435 case URTW_EPROM_CID_ALPHA0: 2436 sc->sc_strategy = URTW_SW_LED_MODE1; 2437 break; 2438 case URTW_EPROM_CID_SERCOMM_PS: 2439 sc->sc_strategy = URTW_SW_LED_MODE3; 2440 break; 2441 case URTW_EPROM_CID_HW_LED: 2442 sc->sc_strategy = URTW_HW_LED; 2443 break; 2444 case URTW_EPROM_CID_RSVD0: 2445 case URTW_EPROM_CID_RSVD1: 2446 default: 2447 sc->sc_strategy = URTW_SW_LED_MODE0; 2448 break; 2449 } 2450 2451 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2452 2453 fail: 2454 return (error); 2455 } 2456 2457 2458 static usb_error_t 2459 urtw_8225_rf_init(struct urtw_softc *sc) 2460 { 2461 #define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2462 int i; 2463 uint16_t data; 2464 usb_error_t error; 2465 2466 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2467 if (error) 2468 goto fail; 2469 2470 error = urtw_8225_usb_init(sc); 2471 if (error) 2472 goto fail; 2473 2474 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2475 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2476 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2477 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2478 2479 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2480 if (error) 2481 goto fail; 2482 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2483 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2484 if (error) 2485 goto fail; 2486 2487 error = urtw_8185_rf_pins_enable(sc); 2488 if (error) 2489 goto fail; 2490 usb_pause_mtx(&sc->sc_mtx, 1000); 2491 2492 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2493 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2494 urtw_8225_rf_part1[i].val); 2495 usb_pause_mtx(&sc->sc_mtx, 1); 2496 } 2497 usb_pause_mtx(&sc->sc_mtx, 100); 2498 urtw_8225_write(sc, 2499 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2500 usb_pause_mtx(&sc->sc_mtx, 200); 2501 urtw_8225_write(sc, 2502 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2503 usb_pause_mtx(&sc->sc_mtx, 200); 2504 urtw_8225_write(sc, 2505 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2506 2507 for (i = 0; i < 95; i++) { 2508 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2509 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2510 } 2511 2512 urtw_8225_write(sc, 2513 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2514 urtw_8225_write(sc, 2515 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2516 2517 for (i = 0; i < 128; i++) { 2518 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2519 usb_pause_mtx(&sc->sc_mtx, 1); 2520 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2521 usb_pause_mtx(&sc->sc_mtx, 1); 2522 } 2523 2524 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2525 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2526 urtw_8225_rf_part2[i].val); 2527 usb_pause_mtx(&sc->sc_mtx, 1); 2528 } 2529 2530 error = urtw_8225_setgain(sc, 4); 2531 if (error) 2532 goto fail; 2533 2534 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2535 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2536 urtw_8225_rf_part3[i].val); 2537 usb_pause_mtx(&sc->sc_mtx, 1); 2538 } 2539 2540 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2541 2542 error = urtw_8225_set_txpwrlvl(sc, 1); 2543 if (error) 2544 goto fail; 2545 2546 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2547 usb_pause_mtx(&sc->sc_mtx, 1); 2548 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2549 usb_pause_mtx(&sc->sc_mtx, 1); 2550 2551 /* TX ant A, 0x0 for B */ 2552 error = urtw_8185_tx_antenna(sc, 0x3); 2553 if (error) 2554 goto fail; 2555 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2556 2557 error = urtw_8225_rf_set_chan(sc, 1); 2558 fail: 2559 return (error); 2560 #undef N 2561 } 2562 2563 static usb_error_t 2564 urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2565 { 2566 usb_error_t error = 0; 2567 2568 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2569 fail: 2570 return (error); 2571 } 2572 2573 static usb_error_t 2574 urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2575 { 2576 usb_error_t error; 2577 2578 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2579 usb_pause_mtx(&sc->sc_mtx, 1); 2580 fail: 2581 return (error); 2582 } 2583 2584 static usb_error_t 2585 urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2586 { 2587 2588 data = data & 0xff; 2589 return urtw_8187_write_phy(sc, addr, data); 2590 } 2591 2592 static usb_error_t 2593 urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2594 { 2595 2596 data = data & 0xff; 2597 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2598 } 2599 2600 static usb_error_t 2601 urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2602 { 2603 uint32_t phyw; 2604 usb_error_t error; 2605 2606 phyw = ((data << 8) | (addr | 0x80)); 2607 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2608 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2609 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2610 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2611 usb_pause_mtx(&sc->sc_mtx, 1); 2612 fail: 2613 return (error); 2614 } 2615 2616 static usb_error_t 2617 urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2618 { 2619 usb_error_t error; 2620 2621 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2622 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2623 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2624 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2625 fail: 2626 return (error); 2627 } 2628 2629 static usb_error_t 2630 urtw_8225_usb_init(struct urtw_softc *sc) 2631 { 2632 uint8_t data; 2633 usb_error_t error; 2634 2635 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2636 urtw_write8_m(sc, URTW_GPIO, 0); 2637 error = urtw_read8e(sc, 0x53, &data); 2638 if (error) 2639 goto fail; 2640 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2641 if (error) 2642 goto fail; 2643 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2644 urtw_write8_m(sc, URTW_GPIO, 0x20); 2645 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2646 2647 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2648 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2649 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2650 2651 usb_pause_mtx(&sc->sc_mtx, 500); 2652 fail: 2653 return (error); 2654 } 2655 2656 static usb_error_t 2657 urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2658 { 2659 uint16_t d80, d82, d84; 2660 usb_error_t error; 2661 2662 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2663 d80 &= URTW_RF_PINS_MAGIC1; 2664 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2665 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2666 d84 &= URTW_RF_PINS_MAGIC2; 2667 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2668 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2669 DELAY(10); 2670 2671 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2672 DELAY(2); 2673 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2674 DELAY(10); 2675 2676 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2677 if (error != 0) 2678 goto fail; 2679 2680 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2681 DELAY(10); 2682 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2683 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2684 usb_pause_mtx(&sc->sc_mtx, 2); 2685 fail: 2686 return (error); 2687 } 2688 2689 static usb_error_t 2690 urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2691 uint16_t *data) 2692 { 2693 uint8_t buf[2]; 2694 uint16_t data16; 2695 struct usb_device_request req; 2696 usb_error_t error = 0; 2697 2698 data16 = *data; 2699 2700 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2701 req.bRequest = URTW_8187_SETREGS_REQ; 2702 USETW(req.wValue, addr); 2703 USETW(req.wIndex, index); 2704 USETW(req.wLength, sizeof(uint16_t)); 2705 buf[0] = (data16 & 0x00ff); 2706 buf[1] = (data16 & 0xff00) >> 8; 2707 2708 error = urtw_do_request(sc, &req, buf); 2709 2710 return (error); 2711 } 2712 2713 static usb_error_t 2714 urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2715 { 2716 usb_error_t error; 2717 2718 error = urtw_8225_set_txpwrlvl(sc, chan); 2719 if (error) 2720 goto fail; 2721 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2722 usb_pause_mtx(&sc->sc_mtx, 10); 2723 fail: 2724 return (error); 2725 } 2726 2727 static usb_error_t 2728 urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2729 { 2730 usb_error_t error; 2731 2732 if (sens < 0 || sens > 6) 2733 return -1; 2734 2735 if (sens > 4) 2736 urtw_8225_write(sc, 2737 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2738 else 2739 urtw_8225_write(sc, 2740 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2741 2742 sens = 6 - sens; 2743 error = urtw_8225_setgain(sc, sens); 2744 if (error) 2745 goto fail; 2746 2747 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2748 2749 fail: 2750 return (error); 2751 } 2752 2753 static usb_error_t 2754 urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2755 { 2756 int i, idx, set; 2757 uint8_t *cck_pwltable; 2758 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2759 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2760 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2761 usb_error_t error; 2762 2763 cck_pwrlvl_max = 11; 2764 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2765 ofdm_pwrlvl_min = 10; 2766 2767 /* CCK power setting */ 2768 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2769 idx = cck_pwrlvl % 6; 2770 set = cck_pwrlvl / 6; 2771 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2772 urtw_8225_txpwr_cck; 2773 2774 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2775 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2776 for (i = 0; i < 8; i++) { 2777 urtw_8187_write_phy_cck(sc, 0x44 + i, 2778 cck_pwltable[idx * 8 + i]); 2779 } 2780 usb_pause_mtx(&sc->sc_mtx, 1); 2781 2782 /* OFDM power setting */ 2783 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2784 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2785 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2786 2787 idx = ofdm_pwrlvl % 6; 2788 set = ofdm_pwrlvl / 6; 2789 2790 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2791 if (error) 2792 goto fail; 2793 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2794 urtw_8187_write_phy_ofdm(sc, 6, 0); 2795 urtw_8187_write_phy_ofdm(sc, 8, 0); 2796 2797 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2798 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2799 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2800 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2801 usb_pause_mtx(&sc->sc_mtx, 1); 2802 fail: 2803 return (error); 2804 } 2805 2806 2807 static usb_error_t 2808 urtw_8225_rf_stop(struct urtw_softc *sc) 2809 { 2810 uint8_t data; 2811 usb_error_t error; 2812 2813 urtw_8225_write(sc, 0x4, 0x1f); 2814 2815 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2816 if (error) 2817 goto fail; 2818 2819 urtw_read8_m(sc, URTW_CONFIG3, &data); 2820 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2821 if (sc->sc_flags & URTW_RTL8187B) { 2822 urtw_write32_m(sc, URTW_ANAPARAM2, 2823 URTW_8187B_8225_ANAPARAM2_OFF); 2824 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2825 urtw_write32_m(sc, URTW_ANAPARAM3, 2826 URTW_8187B_8225_ANAPARAM3_OFF); 2827 } else { 2828 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2829 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2830 } 2831 2832 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2833 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2834 if (error) 2835 goto fail; 2836 2837 fail: 2838 return (error); 2839 } 2840 2841 static usb_error_t 2842 urtw_8225v2_rf_init(struct urtw_softc *sc) 2843 { 2844 #define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2845 int i; 2846 uint16_t data; 2847 uint32_t data32; 2848 usb_error_t error; 2849 2850 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2851 if (error) 2852 goto fail; 2853 2854 error = urtw_8225_usb_init(sc); 2855 if (error) 2856 goto fail; 2857 2858 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2859 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2860 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2861 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2862 2863 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2864 if (error) 2865 goto fail; 2866 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2867 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2868 if (error) 2869 goto fail; 2870 2871 error = urtw_8185_rf_pins_enable(sc); 2872 if (error) 2873 goto fail; 2874 2875 usb_pause_mtx(&sc->sc_mtx, 500); 2876 2877 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2878 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2879 urtw_8225v2_rf_part1[i].val); 2880 } 2881 usb_pause_mtx(&sc->sc_mtx, 50); 2882 2883 urtw_8225_write(sc, 2884 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2885 2886 for (i = 0; i < 95; i++) { 2887 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2888 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2889 urtw_8225v2_rxgain[i]); 2890 } 2891 2892 urtw_8225_write(sc, 2893 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2894 urtw_8225_write(sc, 2895 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2896 urtw_8225_write(sc, 2897 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2898 urtw_8225_write(sc, 2899 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2900 usb_pause_mtx(&sc->sc_mtx, 100); 2901 urtw_8225_write(sc, 2902 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2903 usb_pause_mtx(&sc->sc_mtx, 100); 2904 2905 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2906 if (error != 0) 2907 goto fail; 2908 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2909 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2910 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2911 urtw_8225_write(sc, 2912 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2913 usb_pause_mtx(&sc->sc_mtx, 100); 2914 urtw_8225_write(sc, 2915 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2916 usb_pause_mtx(&sc->sc_mtx, 50); 2917 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2918 if (error != 0) 2919 goto fail; 2920 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2921 device_printf(sc->sc_dev, "RF calibration failed\n"); 2922 } 2923 usb_pause_mtx(&sc->sc_mtx, 100); 2924 2925 urtw_8225_write(sc, 2926 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2927 for (i = 0; i < 128; i++) { 2928 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2929 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2930 } 2931 2932 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 2933 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2934 urtw_8225v2_rf_part2[i].val); 2935 } 2936 2937 error = urtw_8225v2_setgain(sc, 4); 2938 if (error) 2939 goto fail; 2940 2941 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 2942 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2943 urtw_8225v2_rf_part3[i].val); 2944 } 2945 2946 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2947 2948 error = urtw_8225v2_set_txpwrlvl(sc, 1); 2949 if (error) 2950 goto fail; 2951 2952 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2953 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2954 2955 /* TX ant A, 0x0 for B */ 2956 error = urtw_8185_tx_antenna(sc, 0x3); 2957 if (error) 2958 goto fail; 2959 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2960 2961 error = urtw_8225_rf_set_chan(sc, 1); 2962 fail: 2963 return (error); 2964 #undef N 2965 } 2966 2967 static usb_error_t 2968 urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 2969 { 2970 usb_error_t error; 2971 2972 error = urtw_8225v2_set_txpwrlvl(sc, chan); 2973 if (error) 2974 goto fail; 2975 2976 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2977 usb_pause_mtx(&sc->sc_mtx, 10); 2978 fail: 2979 return (error); 2980 } 2981 2982 static usb_error_t 2983 urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 2984 { 2985 int i; 2986 int16_t bit; 2987 uint8_t rlen = 12, wlen = 6; 2988 uint16_t o1, o2, o3, tmp; 2989 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 2990 uint32_t mask = 0x80000000, value = 0; 2991 usb_error_t error; 2992 2993 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 2994 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 2995 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 2996 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 2997 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 2998 o1 &= ~URTW_RF_PINS_MAGIC4; 2999 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3000 DELAY(5); 3001 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3002 DELAY(5); 3003 3004 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3005 bit = ((d2w & mask) != 0) ? 1 : 0; 3006 3007 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3008 DELAY(2); 3009 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3010 URTW_BB_HOST_BANG_CLK); 3011 DELAY(2); 3012 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3013 URTW_BB_HOST_BANG_CLK); 3014 DELAY(2); 3015 mask = mask >> 1; 3016 if (i == 2) 3017 break; 3018 bit = ((d2w & mask) != 0) ? 1 : 0; 3019 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3020 URTW_BB_HOST_BANG_CLK); 3021 DELAY(2); 3022 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3023 URTW_BB_HOST_BANG_CLK); 3024 DELAY(2); 3025 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3026 DELAY(1); 3027 } 3028 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3029 URTW_BB_HOST_BANG_CLK); 3030 DELAY(2); 3031 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3032 DELAY(2); 3033 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3034 DELAY(2); 3035 3036 mask = 0x800; 3037 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3038 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3039 o1 | URTW_BB_HOST_BANG_RW); 3040 DELAY(2); 3041 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3042 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3043 DELAY(2); 3044 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3045 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3046 DELAY(2); 3047 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3048 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3049 DELAY(2); 3050 3051 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3052 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3053 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3054 o1 | URTW_BB_HOST_BANG_RW); 3055 DELAY(2); 3056 } 3057 3058 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3059 URTW_BB_HOST_BANG_RW); 3060 DELAY(2); 3061 3062 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3063 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3064 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3065 3066 if (data != NULL) 3067 *data = value; 3068 fail: 3069 return (error); 3070 } 3071 3072 3073 static usb_error_t 3074 urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3075 { 3076 int i; 3077 uint8_t *cck_pwrtable; 3078 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3079 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3080 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3081 usb_error_t error; 3082 3083 /* CCK power setting */ 3084 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3085 cck_pwrlvl += sc->sc_txpwr_cck_base; 3086 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3087 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3088 urtw_8225v2_txpwr_cck; 3089 3090 for (i = 0; i < 8; i++) 3091 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3092 3093 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3094 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3095 usb_pause_mtx(&sc->sc_mtx, 1); 3096 3097 /* OFDM power setting */ 3098 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3099 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3100 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3101 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3102 3103 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3104 if (error) 3105 goto fail; 3106 3107 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3108 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3109 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3110 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3111 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3112 3113 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3114 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3115 usb_pause_mtx(&sc->sc_mtx, 1); 3116 fail: 3117 return (error); 3118 } 3119 3120 static usb_error_t 3121 urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3122 { 3123 uint8_t *gainp; 3124 usb_error_t error; 3125 3126 /* XXX for A? */ 3127 gainp = urtw_8225v2_gain_bg; 3128 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3129 usb_pause_mtx(&sc->sc_mtx, 1); 3130 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3131 usb_pause_mtx(&sc->sc_mtx, 1); 3132 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3133 usb_pause_mtx(&sc->sc_mtx, 1); 3134 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3135 usb_pause_mtx(&sc->sc_mtx, 1); 3136 fail: 3137 return (error); 3138 } 3139 3140 static usb_error_t 3141 urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3142 { 3143 uint32_t data; 3144 usb_error_t error; 3145 3146 *ret = 1; 3147 3148 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3149 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3150 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3151 usb_pause_mtx(&sc->sc_mtx, 500); 3152 3153 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3154 URTW_8225_ADDR_0_DATA_MAGIC1); 3155 3156 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3157 if (error != 0) 3158 goto fail; 3159 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3160 *ret = 0; 3161 else { 3162 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3163 if (error != 0) 3164 goto fail; 3165 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3166 *ret = 0; 3167 } 3168 3169 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3170 URTW_8225_ADDR_0_DATA_MAGIC2); 3171 fail: 3172 return (error); 3173 } 3174 3175 static usb_error_t 3176 urtw_8225v2b_rf_init(struct urtw_softc *sc) 3177 { 3178 struct ieee80211com *ic = &sc->sc_ic; 3179 int i; 3180 uint8_t data8; 3181 usb_error_t error; 3182 3183 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3184 if (error) 3185 goto fail; 3186 3187 /* 3188 * initialize extra registers on 8187 3189 */ 3190 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3191 3192 /* retry limit */ 3193 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3194 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3195 urtw_write8_m(sc, URTW_CW_CONF, data8); 3196 3197 /* TX AGC */ 3198 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3199 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3200 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3201 3202 /* Auto Rate Fallback Control */ 3203 #define URTW_ARFR 0x1e0 3204 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3205 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3206 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3207 data8 | URTW_RATE_FALLBACK_ENABLE); 3208 3209 urtw_read8_m(sc, URTW_MSR, &data8); 3210 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3211 urtw_read8_m(sc, URTW_MSR, &data8); 3212 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3213 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3214 3215 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3216 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3217 #define URTW_FEMR_FOR_8187B 0x1d4 3218 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3219 3220 /* led type */ 3221 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3222 data8 = (data8 & 0x3f) | 0x80; 3223 urtw_write8_m(sc, URTW_CONFIG1, data8); 3224 3225 /* applying MAC address again. */ 3226 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]); 3227 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0xffff); 3228 3229 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3230 if (error) 3231 goto fail; 3232 3233 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3234 3235 /* 3236 * MAC configuration 3237 */ 3238 for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++) 3239 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3240 urtw_8225v2b_rf_part1[i].val); 3241 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3242 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3243 urtw_write32_m(sc, 0x1f0, 0); 3244 urtw_write32_m(sc, 0x1f4, 0); 3245 urtw_write8_m(sc, 0x1f8, 0); 3246 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3247 3248 #define URTW_RFSW_CTRL 0x272 3249 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3250 3251 /* 3252 * initialize PHY 3253 */ 3254 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3255 if (error) 3256 goto fail; 3257 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3258 urtw_write8_m(sc, URTW_CONFIG3, 3259 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3260 3261 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3262 if (error) 3263 goto fail; 3264 3265 /* setup RFE initial timing */ 3266 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3267 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3268 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3269 usb_pause_mtx(&sc->sc_mtx, 1100); 3270 3271 for (i = 0; i < nitems(urtw_8225v2b_rf_part0); i++) { 3272 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3273 urtw_8225v2b_rf_part0[i].val); 3274 usb_pause_mtx(&sc->sc_mtx, 1); 3275 } 3276 urtw_8225_write(sc, 0x00, 0x01b7); 3277 3278 for (i = 0; i < 95; i++) { 3279 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3280 usb_pause_mtx(&sc->sc_mtx, 1); 3281 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3282 urtw_8225v2b_rxgain[i]); 3283 usb_pause_mtx(&sc->sc_mtx, 1); 3284 } 3285 3286 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3287 usb_pause_mtx(&sc->sc_mtx, 1); 3288 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3289 usb_pause_mtx(&sc->sc_mtx, 1); 3290 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3291 usb_pause_mtx(&sc->sc_mtx, 1); 3292 usb_pause_mtx(&sc->sc_mtx, 3000); 3293 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3294 usb_pause_mtx(&sc->sc_mtx, 2000); 3295 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3296 usb_pause_mtx(&sc->sc_mtx, 1); 3297 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3298 usb_pause_mtx(&sc->sc_mtx, 1); 3299 3300 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3301 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3302 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3303 3304 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3305 for (i = 0; i < 128; i++) { 3306 uint32_t addr, data; 3307 3308 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3309 addr = ((i + 0x80) << 8) | 0x0000008e; 3310 3311 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3312 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3313 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3314 } 3315 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3316 3317 for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++) 3318 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3319 3320 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3321 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3322 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3323 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3324 3325 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3326 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3327 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3328 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3329 3330 fail: 3331 return (error); 3332 #undef N 3333 } 3334 3335 static usb_error_t 3336 urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3337 { 3338 usb_error_t error; 3339 3340 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3341 if (error) 3342 goto fail; 3343 3344 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3345 usb_pause_mtx(&sc->sc_mtx, 10); 3346 fail: 3347 return (error); 3348 } 3349 3350 static usb_error_t 3351 urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3352 { 3353 int i; 3354 uint8_t *cck_pwrtable; 3355 uint8_t cck_pwrlvl_max = 15; 3356 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3357 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3358 usb_error_t error; 3359 3360 /* CCK power setting */ 3361 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3362 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3363 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3364 cck_pwrlvl += sc->sc_txpwr_cck_base; 3365 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3366 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3367 urtw_8225v2b_txpwr_cck; 3368 3369 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3370 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3371 ((cck_pwrlvl <= 11) ? 8 : 16); 3372 else 3373 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3374 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3375 3376 for (i = 0; i < 8; i++) 3377 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3378 3379 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3380 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3381 usb_pause_mtx(&sc->sc_mtx, 1); 3382 3383 /* OFDM power setting */ 3384 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3385 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3386 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3387 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3388 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3389 3390 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3391 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3392 3393 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3394 if (ofdm_pwrlvl <= 11) { 3395 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3396 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3397 } else { 3398 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3399 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3400 } 3401 } else { 3402 if (ofdm_pwrlvl <= 11) { 3403 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3404 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3405 } else if (ofdm_pwrlvl <= 17) { 3406 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3407 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3408 } else { 3409 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3410 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3411 } 3412 } 3413 usb_pause_mtx(&sc->sc_mtx, 1); 3414 fail: 3415 return (error); 3416 } 3417 3418 static usb_error_t 3419 urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3420 { 3421 struct usb_device_request req; 3422 usb_error_t error; 3423 3424 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3425 req.bRequest = URTW_8187_GETREGS_REQ; 3426 USETW(req.wValue, val | 0xfe00); 3427 USETW(req.wIndex, 0); 3428 USETW(req.wLength, sizeof(uint8_t)); 3429 3430 error = urtw_do_request(sc, &req, data); 3431 return (error); 3432 } 3433 3434 static usb_error_t 3435 urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3436 { 3437 struct usb_device_request req; 3438 3439 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3440 req.bRequest = URTW_8187_SETREGS_REQ; 3441 USETW(req.wValue, val | 0xfe00); 3442 USETW(req.wIndex, 0); 3443 USETW(req.wLength, sizeof(uint8_t)); 3444 3445 return (urtw_do_request(sc, &req, &data)); 3446 } 3447 3448 static usb_error_t 3449 urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3450 { 3451 uint8_t data; 3452 usb_error_t error; 3453 3454 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3455 if (error) 3456 goto fail; 3457 3458 urtw_read8_m(sc, URTW_CONFIG3, &data); 3459 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3460 urtw_write32_m(sc, URTW_ANAPARAM, val); 3461 urtw_read8_m(sc, URTW_CONFIG3, &data); 3462 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3463 3464 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3465 if (error) 3466 goto fail; 3467 fail: 3468 return (error); 3469 } 3470 3471 static usb_error_t 3472 urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3473 { 3474 uint8_t data; 3475 usb_error_t error; 3476 3477 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3478 if (error) 3479 goto fail; 3480 3481 urtw_read8_m(sc, URTW_CONFIG3, &data); 3482 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3483 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3484 urtw_read8_m(sc, URTW_CONFIG3, &data); 3485 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3486 3487 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3488 if (error) 3489 goto fail; 3490 fail: 3491 return (error); 3492 } 3493 3494 static usb_error_t 3495 urtw_intr_enable(struct urtw_softc *sc) 3496 { 3497 usb_error_t error; 3498 3499 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3500 fail: 3501 return (error); 3502 } 3503 3504 static usb_error_t 3505 urtw_intr_disable(struct urtw_softc *sc) 3506 { 3507 usb_error_t error; 3508 3509 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3510 fail: 3511 return (error); 3512 } 3513 3514 static usb_error_t 3515 urtw_reset(struct urtw_softc *sc) 3516 { 3517 uint8_t data; 3518 usb_error_t error; 3519 3520 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3521 if (error) 3522 goto fail; 3523 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3524 if (error) 3525 goto fail; 3526 3527 error = urtw_intr_disable(sc); 3528 if (error) 3529 goto fail; 3530 usb_pause_mtx(&sc->sc_mtx, 100); 3531 3532 error = urtw_write8e(sc, 0x18, 0x10); 3533 if (error != 0) 3534 goto fail; 3535 error = urtw_write8e(sc, 0x18, 0x11); 3536 if (error != 0) 3537 goto fail; 3538 error = urtw_write8e(sc, 0x18, 0x00); 3539 if (error != 0) 3540 goto fail; 3541 usb_pause_mtx(&sc->sc_mtx, 100); 3542 3543 urtw_read8_m(sc, URTW_CMD, &data); 3544 data = (data & 0x2) | URTW_CMD_RST; 3545 urtw_write8_m(sc, URTW_CMD, data); 3546 usb_pause_mtx(&sc->sc_mtx, 100); 3547 3548 urtw_read8_m(sc, URTW_CMD, &data); 3549 if (data & URTW_CMD_RST) { 3550 device_printf(sc->sc_dev, "reset timeout\n"); 3551 goto fail; 3552 } 3553 3554 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3555 if (error) 3556 goto fail; 3557 usb_pause_mtx(&sc->sc_mtx, 100); 3558 3559 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3560 if (error) 3561 goto fail; 3562 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3563 if (error) 3564 goto fail; 3565 fail: 3566 return (error); 3567 } 3568 3569 static usb_error_t 3570 urtw_led_ctl(struct urtw_softc *sc, int mode) 3571 { 3572 usb_error_t error = 0; 3573 3574 switch (sc->sc_strategy) { 3575 case URTW_SW_LED_MODE0: 3576 error = urtw_led_mode0(sc, mode); 3577 break; 3578 case URTW_SW_LED_MODE1: 3579 error = urtw_led_mode1(sc, mode); 3580 break; 3581 case URTW_SW_LED_MODE2: 3582 error = urtw_led_mode2(sc, mode); 3583 break; 3584 case URTW_SW_LED_MODE3: 3585 error = urtw_led_mode3(sc, mode); 3586 break; 3587 default: 3588 DPRINTF(sc, URTW_DEBUG_STATE, 3589 "unsupported LED mode %d\n", sc->sc_strategy); 3590 error = USB_ERR_INVAL; 3591 break; 3592 } 3593 3594 return (error); 3595 } 3596 3597 static usb_error_t 3598 urtw_led_mode0(struct urtw_softc *sc, int mode) 3599 { 3600 3601 switch (mode) { 3602 case URTW_LED_CTL_POWER_ON: 3603 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3604 break; 3605 case URTW_LED_CTL_TX: 3606 if (sc->sc_gpio_ledinprogress == 1) 3607 return (0); 3608 3609 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3610 sc->sc_gpio_blinktime = 2; 3611 break; 3612 case URTW_LED_CTL_LINK: 3613 sc->sc_gpio_ledstate = URTW_LED_ON; 3614 break; 3615 default: 3616 DPRINTF(sc, URTW_DEBUG_STATE, 3617 "unsupported LED mode 0x%x", mode); 3618 return (USB_ERR_INVAL); 3619 } 3620 3621 switch (sc->sc_gpio_ledstate) { 3622 case URTW_LED_ON: 3623 if (sc->sc_gpio_ledinprogress != 0) 3624 break; 3625 urtw_led_on(sc, URTW_LED_GPIO); 3626 break; 3627 case URTW_LED_BLINK_NORMAL: 3628 if (sc->sc_gpio_ledinprogress != 0) 3629 break; 3630 sc->sc_gpio_ledinprogress = 1; 3631 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3632 URTW_LED_OFF : URTW_LED_ON; 3633 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3634 break; 3635 case URTW_LED_POWER_ON_BLINK: 3636 urtw_led_on(sc, URTW_LED_GPIO); 3637 usb_pause_mtx(&sc->sc_mtx, 100); 3638 urtw_led_off(sc, URTW_LED_GPIO); 3639 break; 3640 default: 3641 DPRINTF(sc, URTW_DEBUG_STATE, 3642 "unknown LED status 0x%x", sc->sc_gpio_ledstate); 3643 return (USB_ERR_INVAL); 3644 } 3645 return (0); 3646 } 3647 3648 static usb_error_t 3649 urtw_led_mode1(struct urtw_softc *sc, int mode) 3650 { 3651 return (USB_ERR_INVAL); 3652 } 3653 3654 static usb_error_t 3655 urtw_led_mode2(struct urtw_softc *sc, int mode) 3656 { 3657 return (USB_ERR_INVAL); 3658 } 3659 3660 static usb_error_t 3661 urtw_led_mode3(struct urtw_softc *sc, int mode) 3662 { 3663 return (USB_ERR_INVAL); 3664 } 3665 3666 static usb_error_t 3667 urtw_led_on(struct urtw_softc *sc, int type) 3668 { 3669 usb_error_t error; 3670 3671 if (type == URTW_LED_GPIO) { 3672 switch (sc->sc_gpio_ledpin) { 3673 case URTW_LED_PIN_GPIO0: 3674 urtw_write8_m(sc, URTW_GPIO, 0x01); 3675 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3676 break; 3677 default: 3678 DPRINTF(sc, URTW_DEBUG_STATE, 3679 "unsupported LED PIN type 0x%x", 3680 sc->sc_gpio_ledpin); 3681 error = USB_ERR_INVAL; 3682 goto fail; 3683 } 3684 } else { 3685 DPRINTF(sc, URTW_DEBUG_STATE, 3686 "unsupported LED type 0x%x", type); 3687 error = USB_ERR_INVAL; 3688 goto fail; 3689 } 3690 3691 sc->sc_gpio_ledon = 1; 3692 fail: 3693 return (error); 3694 } 3695 3696 static usb_error_t 3697 urtw_led_off(struct urtw_softc *sc, int type) 3698 { 3699 usb_error_t error; 3700 3701 if (type == URTW_LED_GPIO) { 3702 switch (sc->sc_gpio_ledpin) { 3703 case URTW_LED_PIN_GPIO0: 3704 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3705 urtw_write8_m(sc, 3706 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3707 break; 3708 default: 3709 DPRINTF(sc, URTW_DEBUG_STATE, 3710 "unsupported LED PIN type 0x%x", 3711 sc->sc_gpio_ledpin); 3712 error = USB_ERR_INVAL; 3713 goto fail; 3714 } 3715 } else { 3716 DPRINTF(sc, URTW_DEBUG_STATE, 3717 "unsupported LED type 0x%x", type); 3718 error = USB_ERR_INVAL; 3719 goto fail; 3720 } 3721 3722 sc->sc_gpio_ledon = 0; 3723 3724 fail: 3725 return (error); 3726 } 3727 3728 static void 3729 urtw_led_ch(void *arg) 3730 { 3731 struct urtw_softc *sc = arg; 3732 struct ieee80211com *ic = &sc->sc_ic; 3733 3734 ieee80211_runtask(ic, &sc->sc_led_task); 3735 } 3736 3737 static void 3738 urtw_ledtask(void *arg, int pending) 3739 { 3740 struct urtw_softc *sc = arg; 3741 3742 if (sc->sc_strategy != URTW_SW_LED_MODE0) { 3743 DPRINTF(sc, URTW_DEBUG_STATE, 3744 "could not process a LED strategy 0x%x", 3745 sc->sc_strategy); 3746 return; 3747 } 3748 3749 URTW_LOCK(sc); 3750 urtw_led_blink(sc); 3751 URTW_UNLOCK(sc); 3752 } 3753 3754 static usb_error_t 3755 urtw_led_blink(struct urtw_softc *sc) 3756 { 3757 uint8_t ing = 0; 3758 usb_error_t error; 3759 3760 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3761 error = urtw_led_on(sc, URTW_LED_GPIO); 3762 else 3763 error = urtw_led_off(sc, URTW_LED_GPIO); 3764 sc->sc_gpio_blinktime--; 3765 if (sc->sc_gpio_blinktime == 0) 3766 ing = 1; 3767 else { 3768 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3769 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3770 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3771 ing = 1; 3772 } 3773 if (ing == 1) { 3774 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3775 sc->sc_gpio_ledon == 0) 3776 error = urtw_led_on(sc, URTW_LED_GPIO); 3777 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3778 sc->sc_gpio_ledon == 1) 3779 error = urtw_led_off(sc, URTW_LED_GPIO); 3780 3781 sc->sc_gpio_blinktime = 0; 3782 sc->sc_gpio_ledinprogress = 0; 3783 return (0); 3784 } 3785 3786 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3787 URTW_LED_ON : URTW_LED_OFF; 3788 3789 switch (sc->sc_gpio_ledstate) { 3790 case URTW_LED_BLINK_NORMAL: 3791 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3792 break; 3793 default: 3794 DPRINTF(sc, URTW_DEBUG_STATE, 3795 "unknown LED status 0x%x", 3796 sc->sc_gpio_ledstate); 3797 return (USB_ERR_INVAL); 3798 } 3799 return (0); 3800 } 3801 3802 static usb_error_t 3803 urtw_rx_enable(struct urtw_softc *sc) 3804 { 3805 uint8_t data; 3806 usb_error_t error; 3807 3808 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3809 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3810 3811 error = urtw_rx_setconf(sc); 3812 if (error != 0) 3813 goto fail; 3814 3815 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3816 urtw_read8_m(sc, URTW_CMD, &data); 3817 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3818 } 3819 fail: 3820 return (error); 3821 } 3822 3823 static usb_error_t 3824 urtw_tx_enable(struct urtw_softc *sc) 3825 { 3826 uint8_t data8; 3827 uint32_t data; 3828 usb_error_t error; 3829 3830 if (sc->sc_flags & URTW_RTL8187B) { 3831 urtw_read32_m(sc, URTW_TX_CONF, &data); 3832 data &= ~URTW_TX_LOOPBACK_MASK; 3833 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3834 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3835 data &= ~URTW_TX_SWPLCPLEN; 3836 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3837 (7 << 8) | /* short retry limit */ 3838 (7 << 0) | /* long retry limit */ 3839 (7 << 21); /* MAX TX DMA */ 3840 urtw_write32_m(sc, URTW_TX_CONF, data); 3841 3842 urtw_read8_m(sc, URTW_MSR, &data8); 3843 data8 |= URTW_MSR_LINK_ENEDCA; 3844 urtw_write8_m(sc, URTW_MSR, data8); 3845 return (error); 3846 } 3847 3848 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3849 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3850 urtw_write8_m(sc, URTW_CW_CONF, data8); 3851 3852 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3853 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3854 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3855 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3856 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3857 3858 urtw_read32_m(sc, URTW_TX_CONF, &data); 3859 data &= ~URTW_TX_LOOPBACK_MASK; 3860 data |= URTW_TX_LOOPBACK_NONE; 3861 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3862 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3863 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3864 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3865 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3866 data &= ~URTW_TX_SWPLCPLEN; 3867 data |= URTW_TX_NOICV; 3868 urtw_write32_m(sc, URTW_TX_CONF, data); 3869 3870 urtw_read8_m(sc, URTW_CMD, &data8); 3871 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3872 fail: 3873 return (error); 3874 } 3875 3876 static usb_error_t 3877 urtw_rx_setconf(struct urtw_softc *sc) 3878 { 3879 struct ieee80211com *ic = &sc->sc_ic; 3880 uint32_t data; 3881 usb_error_t error; 3882 3883 urtw_read32_m(sc, URTW_RX, &data); 3884 data = data &~ URTW_RX_FILTER_MASK; 3885 if (sc->sc_flags & URTW_RTL8187B) { 3886 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3887 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3888 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3889 URTW_RX_FIFO_THRESHOLD_NONE | 3890 URTW_MAX_RX_DMA_2048 | 3891 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3892 } else { 3893 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3894 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3895 3896 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3897 data = data | URTW_RX_FILTER_ICVERR; 3898 data = data | URTW_RX_FILTER_PWR; 3899 } 3900 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3901 data = data | URTW_RX_FILTER_CRCERR; 3902 3903 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3904 ic->ic_promisc > 0 || ic->ic_allmulti > 0) { 3905 data = data | URTW_RX_FILTER_ALLMAC; 3906 } else { 3907 data = data | URTW_RX_FILTER_NICMAC; 3908 data = data | URTW_RX_CHECK_BSSID; 3909 } 3910 3911 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3912 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3913 URTW_RX_AUTORESETPHY; 3914 data = data &~ URTW_MAX_RX_DMA_MASK; 3915 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3916 } 3917 3918 urtw_write32_m(sc, URTW_RX, data); 3919 fail: 3920 return (error); 3921 } 3922 3923 static struct mbuf * 3924 urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3925 int8_t *nf_p) 3926 { 3927 int actlen, flen, rssi; 3928 struct ieee80211_frame *wh; 3929 struct mbuf *m, *mnew; 3930 struct urtw_softc *sc = data->sc; 3931 struct ieee80211com *ic = &sc->sc_ic; 3932 uint8_t noise = 0, rate; 3933 3934 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3935 3936 if (actlen < (int)URTW_MIN_RXBUFSZ) { 3937 counter_u64_add(ic->ic_ierrors, 1); 3938 return (NULL); 3939 } 3940 3941 if (sc->sc_flags & URTW_RTL8187B) { 3942 struct urtw_8187b_rxhdr *rx; 3943 3944 rx = (struct urtw_8187b_rxhdr *)(data->buf + 3945 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 3946 flen = le32toh(rx->flag) & 0xfff; 3947 if (flen > actlen) { 3948 counter_u64_add(ic->ic_ierrors, 1); 3949 return (NULL); 3950 } 3951 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3952 /* XXX correct? */ 3953 rssi = rx->rssi & URTW_RX_RSSI_MASK; 3954 noise = rx->noise; 3955 } else { 3956 struct urtw_8187l_rxhdr *rx; 3957 3958 rx = (struct urtw_8187l_rxhdr *)(data->buf + 3959 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 3960 flen = le32toh(rx->flag) & 0xfff; 3961 if (flen > actlen) { 3962 counter_u64_add(ic->ic_ierrors, 1); 3963 return (NULL); 3964 } 3965 3966 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3967 /* XXX correct? */ 3968 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 3969 noise = rx->noise; 3970 } 3971 3972 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 3973 if (mnew == NULL) { 3974 counter_u64_add(ic->ic_ierrors, 1); 3975 return (NULL); 3976 } 3977 3978 m = data->m; 3979 data->m = mnew; 3980 data->buf = mtod(mnew, uint8_t *); 3981 3982 /* finalize mbuf */ 3983 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 3984 3985 if (ieee80211_radiotap_active(ic)) { 3986 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 3987 3988 /* XXX Are variables correct? */ 3989 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 3990 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 3991 tap->wr_dbm_antsignal = (int8_t)rssi; 3992 } 3993 3994 wh = mtod(m, struct ieee80211_frame *); 3995 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 3996 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 3997 3998 *rssi_p = rssi; 3999 *nf_p = noise; /* XXX correct? */ 4000 4001 return (m); 4002 } 4003 4004 static void 4005 urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4006 { 4007 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4008 struct ieee80211com *ic = &sc->sc_ic; 4009 struct ieee80211_frame *wh; 4010 struct ieee80211_node *ni; 4011 struct mbuf *m = NULL; 4012 struct urtw_data *data; 4013 int8_t nf = -95; 4014 int rssi = 1; 4015 4016 URTW_ASSERT_LOCKED(sc); 4017 4018 switch (USB_GET_STATE(xfer)) { 4019 case USB_ST_TRANSFERRED: 4020 data = STAILQ_FIRST(&sc->sc_rx_active); 4021 if (data == NULL) 4022 goto setup; 4023 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4024 m = urtw_rxeof(xfer, data, &rssi, &nf); 4025 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4026 /* FALLTHROUGH */ 4027 case USB_ST_SETUP: 4028 setup: 4029 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4030 if (data == NULL) { 4031 KASSERT(m == NULL, ("mbuf isn't NULL")); 4032 return; 4033 } 4034 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4035 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4036 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4037 usbd_xfer_max_len(xfer)); 4038 usbd_transfer_submit(xfer); 4039 4040 /* 4041 * To avoid LOR we should unlock our private mutex here to call 4042 * ieee80211_input() because here is at the end of a USB 4043 * callback and safe to unlock. 4044 */ 4045 URTW_UNLOCK(sc); 4046 if (m != NULL) { 4047 wh = mtod(m, struct ieee80211_frame *); 4048 ni = ieee80211_find_rxnode(ic, 4049 (struct ieee80211_frame_min *)wh); 4050 if (ni != NULL) { 4051 (void) ieee80211_input(ni, m, rssi, nf); 4052 /* node is no longer needed */ 4053 ieee80211_free_node(ni); 4054 } else 4055 (void) ieee80211_input_all(ic, m, rssi, nf); 4056 m = NULL; 4057 } 4058 URTW_LOCK(sc); 4059 break; 4060 default: 4061 /* needs it to the inactive queue due to a error. */ 4062 data = STAILQ_FIRST(&sc->sc_rx_active); 4063 if (data != NULL) { 4064 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4065 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4066 } 4067 if (error != USB_ERR_CANCELLED) { 4068 usbd_xfer_set_stall(xfer); 4069 counter_u64_add(ic->ic_ierrors, 1); 4070 goto setup; 4071 } 4072 break; 4073 } 4074 } 4075 4076 #define URTW_STATUS_TYPE_TXCLOSE 1 4077 #define URTW_STATUS_TYPE_BEACON_INTR 0 4078 4079 static void 4080 urtw_txstatus_eof(struct usb_xfer *xfer) 4081 { 4082 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4083 struct ieee80211com *ic = &sc->sc_ic; 4084 int actlen, type, pktretry, seq; 4085 uint64_t val; 4086 4087 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4088 4089 if (actlen != sizeof(uint64_t)) 4090 return; 4091 4092 val = le64toh(sc->sc_txstatus); 4093 type = (val >> 30) & 0x3; 4094 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4095 pktretry = val & 0xff; 4096 seq = (val >> 16) & 0xff; 4097 if (pktretry == URTW_TX_MAXRETRY) 4098 counter_u64_add(ic->ic_oerrors, 1); 4099 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4100 pktretry, seq); 4101 } 4102 } 4103 4104 static void 4105 urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4106 { 4107 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4108 struct ieee80211com *ic = &sc->sc_ic; 4109 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4110 4111 URTW_ASSERT_LOCKED(sc); 4112 4113 switch (USB_GET_STATE(xfer)) { 4114 case USB_ST_TRANSFERRED: 4115 urtw_txstatus_eof(xfer); 4116 /* FALLTHROUGH */ 4117 case USB_ST_SETUP: 4118 setup: 4119 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4120 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4121 usbd_transfer_submit(xfer); 4122 break; 4123 default: 4124 if (error != USB_ERR_CANCELLED) { 4125 usbd_xfer_set_stall(xfer); 4126 counter_u64_add(ic->ic_ierrors, 1); 4127 goto setup; 4128 } 4129 break; 4130 } 4131 } 4132 4133 static void 4134 urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4135 { 4136 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4137 4138 URTW_ASSERT_LOCKED(sc); 4139 4140 if (data->m) { 4141 /* XXX status? */ 4142 ieee80211_tx_complete(data->ni, data->m, 0); 4143 data->m = NULL; 4144 data->ni = NULL; 4145 } 4146 sc->sc_txtimer = 0; 4147 } 4148 4149 static void 4150 urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4151 { 4152 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4153 struct urtw_data *data; 4154 4155 URTW_ASSERT_LOCKED(sc); 4156 4157 switch (USB_GET_STATE(xfer)) { 4158 case USB_ST_TRANSFERRED: 4159 data = STAILQ_FIRST(&sc->sc_tx_active); 4160 if (data == NULL) 4161 goto setup; 4162 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4163 urtw_txeof(xfer, data); 4164 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4165 /* FALLTHROUGH */ 4166 case USB_ST_SETUP: 4167 setup: 4168 data = STAILQ_FIRST(&sc->sc_tx_pending); 4169 if (data == NULL) { 4170 DPRINTF(sc, URTW_DEBUG_XMIT, 4171 "%s: empty pending queue\n", __func__); 4172 return; 4173 } 4174 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4175 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4176 4177 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4178 usbd_transfer_submit(xfer); 4179 4180 urtw_start(sc); 4181 break; 4182 default: 4183 data = STAILQ_FIRST(&sc->sc_tx_active); 4184 if (data == NULL) 4185 goto setup; 4186 if (data->ni != NULL) { 4187 if_inc_counter(data->ni->ni_vap->iv_ifp, 4188 IFCOUNTER_OERRORS, 1); 4189 ieee80211_free_node(data->ni); 4190 data->ni = NULL; 4191 } 4192 if (error != USB_ERR_CANCELLED) { 4193 usbd_xfer_set_stall(xfer); 4194 goto setup; 4195 } 4196 break; 4197 } 4198 } 4199 4200 static struct urtw_data * 4201 _urtw_getbuf(struct urtw_softc *sc) 4202 { 4203 struct urtw_data *bf; 4204 4205 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4206 if (bf != NULL) 4207 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4208 else 4209 bf = NULL; 4210 if (bf == NULL) 4211 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4212 "out of xmit buffers"); 4213 return (bf); 4214 } 4215 4216 static struct urtw_data * 4217 urtw_getbuf(struct urtw_softc *sc) 4218 { 4219 struct urtw_data *bf; 4220 4221 URTW_ASSERT_LOCKED(sc); 4222 4223 bf = _urtw_getbuf(sc); 4224 if (bf == NULL) 4225 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4226 return (bf); 4227 } 4228 4229 static int 4230 urtw_isbmode(uint16_t rate) 4231 { 4232 4233 return ((rate <= 22 && rate != 12 && rate != 18) || 4234 rate == 44) ? (1) : (0); 4235 } 4236 4237 static uint16_t 4238 urtw_rate2dbps(uint16_t rate) 4239 { 4240 4241 switch(rate) { 4242 case 12: 4243 case 18: 4244 case 24: 4245 case 36: 4246 case 48: 4247 case 72: 4248 case 96: 4249 case 108: 4250 return (rate * 2); 4251 default: 4252 break; 4253 } 4254 return (24); 4255 } 4256 4257 static int 4258 urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4259 uint8_t ismgt, uint8_t isshort) 4260 { 4261 uint16_t ceiling, frametime, n_dbps; 4262 4263 if (urtw_isbmode(rate)) { 4264 if (ismgt || !isshort || rate == 2) 4265 frametime = (uint16_t)(144 + 48 + 4266 (framelen * 8 / (rate / 2))); 4267 else 4268 frametime = (uint16_t)(72 + 24 + 4269 (framelen * 8 / (rate / 2))); 4270 if ((framelen * 8 % (rate / 2)) != 0) 4271 frametime++; 4272 } else { 4273 n_dbps = urtw_rate2dbps(rate); 4274 ceiling = (16 + 8 * framelen + 6) / n_dbps 4275 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4276 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4277 } 4278 return (frametime); 4279 } 4280 4281 /* 4282 * Callback from the 802.11 layer to update the 4283 * slot time based on the current setting. 4284 */ 4285 static void 4286 urtw_updateslot(struct ieee80211com *ic) 4287 { 4288 struct urtw_softc *sc = ic->ic_softc; 4289 4290 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4291 } 4292 4293 static void 4294 urtw_updateslottask(void *arg, int pending) 4295 { 4296 struct urtw_softc *sc = arg; 4297 struct ieee80211com *ic = &sc->sc_ic; 4298 int error; 4299 4300 URTW_LOCK(sc); 4301 if ((sc->sc_flags & URTW_RUNNING) == 0) { 4302 URTW_UNLOCK(sc); 4303 return; 4304 } 4305 if (sc->sc_flags & URTW_RTL8187B) { 4306 urtw_write8_m(sc, URTW_SIFS, 0x22); 4307 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4308 urtw_write8_m(sc, URTW_SLOT, 0x9); 4309 else 4310 urtw_write8_m(sc, URTW_SLOT, 0x14); 4311 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4312 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4313 } else { 4314 urtw_write8_m(sc, URTW_SIFS, 0x22); 4315 if (sc->sc_state == IEEE80211_S_ASSOC && 4316 ic->ic_flags & IEEE80211_F_SHSLOT) 4317 urtw_write8_m(sc, URTW_SLOT, 0x9); 4318 else 4319 urtw_write8_m(sc, URTW_SLOT, 0x14); 4320 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4321 urtw_write8_m(sc, URTW_DIFS, 0x14); 4322 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4323 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4324 } else { 4325 urtw_write8_m(sc, URTW_DIFS, 0x24); 4326 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4327 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4328 } 4329 } 4330 fail: 4331 URTW_UNLOCK(sc); 4332 } 4333 4334 static void 4335 urtw_sysctl_node(struct urtw_softc *sc) 4336 { 4337 #define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4338 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4339 struct sysctl_ctx_list *ctx; 4340 struct sysctl_oid_list *child, *parent; 4341 struct sysctl_oid *tree; 4342 struct urtw_stats *stats = &sc->sc_stats; 4343 4344 ctx = device_get_sysctl_ctx(sc->sc_dev); 4345 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4346 4347 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4348 NULL, "URTW statistics"); 4349 parent = SYSCTL_CHILDREN(tree); 4350 4351 /* Tx statistics. */ 4352 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4353 NULL, "Tx MAC statistics"); 4354 child = SYSCTL_CHILDREN(tree); 4355 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4356 "1 Mbit/s"); 4357 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4358 "2 Mbit/s"); 4359 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4360 "5.5 Mbit/s"); 4361 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4362 "6 Mbit/s"); 4363 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4364 "9 Mbit/s"); 4365 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4366 "11 Mbit/s"); 4367 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4368 "12 Mbit/s"); 4369 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4370 "18 Mbit/s"); 4371 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4372 "24 Mbit/s"); 4373 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4374 "36 Mbit/s"); 4375 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4376 "48 Mbit/s"); 4377 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4378 "54 Mbit/s"); 4379 #undef URTW_SYSCTL_STAT_ADD32 4380 } 4381 4382 static device_method_t urtw_methods[] = { 4383 DEVMETHOD(device_probe, urtw_match), 4384 DEVMETHOD(device_attach, urtw_attach), 4385 DEVMETHOD(device_detach, urtw_detach), 4386 DEVMETHOD_END 4387 }; 4388 static driver_t urtw_driver = { 4389 .name = "urtw", 4390 .methods = urtw_methods, 4391 .size = sizeof(struct urtw_softc) 4392 }; 4393 static devclass_t urtw_devclass; 4394 4395 DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4396 MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4397 MODULE_DEPEND(urtw, usb, 1, 1, 1); 4398 MODULE_VERSION(urtw, 1); 4399