1 /*- 2 * Copyright (c) 2008,2010 Damien Bergamini <damien.bergamini@free.fr> 3 * ported to FreeBSD by Akinori Furukoshi <moonlightakkiy@yahoo.ca> 4 * USB Consulting, Hans Petter Selasky <hselasky@freebsd.org> 5 * Copyright (c) 2013-2014 Kevin Lo 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 /*- 22 * Ralink Technology RT2700U/RT2800U/RT3000U/RT3900E chipset driver. 23 * http://www.ralinktech.com/ 24 */ 25 26 #include "opt_wlan.h" 27 28 #include <sys/param.h> 29 #include <sys/eventhandler.h> 30 #include <sys/sockio.h> 31 #include <sys/sysctl.h> 32 #include <sys/lock.h> 33 #include <sys/mutex.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/module.h> 40 #include <sys/bus.h> 41 #include <sys/endian.h> 42 #include <sys/linker.h> 43 #include <sys/firmware.h> 44 #include <sys/kdb.h> 45 46 #include <net/bpf.h> 47 #include <net/if.h> 48 #include <net/if_var.h> 49 #include <net/if_arp.h> 50 #include <net/ethernet.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 55 #include <netinet/in.h> 56 #include <netinet/in_systm.h> 57 #include <netinet/in_var.h> 58 #include <netinet/if_ether.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_regdomain.h> 63 #include <net80211/ieee80211_radiotap.h> 64 #include <net80211/ieee80211_ratectl.h> 65 #ifdef IEEE80211_SUPPORT_SUPERG 66 #include <net80211/ieee80211_superg.h> 67 #endif 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include "usbdevs.h" 72 73 #define USB_DEBUG_VAR run_debug 74 #include <dev/usb/usb_debug.h> 75 #include <dev/usb/usb_msctest.h> 76 77 #include <dev/usb/wlan/if_runreg.h> 78 #include <dev/usb/wlan/if_runvar.h> 79 80 #ifdef USB_DEBUG 81 #define RUN_DEBUG 82 #endif 83 84 #ifdef RUN_DEBUG 85 int run_debug = 0; 86 static SYSCTL_NODE(_hw_usb, OID_AUTO, run, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 87 "USB run"); 88 SYSCTL_INT(_hw_usb_run, OID_AUTO, debug, CTLFLAG_RWTUN, &run_debug, 0, 89 "run debug level"); 90 91 enum { 92 RUN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 93 RUN_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 94 RUN_DEBUG_RECV = 0x00000004, /* basic recv operation */ 95 RUN_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 96 RUN_DEBUG_STATE = 0x00000010, /* 802.11 state transitions */ 97 RUN_DEBUG_RATE = 0x00000020, /* rate adaptation */ 98 RUN_DEBUG_USB = 0x00000040, /* usb requests */ 99 RUN_DEBUG_FIRMWARE = 0x00000080, /* firmware(9) loading debug */ 100 RUN_DEBUG_BEACON = 0x00000100, /* beacon handling */ 101 RUN_DEBUG_INTR = 0x00000200, /* ISR */ 102 RUN_DEBUG_TEMP = 0x00000400, /* temperature calibration */ 103 RUN_DEBUG_ROM = 0x00000800, /* various ROM info */ 104 RUN_DEBUG_KEY = 0x00001000, /* crypto keys management */ 105 RUN_DEBUG_TXPWR = 0x00002000, /* dump Tx power values */ 106 RUN_DEBUG_RSSI = 0x00004000, /* dump RSSI lookups */ 107 RUN_DEBUG_RESET = 0x00008000, /* initialization progress */ 108 RUN_DEBUG_CALIB = 0x00010000, /* calibration progress */ 109 RUN_DEBUG_CMD = 0x00020000, /* command queue */ 110 RUN_DEBUG_ANY = 0xffffffff 111 }; 112 113 #define RUN_DPRINTF(_sc, _m, ...) do { \ 114 if (run_debug & (_m)) \ 115 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 116 } while(0) 117 #else 118 #define RUN_DPRINTF(_sc, _m, ...) do { (void) _sc; } while (0) 119 #endif 120 121 #define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 122 123 /* 124 * Because of LOR in run_key_delete(), use atomic instead. 125 * '& RUN_CMDQ_MASQ' is to loop cmdq[]. 126 */ 127 #define RUN_CMDQ_GET(c) (atomic_fetchadd_32((c), 1) & RUN_CMDQ_MASQ) 128 129 static const STRUCT_USB_HOST_ID run_devs[] = { 130 #define RUN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 131 #define RUN_DEV_EJECT(v,p) \ 132 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, RUN_EJECT) } 133 #define RUN_EJECT 1 134 RUN_DEV(ABOCOM, RT2770), 135 RUN_DEV(ABOCOM, RT2870), 136 RUN_DEV(ABOCOM, RT3070), 137 RUN_DEV(ABOCOM, RT3071), 138 RUN_DEV(ABOCOM, RT3072), 139 RUN_DEV(ABOCOM2, RT2870_1), 140 RUN_DEV(ACCTON, RT2770), 141 RUN_DEV(ACCTON, RT2870_1), 142 RUN_DEV(ACCTON, RT2870_2), 143 RUN_DEV(ACCTON, RT2870_3), 144 RUN_DEV(ACCTON, RT2870_4), 145 RUN_DEV(ACCTON, RT2870_5), 146 RUN_DEV(ACCTON, RT3070), 147 RUN_DEV(ACCTON, RT3070_1), 148 RUN_DEV(ACCTON, RT3070_2), 149 RUN_DEV(ACCTON, RT3070_3), 150 RUN_DEV(ACCTON, RT3070_4), 151 RUN_DEV(ACCTON, RT3070_5), 152 RUN_DEV(AIRTIES, RT3070), 153 RUN_DEV(ALLWIN, RT2070), 154 RUN_DEV(ALLWIN, RT2770), 155 RUN_DEV(ALLWIN, RT2870), 156 RUN_DEV(ALLWIN, RT3070), 157 RUN_DEV(ALLWIN, RT3071), 158 RUN_DEV(ALLWIN, RT3072), 159 RUN_DEV(ALLWIN, RT3572), 160 RUN_DEV(AMIGO, RT2870_1), 161 RUN_DEV(AMIGO, RT2870_2), 162 RUN_DEV(AMIT, CGWLUSB2GNR), 163 RUN_DEV(AMIT, RT2870_1), 164 RUN_DEV(AMIT2, RT2870), 165 RUN_DEV(ASUS, RT2870_1), 166 RUN_DEV(ASUS, RT2870_2), 167 RUN_DEV(ASUS, RT2870_3), 168 RUN_DEV(ASUS, RT2870_4), 169 RUN_DEV(ASUS, RT2870_5), 170 RUN_DEV(ASUS, USBN13), 171 RUN_DEV(ASUS, RT3070_1), 172 RUN_DEV(ASUS, USBN66), 173 RUN_DEV(ASUS, USB_N53), 174 RUN_DEV(ASUS, USBN14), 175 RUN_DEV(ASUS2, USBN11), 176 RUN_DEV(AZUREWAVE, RT2870_1), 177 RUN_DEV(AZUREWAVE, RT2870_2), 178 RUN_DEV(AZUREWAVE, RT3070_1), 179 RUN_DEV(AZUREWAVE, RT3070_2), 180 RUN_DEV(AZUREWAVE, RT3070_3), 181 RUN_DEV(BELKIN, F9L1103), 182 RUN_DEV(BELKIN, F5D8053V3), 183 RUN_DEV(BELKIN, F5D8055), 184 RUN_DEV(BELKIN, F5D8055V2), 185 RUN_DEV(BELKIN, F6D4050V1), 186 RUN_DEV(BELKIN, F6D4050V2), 187 RUN_DEV(BELKIN, RT2870_1), 188 RUN_DEV(BELKIN, RT2870_2), 189 RUN_DEV(CISCOLINKSYS, AE1000), 190 RUN_DEV(CISCOLINKSYS2, RT3070), 191 RUN_DEV(CISCOLINKSYS3, RT3070), 192 RUN_DEV(CONCEPTRONIC2, RT2870_1), 193 RUN_DEV(CONCEPTRONIC2, RT2870_2), 194 RUN_DEV(CONCEPTRONIC2, RT2870_3), 195 RUN_DEV(CONCEPTRONIC2, RT2870_4), 196 RUN_DEV(CONCEPTRONIC2, RT2870_5), 197 RUN_DEV(CONCEPTRONIC2, RT2870_6), 198 RUN_DEV(CONCEPTRONIC2, RT2870_7), 199 RUN_DEV(CONCEPTRONIC2, RT2870_8), 200 RUN_DEV(CONCEPTRONIC2, RT3070_1), 201 RUN_DEV(CONCEPTRONIC2, RT3070_2), 202 RUN_DEV(CONCEPTRONIC2, VIGORN61), 203 RUN_DEV(COREGA, CGWLUSB300GNM), 204 RUN_DEV(COREGA, RT2870_1), 205 RUN_DEV(COREGA, RT2870_2), 206 RUN_DEV(COREGA, RT2870_3), 207 RUN_DEV(COREGA, RT3070), 208 RUN_DEV(CYBERTAN, RT2870), 209 RUN_DEV(DLINK, RT2870), 210 RUN_DEV(DLINK, RT3072), 211 RUN_DEV(DLINK, DWA125A3), 212 RUN_DEV(DLINK, DWA127), 213 RUN_DEV(DLINK, DWA140B3), 214 RUN_DEV(DLINK, DWA160B2), 215 RUN_DEV(DLINK, DWA140D1), 216 RUN_DEV(DLINK, DWA130F1), 217 RUN_DEV(DLINK, DWA162), 218 RUN_DEV(DLINK2, DWA130), 219 RUN_DEV(DLINK2, RT2870_1), 220 RUN_DEV(DLINK2, RT2870_2), 221 RUN_DEV(DLINK2, RT3070_1), 222 RUN_DEV(DLINK2, RT3070_2), 223 RUN_DEV(DLINK2, RT3070_3), 224 RUN_DEV(DLINK2, RT3070_4), 225 RUN_DEV(DLINK2, RT3070_5), 226 RUN_DEV(DLINK2, RT3072), 227 RUN_DEV(DLINK2, RT3072_1), 228 RUN_DEV(EDIMAX, EW7717), 229 RUN_DEV(EDIMAX, EW7718), 230 RUN_DEV(EDIMAX, EW7733UND), 231 RUN_DEV(EDIMAX, RT2870_1), 232 RUN_DEV(ENCORE, RT3070_1), 233 RUN_DEV(ENCORE, RT3070_2), 234 RUN_DEV(ENCORE, RT3070_3), 235 RUN_DEV(GIGABYTE, GNWB31N), 236 RUN_DEV(GIGABYTE, GNWB32L), 237 RUN_DEV(GIGABYTE, RT2870_1), 238 RUN_DEV(GIGASET, RT3070_1), 239 RUN_DEV(GIGASET, RT3070_2), 240 RUN_DEV(GUILLEMOT, HWNU300), 241 RUN_DEV(HAWKING, HWUN2), 242 RUN_DEV(HAWKING, RT2870_1), 243 RUN_DEV(HAWKING, RT2870_2), 244 RUN_DEV(HAWKING, RT3070), 245 RUN_DEV(IODATA, RT3072_1), 246 RUN_DEV(IODATA, RT3072_2), 247 RUN_DEV(IODATA, RT3072_3), 248 RUN_DEV(IODATA, RT3072_4), 249 RUN_DEV(LINKSYS4, RT3070), 250 RUN_DEV(LINKSYS4, WUSB100), 251 RUN_DEV(LINKSYS4, WUSB54GCV3), 252 RUN_DEV(LINKSYS4, WUSB600N), 253 RUN_DEV(LINKSYS4, WUSB600NV2), 254 RUN_DEV(LOGITEC, RT2870_1), 255 RUN_DEV(LOGITEC, RT2870_2), 256 RUN_DEV(LOGITEC, RT2870_3), 257 RUN_DEV(LOGITEC, LANW300NU2), 258 RUN_DEV(LOGITEC, LANW150NU2), 259 RUN_DEV(LOGITEC, LANW300NU2S), 260 RUN_DEV(MELCO, WLIUCG300HP), 261 RUN_DEV(MELCO, RT2870_2), 262 RUN_DEV(MELCO, WLIUCAG300N), 263 RUN_DEV(MELCO, WLIUCG300N), 264 RUN_DEV(MELCO, WLIUCG301N), 265 RUN_DEV(MELCO, WLIUCGN), 266 RUN_DEV(MELCO, WLIUCGNM), 267 RUN_DEV(MELCO, WLIUCG300HPV1), 268 RUN_DEV(MELCO, WLIUCGNM2), 269 RUN_DEV(MOTOROLA4, RT2770), 270 RUN_DEV(MOTOROLA4, RT3070), 271 RUN_DEV(MSI, RT3070_1), 272 RUN_DEV(MSI, RT3070_2), 273 RUN_DEV(MSI, RT3070_3), 274 RUN_DEV(MSI, RT3070_4), 275 RUN_DEV(MSI, RT3070_5), 276 RUN_DEV(MSI, RT3070_6), 277 RUN_DEV(MSI, RT3070_7), 278 RUN_DEV(MSI, RT3070_8), 279 RUN_DEV(MSI, RT3070_9), 280 RUN_DEV(MSI, RT3070_10), 281 RUN_DEV(MSI, RT3070_11), 282 RUN_DEV(NETGEAR, WNDA4100), 283 RUN_DEV(OVISLINK, RT3072), 284 RUN_DEV(PARA, RT3070), 285 RUN_DEV(PEGATRON, RT2870), 286 RUN_DEV(PEGATRON, RT3070), 287 RUN_DEV(PEGATRON, RT3070_2), 288 RUN_DEV(PEGATRON, RT3070_3), 289 RUN_DEV(PHILIPS, RT2870), 290 RUN_DEV(PLANEX2, GWUS300MINIS), 291 RUN_DEV(PLANEX2, GWUSMICRON), 292 RUN_DEV(PLANEX2, RT2870), 293 RUN_DEV(PLANEX2, RT3070), 294 RUN_DEV(QCOM, RT2870), 295 RUN_DEV(QUANTA, RT3070), 296 RUN_DEV(RALINK, RT2070), 297 RUN_DEV(RALINK, RT2770), 298 RUN_DEV(RALINK, RT2870), 299 RUN_DEV(RALINK, RT3070), 300 RUN_DEV(RALINK, RT3071), 301 RUN_DEV(RALINK, RT3072), 302 RUN_DEV(RALINK, RT3370), 303 RUN_DEV(RALINK, RT3572), 304 RUN_DEV(RALINK, RT3573), 305 RUN_DEV(RALINK, RT5370), 306 RUN_DEV(RALINK, RT5372), 307 RUN_DEV(RALINK, RT5572), 308 RUN_DEV(RALINK, RT8070), 309 RUN_DEV(SAMSUNG, WIS09ABGN), 310 RUN_DEV(SAMSUNG2, RT2870_1), 311 RUN_DEV(SENAO, RT2870_1), 312 RUN_DEV(SENAO, RT2870_2), 313 RUN_DEV(SENAO, RT2870_3), 314 RUN_DEV(SENAO, RT2870_4), 315 RUN_DEV(SENAO, RT3070), 316 RUN_DEV(SENAO, RT3071), 317 RUN_DEV(SENAO, RT3072_1), 318 RUN_DEV(SENAO, RT3072_2), 319 RUN_DEV(SENAO, RT3072_3), 320 RUN_DEV(SENAO, RT3072_4), 321 RUN_DEV(SENAO, RT3072_5), 322 RUN_DEV(SITECOMEU, RT2770), 323 RUN_DEV(SITECOMEU, RT2870_1), 324 RUN_DEV(SITECOMEU, RT2870_2), 325 RUN_DEV(SITECOMEU, RT2870_3), 326 RUN_DEV(SITECOMEU, RT2870_4), 327 RUN_DEV(SITECOMEU, RT3070), 328 RUN_DEV(SITECOMEU, RT3070_2), 329 RUN_DEV(SITECOMEU, RT3070_3), 330 RUN_DEV(SITECOMEU, RT3070_4), 331 RUN_DEV(SITECOMEU, RT3071), 332 RUN_DEV(SITECOMEU, RT3072_1), 333 RUN_DEV(SITECOMEU, RT3072_2), 334 RUN_DEV(SITECOMEU, RT3072_3), 335 RUN_DEV(SITECOMEU, RT3072_4), 336 RUN_DEV(SITECOMEU, RT3072_5), 337 RUN_DEV(SITECOMEU, RT3072_6), 338 RUN_DEV(SITECOMEU, WL608), 339 RUN_DEV(SPARKLAN, RT2870_1), 340 RUN_DEV(SPARKLAN, RT3070), 341 RUN_DEV(SWEEX2, LW153), 342 RUN_DEV(SWEEX2, LW303), 343 RUN_DEV(SWEEX2, LW313), 344 RUN_DEV(TOSHIBA, RT3070), 345 RUN_DEV(UMEDIA, RT2870_1), 346 RUN_DEV(ZCOM, RT2870_1), 347 RUN_DEV(ZCOM, RT2870_2), 348 RUN_DEV(ZINWELL, RT2870_1), 349 RUN_DEV(ZINWELL, RT2870_2), 350 RUN_DEV(ZINWELL, RT3070), 351 RUN_DEV(ZINWELL, RT3072_1), 352 RUN_DEV(ZINWELL, RT3072_2), 353 RUN_DEV(ZYXEL, RT2870_1), 354 RUN_DEV(ZYXEL, RT2870_2), 355 RUN_DEV(ZYXEL, RT3070), 356 RUN_DEV_EJECT(ZYXEL, NWD2705), 357 RUN_DEV_EJECT(RALINK, RT_STOR), 358 #undef RUN_DEV_EJECT 359 #undef RUN_DEV 360 }; 361 362 static device_probe_t run_match; 363 static device_attach_t run_attach; 364 static device_detach_t run_detach; 365 366 static usb_callback_t run_bulk_rx_callback; 367 static usb_callback_t run_bulk_tx_callback0; 368 static usb_callback_t run_bulk_tx_callback1; 369 static usb_callback_t run_bulk_tx_callback2; 370 static usb_callback_t run_bulk_tx_callback3; 371 static usb_callback_t run_bulk_tx_callback4; 372 static usb_callback_t run_bulk_tx_callback5; 373 374 static void run_autoinst(void *, struct usb_device *, 375 struct usb_attach_arg *); 376 static int run_driver_loaded(struct module *, int, void *); 377 static void run_bulk_tx_callbackN(struct usb_xfer *xfer, 378 usb_error_t error, u_int index); 379 static struct ieee80211vap *run_vap_create(struct ieee80211com *, 380 const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 381 const uint8_t [IEEE80211_ADDR_LEN], 382 const uint8_t [IEEE80211_ADDR_LEN]); 383 static void run_vap_delete(struct ieee80211vap *); 384 static void run_cmdq_cb(void *, int); 385 static void run_setup_tx_list(struct run_softc *, 386 struct run_endpoint_queue *); 387 static void run_unsetup_tx_list(struct run_softc *, 388 struct run_endpoint_queue *); 389 static int run_load_microcode(struct run_softc *); 390 static int run_reset(struct run_softc *); 391 static usb_error_t run_do_request(struct run_softc *, 392 struct usb_device_request *, void *); 393 static int run_read(struct run_softc *, uint16_t, uint32_t *); 394 static int run_read_region_1(struct run_softc *, uint16_t, uint8_t *, int); 395 static int run_write_2(struct run_softc *, uint16_t, uint16_t); 396 static int run_write(struct run_softc *, uint16_t, uint32_t); 397 static int run_write_region_1(struct run_softc *, uint16_t, 398 const uint8_t *, int); 399 static int run_set_region_4(struct run_softc *, uint16_t, uint32_t, int); 400 static int run_efuse_read(struct run_softc *, uint16_t, uint16_t *, int); 401 static int run_efuse_read_2(struct run_softc *, uint16_t, uint16_t *); 402 static int run_eeprom_read_2(struct run_softc *, uint16_t, uint16_t *); 403 static int run_rt2870_rf_write(struct run_softc *, uint32_t); 404 static int run_rt3070_rf_read(struct run_softc *, uint8_t, uint8_t *); 405 static int run_rt3070_rf_write(struct run_softc *, uint8_t, uint8_t); 406 static int run_bbp_read(struct run_softc *, uint8_t, uint8_t *); 407 static int run_bbp_write(struct run_softc *, uint8_t, uint8_t); 408 static int run_mcu_cmd(struct run_softc *, uint8_t, uint16_t); 409 static const char *run_get_rf(uint16_t); 410 static void run_rt3593_get_txpower(struct run_softc *); 411 static void run_get_txpower(struct run_softc *); 412 static int run_read_eeprom(struct run_softc *); 413 static struct ieee80211_node *run_node_alloc(struct ieee80211vap *, 414 const uint8_t mac[IEEE80211_ADDR_LEN]); 415 static int run_media_change(if_t); 416 static int run_newstate(struct ieee80211vap *, enum ieee80211_state, int); 417 static int run_wme_update(struct ieee80211com *); 418 static void run_key_set_cb(void *); 419 static int run_key_set(struct ieee80211vap *, struct ieee80211_key *); 420 static void run_key_delete_cb(void *); 421 static int run_key_delete(struct ieee80211vap *, struct ieee80211_key *); 422 static void run_ratectl_to(void *); 423 static void run_ratectl_cb(void *, int); 424 static void run_drain_fifo(void *); 425 static void run_iter_func(void *, struct ieee80211_node *); 426 static void run_newassoc_cb(void *); 427 static void run_newassoc(struct ieee80211_node *, int); 428 static void run_recv_mgmt(struct ieee80211_node *, struct mbuf *, int, 429 const struct ieee80211_rx_stats *, int, int); 430 static void run_rx_frame(struct run_softc *, struct mbuf *, uint32_t); 431 static void run_tx_free(struct run_endpoint_queue *pq, 432 struct run_tx_data *, int); 433 static void run_set_tx_desc(struct run_softc *, struct run_tx_data *); 434 static int run_tx(struct run_softc *, struct mbuf *, 435 struct ieee80211_node *); 436 static int run_tx_mgt(struct run_softc *, struct mbuf *, 437 struct ieee80211_node *); 438 static int run_sendprot(struct run_softc *, const struct mbuf *, 439 struct ieee80211_node *, int, int); 440 static int run_tx_param(struct run_softc *, struct mbuf *, 441 struct ieee80211_node *, 442 const struct ieee80211_bpf_params *); 443 static int run_raw_xmit(struct ieee80211_node *, struct mbuf *, 444 const struct ieee80211_bpf_params *); 445 static int run_transmit(struct ieee80211com *, struct mbuf *); 446 static void run_start(struct run_softc *); 447 static void run_parent(struct ieee80211com *); 448 static void run_iq_calib(struct run_softc *, u_int); 449 static void run_set_agc(struct run_softc *, uint8_t); 450 static void run_select_chan_group(struct run_softc *, int); 451 static void run_set_rx_antenna(struct run_softc *, int); 452 static void run_rt2870_set_chan(struct run_softc *, u_int); 453 static void run_rt3070_set_chan(struct run_softc *, u_int); 454 static void run_rt3572_set_chan(struct run_softc *, u_int); 455 static void run_rt3593_set_chan(struct run_softc *, u_int); 456 static void run_rt5390_set_chan(struct run_softc *, u_int); 457 static void run_rt5592_set_chan(struct run_softc *, u_int); 458 static int run_set_chan(struct run_softc *, struct ieee80211_channel *); 459 static void run_set_channel(struct ieee80211com *); 460 static void run_getradiocaps(struct ieee80211com *, int, int *, 461 struct ieee80211_channel[]); 462 static void run_scan_start(struct ieee80211com *); 463 static void run_scan_end(struct ieee80211com *); 464 static void run_update_beacon(struct ieee80211vap *, int); 465 static void run_update_beacon_cb(void *); 466 static void run_updateprot(struct ieee80211com *); 467 static void run_updateprot_cb(void *); 468 static void run_usb_timeout_cb(void *); 469 static void run_reset_livelock(struct run_softc *); 470 static void run_enable_tsf_sync(struct run_softc *); 471 static void run_enable_tsf(struct run_softc *); 472 static void run_disable_tsf(struct run_softc *); 473 static void run_get_tsf(struct run_softc *, uint64_t *); 474 static void run_enable_mrr(struct run_softc *); 475 static void run_set_txpreamble(struct run_softc *); 476 static void run_set_basicrates(struct run_softc *); 477 static void run_set_leds(struct run_softc *, uint16_t); 478 static void run_set_bssid(struct run_softc *, const uint8_t *); 479 static void run_set_macaddr(struct run_softc *, const uint8_t *); 480 static void run_updateslot(struct ieee80211com *); 481 static void run_updateslot_cb(void *); 482 static void run_update_mcast(struct ieee80211com *); 483 static int8_t run_rssi2dbm(struct run_softc *, uint8_t, uint8_t); 484 static void run_update_promisc_locked(struct run_softc *); 485 static void run_update_promisc(struct ieee80211com *); 486 static void run_rt5390_bbp_init(struct run_softc *); 487 static int run_bbp_init(struct run_softc *); 488 static int run_rt3070_rf_init(struct run_softc *); 489 static void run_rt3593_rf_init(struct run_softc *); 490 static void run_rt5390_rf_init(struct run_softc *); 491 static int run_rt3070_filter_calib(struct run_softc *, uint8_t, uint8_t, 492 uint8_t *); 493 static void run_rt3070_rf_setup(struct run_softc *); 494 static void run_rt3593_rf_setup(struct run_softc *); 495 static void run_rt5390_rf_setup(struct run_softc *); 496 static int run_txrx_enable(struct run_softc *); 497 static void run_adjust_freq_offset(struct run_softc *); 498 static void run_init_locked(struct run_softc *); 499 static void run_stop(void *); 500 static void run_delay(struct run_softc *, u_int); 501 static void run_update_chw(struct ieee80211com *ic); 502 static int run_ampdu_enable(struct ieee80211_node *ni, 503 struct ieee80211_tx_ampdu *tap); 504 505 static eventhandler_tag run_etag; 506 507 static const struct rt2860_rate { 508 uint8_t rate; 509 uint8_t mcs; 510 enum ieee80211_phytype phy; 511 uint8_t ctl_ridx; 512 uint16_t sp_ack_dur; 513 uint16_t lp_ack_dur; 514 } rt2860_rates[] = { 515 /* CCK rates (11b) */ 516 { 2, 0, IEEE80211_T_DS, 0, 314, 314 }, 517 { 4, 1, IEEE80211_T_DS, 1, 258, 162 }, 518 { 11, 2, IEEE80211_T_DS, 2, 223, 127 }, 519 { 22, 3, IEEE80211_T_DS, 3, 213, 117 }, 520 521 /* OFDM rates (11a / 11g) */ 522 { 12, 0, IEEE80211_T_OFDM, 4, 60, 60 }, 523 { 18, 1, IEEE80211_T_OFDM, 4, 52, 52 }, 524 { 24, 2, IEEE80211_T_OFDM, 6, 48, 48 }, 525 { 36, 3, IEEE80211_T_OFDM, 6, 44, 44 }, 526 { 48, 4, IEEE80211_T_OFDM, 8, 44, 44 }, 527 { 72, 5, IEEE80211_T_OFDM, 8, 40, 40 }, 528 { 96, 6, IEEE80211_T_OFDM, 8, 40, 40 }, 529 { 108, 7, IEEE80211_T_OFDM, 8, 40, 40 }, 530 531 /* MCS - single stream */ 532 { 0x80, 0, IEEE80211_T_HT, 4, 60, 60 }, 533 { 0x81, 1, IEEE80211_T_HT, 4, 60, 60 }, 534 { 0x82, 2, IEEE80211_T_HT, 4, 60, 60 }, 535 { 0x83, 3, IEEE80211_T_HT, 4, 60, 60 }, 536 { 0x84, 4, IEEE80211_T_HT, 4, 60, 60 }, 537 { 0x85, 5, IEEE80211_T_HT, 4, 60, 60 }, 538 { 0x86, 6, IEEE80211_T_HT, 4, 60, 60 }, 539 { 0x87, 7, IEEE80211_T_HT, 4, 60, 60 }, 540 541 /* MCS - 2 streams */ 542 { 0x88, 8, IEEE80211_T_HT, 4, 60, 60 }, 543 { 0x89, 9, IEEE80211_T_HT, 4, 60, 60 }, 544 { 0x8a, 10, IEEE80211_T_HT, 4, 60, 60 }, 545 { 0x8b, 11, IEEE80211_T_HT, 4, 60, 60 }, 546 { 0x8c, 12, IEEE80211_T_HT, 4, 60, 60 }, 547 { 0x8d, 13, IEEE80211_T_HT, 4, 60, 60 }, 548 { 0x8e, 14, IEEE80211_T_HT, 4, 60, 60 }, 549 { 0x8f, 15, IEEE80211_T_HT, 4, 60, 60 }, 550 551 /* MCS - 3 streams */ 552 { 0x90, 16, IEEE80211_T_HT, 4, 60, 60 }, 553 { 0x91, 17, IEEE80211_T_HT, 4, 60, 60 }, 554 { 0x92, 18, IEEE80211_T_HT, 4, 60, 60 }, 555 { 0x93, 19, IEEE80211_T_HT, 4, 60, 60 }, 556 { 0x94, 20, IEEE80211_T_HT, 4, 60, 60 }, 557 { 0x95, 21, IEEE80211_T_HT, 4, 60, 60 }, 558 { 0x96, 22, IEEE80211_T_HT, 4, 60, 60 }, 559 { 0x97, 23, IEEE80211_T_HT, 4, 60, 60 }, 560 }; 561 562 /* These are indexes into the above rt2860_rates[] array */ 563 #define RT2860_RIDX_CCK1 0 564 #define RT2860_RIDX_CCK11 3 565 #define RT2860_RIDX_OFDM6 4 566 #define RT2860_RIDX_MCS0 12 567 #define RT2860_RIDX_MAX 36 568 569 static const struct { 570 uint16_t reg; 571 uint32_t val; 572 } rt2870_def_mac[] = { 573 RT2870_DEF_MAC 574 }; 575 576 static const struct { 577 uint8_t reg; 578 uint8_t val; 579 } rt2860_def_bbp[] = { 580 RT2860_DEF_BBP 581 },rt5390_def_bbp[] = { 582 RT5390_DEF_BBP 583 },rt5592_def_bbp[] = { 584 RT5592_DEF_BBP 585 }; 586 587 /* 588 * Default values for BBP register R196 for RT5592. 589 */ 590 static const uint8_t rt5592_bbp_r196[] = { 591 0xe0, 0x1f, 0x38, 0x32, 0x08, 0x28, 0x19, 0x0a, 0xff, 0x00, 592 0x16, 0x10, 0x10, 0x0b, 0x36, 0x2c, 0x26, 0x24, 0x42, 0x36, 593 0x30, 0x2d, 0x4c, 0x46, 0x3d, 0x40, 0x3e, 0x42, 0x3d, 0x40, 594 0x3c, 0x34, 0x2c, 0x2f, 0x3c, 0x35, 0x2e, 0x2a, 0x49, 0x41, 595 0x36, 0x31, 0x30, 0x30, 0x0e, 0x0d, 0x28, 0x21, 0x1c, 0x16, 596 0x50, 0x4a, 0x43, 0x40, 0x10, 0x10, 0x10, 0x10, 0x00, 0x00, 597 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 598 0x00, 0x00, 0x7d, 0x14, 0x32, 0x2c, 0x36, 0x4c, 0x43, 0x2c, 599 0x2e, 0x36, 0x30, 0x6e 600 }; 601 602 static const struct rfprog { 603 uint8_t chan; 604 uint32_t r1, r2, r3, r4; 605 } rt2860_rf2850[] = { 606 RT2860_RF2850 607 }; 608 609 struct { 610 uint8_t n, r, k; 611 } rt3070_freqs[] = { 612 RT3070_RF3052 613 }; 614 615 static const struct rt5592_freqs { 616 uint16_t n; 617 uint8_t k, m, r; 618 } rt5592_freqs_20mhz[] = { 619 RT5592_RF5592_20MHZ 620 },rt5592_freqs_40mhz[] = { 621 RT5592_RF5592_40MHZ 622 }; 623 624 static const struct { 625 uint8_t reg; 626 uint8_t val; 627 } rt3070_def_rf[] = { 628 RT3070_DEF_RF 629 },rt3572_def_rf[] = { 630 RT3572_DEF_RF 631 },rt3593_def_rf[] = { 632 RT3593_DEF_RF 633 },rt5390_def_rf[] = { 634 RT5390_DEF_RF 635 },rt5392_def_rf[] = { 636 RT5392_DEF_RF 637 },rt5592_def_rf[] = { 638 RT5592_DEF_RF 639 },rt5592_2ghz_def_rf[] = { 640 RT5592_2GHZ_DEF_RF 641 },rt5592_5ghz_def_rf[] = { 642 RT5592_5GHZ_DEF_RF 643 }; 644 645 static const struct { 646 u_int firstchan; 647 u_int lastchan; 648 uint8_t reg; 649 uint8_t val; 650 } rt5592_chan_5ghz[] = { 651 RT5592_CHAN_5GHZ 652 }; 653 654 static const struct usb_config run_config[RUN_N_XFER] = { 655 [RUN_BULK_TX_BE] = { 656 .type = UE_BULK, 657 .endpoint = UE_ADDR_ANY, 658 .ep_index = 0, 659 .direction = UE_DIR_OUT, 660 .bufsize = RUN_MAX_TXSZ, 661 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 662 .callback = run_bulk_tx_callback0, 663 .timeout = 5000, /* ms */ 664 }, 665 [RUN_BULK_TX_BK] = { 666 .type = UE_BULK, 667 .endpoint = UE_ADDR_ANY, 668 .direction = UE_DIR_OUT, 669 .ep_index = 1, 670 .bufsize = RUN_MAX_TXSZ, 671 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 672 .callback = run_bulk_tx_callback1, 673 .timeout = 5000, /* ms */ 674 }, 675 [RUN_BULK_TX_VI] = { 676 .type = UE_BULK, 677 .endpoint = UE_ADDR_ANY, 678 .direction = UE_DIR_OUT, 679 .ep_index = 2, 680 .bufsize = RUN_MAX_TXSZ, 681 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 682 .callback = run_bulk_tx_callback2, 683 .timeout = 5000, /* ms */ 684 }, 685 [RUN_BULK_TX_VO] = { 686 .type = UE_BULK, 687 .endpoint = UE_ADDR_ANY, 688 .direction = UE_DIR_OUT, 689 .ep_index = 3, 690 .bufsize = RUN_MAX_TXSZ, 691 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 692 .callback = run_bulk_tx_callback3, 693 .timeout = 5000, /* ms */ 694 }, 695 [RUN_BULK_TX_HCCA] = { 696 .type = UE_BULK, 697 .endpoint = UE_ADDR_ANY, 698 .direction = UE_DIR_OUT, 699 .ep_index = 4, 700 .bufsize = RUN_MAX_TXSZ, 701 .flags = {.pipe_bof = 1,.force_short_xfer = 1,.no_pipe_ok = 1,}, 702 .callback = run_bulk_tx_callback4, 703 .timeout = 5000, /* ms */ 704 }, 705 [RUN_BULK_TX_PRIO] = { 706 .type = UE_BULK, 707 .endpoint = UE_ADDR_ANY, 708 .direction = UE_DIR_OUT, 709 .ep_index = 5, 710 .bufsize = RUN_MAX_TXSZ, 711 .flags = {.pipe_bof = 1,.force_short_xfer = 1,.no_pipe_ok = 1,}, 712 .callback = run_bulk_tx_callback5, 713 .timeout = 5000, /* ms */ 714 }, 715 [RUN_BULK_RX] = { 716 .type = UE_BULK, 717 .endpoint = UE_ADDR_ANY, 718 .direction = UE_DIR_IN, 719 .bufsize = RUN_MAX_RXSZ, 720 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 721 .callback = run_bulk_rx_callback, 722 } 723 }; 724 725 static void 726 run_autoinst(void *arg, struct usb_device *udev, 727 struct usb_attach_arg *uaa) 728 { 729 struct usb_interface *iface; 730 struct usb_interface_descriptor *id; 731 732 if (uaa->dev_state != UAA_DEV_READY) 733 return; 734 735 iface = usbd_get_iface(udev, 0); 736 if (iface == NULL) 737 return; 738 id = iface->idesc; 739 if (id == NULL || id->bInterfaceClass != UICLASS_MASS) 740 return; 741 if (usbd_lookup_id_by_uaa(run_devs, sizeof(run_devs), uaa)) 742 return; 743 744 if (usb_msc_eject(udev, 0, MSC_EJECT_STOPUNIT) == 0) 745 uaa->dev_state = UAA_DEV_EJECTING; 746 } 747 748 static int 749 run_driver_loaded(struct module *mod, int what, void *arg) 750 { 751 switch (what) { 752 case MOD_LOAD: 753 run_etag = EVENTHANDLER_REGISTER(usb_dev_configured, 754 run_autoinst, NULL, EVENTHANDLER_PRI_ANY); 755 break; 756 case MOD_UNLOAD: 757 EVENTHANDLER_DEREGISTER(usb_dev_configured, run_etag); 758 break; 759 default: 760 return (EOPNOTSUPP); 761 } 762 return (0); 763 } 764 765 static int 766 run_match(device_t self) 767 { 768 struct usb_attach_arg *uaa = device_get_ivars(self); 769 770 if (uaa->usb_mode != USB_MODE_HOST) 771 return (ENXIO); 772 if (uaa->info.bConfigIndex != 0) 773 return (ENXIO); 774 if (uaa->info.bIfaceIndex != RT2860_IFACE_INDEX) 775 return (ENXIO); 776 777 return (usbd_lookup_id_by_uaa(run_devs, sizeof(run_devs), uaa)); 778 } 779 780 static int 781 run_attach(device_t self) 782 { 783 struct run_softc *sc = device_get_softc(self); 784 struct usb_attach_arg *uaa = device_get_ivars(self); 785 struct ieee80211com *ic = &sc->sc_ic; 786 uint32_t ver; 787 uint8_t iface_index; 788 int ntries, error; 789 790 device_set_usb_desc(self); 791 sc->sc_udev = uaa->device; 792 sc->sc_dev = self; 793 if (USB_GET_DRIVER_INFO(uaa) != RUN_EJECT) 794 sc->sc_flags |= RUN_FLAG_FWLOAD_NEEDED; 795 796 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), 797 MTX_NETWORK_LOCK, MTX_DEF); 798 mbufq_init(&sc->sc_snd, ifqmaxlen); 799 800 iface_index = RT2860_IFACE_INDEX; 801 802 error = usbd_transfer_setup(uaa->device, &iface_index, 803 sc->sc_xfer, run_config, RUN_N_XFER, sc, &sc->sc_mtx); 804 if (error) { 805 device_printf(self, "could not allocate USB transfers, " 806 "err=%s\n", usbd_errstr(error)); 807 goto detach; 808 } 809 810 RUN_LOCK(sc); 811 812 /* wait for the chip to settle */ 813 for (ntries = 0; ntries < 100; ntries++) { 814 if (run_read(sc, RT2860_ASIC_VER_ID, &ver) != 0) { 815 RUN_UNLOCK(sc); 816 goto detach; 817 } 818 if (ver != 0 && ver != 0xffffffff) 819 break; 820 run_delay(sc, 10); 821 } 822 if (ntries == 100) { 823 device_printf(sc->sc_dev, 824 "timeout waiting for NIC to initialize\n"); 825 RUN_UNLOCK(sc); 826 goto detach; 827 } 828 sc->mac_ver = ver >> 16; 829 sc->mac_rev = ver & 0xffff; 830 831 /* retrieve RF rev. no and various other things from EEPROM */ 832 run_read_eeprom(sc); 833 834 device_printf(sc->sc_dev, 835 "MAC/BBP RT%04X (rev 0x%04X), RF %s (MIMO %dT%dR), address %s\n", 836 sc->mac_ver, sc->mac_rev, run_get_rf(sc->rf_rev), 837 sc->ntxchains, sc->nrxchains, ether_sprintf(ic->ic_macaddr)); 838 839 RUN_UNLOCK(sc); 840 841 ic->ic_softc = sc; 842 ic->ic_name = device_get_nameunit(self); 843 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 844 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 845 846 /* set device capabilities */ 847 ic->ic_caps = 848 IEEE80211_C_STA | /* station mode supported */ 849 IEEE80211_C_MONITOR | /* monitor mode supported */ 850 IEEE80211_C_IBSS | 851 IEEE80211_C_HOSTAP | 852 IEEE80211_C_WDS | /* 4-address traffic works */ 853 IEEE80211_C_MBSS | 854 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 855 IEEE80211_C_SHSLOT | /* short slot time supported */ 856 IEEE80211_C_SWAMSDUTX | /* Do software A-MSDU TX */ 857 IEEE80211_C_FF | /* Atheros fast-frames */ 858 IEEE80211_C_WME | /* WME */ 859 IEEE80211_C_WPA; /* WPA1|WPA2(RSN) */ 860 861 /* 862 * RF2020 is not an 11n device. 863 */ 864 if (sc->rf_rev != RT3070_RF_2020) { 865 device_printf(sc->sc_dev, "[HT] Enabling 802.11n\n"); 866 ic->ic_htcaps = 867 IEEE80211_HTC_HT | 868 IEEE80211_HTC_AMPDU | 869 IEEE80211_HTC_AMSDU | 870 IEEE80211_HTCAP_MAXAMSDU_3839 | 871 IEEE80211_HTCAP_SMPS_OFF; 872 873 ic->ic_rxstream = sc->nrxchains; 874 ic->ic_txstream = sc->ntxchains; 875 } 876 877 ic->ic_cryptocaps = 878 IEEE80211_CRYPTO_WEP | 879 IEEE80211_CRYPTO_AES_CCM | 880 IEEE80211_CRYPTO_TKIPMIC | 881 IEEE80211_CRYPTO_TKIP; 882 883 ic->ic_flags |= IEEE80211_F_DATAPAD; 884 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS; 885 886 run_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 887 ic->ic_channels); 888 889 ieee80211_ifattach(ic); 890 891 ic->ic_scan_start = run_scan_start; 892 ic->ic_scan_end = run_scan_end; 893 ic->ic_set_channel = run_set_channel; 894 ic->ic_getradiocaps = run_getradiocaps; 895 ic->ic_node_alloc = run_node_alloc; 896 ic->ic_newassoc = run_newassoc; 897 ic->ic_updateslot = run_updateslot; 898 ic->ic_update_mcast = run_update_mcast; 899 ic->ic_wme.wme_update = run_wme_update; 900 ic->ic_raw_xmit = run_raw_xmit; 901 ic->ic_update_promisc = run_update_promisc; 902 ic->ic_vap_create = run_vap_create; 903 ic->ic_vap_delete = run_vap_delete; 904 ic->ic_transmit = run_transmit; 905 ic->ic_parent = run_parent; 906 ic->ic_update_chw = run_update_chw; 907 ic->ic_ampdu_enable = run_ampdu_enable; 908 909 ieee80211_radiotap_attach(ic, 910 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 911 RUN_TX_RADIOTAP_PRESENT, 912 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 913 RUN_RX_RADIOTAP_PRESENT); 914 915 TASK_INIT(&sc->cmdq_task, 0, run_cmdq_cb, sc); 916 TASK_INIT(&sc->ratectl_task, 0, run_ratectl_cb, sc); 917 usb_callout_init_mtx(&sc->ratectl_ch, &sc->sc_mtx, 0); 918 919 if (bootverbose) 920 ieee80211_announce(ic); 921 922 return (0); 923 924 detach: 925 run_detach(self); 926 return (ENXIO); 927 } 928 929 static void 930 run_drain_mbufq(struct run_softc *sc) 931 { 932 struct mbuf *m; 933 struct ieee80211_node *ni; 934 935 RUN_LOCK_ASSERT(sc, MA_OWNED); 936 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 937 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 938 m->m_pkthdr.rcvif = NULL; 939 ieee80211_free_node(ni); 940 m_freem(m); 941 } 942 } 943 944 static int 945 run_detach(device_t self) 946 { 947 struct run_softc *sc = device_get_softc(self); 948 struct ieee80211com *ic = &sc->sc_ic; 949 int i; 950 951 RUN_LOCK(sc); 952 sc->sc_detached = 1; 953 RUN_UNLOCK(sc); 954 955 /* stop all USB transfers */ 956 usbd_transfer_unsetup(sc->sc_xfer, RUN_N_XFER); 957 958 RUN_LOCK(sc); 959 sc->ratectl_run = RUN_RATECTL_OFF; 960 sc->cmdq_run = sc->cmdq_key_set = RUN_CMDQ_ABORT; 961 962 /* free TX list, if any */ 963 for (i = 0; i != RUN_EP_QUEUES; i++) 964 run_unsetup_tx_list(sc, &sc->sc_epq[i]); 965 966 /* Free TX queue */ 967 run_drain_mbufq(sc); 968 RUN_UNLOCK(sc); 969 970 if (sc->sc_ic.ic_softc == sc) { 971 /* drain tasks */ 972 usb_callout_drain(&sc->ratectl_ch); 973 ieee80211_draintask(ic, &sc->cmdq_task); 974 ieee80211_draintask(ic, &sc->ratectl_task); 975 ieee80211_ifdetach(ic); 976 } 977 978 mtx_destroy(&sc->sc_mtx); 979 980 return (0); 981 } 982 983 static struct ieee80211vap * 984 run_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 985 enum ieee80211_opmode opmode, int flags, 986 const uint8_t bssid[IEEE80211_ADDR_LEN], 987 const uint8_t mac[IEEE80211_ADDR_LEN]) 988 { 989 struct run_softc *sc = ic->ic_softc; 990 struct run_vap *rvp; 991 struct ieee80211vap *vap; 992 int i; 993 994 if (sc->rvp_cnt >= RUN_VAP_MAX) { 995 device_printf(sc->sc_dev, "number of VAPs maxed out\n"); 996 return (NULL); 997 } 998 999 switch (opmode) { 1000 case IEEE80211_M_STA: 1001 /* enable s/w bmiss handling for sta mode */ 1002 flags |= IEEE80211_CLONE_NOBEACONS; 1003 /* fall though */ 1004 case IEEE80211_M_IBSS: 1005 case IEEE80211_M_MONITOR: 1006 case IEEE80211_M_HOSTAP: 1007 case IEEE80211_M_MBSS: 1008 /* other than WDS vaps, only one at a time */ 1009 if (!TAILQ_EMPTY(&ic->ic_vaps)) 1010 return (NULL); 1011 break; 1012 case IEEE80211_M_WDS: 1013 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next){ 1014 if(vap->iv_opmode != IEEE80211_M_HOSTAP) 1015 continue; 1016 /* WDS vap's always share the local mac address. */ 1017 flags &= ~IEEE80211_CLONE_BSSID; 1018 break; 1019 } 1020 if (vap == NULL) { 1021 device_printf(sc->sc_dev, 1022 "wds only supported in ap mode\n"); 1023 return (NULL); 1024 } 1025 break; 1026 default: 1027 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode); 1028 return (NULL); 1029 } 1030 1031 rvp = malloc(sizeof(struct run_vap), M_80211_VAP, M_WAITOK | M_ZERO); 1032 vap = &rvp->vap; 1033 1034 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, 1035 bssid) != 0) { 1036 /* out of memory */ 1037 free(rvp, M_80211_VAP); 1038 return (NULL); 1039 } 1040 1041 vap->iv_update_beacon = run_update_beacon; 1042 vap->iv_max_aid = RT2870_WCID_MAX; 1043 1044 /* 1045 * The linux rt2800 driver limits 1 stream devices to a 32KB 1046 * RX AMPDU. 1047 */ 1048 if (ic->ic_rxstream > 1) 1049 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; 1050 else 1051 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K; 1052 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_2; /* 2uS */ 1053 1054 /* 1055 * To delete the right key from h/w, we need wcid. 1056 * Luckily, there is unused space in ieee80211_key{}, wk_pad, 1057 * and matching wcid will be written into there. So, cast 1058 * some spells to remove 'const' from ieee80211_key{} 1059 */ 1060 vap->iv_key_delete = (void *)run_key_delete; 1061 vap->iv_key_set = (void *)run_key_set; 1062 1063 /* override state transition machine */ 1064 rvp->newstate = vap->iv_newstate; 1065 vap->iv_newstate = run_newstate; 1066 if (opmode == IEEE80211_M_IBSS) { 1067 rvp->recv_mgmt = vap->iv_recv_mgmt; 1068 vap->iv_recv_mgmt = run_recv_mgmt; 1069 } 1070 1071 ieee80211_ratectl_init(vap); 1072 ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */); 1073 1074 /* complete setup */ 1075 ieee80211_vap_attach(vap, run_media_change, ieee80211_media_status, 1076 mac); 1077 1078 /* make sure id is always unique */ 1079 for (i = 0; i < RUN_VAP_MAX; i++) { 1080 if((sc->rvp_bmap & 1 << i) == 0){ 1081 sc->rvp_bmap |= 1 << i; 1082 rvp->rvp_id = i; 1083 break; 1084 } 1085 } 1086 if (sc->rvp_cnt++ == 0) 1087 ic->ic_opmode = opmode; 1088 1089 if (opmode == IEEE80211_M_HOSTAP) 1090 sc->cmdq_run = RUN_CMDQ_GO; 1091 1092 RUN_DPRINTF(sc, RUN_DEBUG_STATE, "rvp_id=%d bmap=%x rvp_cnt=%d\n", 1093 rvp->rvp_id, sc->rvp_bmap, sc->rvp_cnt); 1094 1095 return (vap); 1096 } 1097 1098 static void 1099 run_vap_delete(struct ieee80211vap *vap) 1100 { 1101 struct run_vap *rvp = RUN_VAP(vap); 1102 struct ieee80211com *ic; 1103 struct run_softc *sc; 1104 uint8_t rvp_id; 1105 1106 if (vap == NULL) 1107 return; 1108 1109 ic = vap->iv_ic; 1110 sc = ic->ic_softc; 1111 1112 RUN_LOCK(sc); 1113 1114 m_freem(rvp->beacon_mbuf); 1115 rvp->beacon_mbuf = NULL; 1116 1117 rvp_id = rvp->rvp_id; 1118 sc->ratectl_run &= ~(1 << rvp_id); 1119 sc->rvp_bmap &= ~(1 << rvp_id); 1120 run_set_region_4(sc, RT2860_SKEY(rvp_id, 0), 0, 128); 1121 run_set_region_4(sc, RT2860_BCN_BASE(rvp_id), 0, 512); 1122 --sc->rvp_cnt; 1123 1124 RUN_DPRINTF(sc, RUN_DEBUG_STATE, 1125 "vap=%p rvp_id=%d bmap=%x rvp_cnt=%d\n", 1126 vap, rvp_id, sc->rvp_bmap, sc->rvp_cnt); 1127 1128 RUN_UNLOCK(sc); 1129 1130 ieee80211_ratectl_deinit(vap); 1131 ieee80211_vap_detach(vap); 1132 free(rvp, M_80211_VAP); 1133 } 1134 1135 /* 1136 * There are numbers of functions need to be called in context thread. 1137 * Rather than creating taskqueue event for each of those functions, 1138 * here is all-for-one taskqueue callback function. This function 1139 * guarantees deferred functions are executed in the same order they 1140 * were enqueued. 1141 * '& RUN_CMDQ_MASQ' is to loop cmdq[]. 1142 */ 1143 static void 1144 run_cmdq_cb(void *arg, int pending) 1145 { 1146 struct run_softc *sc = arg; 1147 uint8_t i; 1148 1149 /* call cmdq[].func locked */ 1150 RUN_LOCK(sc); 1151 for (i = sc->cmdq_exec; sc->cmdq[i].func && pending; 1152 i = sc->cmdq_exec, pending--) { 1153 RUN_DPRINTF(sc, RUN_DEBUG_CMD, "cmdq_exec=%d pending=%d\n", 1154 i, pending); 1155 if (sc->cmdq_run == RUN_CMDQ_GO) { 1156 /* 1157 * If arg0 is NULL, callback func needs more 1158 * than one arg. So, pass ptr to cmdq struct. 1159 */ 1160 if (sc->cmdq[i].arg0) 1161 sc->cmdq[i].func(sc->cmdq[i].arg0); 1162 else 1163 sc->cmdq[i].func(&sc->cmdq[i]); 1164 } 1165 sc->cmdq[i].arg0 = NULL; 1166 sc->cmdq[i].func = NULL; 1167 sc->cmdq_exec++; 1168 sc->cmdq_exec &= RUN_CMDQ_MASQ; 1169 } 1170 RUN_UNLOCK(sc); 1171 } 1172 1173 static void 1174 run_setup_tx_list(struct run_softc *sc, struct run_endpoint_queue *pq) 1175 { 1176 struct run_tx_data *data; 1177 1178 memset(pq, 0, sizeof(*pq)); 1179 1180 STAILQ_INIT(&pq->tx_qh); 1181 STAILQ_INIT(&pq->tx_fh); 1182 1183 for (data = &pq->tx_data[0]; 1184 data < &pq->tx_data[RUN_TX_RING_COUNT]; data++) { 1185 data->sc = sc; 1186 STAILQ_INSERT_TAIL(&pq->tx_fh, data, next); 1187 } 1188 pq->tx_nfree = RUN_TX_RING_COUNT; 1189 } 1190 1191 static void 1192 run_unsetup_tx_list(struct run_softc *sc, struct run_endpoint_queue *pq) 1193 { 1194 struct run_tx_data *data; 1195 1196 /* make sure any subsequent use of the queues will fail */ 1197 pq->tx_nfree = 0; 1198 STAILQ_INIT(&pq->tx_fh); 1199 STAILQ_INIT(&pq->tx_qh); 1200 1201 /* free up all node references and mbufs */ 1202 for (data = &pq->tx_data[0]; 1203 data < &pq->tx_data[RUN_TX_RING_COUNT]; data++) { 1204 if (data->m != NULL) { 1205 m_freem(data->m); 1206 data->m = NULL; 1207 } 1208 if (data->ni != NULL) { 1209 ieee80211_free_node(data->ni); 1210 data->ni = NULL; 1211 } 1212 } 1213 } 1214 1215 static int 1216 run_load_microcode(struct run_softc *sc) 1217 { 1218 usb_device_request_t req; 1219 const struct firmware *fw; 1220 const u_char *base; 1221 uint32_t tmp; 1222 int ntries, error; 1223 const uint64_t *temp; 1224 uint64_t bytes; 1225 1226 RUN_UNLOCK(sc); 1227 fw = firmware_get("runfw"); 1228 RUN_LOCK(sc); 1229 if (fw == NULL) { 1230 device_printf(sc->sc_dev, 1231 "failed loadfirmware of file %s\n", "runfw"); 1232 return ENOENT; 1233 } 1234 1235 if (fw->datasize != 8192) { 1236 device_printf(sc->sc_dev, 1237 "invalid firmware size (should be 8KB)\n"); 1238 error = EINVAL; 1239 goto fail; 1240 } 1241 1242 /* 1243 * RT3071/RT3072 use a different firmware 1244 * run-rt2870 (8KB) contains both, 1245 * first half (4KB) is for rt2870, 1246 * last half is for rt3071. 1247 */ 1248 base = fw->data; 1249 if ((sc->mac_ver) != 0x2860 && 1250 (sc->mac_ver) != 0x2872 && 1251 (sc->mac_ver) != 0x3070) { 1252 base += 4096; 1253 } 1254 1255 /* cheap sanity check */ 1256 temp = fw->data; 1257 bytes = *temp; 1258 if (bytes != be64toh(0xffffff0210280210ULL)) { 1259 device_printf(sc->sc_dev, "firmware checksum failed\n"); 1260 error = EINVAL; 1261 goto fail; 1262 } 1263 1264 /* write microcode image */ 1265 if (sc->sc_flags & RUN_FLAG_FWLOAD_NEEDED) { 1266 run_write_region_1(sc, RT2870_FW_BASE, base, 4096); 1267 run_write(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff); 1268 run_write(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff); 1269 } 1270 1271 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1272 req.bRequest = RT2870_RESET; 1273 USETW(req.wValue, 8); 1274 USETW(req.wIndex, 0); 1275 USETW(req.wLength, 0); 1276 if ((error = usbd_do_request(sc->sc_udev, &sc->sc_mtx, &req, NULL)) 1277 != 0) { 1278 device_printf(sc->sc_dev, "firmware reset failed\n"); 1279 goto fail; 1280 } 1281 1282 run_delay(sc, 10); 1283 1284 run_write(sc, RT2860_H2M_BBPAGENT, 0); 1285 run_write(sc, RT2860_H2M_MAILBOX, 0); 1286 run_write(sc, RT2860_H2M_INTSRC, 0); 1287 if ((error = run_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0)) != 0) 1288 goto fail; 1289 1290 /* wait until microcontroller is ready */ 1291 for (ntries = 0; ntries < 1000; ntries++) { 1292 if ((error = run_read(sc, RT2860_SYS_CTRL, &tmp)) != 0) 1293 goto fail; 1294 if (tmp & RT2860_MCU_READY) 1295 break; 1296 run_delay(sc, 10); 1297 } 1298 if (ntries == 1000) { 1299 device_printf(sc->sc_dev, 1300 "timeout waiting for MCU to initialize\n"); 1301 error = ETIMEDOUT; 1302 goto fail; 1303 } 1304 device_printf(sc->sc_dev, "firmware %s ver. %u.%u loaded\n", 1305 (base == fw->data) ? "RT2870" : "RT3071", 1306 *(base + 4092), *(base + 4093)); 1307 1308 fail: 1309 firmware_put(fw, FIRMWARE_UNLOAD); 1310 return (error); 1311 } 1312 1313 static int 1314 run_reset(struct run_softc *sc) 1315 { 1316 usb_device_request_t req; 1317 1318 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1319 req.bRequest = RT2870_RESET; 1320 USETW(req.wValue, 1); 1321 USETW(req.wIndex, 0); 1322 USETW(req.wLength, 0); 1323 return (usbd_do_request(sc->sc_udev, &sc->sc_mtx, &req, NULL)); 1324 } 1325 1326 static usb_error_t 1327 run_do_request(struct run_softc *sc, 1328 struct usb_device_request *req, void *data) 1329 { 1330 usb_error_t err; 1331 int ntries = 10; 1332 1333 RUN_LOCK_ASSERT(sc, MA_OWNED); 1334 1335 while (ntries--) { 1336 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1337 req, data, 0, NULL, 250 /* ms */); 1338 if (err == 0) 1339 break; 1340 RUN_DPRINTF(sc, RUN_DEBUG_USB, 1341 "Control request failed, %s (retrying)\n", 1342 usbd_errstr(err)); 1343 run_delay(sc, 10); 1344 } 1345 return (err); 1346 } 1347 1348 static int 1349 run_read(struct run_softc *sc, uint16_t reg, uint32_t *val) 1350 { 1351 uint32_t tmp; 1352 int error; 1353 1354 error = run_read_region_1(sc, reg, (uint8_t *)&tmp, sizeof tmp); 1355 if (error == 0) 1356 *val = le32toh(tmp); 1357 else 1358 *val = 0xffffffff; 1359 return (error); 1360 } 1361 1362 static int 1363 run_read_region_1(struct run_softc *sc, uint16_t reg, uint8_t *buf, int len) 1364 { 1365 usb_device_request_t req; 1366 1367 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1368 req.bRequest = RT2870_READ_REGION_1; 1369 USETW(req.wValue, 0); 1370 USETW(req.wIndex, reg); 1371 USETW(req.wLength, len); 1372 1373 return (run_do_request(sc, &req, buf)); 1374 } 1375 1376 static int 1377 run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val) 1378 { 1379 usb_device_request_t req; 1380 1381 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1382 req.bRequest = RT2870_WRITE_2; 1383 USETW(req.wValue, val); 1384 USETW(req.wIndex, reg); 1385 USETW(req.wLength, 0); 1386 1387 return (run_do_request(sc, &req, NULL)); 1388 } 1389 1390 static int 1391 run_write(struct run_softc *sc, uint16_t reg, uint32_t val) 1392 { 1393 int error; 1394 1395 if ((error = run_write_2(sc, reg, val & 0xffff)) == 0) 1396 error = run_write_2(sc, reg + 2, val >> 16); 1397 return (error); 1398 } 1399 1400 static int 1401 run_write_region_1(struct run_softc *sc, uint16_t reg, const uint8_t *buf, 1402 int len) 1403 { 1404 #if 1 1405 int i, error = 0; 1406 /* 1407 * NB: the WRITE_REGION_1 command is not stable on RT2860. 1408 * We thus issue multiple WRITE_2 commands instead. 1409 */ 1410 KASSERT((len & 1) == 0, ("run_write_region_1: Data too long.\n")); 1411 for (i = 0; i < len && error == 0; i += 2) 1412 error = run_write_2(sc, reg + i, buf[i] | buf[i + 1] << 8); 1413 return (error); 1414 #else 1415 usb_device_request_t req; 1416 int error = 0; 1417 1418 /* 1419 * NOTE: It appears the WRITE_REGION_1 command cannot be 1420 * passed a huge amount of data, which will crash the 1421 * firmware. Limit amount of data passed to 64-bytes at a 1422 * time. 1423 */ 1424 while (len > 0) { 1425 int delta = 64; 1426 if (delta > len) 1427 delta = len; 1428 1429 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1430 req.bRequest = RT2870_WRITE_REGION_1; 1431 USETW(req.wValue, 0); 1432 USETW(req.wIndex, reg); 1433 USETW(req.wLength, delta); 1434 error = run_do_request(sc, &req, __DECONST(uint8_t *, buf)); 1435 if (error != 0) 1436 break; 1437 reg += delta; 1438 buf += delta; 1439 len -= delta; 1440 } 1441 return (error); 1442 #endif 1443 } 1444 1445 static int 1446 run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int len) 1447 { 1448 int i, error = 0; 1449 1450 KASSERT((len & 3) == 0, ("run_set_region_4: Invalid data length.\n")); 1451 for (i = 0; i < len && error == 0; i += 4) 1452 error = run_write(sc, reg + i, val); 1453 return (error); 1454 } 1455 1456 static int 1457 run_efuse_read(struct run_softc *sc, uint16_t addr, uint16_t *val, int count) 1458 { 1459 uint32_t tmp; 1460 uint16_t reg; 1461 int error, ntries; 1462 1463 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1464 return (error); 1465 1466 if (count == 2) 1467 addr *= 2; 1468 /*- 1469 * Read one 16-byte block into registers EFUSE_DATA[0-3]: 1470 * DATA0: F E D C 1471 * DATA1: B A 9 8 1472 * DATA2: 7 6 5 4 1473 * DATA3: 3 2 1 0 1474 */ 1475 tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK); 1476 tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK; 1477 run_write(sc, RT3070_EFUSE_CTRL, tmp); 1478 for (ntries = 0; ntries < 100; ntries++) { 1479 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1480 return (error); 1481 if (!(tmp & RT3070_EFSROM_KICK)) 1482 break; 1483 run_delay(sc, 2); 1484 } 1485 if (ntries == 100) 1486 return (ETIMEDOUT); 1487 1488 if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK) { 1489 *val = 0xffff; /* address not found */ 1490 return (0); 1491 } 1492 /* determine to which 32-bit register our 16-bit word belongs */ 1493 reg = RT3070_EFUSE_DATA3 - (addr & 0xc); 1494 if ((error = run_read(sc, reg, &tmp)) != 0) 1495 return (error); 1496 1497 tmp >>= (8 * (addr & 0x3)); 1498 *val = (addr & 1) ? tmp >> 16 : tmp & 0xffff; 1499 1500 return (0); 1501 } 1502 1503 /* Read 16-bit from eFUSE ROM for RT3xxx. */ 1504 static int 1505 run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 1506 { 1507 return (run_efuse_read(sc, addr, val, 2)); 1508 } 1509 1510 static int 1511 run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 1512 { 1513 usb_device_request_t req; 1514 uint16_t tmp; 1515 int error; 1516 1517 addr *= 2; 1518 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1519 req.bRequest = RT2870_EEPROM_READ; 1520 USETW(req.wValue, 0); 1521 USETW(req.wIndex, addr); 1522 USETW(req.wLength, sizeof(tmp)); 1523 1524 error = usbd_do_request(sc->sc_udev, &sc->sc_mtx, &req, &tmp); 1525 if (error == 0) 1526 *val = le16toh(tmp); 1527 else 1528 *val = 0xffff; 1529 return (error); 1530 } 1531 1532 static __inline int 1533 run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val) 1534 { 1535 /* either eFUSE ROM or EEPROM */ 1536 return sc->sc_srom_read(sc, addr, val); 1537 } 1538 1539 static int 1540 run_rt2870_rf_write(struct run_softc *sc, uint32_t val) 1541 { 1542 uint32_t tmp; 1543 int error, ntries; 1544 1545 for (ntries = 0; ntries < 10; ntries++) { 1546 if ((error = run_read(sc, RT2860_RF_CSR_CFG0, &tmp)) != 0) 1547 return (error); 1548 if (!(tmp & RT2860_RF_REG_CTRL)) 1549 break; 1550 } 1551 if (ntries == 10) 1552 return (ETIMEDOUT); 1553 1554 return (run_write(sc, RT2860_RF_CSR_CFG0, val)); 1555 } 1556 1557 static int 1558 run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1559 { 1560 uint32_t tmp; 1561 int error, ntries; 1562 1563 for (ntries = 0; ntries < 100; ntries++) { 1564 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1565 return (error); 1566 if (!(tmp & RT3070_RF_KICK)) 1567 break; 1568 } 1569 if (ntries == 100) 1570 return (ETIMEDOUT); 1571 1572 tmp = RT3070_RF_KICK | reg << 8; 1573 if ((error = run_write(sc, RT3070_RF_CSR_CFG, tmp)) != 0) 1574 return (error); 1575 1576 for (ntries = 0; ntries < 100; ntries++) { 1577 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1578 return (error); 1579 if (!(tmp & RT3070_RF_KICK)) 1580 break; 1581 } 1582 if (ntries == 100) 1583 return (ETIMEDOUT); 1584 1585 *val = tmp & 0xff; 1586 return (0); 1587 } 1588 1589 static int 1590 run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1591 { 1592 uint32_t tmp; 1593 int error, ntries; 1594 1595 for (ntries = 0; ntries < 10; ntries++) { 1596 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1597 return (error); 1598 if (!(tmp & RT3070_RF_KICK)) 1599 break; 1600 } 1601 if (ntries == 10) 1602 return (ETIMEDOUT); 1603 1604 tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val; 1605 return (run_write(sc, RT3070_RF_CSR_CFG, tmp)); 1606 } 1607 1608 static int 1609 run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1610 { 1611 uint32_t tmp; 1612 int ntries, error; 1613 1614 for (ntries = 0; ntries < 10; ntries++) { 1615 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1616 return (error); 1617 if (!(tmp & RT2860_BBP_CSR_KICK)) 1618 break; 1619 } 1620 if (ntries == 10) 1621 return (ETIMEDOUT); 1622 1623 tmp = RT2860_BBP_CSR_READ | RT2860_BBP_CSR_KICK | reg << 8; 1624 if ((error = run_write(sc, RT2860_BBP_CSR_CFG, tmp)) != 0) 1625 return (error); 1626 1627 for (ntries = 0; ntries < 10; ntries++) { 1628 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1629 return (error); 1630 if (!(tmp & RT2860_BBP_CSR_KICK)) 1631 break; 1632 } 1633 if (ntries == 10) 1634 return (ETIMEDOUT); 1635 1636 *val = tmp & 0xff; 1637 return (0); 1638 } 1639 1640 static int 1641 run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1642 { 1643 uint32_t tmp; 1644 int ntries, error; 1645 1646 for (ntries = 0; ntries < 10; ntries++) { 1647 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1648 return (error); 1649 if (!(tmp & RT2860_BBP_CSR_KICK)) 1650 break; 1651 } 1652 if (ntries == 10) 1653 return (ETIMEDOUT); 1654 1655 tmp = RT2860_BBP_CSR_KICK | reg << 8 | val; 1656 return (run_write(sc, RT2860_BBP_CSR_CFG, tmp)); 1657 } 1658 1659 /* 1660 * Send a command to the 8051 microcontroller unit. 1661 */ 1662 static int 1663 run_mcu_cmd(struct run_softc *sc, uint8_t cmd, uint16_t arg) 1664 { 1665 uint32_t tmp; 1666 int error, ntries; 1667 1668 for (ntries = 0; ntries < 100; ntries++) { 1669 if ((error = run_read(sc, RT2860_H2M_MAILBOX, &tmp)) != 0) 1670 return error; 1671 if (!(tmp & RT2860_H2M_BUSY)) 1672 break; 1673 } 1674 if (ntries == 100) 1675 return ETIMEDOUT; 1676 1677 tmp = RT2860_H2M_BUSY | RT2860_TOKEN_NO_INTR << 16 | arg; 1678 if ((error = run_write(sc, RT2860_H2M_MAILBOX, tmp)) == 0) 1679 error = run_write(sc, RT2860_HOST_CMD, cmd); 1680 return (error); 1681 } 1682 1683 /* 1684 * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word. 1685 * Used to adjust per-rate Tx power registers. 1686 */ 1687 static __inline uint32_t 1688 b4inc(uint32_t b32, int8_t delta) 1689 { 1690 int8_t i, b4; 1691 1692 for (i = 0; i < 8; i++) { 1693 b4 = b32 & 0xf; 1694 b4 += delta; 1695 if (b4 < 0) 1696 b4 = 0; 1697 else if (b4 > 0xf) 1698 b4 = 0xf; 1699 b32 = b32 >> 4 | b4 << 28; 1700 } 1701 return (b32); 1702 } 1703 1704 static const char * 1705 run_get_rf(uint16_t rev) 1706 { 1707 switch (rev) { 1708 case RT2860_RF_2820: return "RT2820"; 1709 case RT2860_RF_2850: return "RT2850"; 1710 case RT2860_RF_2720: return "RT2720"; 1711 case RT2860_RF_2750: return "RT2750"; 1712 case RT3070_RF_3020: return "RT3020"; 1713 case RT3070_RF_2020: return "RT2020"; 1714 case RT3070_RF_3021: return "RT3021"; 1715 case RT3070_RF_3022: return "RT3022"; 1716 case RT3070_RF_3052: return "RT3052"; 1717 case RT3593_RF_3053: return "RT3053"; 1718 case RT5592_RF_5592: return "RT5592"; 1719 case RT5390_RF_5370: return "RT5370"; 1720 case RT5390_RF_5372: return "RT5372"; 1721 } 1722 return ("unknown"); 1723 } 1724 1725 static void 1726 run_rt3593_get_txpower(struct run_softc *sc) 1727 { 1728 uint16_t addr, val; 1729 int i; 1730 1731 /* Read power settings for 2GHz channels. */ 1732 for (i = 0; i < 14; i += 2) { 1733 addr = (sc->ntxchains == 3) ? RT3593_EEPROM_PWR2GHZ_BASE1 : 1734 RT2860_EEPROM_PWR2GHZ_BASE1; 1735 run_srom_read(sc, addr + i / 2, &val); 1736 sc->txpow1[i + 0] = (int8_t)(val & 0xff); 1737 sc->txpow1[i + 1] = (int8_t)(val >> 8); 1738 1739 addr = (sc->ntxchains == 3) ? RT3593_EEPROM_PWR2GHZ_BASE2 : 1740 RT2860_EEPROM_PWR2GHZ_BASE2; 1741 run_srom_read(sc, addr + i / 2, &val); 1742 sc->txpow2[i + 0] = (int8_t)(val & 0xff); 1743 sc->txpow2[i + 1] = (int8_t)(val >> 8); 1744 1745 if (sc->ntxchains == 3) { 1746 run_srom_read(sc, RT3593_EEPROM_PWR2GHZ_BASE3 + i / 2, 1747 &val); 1748 sc->txpow3[i + 0] = (int8_t)(val & 0xff); 1749 sc->txpow3[i + 1] = (int8_t)(val >> 8); 1750 } 1751 } 1752 /* Fix broken Tx power entries. */ 1753 for (i = 0; i < 14; i++) { 1754 if (sc->txpow1[i] > 31) 1755 sc->txpow1[i] = 5; 1756 if (sc->txpow2[i] > 31) 1757 sc->txpow2[i] = 5; 1758 if (sc->ntxchains == 3) { 1759 if (sc->txpow3[i] > 31) 1760 sc->txpow3[i] = 5; 1761 } 1762 } 1763 /* Read power settings for 5GHz channels. */ 1764 for (i = 0; i < 40; i += 2) { 1765 run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE1 + i / 2, &val); 1766 sc->txpow1[i + 14] = (int8_t)(val & 0xff); 1767 sc->txpow1[i + 15] = (int8_t)(val >> 8); 1768 1769 run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE2 + i / 2, &val); 1770 sc->txpow2[i + 14] = (int8_t)(val & 0xff); 1771 sc->txpow2[i + 15] = (int8_t)(val >> 8); 1772 1773 if (sc->ntxchains == 3) { 1774 run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE3 + i / 2, 1775 &val); 1776 sc->txpow3[i + 14] = (int8_t)(val & 0xff); 1777 sc->txpow3[i + 15] = (int8_t)(val >> 8); 1778 } 1779 } 1780 } 1781 1782 static void 1783 run_get_txpower(struct run_softc *sc) 1784 { 1785 uint16_t val; 1786 int i; 1787 1788 /* Read power settings for 2GHz channels. */ 1789 for (i = 0; i < 14; i += 2) { 1790 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val); 1791 sc->txpow1[i + 0] = (int8_t)(val & 0xff); 1792 sc->txpow1[i + 1] = (int8_t)(val >> 8); 1793 1794 if (sc->mac_ver != 0x5390) { 1795 run_srom_read(sc, 1796 RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val); 1797 sc->txpow2[i + 0] = (int8_t)(val & 0xff); 1798 sc->txpow2[i + 1] = (int8_t)(val >> 8); 1799 } 1800 } 1801 /* Fix broken Tx power entries. */ 1802 for (i = 0; i < 14; i++) { 1803 if (sc->mac_ver >= 0x5390) { 1804 if (sc->txpow1[i] < 0 || sc->txpow1[i] > 39) 1805 sc->txpow1[i] = 5; 1806 } else { 1807 if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31) 1808 sc->txpow1[i] = 5; 1809 } 1810 if (sc->mac_ver > 0x5390) { 1811 if (sc->txpow2[i] < 0 || sc->txpow2[i] > 39) 1812 sc->txpow2[i] = 5; 1813 } else if (sc->mac_ver < 0x5390) { 1814 if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31) 1815 sc->txpow2[i] = 5; 1816 } 1817 RUN_DPRINTF(sc, RUN_DEBUG_TXPWR, 1818 "chan %d: power1=%d, power2=%d\n", 1819 rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i]); 1820 } 1821 /* Read power settings for 5GHz channels. */ 1822 for (i = 0; i < 40; i += 2) { 1823 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val); 1824 sc->txpow1[i + 14] = (int8_t)(val & 0xff); 1825 sc->txpow1[i + 15] = (int8_t)(val >> 8); 1826 1827 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val); 1828 sc->txpow2[i + 14] = (int8_t)(val & 0xff); 1829 sc->txpow2[i + 15] = (int8_t)(val >> 8); 1830 } 1831 /* Fix broken Tx power entries. */ 1832 for (i = 0; i < 40; i++ ) { 1833 if (sc->mac_ver != 0x5592) { 1834 if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15) 1835 sc->txpow1[14 + i] = 5; 1836 if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15) 1837 sc->txpow2[14 + i] = 5; 1838 } 1839 RUN_DPRINTF(sc, RUN_DEBUG_TXPWR, 1840 "chan %d: power1=%d, power2=%d\n", 1841 rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i], 1842 sc->txpow2[14 + i]); 1843 } 1844 } 1845 1846 static int 1847 run_read_eeprom(struct run_softc *sc) 1848 { 1849 struct ieee80211com *ic = &sc->sc_ic; 1850 int8_t delta_2ghz, delta_5ghz; 1851 uint32_t tmp; 1852 uint16_t val; 1853 int ridx, ant, i; 1854 1855 /* check whether the ROM is eFUSE ROM or EEPROM */ 1856 sc->sc_srom_read = run_eeprom_read_2; 1857 if (sc->mac_ver >= 0x3070) { 1858 run_read(sc, RT3070_EFUSE_CTRL, &tmp); 1859 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "EFUSE_CTRL=0x%08x\n", tmp); 1860 if ((tmp & RT3070_SEL_EFUSE) || sc->mac_ver == 0x3593) 1861 sc->sc_srom_read = run_efuse_read_2; 1862 } 1863 1864 /* read ROM version */ 1865 run_srom_read(sc, RT2860_EEPROM_VERSION, &val); 1866 RUN_DPRINTF(sc, RUN_DEBUG_ROM, 1867 "EEPROM rev=%d, FAE=%d\n", val >> 8, val & 0xff); 1868 1869 /* read MAC address */ 1870 run_srom_read(sc, RT2860_EEPROM_MAC01, &val); 1871 ic->ic_macaddr[0] = val & 0xff; 1872 ic->ic_macaddr[1] = val >> 8; 1873 run_srom_read(sc, RT2860_EEPROM_MAC23, &val); 1874 ic->ic_macaddr[2] = val & 0xff; 1875 ic->ic_macaddr[3] = val >> 8; 1876 run_srom_read(sc, RT2860_EEPROM_MAC45, &val); 1877 ic->ic_macaddr[4] = val & 0xff; 1878 ic->ic_macaddr[5] = val >> 8; 1879 1880 if (sc->mac_ver < 0x3593) { 1881 /* read vender BBP settings */ 1882 for (i = 0; i < 10; i++) { 1883 run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val); 1884 sc->bbp[i].val = val & 0xff; 1885 sc->bbp[i].reg = val >> 8; 1886 RUN_DPRINTF(sc, RUN_DEBUG_ROM, 1887 "BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val); 1888 } 1889 if (sc->mac_ver >= 0x3071) { 1890 /* read vendor RF settings */ 1891 for (i = 0; i < 10; i++) { 1892 run_srom_read(sc, RT3071_EEPROM_RF_BASE + i, 1893 &val); 1894 sc->rf[i].val = val & 0xff; 1895 sc->rf[i].reg = val >> 8; 1896 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "RF%d=0x%02x\n", 1897 sc->rf[i].reg, sc->rf[i].val); 1898 } 1899 } 1900 } 1901 1902 /* read RF frequency offset from EEPROM */ 1903 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_FREQ_LEDS : 1904 RT3593_EEPROM_FREQ, &val); 1905 sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0; 1906 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "EEPROM freq offset %d\n", 1907 sc->freq & 0xff); 1908 1909 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_FREQ_LEDS : 1910 RT3593_EEPROM_FREQ_LEDS, &val); 1911 if (val >> 8 != 0xff) { 1912 /* read LEDs operating mode */ 1913 sc->leds = val >> 8; 1914 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_LED1 : 1915 RT3593_EEPROM_LED1, &sc->led[0]); 1916 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_LED2 : 1917 RT3593_EEPROM_LED2, &sc->led[1]); 1918 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_LED3 : 1919 RT3593_EEPROM_LED3, &sc->led[2]); 1920 } else { 1921 /* broken EEPROM, use default settings */ 1922 sc->leds = 0x01; 1923 sc->led[0] = 0x5555; 1924 sc->led[1] = 0x2221; 1925 sc->led[2] = 0x5627; /* differs from RT2860 */ 1926 } 1927 RUN_DPRINTF(sc, RUN_DEBUG_ROM, 1928 "EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n", 1929 sc->leds, sc->led[0], sc->led[1], sc->led[2]); 1930 1931 /* read RF information */ 1932 if (sc->mac_ver == 0x5390 || sc->mac_ver ==0x5392) 1933 run_srom_read(sc, 0x00, &val); 1934 else 1935 run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val); 1936 1937 if (val == 0xffff) { 1938 device_printf(sc->sc_dev, 1939 "invalid EEPROM antenna info, using default\n"); 1940 if (sc->mac_ver == 0x3572) { 1941 /* default to RF3052 2T2R */ 1942 sc->rf_rev = RT3070_RF_3052; 1943 sc->ntxchains = 2; 1944 sc->nrxchains = 2; 1945 } else if (sc->mac_ver >= 0x3070) { 1946 /* default to RF3020 1T1R */ 1947 sc->rf_rev = RT3070_RF_3020; 1948 sc->ntxchains = 1; 1949 sc->nrxchains = 1; 1950 } else { 1951 /* default to RF2820 1T2R */ 1952 sc->rf_rev = RT2860_RF_2820; 1953 sc->ntxchains = 1; 1954 sc->nrxchains = 2; 1955 } 1956 } else { 1957 if (sc->mac_ver == 0x5390 || sc->mac_ver ==0x5392) { 1958 sc->rf_rev = val; 1959 run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val); 1960 } else 1961 sc->rf_rev = (val >> 8) & 0xf; 1962 sc->ntxchains = (val >> 4) & 0xf; 1963 sc->nrxchains = val & 0xf; 1964 } 1965 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "EEPROM RF rev=0x%04x chains=%dT%dR\n", 1966 sc->rf_rev, sc->ntxchains, sc->nrxchains); 1967 1968 /* check if RF supports automatic Tx access gain control */ 1969 run_srom_read(sc, RT2860_EEPROM_CONFIG, &val); 1970 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "EEPROM CFG 0x%04x\n", val); 1971 /* check if driver should patch the DAC issue */ 1972 if ((val >> 8) != 0xff) 1973 sc->patch_dac = (val >> 15) & 1; 1974 if ((val & 0xff) != 0xff) { 1975 sc->ext_5ghz_lna = (val >> 3) & 1; 1976 sc->ext_2ghz_lna = (val >> 2) & 1; 1977 /* check if RF supports automatic Tx access gain control */ 1978 sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1; 1979 /* check if we have a hardware radio switch */ 1980 sc->rfswitch = val & 1; 1981 } 1982 1983 /* Read Tx power settings. */ 1984 if (sc->mac_ver == 0x3593) 1985 run_rt3593_get_txpower(sc); 1986 else 1987 run_get_txpower(sc); 1988 1989 /* read Tx power compensation for each Tx rate */ 1990 run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val); 1991 delta_2ghz = delta_5ghz = 0; 1992 if ((val & 0xff) != 0xff && (val & 0x80)) { 1993 delta_2ghz = val & 0xf; 1994 if (!(val & 0x40)) /* negative number */ 1995 delta_2ghz = -delta_2ghz; 1996 } 1997 val >>= 8; 1998 if ((val & 0xff) != 0xff && (val & 0x80)) { 1999 delta_5ghz = val & 0xf; 2000 if (!(val & 0x40)) /* negative number */ 2001 delta_5ghz = -delta_5ghz; 2002 } 2003 RUN_DPRINTF(sc, RUN_DEBUG_ROM | RUN_DEBUG_TXPWR, 2004 "power compensation=%d (2GHz), %d (5GHz)\n", delta_2ghz, delta_5ghz); 2005 2006 for (ridx = 0; ridx < 5; ridx++) { 2007 uint32_t reg; 2008 2009 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val); 2010 reg = val; 2011 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val); 2012 reg |= (uint32_t)val << 16; 2013 2014 sc->txpow20mhz[ridx] = reg; 2015 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz); 2016 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz); 2017 2018 RUN_DPRINTF(sc, RUN_DEBUG_ROM | RUN_DEBUG_TXPWR, 2019 "ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, " 2020 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx], 2021 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx]); 2022 } 2023 2024 /* Read RSSI offsets and LNA gains from EEPROM. */ 2025 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI1_2GHZ : 2026 RT3593_EEPROM_RSSI1_2GHZ, &val); 2027 sc->rssi_2ghz[0] = val & 0xff; /* Ant A */ 2028 sc->rssi_2ghz[1] = val >> 8; /* Ant B */ 2029 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI2_2GHZ : 2030 RT3593_EEPROM_RSSI2_2GHZ, &val); 2031 if (sc->mac_ver >= 0x3070) { 2032 if (sc->mac_ver == 0x3593) { 2033 sc->txmixgain_2ghz = 0; 2034 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */ 2035 } else { 2036 /* 2037 * On RT3070 chips (limited to 2 Rx chains), this ROM 2038 * field contains the Tx mixer gain for the 2GHz band. 2039 */ 2040 if ((val & 0xff) != 0xff) 2041 sc->txmixgain_2ghz = val & 0x7; 2042 } 2043 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "tx mixer gain=%u (2GHz)\n", 2044 sc->txmixgain_2ghz); 2045 } else 2046 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */ 2047 if (sc->mac_ver == 0x3593) 2048 run_srom_read(sc, RT3593_EEPROM_LNA_5GHZ, &val); 2049 sc->lna[2] = val >> 8; /* channel group 2 */ 2050 2051 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI1_5GHZ : 2052 RT3593_EEPROM_RSSI1_5GHZ, &val); 2053 sc->rssi_5ghz[0] = val & 0xff; /* Ant A */ 2054 sc->rssi_5ghz[1] = val >> 8; /* Ant B */ 2055 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI2_5GHZ : 2056 RT3593_EEPROM_RSSI2_5GHZ, &val); 2057 if (sc->mac_ver == 0x3572) { 2058 /* 2059 * On RT3572 chips (limited to 2 Rx chains), this ROM 2060 * field contains the Tx mixer gain for the 5GHz band. 2061 */ 2062 if ((val & 0xff) != 0xff) 2063 sc->txmixgain_5ghz = val & 0x7; 2064 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "tx mixer gain=%u (5GHz)\n", 2065 sc->txmixgain_5ghz); 2066 } else 2067 sc->rssi_5ghz[2] = val & 0xff; /* Ant C */ 2068 if (sc->mac_ver == 0x3593) { 2069 sc->txmixgain_5ghz = 0; 2070 run_srom_read(sc, RT3593_EEPROM_LNA_5GHZ, &val); 2071 } 2072 sc->lna[3] = val >> 8; /* channel group 3 */ 2073 2074 run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_LNA : 2075 RT3593_EEPROM_LNA, &val); 2076 sc->lna[0] = val & 0xff; /* channel group 0 */ 2077 sc->lna[1] = val >> 8; /* channel group 1 */ 2078 2079 /* fix broken 5GHz LNA entries */ 2080 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) { 2081 RUN_DPRINTF(sc, RUN_DEBUG_ROM, 2082 "invalid LNA for channel group %d\n", 2); 2083 sc->lna[2] = sc->lna[1]; 2084 } 2085 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) { 2086 RUN_DPRINTF(sc, RUN_DEBUG_ROM, 2087 "invalid LNA for channel group %d\n", 3); 2088 sc->lna[3] = sc->lna[1]; 2089 } 2090 2091 /* fix broken RSSI offset entries */ 2092 for (ant = 0; ant < 3; ant++) { 2093 if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) { 2094 RUN_DPRINTF(sc, RUN_DEBUG_ROM | RUN_DEBUG_RSSI, 2095 "invalid RSSI%d offset: %d (2GHz)\n", 2096 ant + 1, sc->rssi_2ghz[ant]); 2097 sc->rssi_2ghz[ant] = 0; 2098 } 2099 if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) { 2100 RUN_DPRINTF(sc, RUN_DEBUG_ROM | RUN_DEBUG_RSSI, 2101 "invalid RSSI%d offset: %d (5GHz)\n", 2102 ant + 1, sc->rssi_5ghz[ant]); 2103 sc->rssi_5ghz[ant] = 0; 2104 } 2105 } 2106 return (0); 2107 } 2108 2109 static struct ieee80211_node * 2110 run_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) 2111 { 2112 return malloc(sizeof (struct run_node), M_80211_NODE, 2113 M_NOWAIT | M_ZERO); 2114 } 2115 2116 static int 2117 run_media_change(if_t ifp) 2118 { 2119 struct ieee80211vap *vap = if_getsoftc(ifp); 2120 struct ieee80211com *ic = vap->iv_ic; 2121 const struct ieee80211_txparam *tp; 2122 struct run_softc *sc = ic->ic_softc; 2123 uint8_t rate, ridx; 2124 int error; 2125 2126 RUN_LOCK(sc); 2127 2128 error = ieee80211_media_change(ifp); 2129 if (error != 0) { 2130 RUN_UNLOCK(sc); 2131 return (error); 2132 } 2133 2134 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 2135 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 2136 struct ieee80211_node *ni; 2137 struct run_node *rn; 2138 2139 /* XXX TODO: methodize with MCS rates */ 2140 rate = ic->ic_sup_rates[ic->ic_curmode]. 2141 rs_rates[tp->ucastrate] & IEEE80211_RATE_VAL; 2142 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 2143 if (rt2860_rates[ridx].rate == rate) 2144 break; 2145 2146 ni = ieee80211_ref_node(vap->iv_bss); 2147 rn = RUN_NODE(ni); 2148 rn->fix_ridx = ridx; 2149 RUN_DPRINTF(sc, RUN_DEBUG_RATE, "rate=%d, fix_ridx=%d\n", 2150 rate, rn->fix_ridx); 2151 ieee80211_free_node(ni); 2152 } 2153 2154 #if 0 2155 if ((if_getflags(ifp) & IFF_UP) && 2156 (if_getdrvflags(ifp) & RUN_RUNNING)){ 2157 run_init_locked(sc); 2158 } 2159 #endif 2160 2161 RUN_UNLOCK(sc); 2162 2163 return (0); 2164 } 2165 2166 static int 2167 run_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2168 { 2169 const struct ieee80211_txparam *tp; 2170 struct ieee80211com *ic = vap->iv_ic; 2171 struct run_softc *sc = ic->ic_softc; 2172 struct run_vap *rvp = RUN_VAP(vap); 2173 enum ieee80211_state ostate; 2174 uint32_t sta[3]; 2175 uint8_t ratectl; 2176 uint8_t restart_ratectl = 0; 2177 uint8_t bid = 1 << rvp->rvp_id; 2178 2179 ostate = vap->iv_state; 2180 RUN_DPRINTF(sc, RUN_DEBUG_STATE, "%s -> %s\n", 2181 ieee80211_state_name[ostate], 2182 ieee80211_state_name[nstate]); 2183 2184 IEEE80211_UNLOCK(ic); 2185 RUN_LOCK(sc); 2186 2187 ratectl = sc->ratectl_run; /* remember current state */ 2188 sc->ratectl_run = RUN_RATECTL_OFF; 2189 usb_callout_stop(&sc->ratectl_ch); 2190 2191 if (ostate == IEEE80211_S_RUN) { 2192 /* turn link LED off */ 2193 run_set_leds(sc, RT2860_LED_RADIO); 2194 } 2195 2196 switch (nstate) { 2197 case IEEE80211_S_INIT: 2198 restart_ratectl = 1; 2199 2200 if (ostate != IEEE80211_S_RUN) 2201 break; 2202 2203 ratectl &= ~bid; 2204 sc->runbmap &= ~bid; 2205 2206 /* abort TSF synchronization if there is no vap running */ 2207 if (--sc->running == 0) 2208 run_disable_tsf(sc); 2209 break; 2210 2211 case IEEE80211_S_RUN: 2212 if (!(sc->runbmap & bid)) { 2213 if(sc->running++) 2214 restart_ratectl = 1; 2215 sc->runbmap |= bid; 2216 } 2217 2218 m_freem(rvp->beacon_mbuf); 2219 rvp->beacon_mbuf = NULL; 2220 2221 switch (vap->iv_opmode) { 2222 case IEEE80211_M_HOSTAP: 2223 case IEEE80211_M_MBSS: 2224 sc->ap_running |= bid; 2225 ic->ic_opmode = vap->iv_opmode; 2226 run_update_beacon_cb(vap); 2227 break; 2228 case IEEE80211_M_IBSS: 2229 sc->adhoc_running |= bid; 2230 if (!sc->ap_running) 2231 ic->ic_opmode = vap->iv_opmode; 2232 run_update_beacon_cb(vap); 2233 break; 2234 case IEEE80211_M_STA: 2235 sc->sta_running |= bid; 2236 if (!sc->ap_running && !sc->adhoc_running) 2237 ic->ic_opmode = vap->iv_opmode; 2238 2239 /* read statistic counters (clear on read) */ 2240 run_read_region_1(sc, RT2860_TX_STA_CNT0, 2241 (uint8_t *)sta, sizeof sta); 2242 2243 break; 2244 default: 2245 ic->ic_opmode = vap->iv_opmode; 2246 break; 2247 } 2248 2249 if (vap->iv_opmode != IEEE80211_M_MONITOR) { 2250 struct ieee80211_node *ni; 2251 2252 if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) { 2253 RUN_UNLOCK(sc); 2254 IEEE80211_LOCK(ic); 2255 return (-1); 2256 } 2257 run_updateslot(ic); 2258 run_enable_mrr(sc); 2259 run_set_txpreamble(sc); 2260 run_set_basicrates(sc); 2261 ni = ieee80211_ref_node(vap->iv_bss); 2262 IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid); 2263 run_set_bssid(sc, sc->sc_bssid); 2264 ieee80211_free_node(ni); 2265 run_enable_tsf_sync(sc); 2266 2267 /* enable automatic rate adaptation */ 2268 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 2269 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) 2270 ratectl |= bid; 2271 } else 2272 run_enable_tsf(sc); 2273 2274 /* turn link LED on */ 2275 run_set_leds(sc, RT2860_LED_RADIO | 2276 (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan) ? 2277 RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ)); 2278 2279 break; 2280 default: 2281 RUN_DPRINTF(sc, RUN_DEBUG_STATE, "undefined state\n"); 2282 break; 2283 } 2284 2285 /* restart amrr for running VAPs */ 2286 if ((sc->ratectl_run = ratectl) && restart_ratectl) 2287 usb_callout_reset(&sc->ratectl_ch, hz, run_ratectl_to, sc); 2288 2289 RUN_UNLOCK(sc); 2290 IEEE80211_LOCK(ic); 2291 2292 return(rvp->newstate(vap, nstate, arg)); 2293 } 2294 2295 static int 2296 run_wme_update(struct ieee80211com *ic) 2297 { 2298 struct chanAccParams chp; 2299 struct run_softc *sc = ic->ic_softc; 2300 const struct wmeParams *ac; 2301 int aci, error = 0; 2302 2303 ieee80211_wme_ic_getparams(ic, &chp); 2304 ac = chp.cap_wmeParams; 2305 2306 /* update MAC TX configuration registers */ 2307 RUN_LOCK(sc); 2308 for (aci = 0; aci < WME_NUM_AC; aci++) { 2309 error = run_write(sc, RT2860_EDCA_AC_CFG(aci), 2310 ac[aci].wmep_logcwmax << 16 | 2311 ac[aci].wmep_logcwmin << 12 | 2312 ac[aci].wmep_aifsn << 8 | 2313 ac[aci].wmep_txopLimit); 2314 if (error) goto err; 2315 } 2316 2317 /* update SCH/DMA registers too */ 2318 error = run_write(sc, RT2860_WMM_AIFSN_CFG, 2319 ac[WME_AC_VO].wmep_aifsn << 12 | 2320 ac[WME_AC_VI].wmep_aifsn << 8 | 2321 ac[WME_AC_BK].wmep_aifsn << 4 | 2322 ac[WME_AC_BE].wmep_aifsn); 2323 if (error) goto err; 2324 error = run_write(sc, RT2860_WMM_CWMIN_CFG, 2325 ac[WME_AC_VO].wmep_logcwmin << 12 | 2326 ac[WME_AC_VI].wmep_logcwmin << 8 | 2327 ac[WME_AC_BK].wmep_logcwmin << 4 | 2328 ac[WME_AC_BE].wmep_logcwmin); 2329 if (error) goto err; 2330 error = run_write(sc, RT2860_WMM_CWMAX_CFG, 2331 ac[WME_AC_VO].wmep_logcwmax << 12 | 2332 ac[WME_AC_VI].wmep_logcwmax << 8 | 2333 ac[WME_AC_BK].wmep_logcwmax << 4 | 2334 ac[WME_AC_BE].wmep_logcwmax); 2335 if (error) goto err; 2336 error = run_write(sc, RT2860_WMM_TXOP0_CFG, 2337 ac[WME_AC_BK].wmep_txopLimit << 16 | 2338 ac[WME_AC_BE].wmep_txopLimit); 2339 if (error) goto err; 2340 error = run_write(sc, RT2860_WMM_TXOP1_CFG, 2341 ac[WME_AC_VO].wmep_txopLimit << 16 | 2342 ac[WME_AC_VI].wmep_txopLimit); 2343 2344 err: 2345 RUN_UNLOCK(sc); 2346 if (error) 2347 RUN_DPRINTF(sc, RUN_DEBUG_USB, "WME update failed\n"); 2348 2349 return (error); 2350 } 2351 2352 static void 2353 run_key_set_cb(void *arg) 2354 { 2355 struct run_cmdq *cmdq = arg; 2356 struct ieee80211vap *vap = cmdq->arg1; 2357 struct ieee80211_key *k = cmdq->k; 2358 struct ieee80211com *ic = vap->iv_ic; 2359 struct run_softc *sc = ic->ic_softc; 2360 struct ieee80211_node *ni; 2361 u_int cipher = k->wk_cipher->ic_cipher; 2362 uint32_t attr; 2363 uint16_t base, associd; 2364 uint8_t mode, wcid, iv[8]; 2365 2366 RUN_LOCK_ASSERT(sc, MA_OWNED); 2367 2368 if (vap->iv_opmode == IEEE80211_M_HOSTAP) 2369 ni = ieee80211_find_vap_node(&ic->ic_sta, vap, cmdq->mac); 2370 else 2371 ni = vap->iv_bss; 2372 associd = (ni != NULL) ? ni->ni_associd : 0; 2373 2374 /* map net80211 cipher to RT2860 security mode */ 2375 switch (cipher) { 2376 case IEEE80211_CIPHER_WEP: 2377 if(k->wk_keylen < 8) 2378 mode = RT2860_MODE_WEP40; 2379 else 2380 mode = RT2860_MODE_WEP104; 2381 break; 2382 case IEEE80211_CIPHER_TKIP: 2383 mode = RT2860_MODE_TKIP; 2384 break; 2385 case IEEE80211_CIPHER_AES_CCM: 2386 mode = RT2860_MODE_AES_CCMP; 2387 break; 2388 default: 2389 RUN_DPRINTF(sc, RUN_DEBUG_KEY, "undefined case\n"); 2390 return; 2391 } 2392 2393 RUN_DPRINTF(sc, RUN_DEBUG_KEY, 2394 "associd=%x, keyix=%d, mode=%x, type=%s, tx=%s, rx=%s\n", 2395 associd, k->wk_keyix, mode, 2396 (k->wk_flags & IEEE80211_KEY_GROUP) ? "group" : "pairwise", 2397 (k->wk_flags & IEEE80211_KEY_XMIT) ? "on" : "off", 2398 (k->wk_flags & IEEE80211_KEY_RECV) ? "on" : "off"); 2399 2400 if (k->wk_flags & IEEE80211_KEY_GROUP) { 2401 wcid = 0; /* NB: update WCID0 for group keys */ 2402 base = RT2860_SKEY(RUN_VAP(vap)->rvp_id, k->wk_keyix); 2403 } else { 2404 wcid = (vap->iv_opmode == IEEE80211_M_STA) ? 2405 1 : RUN_AID2WCID(associd); 2406 base = RT2860_PKEY(wcid); 2407 } 2408 2409 if (cipher == IEEE80211_CIPHER_TKIP) { 2410 if(run_write_region_1(sc, base, k->wk_key, 16)) 2411 return; 2412 if(run_write_region_1(sc, base + 16, &k->wk_key[16], 8)) /* wk_txmic */ 2413 return; 2414 if(run_write_region_1(sc, base + 24, &k->wk_key[24], 8)) /* wk_rxmic */ 2415 return; 2416 } else { 2417 /* roundup len to 16-bit: XXX fix write_region_1() instead */ 2418 if(run_write_region_1(sc, base, k->wk_key, (k->wk_keylen + 1) & ~1)) 2419 return; 2420 } 2421 2422 if (!(k->wk_flags & IEEE80211_KEY_GROUP) || 2423 (k->wk_flags & (IEEE80211_KEY_XMIT | IEEE80211_KEY_RECV))) { 2424 /* set initial packet number in IV+EIV */ 2425 if (cipher == IEEE80211_CIPHER_WEP) { 2426 memset(iv, 0, sizeof iv); 2427 iv[3] = vap->iv_def_txkey << 6; 2428 } else { 2429 if (cipher == IEEE80211_CIPHER_TKIP) { 2430 iv[0] = k->wk_keytsc >> 8; 2431 iv[1] = (iv[0] | 0x20) & 0x7f; 2432 iv[2] = k->wk_keytsc; 2433 } else /* CCMP */ { 2434 iv[0] = k->wk_keytsc; 2435 iv[1] = k->wk_keytsc >> 8; 2436 iv[2] = 0; 2437 } 2438 iv[3] = k->wk_keyix << 6 | IEEE80211_WEP_EXTIV; 2439 iv[4] = k->wk_keytsc >> 16; 2440 iv[5] = k->wk_keytsc >> 24; 2441 iv[6] = k->wk_keytsc >> 32; 2442 iv[7] = k->wk_keytsc >> 40; 2443 } 2444 if (run_write_region_1(sc, RT2860_IVEIV(wcid), iv, 8)) 2445 return; 2446 } 2447 2448 if (k->wk_flags & IEEE80211_KEY_GROUP) { 2449 /* install group key */ 2450 if (run_read(sc, RT2860_SKEY_MODE_0_7, &attr)) 2451 return; 2452 attr &= ~(0xf << (k->wk_keyix * 4)); 2453 attr |= mode << (k->wk_keyix * 4); 2454 if (run_write(sc, RT2860_SKEY_MODE_0_7, attr)) 2455 return; 2456 } else { 2457 /* install pairwise key */ 2458 if (run_read(sc, RT2860_WCID_ATTR(wcid), &attr)) 2459 return; 2460 attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN; 2461 if (run_write(sc, RT2860_WCID_ATTR(wcid), attr)) 2462 return; 2463 } 2464 2465 /* TODO create a pass-thru key entry? */ 2466 2467 /* need wcid to delete the right key later */ 2468 k->wk_pad = wcid; 2469 } 2470 2471 /* 2472 * Don't have to be deferred, but in order to keep order of 2473 * execution, i.e. with run_key_delete(), defer this and let 2474 * run_cmdq_cb() maintain the order. 2475 * 2476 * return 0 on error 2477 */ 2478 static int 2479 run_key_set(struct ieee80211vap *vap, struct ieee80211_key *k) 2480 { 2481 struct ieee80211com *ic = vap->iv_ic; 2482 struct run_softc *sc = ic->ic_softc; 2483 uint32_t i; 2484 2485 i = RUN_CMDQ_GET(&sc->cmdq_store); 2486 RUN_DPRINTF(sc, RUN_DEBUG_KEY, "cmdq_store=%d\n", i); 2487 sc->cmdq[i].func = run_key_set_cb; 2488 sc->cmdq[i].arg0 = NULL; 2489 sc->cmdq[i].arg1 = vap; 2490 sc->cmdq[i].k = k; 2491 IEEE80211_ADDR_COPY(sc->cmdq[i].mac, k->wk_macaddr); 2492 ieee80211_runtask(ic, &sc->cmdq_task); 2493 2494 /* 2495 * To make sure key will be set when hostapd 2496 * calls iv_key_set() before if_init(). 2497 */ 2498 if (vap->iv_opmode == IEEE80211_M_HOSTAP) { 2499 RUN_LOCK(sc); 2500 sc->cmdq_key_set = RUN_CMDQ_GO; 2501 RUN_UNLOCK(sc); 2502 } 2503 2504 return (1); 2505 } 2506 2507 /* 2508 * If wlan is destroyed without being brought down i.e. without 2509 * wlan down or wpa_cli terminate, this function is called after 2510 * vap is gone. Don't refer it. 2511 */ 2512 static void 2513 run_key_delete_cb(void *arg) 2514 { 2515 struct run_cmdq *cmdq = arg; 2516 struct run_softc *sc = cmdq->arg1; 2517 struct ieee80211_key *k = &cmdq->key; 2518 uint32_t attr; 2519 uint8_t wcid; 2520 2521 RUN_LOCK_ASSERT(sc, MA_OWNED); 2522 2523 if (k->wk_flags & IEEE80211_KEY_GROUP) { 2524 /* remove group key */ 2525 RUN_DPRINTF(sc, RUN_DEBUG_KEY, "removing group key\n"); 2526 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 2527 attr &= ~(0xf << (k->wk_keyix * 4)); 2528 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 2529 } else { 2530 /* remove pairwise key */ 2531 RUN_DPRINTF(sc, RUN_DEBUG_KEY, 2532 "removing key for wcid %x\n", k->wk_pad); 2533 /* matching wcid was written to wk_pad in run_key_set() */ 2534 wcid = k->wk_pad; 2535 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 2536 attr &= ~0xf; 2537 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 2538 run_set_region_4(sc, RT2860_WCID_ENTRY(wcid), 0, 8); 2539 } 2540 2541 k->wk_pad = 0; 2542 } 2543 2544 /* 2545 * return 0 on error 2546 */ 2547 static int 2548 run_key_delete(struct ieee80211vap *vap, struct ieee80211_key *k) 2549 { 2550 struct ieee80211com *ic = vap->iv_ic; 2551 struct run_softc *sc = ic->ic_softc; 2552 struct ieee80211_key *k0; 2553 uint32_t i; 2554 2555 /* 2556 * When called back, key might be gone. So, make a copy 2557 * of some values need to delete keys before deferring. 2558 * But, because of LOR with node lock, cannot use lock here. 2559 * So, use atomic instead. 2560 */ 2561 i = RUN_CMDQ_GET(&sc->cmdq_store); 2562 RUN_DPRINTF(sc, RUN_DEBUG_KEY, "cmdq_store=%d\n", i); 2563 sc->cmdq[i].func = run_key_delete_cb; 2564 sc->cmdq[i].arg0 = NULL; 2565 sc->cmdq[i].arg1 = sc; 2566 k0 = &sc->cmdq[i].key; 2567 k0->wk_flags = k->wk_flags; 2568 k0->wk_keyix = k->wk_keyix; 2569 /* matching wcid was written to wk_pad in run_key_set() */ 2570 k0->wk_pad = k->wk_pad; 2571 ieee80211_runtask(ic, &sc->cmdq_task); 2572 return (1); /* return fake success */ 2573 2574 } 2575 2576 static void 2577 run_ratectl_to(void *arg) 2578 { 2579 struct run_softc *sc = arg; 2580 2581 /* do it in a process context, so it can go sleep */ 2582 ieee80211_runtask(&sc->sc_ic, &sc->ratectl_task); 2583 /* next timeout will be rescheduled in the callback task */ 2584 } 2585 2586 /* ARGSUSED */ 2587 static void 2588 run_ratectl_cb(void *arg, int pending) 2589 { 2590 struct run_softc *sc = arg; 2591 struct ieee80211com *ic = &sc->sc_ic; 2592 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2593 2594 if (vap == NULL) 2595 return; 2596 2597 if (sc->rvp_cnt > 1 || vap->iv_opmode != IEEE80211_M_STA) { 2598 /* 2599 * run_reset_livelock() doesn't do anything with AMRR, 2600 * but Ralink wants us to call it every 1 sec. So, we 2601 * piggyback here rather than creating another callout. 2602 * Livelock may occur only in HOSTAP or IBSS mode 2603 * (when h/w is sending beacons). 2604 */ 2605 RUN_LOCK(sc); 2606 run_reset_livelock(sc); 2607 /* just in case, there are some stats to drain */ 2608 run_drain_fifo(sc); 2609 RUN_UNLOCK(sc); 2610 } 2611 2612 ieee80211_iterate_nodes(&ic->ic_sta, run_iter_func, sc); 2613 2614 RUN_LOCK(sc); 2615 if(sc->ratectl_run != RUN_RATECTL_OFF) 2616 usb_callout_reset(&sc->ratectl_ch, hz, run_ratectl_to, sc); 2617 RUN_UNLOCK(sc); 2618 } 2619 2620 static void 2621 run_drain_fifo(void *arg) 2622 { 2623 struct run_softc *sc = arg; 2624 uint32_t stat; 2625 uint16_t (*wstat)[3]; 2626 uint8_t wcid, mcs, pid; 2627 int8_t retry; 2628 2629 RUN_LOCK_ASSERT(sc, MA_OWNED); 2630 2631 for (;;) { 2632 /* drain Tx status FIFO (maxsize = 16) */ 2633 run_read(sc, RT2860_TX_STAT_FIFO, &stat); 2634 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "tx stat 0x%08x\n", stat); 2635 if (!(stat & RT2860_TXQ_VLD)) 2636 break; 2637 2638 wcid = (stat >> RT2860_TXQ_WCID_SHIFT) & 0xff; 2639 2640 /* if no ACK was requested, no feedback is available */ 2641 if (!(stat & RT2860_TXQ_ACKREQ) || wcid > RT2870_WCID_MAX || 2642 wcid == 0) 2643 continue; 2644 2645 /* 2646 * Even though each stat is Tx-complete-status like format, 2647 * the device can poll stats. Because there is no guarantee 2648 * that the referring node is still around when read the stats. 2649 * So that, if we use ieee80211_ratectl_tx_update(), we will 2650 * have hard time not to refer already freed node. 2651 * 2652 * To eliminate such page faults, we poll stats in softc. 2653 * Then, update the rates later with ieee80211_ratectl_tx_update(). 2654 */ 2655 wstat = &(sc->wcid_stats[wcid]); 2656 (*wstat)[RUN_TXCNT]++; 2657 if (stat & RT2860_TXQ_OK) 2658 (*wstat)[RUN_SUCCESS]++; 2659 else 2660 counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2661 /* 2662 * Check if there were retries, ie if the Tx success rate is 2663 * different from the requested rate. Note that it works only 2664 * because we do not allow rate fallback from OFDM to CCK. 2665 */ 2666 mcs = (stat >> RT2860_TXQ_MCS_SHIFT) & 0x7f; 2667 pid = (stat >> RT2860_TXQ_PID_SHIFT) & 0xf; 2668 if ((retry = pid -1 - mcs) > 0) { 2669 (*wstat)[RUN_TXCNT] += retry; 2670 (*wstat)[RUN_RETRY] += retry; 2671 } 2672 } 2673 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "count=%d\n", sc->fifo_cnt); 2674 2675 sc->fifo_cnt = 0; 2676 } 2677 2678 static void 2679 run_iter_func(void *arg, struct ieee80211_node *ni) 2680 { 2681 struct run_softc *sc = arg; 2682 struct ieee80211_ratectl_tx_stats *txs = &sc->sc_txs; 2683 struct ieee80211vap *vap = ni->ni_vap; 2684 struct run_node *rn = RUN_NODE(ni); 2685 union run_stats sta[2]; 2686 uint16_t (*wstat)[3]; 2687 int error, ridx; 2688 2689 RUN_LOCK(sc); 2690 2691 /* Check for special case */ 2692 if (sc->rvp_cnt <= 1 && vap->iv_opmode == IEEE80211_M_STA && 2693 ni != vap->iv_bss) 2694 goto fail; 2695 2696 txs->flags = IEEE80211_RATECTL_TX_STATS_NODE | 2697 IEEE80211_RATECTL_TX_STATS_RETRIES; 2698 txs->ni = ni; 2699 if (sc->rvp_cnt <= 1 && (vap->iv_opmode == IEEE80211_M_IBSS || 2700 vap->iv_opmode == IEEE80211_M_STA)) { 2701 /* read statistic counters (clear on read) and update AMRR state */ 2702 error = run_read_region_1(sc, RT2860_TX_STA_CNT0, (uint8_t *)sta, 2703 sizeof sta); 2704 if (error != 0) 2705 goto fail; 2706 2707 /* count failed TX as errors */ 2708 if_inc_counter(vap->iv_ifp, IFCOUNTER_OERRORS, 2709 le16toh(sta[0].error.fail)); 2710 2711 txs->nretries = le16toh(sta[1].tx.retry); 2712 txs->nsuccess = le16toh(sta[1].tx.success); 2713 /* nretries??? */ 2714 txs->nframes = txs->nretries + txs->nsuccess + 2715 le16toh(sta[0].error.fail); 2716 2717 RUN_DPRINTF(sc, RUN_DEBUG_RATE, 2718 "retrycnt=%d success=%d failcnt=%d\n", 2719 txs->nretries, txs->nsuccess, le16toh(sta[0].error.fail)); 2720 } else { 2721 wstat = &(sc->wcid_stats[RUN_AID2WCID(ni->ni_associd)]); 2722 2723 if (wstat == &(sc->wcid_stats[0]) || 2724 wstat > &(sc->wcid_stats[RT2870_WCID_MAX])) 2725 goto fail; 2726 2727 txs->nretries = (*wstat)[RUN_RETRY]; 2728 txs->nsuccess = (*wstat)[RUN_SUCCESS]; 2729 txs->nframes = (*wstat)[RUN_TXCNT]; 2730 RUN_DPRINTF(sc, RUN_DEBUG_RATE, 2731 "retrycnt=%d txcnt=%d success=%d\n", 2732 txs->nretries, txs->nframes, txs->nsuccess); 2733 2734 memset(wstat, 0, sizeof(*wstat)); 2735 } 2736 2737 ieee80211_ratectl_tx_update(vap, txs); 2738 ieee80211_ratectl_rate(ni, NULL, 0); 2739 /* XXX TODO: methodize with MCS rates */ 2740 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 2741 if (rt2860_rates[ridx].rate == ni->ni_txrate) 2742 break; 2743 rn->amrr_ridx = ridx; 2744 2745 fail: 2746 RUN_UNLOCK(sc); 2747 2748 RUN_DPRINTF(sc, RUN_DEBUG_RATE, "rate=%d, ridx=%d\n", ni->ni_txrate, rn->amrr_ridx); 2749 } 2750 2751 static void 2752 run_newassoc_cb(void *arg) 2753 { 2754 struct run_cmdq *cmdq = arg; 2755 struct ieee80211_node *ni = cmdq->arg1; 2756 struct run_softc *sc = ni->ni_vap->iv_ic->ic_softc; 2757 uint8_t wcid = cmdq->wcid; 2758 2759 RUN_LOCK_ASSERT(sc, MA_OWNED); 2760 2761 run_write_region_1(sc, RT2860_WCID_ENTRY(wcid), 2762 ni->ni_macaddr, IEEE80211_ADDR_LEN); 2763 2764 memset(&(sc->wcid_stats[wcid]), 0, sizeof(sc->wcid_stats[wcid])); 2765 } 2766 2767 static void 2768 run_newassoc(struct ieee80211_node *ni, int isnew) 2769 { 2770 struct run_node *rn = RUN_NODE(ni); 2771 struct ieee80211vap *vap = ni->ni_vap; 2772 struct ieee80211com *ic = vap->iv_ic; 2773 struct run_softc *sc = ic->ic_softc; 2774 uint8_t rate; 2775 uint8_t ridx; 2776 uint8_t wcid; 2777 2778 wcid = (vap->iv_opmode == IEEE80211_M_STA) ? 2779 1 : RUN_AID2WCID(ni->ni_associd); 2780 2781 if (wcid > RT2870_WCID_MAX) { 2782 device_printf(sc->sc_dev, "wcid=%d out of range\n", wcid); 2783 return; 2784 } 2785 2786 /* only interested in true associations */ 2787 if (isnew && ni->ni_associd != 0) { 2788 /* 2789 * This function could is called though timeout function. 2790 * Need to defer. 2791 */ 2792 uint32_t cnt = RUN_CMDQ_GET(&sc->cmdq_store); 2793 RUN_DPRINTF(sc, RUN_DEBUG_STATE, "cmdq_store=%d\n", cnt); 2794 sc->cmdq[cnt].func = run_newassoc_cb; 2795 sc->cmdq[cnt].arg0 = NULL; 2796 sc->cmdq[cnt].arg1 = ni; 2797 sc->cmdq[cnt].wcid = wcid; 2798 ieee80211_runtask(ic, &sc->cmdq_task); 2799 } 2800 2801 RUN_DPRINTF(sc, RUN_DEBUG_STATE, 2802 "new assoc isnew=%d associd=%x addr=%s\n", 2803 isnew, ni->ni_associd, ether_sprintf(ni->ni_macaddr)); 2804 2805 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 2806 /* XXX TODO: methodize with MCS rates */ 2807 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 2808 if (rt2860_rates[ridx].rate == rate) 2809 break; 2810 rn->mgt_ridx = ridx; 2811 RUN_DPRINTF(sc, RUN_DEBUG_STATE | RUN_DEBUG_RATE, 2812 "rate=%d, mgmt_ridx=%d\n", rate, rn->mgt_ridx); 2813 2814 RUN_LOCK(sc); 2815 if(sc->ratectl_run != RUN_RATECTL_OFF) 2816 usb_callout_reset(&sc->ratectl_ch, hz, run_ratectl_to, sc); 2817 RUN_UNLOCK(sc); 2818 } 2819 2820 /* 2821 * Return the Rx chain with the highest RSSI for a given frame. 2822 */ 2823 static __inline uint8_t 2824 run_maxrssi_chain(struct run_softc *sc, const struct rt2860_rxwi *rxwi) 2825 { 2826 uint8_t rxchain = 0; 2827 2828 if (sc->nrxchains > 1) { 2829 if (rxwi->rssi[1] > rxwi->rssi[rxchain]) 2830 rxchain = 1; 2831 if (sc->nrxchains > 2) 2832 if (rxwi->rssi[2] > rxwi->rssi[rxchain]) 2833 rxchain = 2; 2834 } 2835 return (rxchain); 2836 } 2837 2838 static void 2839 run_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2840 const struct ieee80211_rx_stats *rxs, int rssi, int nf) 2841 { 2842 struct ieee80211vap *vap = ni->ni_vap; 2843 struct run_softc *sc = vap->iv_ic->ic_softc; 2844 struct run_vap *rvp = RUN_VAP(vap); 2845 uint64_t ni_tstamp, rx_tstamp; 2846 2847 rvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2848 2849 if (vap->iv_state == IEEE80211_S_RUN && 2850 (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2851 subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2852 ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2853 RUN_LOCK(sc); 2854 run_get_tsf(sc, &rx_tstamp); 2855 RUN_UNLOCK(sc); 2856 rx_tstamp = le64toh(rx_tstamp); 2857 2858 if (ni_tstamp >= rx_tstamp) { 2859 RUN_DPRINTF(sc, RUN_DEBUG_RECV | RUN_DEBUG_BEACON, 2860 "ibss merge, tsf %ju tstamp %ju\n", 2861 (uintmax_t)rx_tstamp, (uintmax_t)ni_tstamp); 2862 (void) ieee80211_ibss_merge(ni); 2863 } 2864 } 2865 } 2866 2867 static void 2868 run_rx_frame(struct run_softc *sc, struct mbuf *m, uint32_t dmalen) 2869 { 2870 struct ieee80211com *ic = &sc->sc_ic; 2871 struct ieee80211_frame *wh; 2872 struct ieee80211_node *ni; 2873 struct rt2870_rxd *rxd; 2874 struct rt2860_rxwi *rxwi; 2875 uint32_t flags; 2876 uint16_t len, rxwisize; 2877 uint8_t ant, rssi; 2878 int8_t nf; 2879 2880 rxwisize = sizeof(struct rt2860_rxwi); 2881 if (sc->mac_ver == 0x5592) 2882 rxwisize += sizeof(uint64_t); 2883 else if (sc->mac_ver == 0x3593) 2884 rxwisize += sizeof(uint32_t); 2885 2886 if (__predict_false(dmalen < 2887 rxwisize + sizeof(struct ieee80211_frame_ack))) { 2888 RUN_DPRINTF(sc, RUN_DEBUG_RECV, 2889 "payload is too short: dma length %u < %zu\n", 2890 dmalen, rxwisize + sizeof(struct ieee80211_frame_ack)); 2891 goto fail; 2892 } 2893 2894 rxwi = mtod(m, struct rt2860_rxwi *); 2895 len = le16toh(rxwi->len) & 0xfff; 2896 2897 if (__predict_false(len > dmalen - rxwisize)) { 2898 RUN_DPRINTF(sc, RUN_DEBUG_RECV, 2899 "bad RXWI length %u > %u\n", len, dmalen); 2900 goto fail; 2901 } 2902 2903 /* Rx descriptor is located at the end */ 2904 rxd = (struct rt2870_rxd *)(mtod(m, caddr_t) + dmalen); 2905 flags = le32toh(rxd->flags); 2906 2907 if (__predict_false(flags & (RT2860_RX_CRCERR | RT2860_RX_ICVERR))) { 2908 RUN_DPRINTF(sc, RUN_DEBUG_RECV, "%s error.\n", 2909 (flags & RT2860_RX_CRCERR)?"CRC":"ICV"); 2910 goto fail; 2911 } 2912 2913 if (flags & RT2860_RX_L2PAD) { 2914 RUN_DPRINTF(sc, RUN_DEBUG_RECV, 2915 "received RT2860_RX_L2PAD frame\n"); 2916 len += 2; 2917 } 2918 2919 m->m_data += rxwisize; 2920 m->m_pkthdr.len = m->m_len = len; 2921 2922 wh = mtod(m, struct ieee80211_frame *); 2923 2924 if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) != 0 && 2925 (flags & RT2860_RX_DEC) != 0) { 2926 wh->i_fc[1] &= ~IEEE80211_FC1_PROTECTED; 2927 m->m_flags |= M_WEP; 2928 } 2929 2930 if (len >= sizeof(struct ieee80211_frame_min)) { 2931 ni = ieee80211_find_rxnode(ic, 2932 mtod(m, struct ieee80211_frame_min *)); 2933 } else 2934 ni = NULL; 2935 2936 if(ni && ni->ni_flags & IEEE80211_NODE_HT) { 2937 m->m_flags |= M_AMPDU; 2938 } 2939 2940 if (__predict_false(flags & RT2860_RX_MICERR)) { 2941 /* report MIC failures to net80211 for TKIP */ 2942 if (ni != NULL) 2943 ieee80211_notify_michael_failure(ni->ni_vap, wh, 2944 rxwi->keyidx); 2945 RUN_DPRINTF(sc, RUN_DEBUG_RECV, 2946 "MIC error. Someone is lying.\n"); 2947 goto fail; 2948 } 2949 2950 ant = run_maxrssi_chain(sc, rxwi); 2951 rssi = rxwi->rssi[ant]; 2952 nf = run_rssi2dbm(sc, rssi, ant); 2953 2954 if (__predict_false(ieee80211_radiotap_active(ic))) { 2955 struct run_rx_radiotap_header *tap = &sc->sc_rxtap; 2956 uint16_t phy; 2957 2958 tap->wr_flags = 0; 2959 if (flags & RT2860_RX_L2PAD) 2960 tap->wr_flags |= IEEE80211_RADIOTAP_F_DATAPAD; 2961 tap->wr_antsignal = rssi; 2962 tap->wr_antenna = ant; 2963 tap->wr_dbm_antsignal = run_rssi2dbm(sc, rssi, ant); 2964 tap->wr_rate = 2; /* in case it can't be found below */ 2965 RUN_LOCK(sc); 2966 run_get_tsf(sc, &tap->wr_tsf); 2967 RUN_UNLOCK(sc); 2968 phy = le16toh(rxwi->phy); 2969 switch (phy & RT2860_PHY_MODE) { 2970 case RT2860_PHY_CCK: 2971 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) { 2972 case 0: tap->wr_rate = 2; break; 2973 case 1: tap->wr_rate = 4; break; 2974 case 2: tap->wr_rate = 11; break; 2975 case 3: tap->wr_rate = 22; break; 2976 } 2977 if (phy & RT2860_PHY_SHPRE) 2978 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2979 break; 2980 case RT2860_PHY_OFDM: 2981 switch (phy & RT2860_PHY_MCS) { 2982 case 0: tap->wr_rate = 12; break; 2983 case 1: tap->wr_rate = 18; break; 2984 case 2: tap->wr_rate = 24; break; 2985 case 3: tap->wr_rate = 36; break; 2986 case 4: tap->wr_rate = 48; break; 2987 case 5: tap->wr_rate = 72; break; 2988 case 6: tap->wr_rate = 96; break; 2989 case 7: tap->wr_rate = 108; break; 2990 } 2991 break; 2992 } 2993 } 2994 2995 if (ni != NULL) { 2996 (void)ieee80211_input(ni, m, rssi, nf); 2997 ieee80211_free_node(ni); 2998 } else { 2999 (void)ieee80211_input_all(ic, m, rssi, nf); 3000 } 3001 3002 return; 3003 3004 fail: 3005 m_freem(m); 3006 counter_u64_add(ic->ic_ierrors, 1); 3007 } 3008 3009 static void 3010 run_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 3011 { 3012 struct run_softc *sc = usbd_xfer_softc(xfer); 3013 struct ieee80211com *ic = &sc->sc_ic; 3014 struct mbuf *m = NULL; 3015 struct mbuf *m0; 3016 uint32_t dmalen, mbuf_len; 3017 uint16_t rxwisize; 3018 int xferlen; 3019 3020 rxwisize = sizeof(struct rt2860_rxwi); 3021 if (sc->mac_ver == 0x5592) 3022 rxwisize += sizeof(uint64_t); 3023 else if (sc->mac_ver == 0x3593) 3024 rxwisize += sizeof(uint32_t); 3025 3026 usbd_xfer_status(xfer, &xferlen, NULL, NULL, NULL); 3027 3028 switch (USB_GET_STATE(xfer)) { 3029 case USB_ST_TRANSFERRED: 3030 3031 RUN_DPRINTF(sc, RUN_DEBUG_RECV, 3032 "rx done, actlen=%d\n", xferlen); 3033 3034 if (xferlen < (int)(sizeof(uint32_t) + rxwisize + 3035 sizeof(struct rt2870_rxd))) { 3036 RUN_DPRINTF(sc, RUN_DEBUG_RECV_DESC | RUN_DEBUG_USB, 3037 "xfer too short %d\n", xferlen); 3038 goto tr_setup; 3039 } 3040 3041 m = sc->rx_m; 3042 sc->rx_m = NULL; 3043 3044 /* FALLTHROUGH */ 3045 case USB_ST_SETUP: 3046 tr_setup: 3047 if (sc->rx_m == NULL) { 3048 sc->rx_m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, 3049 RUN_MAX_RXSZ); 3050 } 3051 if (sc->rx_m == NULL) { 3052 RUN_DPRINTF(sc, RUN_DEBUG_RECV | 3053 RUN_DEBUG_RECV_DESC | RUN_DEBUG_USB, 3054 "could not allocate mbuf - idle with stall\n"); 3055 counter_u64_add(ic->ic_ierrors, 1); 3056 usbd_xfer_set_stall(xfer); 3057 usbd_xfer_set_frames(xfer, 0); 3058 } else { 3059 /* 3060 * Directly loading a mbuf cluster into DMA to 3061 * save some data copying. This works because 3062 * there is only one cluster. 3063 */ 3064 usbd_xfer_set_frame_data(xfer, 0, 3065 mtod(sc->rx_m, caddr_t), RUN_MAX_RXSZ); 3066 usbd_xfer_set_frames(xfer, 1); 3067 } 3068 usbd_transfer_submit(xfer); 3069 break; 3070 3071 default: /* Error */ 3072 if (error != USB_ERR_CANCELLED) { 3073 /* try to clear stall first */ 3074 usbd_xfer_set_stall(xfer); 3075 if (error == USB_ERR_TIMEOUT) 3076 device_printf(sc->sc_dev, "device timeout\n"); 3077 counter_u64_add(ic->ic_ierrors, 1); 3078 goto tr_setup; 3079 } 3080 if (sc->rx_m != NULL) { 3081 m_freem(sc->rx_m); 3082 sc->rx_m = NULL; 3083 } 3084 break; 3085 } 3086 3087 if (m == NULL) 3088 return; 3089 3090 /* inputting all the frames must be last */ 3091 3092 RUN_UNLOCK(sc); 3093 3094 m->m_pkthdr.len = m->m_len = xferlen; 3095 3096 /* HW can aggregate multiple 802.11 frames in a single USB xfer */ 3097 for(;;) { 3098 dmalen = le32toh(*mtod(m, uint32_t *)) & 0xffff; 3099 3100 if ((dmalen >= (uint32_t)-8) || (dmalen == 0) || 3101 ((dmalen & 3) != 0)) { 3102 RUN_DPRINTF(sc, RUN_DEBUG_RECV_DESC | RUN_DEBUG_USB, 3103 "bad DMA length %u\n", dmalen); 3104 break; 3105 } 3106 if ((dmalen + 8) > (uint32_t)xferlen) { 3107 RUN_DPRINTF(sc, RUN_DEBUG_RECV_DESC | RUN_DEBUG_USB, 3108 "bad DMA length %u > %d\n", 3109 dmalen + 8, xferlen); 3110 break; 3111 } 3112 3113 /* If it is the last one or a single frame, we won't copy. */ 3114 if ((xferlen -= dmalen + 8) <= 8) { 3115 /* trim 32-bit DMA-len header */ 3116 m->m_data += 4; 3117 m->m_pkthdr.len = m->m_len -= 4; 3118 run_rx_frame(sc, m, dmalen); 3119 m = NULL; /* don't free source buffer */ 3120 break; 3121 } 3122 3123 mbuf_len = dmalen + sizeof(struct rt2870_rxd); 3124 if (__predict_false(mbuf_len > MCLBYTES)) { 3125 RUN_DPRINTF(sc, RUN_DEBUG_RECV_DESC | RUN_DEBUG_USB, 3126 "payload is too big: mbuf_len %u\n", mbuf_len); 3127 counter_u64_add(ic->ic_ierrors, 1); 3128 break; 3129 } 3130 3131 /* copy aggregated frames to another mbuf */ 3132 m0 = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 3133 if (__predict_false(m0 == NULL)) { 3134 RUN_DPRINTF(sc, RUN_DEBUG_RECV_DESC, 3135 "could not allocate mbuf\n"); 3136 counter_u64_add(ic->ic_ierrors, 1); 3137 break; 3138 } 3139 m_copydata(m, 4 /* skip 32-bit DMA-len header */, 3140 mbuf_len, mtod(m0, caddr_t)); 3141 m0->m_pkthdr.len = m0->m_len = mbuf_len; 3142 run_rx_frame(sc, m0, dmalen); 3143 3144 /* update data ptr */ 3145 m->m_data += mbuf_len + 4; 3146 m->m_pkthdr.len = m->m_len -= mbuf_len + 4; 3147 } 3148 3149 /* make sure we free the source buffer, if any */ 3150 m_freem(m); 3151 3152 #ifdef IEEE80211_SUPPORT_SUPERG 3153 ieee80211_ff_age_all(ic, 100); 3154 #endif 3155 RUN_LOCK(sc); 3156 } 3157 3158 static void 3159 run_tx_free(struct run_endpoint_queue *pq, 3160 struct run_tx_data *data, int txerr) 3161 { 3162 3163 ieee80211_tx_complete(data->ni, data->m, txerr); 3164 3165 data->m = NULL; 3166 data->ni = NULL; 3167 3168 STAILQ_INSERT_TAIL(&pq->tx_fh, data, next); 3169 pq->tx_nfree++; 3170 } 3171 3172 static void 3173 run_bulk_tx_callbackN(struct usb_xfer *xfer, usb_error_t error, u_int index) 3174 { 3175 struct run_softc *sc = usbd_xfer_softc(xfer); 3176 struct ieee80211com *ic = &sc->sc_ic; 3177 struct run_tx_data *data; 3178 struct ieee80211vap *vap = NULL; 3179 struct usb_page_cache *pc; 3180 struct run_endpoint_queue *pq = &sc->sc_epq[index]; 3181 struct mbuf *m; 3182 usb_frlength_t size; 3183 int actlen; 3184 int sumlen; 3185 3186 usbd_xfer_status(xfer, &actlen, &sumlen, NULL, NULL); 3187 3188 switch (USB_GET_STATE(xfer)) { 3189 case USB_ST_TRANSFERRED: 3190 RUN_DPRINTF(sc, RUN_DEBUG_XMIT | RUN_DEBUG_USB, 3191 "transfer complete: %d bytes @ index %d\n", actlen, index); 3192 3193 data = usbd_xfer_get_priv(xfer); 3194 run_tx_free(pq, data, 0); 3195 usbd_xfer_set_priv(xfer, NULL); 3196 3197 /* FALLTHROUGH */ 3198 case USB_ST_SETUP: 3199 tr_setup: 3200 data = STAILQ_FIRST(&pq->tx_qh); 3201 if (data == NULL) 3202 break; 3203 3204 STAILQ_REMOVE_HEAD(&pq->tx_qh, next); 3205 3206 m = data->m; 3207 size = (sc->mac_ver == 0x5592) ? 3208 sizeof(data->desc) + sizeof(uint32_t) : sizeof(data->desc); 3209 if ((m->m_pkthdr.len + 3210 size + 3 + 8) > RUN_MAX_TXSZ) { 3211 RUN_DPRINTF(sc, RUN_DEBUG_XMIT_DESC | RUN_DEBUG_USB, 3212 "data overflow, %u bytes\n", m->m_pkthdr.len); 3213 run_tx_free(pq, data, 1); 3214 goto tr_setup; 3215 } 3216 3217 pc = usbd_xfer_get_frame(xfer, 0); 3218 usbd_copy_in(pc, 0, &data->desc, size); 3219 usbd_m_copy_in(pc, size, m, 0, m->m_pkthdr.len); 3220 size += m->m_pkthdr.len; 3221 /* 3222 * Align end on a 4-byte boundary, pad 8 bytes (CRC + 3223 * 4-byte padding), and be sure to zero those trailing 3224 * bytes: 3225 */ 3226 usbd_frame_zero(pc, size, ((-size) & 3) + 8); 3227 size += ((-size) & 3) + 8; 3228 3229 vap = data->ni->ni_vap; 3230 if (ieee80211_radiotap_active_vap(vap)) { 3231 const struct ieee80211_frame *wh; 3232 struct run_tx_radiotap_header *tap = &sc->sc_txtap; 3233 struct rt2860_txwi *txwi = 3234 (struct rt2860_txwi *)(&data->desc + sizeof(struct rt2870_txd)); 3235 int has_l2pad; 3236 3237 wh = mtod(m, struct ieee80211_frame *); 3238 has_l2pad = IEEE80211_HAS_ADDR4(wh) != 3239 IEEE80211_QOS_HAS_SEQ(wh); 3240 3241 tap->wt_flags = 0; 3242 tap->wt_rate = rt2860_rates[data->ridx].rate; 3243 tap->wt_hwqueue = index; 3244 if (le16toh(txwi->phy) & RT2860_PHY_SHPRE) 3245 tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 3246 if (has_l2pad) 3247 tap->wt_flags |= IEEE80211_RADIOTAP_F_DATAPAD; 3248 3249 ieee80211_radiotap_tx(vap, m); 3250 } 3251 3252 RUN_DPRINTF(sc, RUN_DEBUG_XMIT | RUN_DEBUG_USB, 3253 "sending frame len=%u/%u @ index %d\n", 3254 m->m_pkthdr.len, size, index); 3255 3256 usbd_xfer_set_frame_len(xfer, 0, size); 3257 usbd_xfer_set_priv(xfer, data); 3258 usbd_transfer_submit(xfer); 3259 run_start(sc); 3260 3261 break; 3262 3263 default: 3264 RUN_DPRINTF(sc, RUN_DEBUG_XMIT | RUN_DEBUG_USB, 3265 "USB transfer error, %s\n", usbd_errstr(error)); 3266 3267 data = usbd_xfer_get_priv(xfer); 3268 3269 if (data != NULL) { 3270 if(data->ni != NULL) 3271 vap = data->ni->ni_vap; 3272 run_tx_free(pq, data, error); 3273 usbd_xfer_set_priv(xfer, NULL); 3274 } 3275 3276 if (vap == NULL) 3277 vap = TAILQ_FIRST(&ic->ic_vaps); 3278 3279 if (error != USB_ERR_CANCELLED) { 3280 if (error == USB_ERR_TIMEOUT) { 3281 device_printf(sc->sc_dev, "device timeout\n"); 3282 uint32_t i = RUN_CMDQ_GET(&sc->cmdq_store); 3283 RUN_DPRINTF(sc, RUN_DEBUG_XMIT | RUN_DEBUG_USB, 3284 "cmdq_store=%d\n", i); 3285 sc->cmdq[i].func = run_usb_timeout_cb; 3286 sc->cmdq[i].arg0 = vap; 3287 ieee80211_runtask(ic, &sc->cmdq_task); 3288 } 3289 3290 /* 3291 * Try to clear stall first, also if other 3292 * errors occur, hence clearing stall 3293 * introduces a 50 ms delay: 3294 */ 3295 usbd_xfer_set_stall(xfer); 3296 goto tr_setup; 3297 } 3298 break; 3299 } 3300 #ifdef IEEE80211_SUPPORT_SUPERG 3301 /* XXX TODO: make this deferred rather than unlock/relock */ 3302 /* XXX TODO: should only do the QoS AC this belongs to */ 3303 if (pq->tx_nfree >= RUN_TX_RING_COUNT) { 3304 RUN_UNLOCK(sc); 3305 ieee80211_ff_flush_all(ic); 3306 RUN_LOCK(sc); 3307 } 3308 #endif 3309 } 3310 3311 static void 3312 run_bulk_tx_callback0(struct usb_xfer *xfer, usb_error_t error) 3313 { 3314 run_bulk_tx_callbackN(xfer, error, 0); 3315 } 3316 3317 static void 3318 run_bulk_tx_callback1(struct usb_xfer *xfer, usb_error_t error) 3319 { 3320 run_bulk_tx_callbackN(xfer, error, 1); 3321 } 3322 3323 static void 3324 run_bulk_tx_callback2(struct usb_xfer *xfer, usb_error_t error) 3325 { 3326 run_bulk_tx_callbackN(xfer, error, 2); 3327 } 3328 3329 static void 3330 run_bulk_tx_callback3(struct usb_xfer *xfer, usb_error_t error) 3331 { 3332 run_bulk_tx_callbackN(xfer, error, 3); 3333 } 3334 3335 static void 3336 run_bulk_tx_callback4(struct usb_xfer *xfer, usb_error_t error) 3337 { 3338 run_bulk_tx_callbackN(xfer, error, 4); 3339 } 3340 3341 static void 3342 run_bulk_tx_callback5(struct usb_xfer *xfer, usb_error_t error) 3343 { 3344 run_bulk_tx_callbackN(xfer, error, 5); 3345 } 3346 3347 static void 3348 run_set_tx_desc(struct run_softc *sc, struct run_tx_data *data) 3349 { 3350 struct mbuf *m = data->m; 3351 struct ieee80211com *ic = &sc->sc_ic; 3352 struct ieee80211vap *vap = data->ni->ni_vap; 3353 struct ieee80211_frame *wh; 3354 struct rt2870_txd *txd; 3355 struct rt2860_txwi *txwi; 3356 uint16_t xferlen, txwisize; 3357 uint16_t mcs; 3358 uint8_t ridx = data->ridx; 3359 uint8_t pad; 3360 3361 /* get MCS code from rate index */ 3362 mcs = rt2860_rates[ridx].mcs; 3363 3364 txwisize = (sc->mac_ver == 0x5592) ? 3365 sizeof(*txwi) + sizeof(uint32_t) : sizeof(*txwi); 3366 xferlen = txwisize + m->m_pkthdr.len; 3367 3368 /* roundup to 32-bit alignment */ 3369 xferlen = (xferlen + 3) & ~3; 3370 3371 txd = (struct rt2870_txd *)&data->desc; 3372 txd->len = htole16(xferlen); 3373 3374 wh = mtod(m, struct ieee80211_frame *); 3375 3376 /* 3377 * Ether both are true or both are false, the header 3378 * are nicely aligned to 32-bit. So, no L2 padding. 3379 */ 3380 if(IEEE80211_HAS_ADDR4(wh) == IEEE80211_QOS_HAS_SEQ(wh)) 3381 pad = 0; 3382 else 3383 pad = 2; 3384 3385 /* setup TX Wireless Information */ 3386 txwi = (struct rt2860_txwi *)(txd + 1); 3387 txwi->len = htole16(m->m_pkthdr.len - pad); 3388 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) { 3389 mcs |= RT2860_PHY_CCK; 3390 if (ridx != RT2860_RIDX_CCK1 && 3391 (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 3392 mcs |= RT2860_PHY_SHPRE; 3393 } else if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM) { 3394 mcs |= RT2860_PHY_OFDM; 3395 } else if (rt2860_rates[ridx].phy == IEEE80211_T_HT) { 3396 /* XXX TODO: [adrian] set short preamble for MCS? */ 3397 mcs |= RT2860_PHY_HT_MIX; /* Mixed, not greenfield */ 3398 } 3399 txwi->phy = htole16(mcs); 3400 3401 /* check if RTS/CTS or CTS-to-self protection is required */ 3402 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 3403 ((m->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) || 3404 ((ic->ic_flags & IEEE80211_F_USEPROT) && 3405 rt2860_rates[ridx].phy == IEEE80211_T_OFDM) || 3406 ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 3407 rt2860_rates[ridx].phy == IEEE80211_T_HT))) 3408 txwi->txop |= RT2860_TX_TXOP_HT; 3409 else 3410 txwi->txop |= RT2860_TX_TXOP_BACKOFF; 3411 3412 if (vap->iv_opmode != IEEE80211_M_STA && !IEEE80211_QOS_HAS_SEQ(wh)) 3413 txwi->xflags |= RT2860_TX_NSEQ; 3414 } 3415 3416 /* This function must be called locked */ 3417 static int 3418 run_tx(struct run_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 3419 { 3420 struct ieee80211com *ic = &sc->sc_ic; 3421 struct ieee80211vap *vap = ni->ni_vap; 3422 struct ieee80211_frame *wh; 3423 const struct ieee80211_txparam *tp = ni->ni_txparms; 3424 struct run_node *rn = RUN_NODE(ni); 3425 struct run_tx_data *data; 3426 struct rt2870_txd *txd; 3427 struct rt2860_txwi *txwi; 3428 uint16_t qos; 3429 uint16_t dur; 3430 uint16_t qid; 3431 uint8_t type; 3432 uint8_t tid; 3433 uint8_t ridx; 3434 uint8_t ctl_ridx; 3435 uint8_t qflags; 3436 uint8_t xflags = 0; 3437 int hasqos; 3438 3439 RUN_LOCK_ASSERT(sc, MA_OWNED); 3440 3441 wh = mtod(m, struct ieee80211_frame *); 3442 3443 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 3444 3445 /* 3446 * There are 7 bulk endpoints: 1 for RX 3447 * and 6 for TX (4 EDCAs + HCCA + Prio). 3448 * Update 03-14-2009: some devices like the Planex GW-US300MiniS 3449 * seem to have only 4 TX bulk endpoints (Fukaumi Naoki). 3450 */ 3451 if ((hasqos = IEEE80211_QOS_HAS_SEQ(wh))) { 3452 uint8_t *frm; 3453 3454 frm = ieee80211_getqos(wh); 3455 qos = le16toh(*(const uint16_t *)frm); 3456 tid = qos & IEEE80211_QOS_TID; 3457 qid = TID_TO_WME_AC(tid); 3458 } else { 3459 qos = 0; 3460 tid = 0; 3461 qid = WME_AC_BE; 3462 } 3463 qflags = (qid < 4) ? RT2860_TX_QSEL_EDCA : RT2860_TX_QSEL_HCCA; 3464 3465 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "qos %d\tqid %d\ttid %d\tqflags %x\n", 3466 qos, qid, tid, qflags); 3467 3468 /* pickup a rate index */ 3469 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 3470 type != IEEE80211_FC0_TYPE_DATA || m->m_flags & M_EAPOL) { 3471 /* XXX TODO: methodize for 11n; use MCS0 for 11NA/11NG */ 3472 ridx = (ic->ic_curmode == IEEE80211_MODE_11A || ic->ic_curmode == IEEE80211_MODE_11NA) ? 3473 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 3474 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 3475 } else { 3476 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 3477 ridx = rn->fix_ridx; 3478 else 3479 ridx = rn->amrr_ridx; 3480 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 3481 } 3482 3483 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 3484 (!hasqos || (qos & IEEE80211_QOS_ACKPOLICY) != 3485 IEEE80211_QOS_ACKPOLICY_NOACK)) { 3486 xflags |= RT2860_TX_ACK; 3487 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 3488 dur = rt2860_rates[ctl_ridx].sp_ack_dur; 3489 else 3490 dur = rt2860_rates[ctl_ridx].lp_ack_dur; 3491 USETW(wh->i_dur, dur); 3492 } 3493 3494 /* reserve slots for mgmt packets, just in case */ 3495 if (sc->sc_epq[qid].tx_nfree < 3) { 3496 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "tx ring %d is full\n", qid); 3497 return (-1); 3498 } 3499 3500 data = STAILQ_FIRST(&sc->sc_epq[qid].tx_fh); 3501 STAILQ_REMOVE_HEAD(&sc->sc_epq[qid].tx_fh, next); 3502 sc->sc_epq[qid].tx_nfree--; 3503 3504 txd = (struct rt2870_txd *)&data->desc; 3505 txd->flags = qflags; 3506 txwi = (struct rt2860_txwi *)(txd + 1); 3507 txwi->xflags = xflags; 3508 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 3509 txwi->wcid = 0; 3510 else 3511 txwi->wcid = (vap->iv_opmode == IEEE80211_M_STA) ? 3512 1 : RUN_AID2WCID(ni->ni_associd); 3513 3514 /* clear leftover garbage bits */ 3515 txwi->flags = 0; 3516 txwi->txop = 0; 3517 3518 data->m = m; 3519 data->ni = ni; 3520 data->ridx = ridx; 3521 3522 run_set_tx_desc(sc, data); 3523 3524 /* 3525 * The chip keeps track of 2 kind of Tx stats, 3526 * * TX_STAT_FIFO, for per WCID stats, and 3527 * * TX_STA_CNT0 for all-TX-in-one stats. 3528 * 3529 * To use FIFO stats, we need to store MCS into the driver-private 3530 * PacketID field. So that, we can tell whose stats when we read them. 3531 * We add 1 to the MCS because setting the PacketID field to 0 means 3532 * that we don't want feedback in TX_STAT_FIFO. 3533 * And, that's what we want for STA mode, since TX_STA_CNT0 does the job. 3534 * 3535 * FIFO stats doesn't count Tx with WCID 0xff, so we do this in run_tx(). 3536 */ 3537 if (sc->rvp_cnt > 1 || vap->iv_opmode == IEEE80211_M_HOSTAP || 3538 vap->iv_opmode == IEEE80211_M_MBSS) { 3539 uint16_t pid = (rt2860_rates[ridx].mcs + 1) & 0xf; 3540 txwi->len |= htole16(pid << RT2860_TX_PID_SHIFT); 3541 3542 /* 3543 * Unlike PCI based devices, we don't get any interrupt from 3544 * USB devices, so we simulate FIFO-is-full interrupt here. 3545 * Ralink recommends to drain FIFO stats every 100 ms, but 16 slots 3546 * quickly get fulled. To prevent overflow, increment a counter on 3547 * every FIFO stat request, so we know how many slots are left. 3548 * We do this only in HOSTAP or multiple vap mode since FIFO stats 3549 * are used only in those modes. 3550 * We just drain stats. AMRR gets updated every 1 sec by 3551 * run_ratectl_cb() via callout. 3552 * Call it early. Otherwise overflow. 3553 */ 3554 if (sc->fifo_cnt++ == 10) { 3555 /* 3556 * With multiple vaps or if_bridge, if_start() is called 3557 * with a non-sleepable lock, tcpinp. So, need to defer. 3558 */ 3559 uint32_t i = RUN_CMDQ_GET(&sc->cmdq_store); 3560 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "cmdq_store=%d\n", i); 3561 sc->cmdq[i].func = run_drain_fifo; 3562 sc->cmdq[i].arg0 = sc; 3563 ieee80211_runtask(ic, &sc->cmdq_task); 3564 } 3565 } 3566 3567 STAILQ_INSERT_TAIL(&sc->sc_epq[qid].tx_qh, data, next); 3568 3569 usbd_transfer_start(sc->sc_xfer[qid]); 3570 3571 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, 3572 "sending data frame len=%d rate=%d qid=%d\n", 3573 m->m_pkthdr.len + (int)(sizeof(struct rt2870_txd) + 3574 sizeof(struct rt2860_txwi)), rt2860_rates[ridx].rate, qid); 3575 3576 return (0); 3577 } 3578 3579 static int 3580 run_tx_mgt(struct run_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 3581 { 3582 struct ieee80211com *ic = &sc->sc_ic; 3583 struct run_node *rn = RUN_NODE(ni); 3584 struct run_tx_data *data; 3585 struct ieee80211_frame *wh; 3586 struct rt2870_txd *txd; 3587 struct rt2860_txwi *txwi; 3588 uint16_t dur; 3589 uint8_t ridx = rn->mgt_ridx; 3590 uint8_t xflags = 0; 3591 uint8_t wflags = 0; 3592 3593 RUN_LOCK_ASSERT(sc, MA_OWNED); 3594 3595 wh = mtod(m, struct ieee80211_frame *); 3596 3597 /* tell hardware to add timestamp for probe responses */ 3598 if (IEEE80211_IS_MGMT_PROBE_RESP(wh)) 3599 wflags |= RT2860_TX_TS; 3600 else if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 3601 xflags |= RT2860_TX_ACK; 3602 3603 dur = ieee80211_ack_duration(ic->ic_rt, rt2860_rates[ridx].rate, 3604 ic->ic_flags & IEEE80211_F_SHPREAMBLE); 3605 USETW(wh->i_dur, dur); 3606 } 3607 3608 if (sc->sc_epq[0].tx_nfree == 0) 3609 /* let caller free mbuf */ 3610 return (EIO); 3611 data = STAILQ_FIRST(&sc->sc_epq[0].tx_fh); 3612 STAILQ_REMOVE_HEAD(&sc->sc_epq[0].tx_fh, next); 3613 sc->sc_epq[0].tx_nfree--; 3614 3615 txd = (struct rt2870_txd *)&data->desc; 3616 txd->flags = RT2860_TX_QSEL_EDCA; 3617 txwi = (struct rt2860_txwi *)(txd + 1); 3618 txwi->wcid = 0xff; 3619 txwi->flags = wflags; 3620 txwi->xflags = xflags; 3621 txwi->txop = 0; /* clear leftover garbage bits */ 3622 3623 data->m = m; 3624 data->ni = ni; 3625 data->ridx = ridx; 3626 3627 run_set_tx_desc(sc, data); 3628 3629 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "sending mgt frame len=%d rate=%d\n", 3630 m->m_pkthdr.len + (int)(sizeof(struct rt2870_txd) + 3631 sizeof(struct rt2860_txwi)), rt2860_rates[ridx].rate); 3632 3633 STAILQ_INSERT_TAIL(&sc->sc_epq[0].tx_qh, data, next); 3634 3635 usbd_transfer_start(sc->sc_xfer[0]); 3636 3637 return (0); 3638 } 3639 3640 static int 3641 run_sendprot(struct run_softc *sc, 3642 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 3643 { 3644 struct ieee80211com *ic = ni->ni_ic; 3645 struct run_tx_data *data; 3646 struct rt2870_txd *txd; 3647 struct rt2860_txwi *txwi; 3648 struct mbuf *mprot; 3649 int ridx; 3650 int protrate; 3651 uint8_t wflags = 0; 3652 uint8_t xflags = 0; 3653 3654 RUN_LOCK_ASSERT(sc, MA_OWNED); 3655 3656 /* check that there are free slots before allocating the mbuf */ 3657 if (sc->sc_epq[0].tx_nfree == 0) 3658 /* let caller free mbuf */ 3659 return (ENOBUFS); 3660 3661 mprot = ieee80211_alloc_prot(ni, m, rate, prot); 3662 if (mprot == NULL) { 3663 if_inc_counter(ni->ni_vap->iv_ifp, IFCOUNTER_OERRORS, 1); 3664 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "could not allocate mbuf\n"); 3665 return (ENOBUFS); 3666 } 3667 3668 protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 3669 wflags = RT2860_TX_FRAG; 3670 xflags = 0; 3671 if (prot == IEEE80211_PROT_RTSCTS) 3672 xflags |= RT2860_TX_ACK; 3673 3674 data = STAILQ_FIRST(&sc->sc_epq[0].tx_fh); 3675 STAILQ_REMOVE_HEAD(&sc->sc_epq[0].tx_fh, next); 3676 sc->sc_epq[0].tx_nfree--; 3677 3678 txd = (struct rt2870_txd *)&data->desc; 3679 txd->flags = RT2860_TX_QSEL_EDCA; 3680 txwi = (struct rt2860_txwi *)(txd + 1); 3681 txwi->wcid = 0xff; 3682 txwi->flags = wflags; 3683 txwi->xflags = xflags; 3684 txwi->txop = 0; /* clear leftover garbage bits */ 3685 3686 data->m = mprot; 3687 data->ni = ieee80211_ref_node(ni); 3688 3689 /* XXX TODO: methodize with MCS rates */ 3690 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 3691 if (rt2860_rates[ridx].rate == protrate) 3692 break; 3693 data->ridx = ridx; 3694 3695 run_set_tx_desc(sc, data); 3696 3697 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "sending prot len=%u rate=%u\n", 3698 m->m_pkthdr.len, rate); 3699 3700 STAILQ_INSERT_TAIL(&sc->sc_epq[0].tx_qh, data, next); 3701 3702 usbd_transfer_start(sc->sc_xfer[0]); 3703 3704 return (0); 3705 } 3706 3707 static int 3708 run_tx_param(struct run_softc *sc, struct mbuf *m, struct ieee80211_node *ni, 3709 const struct ieee80211_bpf_params *params) 3710 { 3711 struct ieee80211com *ic = ni->ni_ic; 3712 struct run_tx_data *data; 3713 struct rt2870_txd *txd; 3714 struct rt2860_txwi *txwi; 3715 uint8_t ridx; 3716 uint8_t rate; 3717 uint8_t opflags = 0; 3718 uint8_t xflags = 0; 3719 int error; 3720 3721 RUN_LOCK_ASSERT(sc, MA_OWNED); 3722 3723 KASSERT(params != NULL, ("no raw xmit params")); 3724 3725 rate = params->ibp_rate0; 3726 if (!ieee80211_isratevalid(ic->ic_rt, rate)) { 3727 /* let caller free mbuf */ 3728 return (EINVAL); 3729 } 3730 3731 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 3732 xflags |= RT2860_TX_ACK; 3733 if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) { 3734 error = run_sendprot(sc, m, ni, 3735 params->ibp_flags & IEEE80211_BPF_RTS ? 3736 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY, 3737 rate); 3738 if (error) { 3739 /* let caller free mbuf */ 3740 return error; 3741 } 3742 opflags |= /*XXX RT2573_TX_LONG_RETRY |*/ RT2860_TX_TXOP_SIFS; 3743 } 3744 3745 if (sc->sc_epq[0].tx_nfree == 0) { 3746 /* let caller free mbuf */ 3747 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, 3748 "sending raw frame, but tx ring is full\n"); 3749 return (EIO); 3750 } 3751 data = STAILQ_FIRST(&sc->sc_epq[0].tx_fh); 3752 STAILQ_REMOVE_HEAD(&sc->sc_epq[0].tx_fh, next); 3753 sc->sc_epq[0].tx_nfree--; 3754 3755 txd = (struct rt2870_txd *)&data->desc; 3756 txd->flags = RT2860_TX_QSEL_EDCA; 3757 txwi = (struct rt2860_txwi *)(txd + 1); 3758 txwi->wcid = 0xff; 3759 txwi->xflags = xflags; 3760 txwi->txop = opflags; 3761 txwi->flags = 0; /* clear leftover garbage bits */ 3762 3763 data->m = m; 3764 data->ni = ni; 3765 /* XXX TODO: methodize with MCS rates */ 3766 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 3767 if (rt2860_rates[ridx].rate == rate) 3768 break; 3769 data->ridx = ridx; 3770 3771 run_set_tx_desc(sc, data); 3772 3773 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "sending raw frame len=%u rate=%u\n", 3774 m->m_pkthdr.len, rate); 3775 3776 STAILQ_INSERT_TAIL(&sc->sc_epq[0].tx_qh, data, next); 3777 3778 usbd_transfer_start(sc->sc_xfer[0]); 3779 3780 return (0); 3781 } 3782 3783 static int 3784 run_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 3785 const struct ieee80211_bpf_params *params) 3786 { 3787 struct run_softc *sc = ni->ni_ic->ic_softc; 3788 int error = 0; 3789 3790 RUN_LOCK(sc); 3791 3792 /* prevent management frames from being sent if we're not ready */ 3793 if (!(sc->sc_flags & RUN_RUNNING)) { 3794 error = ENETDOWN; 3795 goto done; 3796 } 3797 3798 if (params == NULL) { 3799 /* tx mgt packet */ 3800 if ((error = run_tx_mgt(sc, m, ni)) != 0) { 3801 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "mgt tx failed\n"); 3802 goto done; 3803 } 3804 } else { 3805 /* tx raw packet with param */ 3806 if ((error = run_tx_param(sc, m, ni, params)) != 0) { 3807 RUN_DPRINTF(sc, RUN_DEBUG_XMIT, "tx with param failed\n"); 3808 goto done; 3809 } 3810 } 3811 3812 done: 3813 RUN_UNLOCK(sc); 3814 3815 if (error != 0) { 3816 if(m != NULL) 3817 m_freem(m); 3818 } 3819 3820 return (error); 3821 } 3822 3823 static int 3824 run_transmit(struct ieee80211com *ic, struct mbuf *m) 3825 { 3826 struct run_softc *sc = ic->ic_softc; 3827 int error; 3828 3829 RUN_LOCK(sc); 3830 if ((sc->sc_flags & RUN_RUNNING) == 0) { 3831 RUN_UNLOCK(sc); 3832 return (ENXIO); 3833 } 3834 error = mbufq_enqueue(&sc->sc_snd, m); 3835 if (error) { 3836 RUN_UNLOCK(sc); 3837 return (error); 3838 } 3839 run_start(sc); 3840 RUN_UNLOCK(sc); 3841 3842 return (0); 3843 } 3844 3845 static void 3846 run_start(struct run_softc *sc) 3847 { 3848 struct ieee80211_node *ni; 3849 struct mbuf *m; 3850 3851 RUN_LOCK_ASSERT(sc, MA_OWNED); 3852 3853 if ((sc->sc_flags & RUN_RUNNING) == 0) 3854 return; 3855 3856 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3857 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3858 if (run_tx(sc, m, ni) != 0) { 3859 mbufq_prepend(&sc->sc_snd, m); 3860 break; 3861 } 3862 } 3863 } 3864 3865 static void 3866 run_parent(struct ieee80211com *ic) 3867 { 3868 struct run_softc *sc = ic->ic_softc; 3869 int startall = 0; 3870 3871 RUN_LOCK(sc); 3872 if (sc->sc_detached) { 3873 RUN_UNLOCK(sc); 3874 return; 3875 } 3876 3877 if (ic->ic_nrunning > 0) { 3878 if (!(sc->sc_flags & RUN_RUNNING)) { 3879 startall = 1; 3880 run_init_locked(sc); 3881 } else 3882 run_update_promisc_locked(sc); 3883 } else if ((sc->sc_flags & RUN_RUNNING) && sc->rvp_cnt <= 1) 3884 run_stop(sc); 3885 RUN_UNLOCK(sc); 3886 if (startall) 3887 ieee80211_start_all(ic); 3888 } 3889 3890 static void 3891 run_iq_calib(struct run_softc *sc, u_int chan) 3892 { 3893 uint16_t val; 3894 3895 /* Tx0 IQ gain. */ 3896 run_bbp_write(sc, 158, 0x2c); 3897 if (chan <= 14) 3898 run_efuse_read(sc, RT5390_EEPROM_IQ_GAIN_CAL_TX0_2GHZ, &val, 1); 3899 else if (chan <= 64) { 3900 run_efuse_read(sc, 3901 RT5390_EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5GHZ, 3902 &val, 1); 3903 } else if (chan <= 138) { 3904 run_efuse_read(sc, 3905 RT5390_EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5GHZ, 3906 &val, 1); 3907 } else if (chan <= 165) { 3908 run_efuse_read(sc, 3909 RT5390_EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5GHZ, 3910 &val, 1); 3911 } else 3912 val = 0; 3913 run_bbp_write(sc, 159, val); 3914 3915 /* Tx0 IQ phase. */ 3916 run_bbp_write(sc, 158, 0x2d); 3917 if (chan <= 14) { 3918 run_efuse_read(sc, RT5390_EEPROM_IQ_PHASE_CAL_TX0_2GHZ, 3919 &val, 1); 3920 } else if (chan <= 64) { 3921 run_efuse_read(sc, 3922 RT5390_EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5GHZ, 3923 &val, 1); 3924 } else if (chan <= 138) { 3925 run_efuse_read(sc, 3926 RT5390_EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5GHZ, 3927 &val, 1); 3928 } else if (chan <= 165) { 3929 run_efuse_read(sc, 3930 RT5390_EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5GHZ, 3931 &val, 1); 3932 } else 3933 val = 0; 3934 run_bbp_write(sc, 159, val); 3935 3936 /* Tx1 IQ gain. */ 3937 run_bbp_write(sc, 158, 0x4a); 3938 if (chan <= 14) { 3939 run_efuse_read(sc, RT5390_EEPROM_IQ_GAIN_CAL_TX1_2GHZ, 3940 &val, 1); 3941 } else if (chan <= 64) { 3942 run_efuse_read(sc, 3943 RT5390_EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5GHZ, 3944 &val, 1); 3945 } else if (chan <= 138) { 3946 run_efuse_read(sc, 3947 RT5390_EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5GHZ, 3948 &val, 1); 3949 } else if (chan <= 165) { 3950 run_efuse_read(sc, 3951 RT5390_EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5GHZ, 3952 &val, 1); 3953 } else 3954 val = 0; 3955 run_bbp_write(sc, 159, val); 3956 3957 /* Tx1 IQ phase. */ 3958 run_bbp_write(sc, 158, 0x4b); 3959 if (chan <= 14) { 3960 run_efuse_read(sc, RT5390_EEPROM_IQ_PHASE_CAL_TX1_2GHZ, 3961 &val, 1); 3962 } else if (chan <= 64) { 3963 run_efuse_read(sc, 3964 RT5390_EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5GHZ, 3965 &val, 1); 3966 } else if (chan <= 138) { 3967 run_efuse_read(sc, 3968 RT5390_EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5GHZ, 3969 &val, 1); 3970 } else if (chan <= 165) { 3971 run_efuse_read(sc, 3972 RT5390_EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5GHZ, 3973 &val, 1); 3974 } else 3975 val = 0; 3976 run_bbp_write(sc, 159, val); 3977 3978 /* RF IQ compensation control. */ 3979 run_bbp_write(sc, 158, 0x04); 3980 run_efuse_read(sc, RT5390_EEPROM_RF_IQ_COMPENSATION_CTL, 3981 &val, 1); 3982 run_bbp_write(sc, 159, val); 3983 3984 /* RF IQ imbalance compensation control. */ 3985 run_bbp_write(sc, 158, 0x03); 3986 run_efuse_read(sc, 3987 RT5390_EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CTL, &val, 1); 3988 run_bbp_write(sc, 159, val); 3989 } 3990 3991 static void 3992 run_set_agc(struct run_softc *sc, uint8_t agc) 3993 { 3994 uint8_t bbp; 3995 3996 if (sc->mac_ver == 0x3572) { 3997 run_bbp_read(sc, 27, &bbp); 3998 bbp &= ~(0x3 << 5); 3999 run_bbp_write(sc, 27, bbp | 0 << 5); /* select Rx0 */ 4000 run_bbp_write(sc, 66, agc); 4001 run_bbp_write(sc, 27, bbp | 1 << 5); /* select Rx1 */ 4002 run_bbp_write(sc, 66, agc); 4003 } else 4004 run_bbp_write(sc, 66, agc); 4005 } 4006 4007 static void 4008 run_select_chan_group(struct run_softc *sc, int group) 4009 { 4010 uint32_t tmp; 4011 uint8_t agc; 4012 4013 run_bbp_write(sc, 62, 0x37 - sc->lna[group]); 4014 run_bbp_write(sc, 63, 0x37 - sc->lna[group]); 4015 run_bbp_write(sc, 64, 0x37 - sc->lna[group]); 4016 if (sc->mac_ver < 0x3572) 4017 run_bbp_write(sc, 86, 0x00); 4018 4019 if (sc->mac_ver == 0x3593) { 4020 run_bbp_write(sc, 77, 0x98); 4021 run_bbp_write(sc, 83, (group == 0) ? 0x8a : 0x9a); 4022 } 4023 4024 if (group == 0) { 4025 if (sc->ext_2ghz_lna) { 4026 if (sc->mac_ver >= 0x5390) 4027 run_bbp_write(sc, 75, 0x52); 4028 else { 4029 run_bbp_write(sc, 82, 0x62); 4030 run_bbp_write(sc, 75, 0x46); 4031 } 4032 } else { 4033 if (sc->mac_ver == 0x5592) { 4034 run_bbp_write(sc, 79, 0x1c); 4035 run_bbp_write(sc, 80, 0x0e); 4036 run_bbp_write(sc, 81, 0x3a); 4037 run_bbp_write(sc, 82, 0x62); 4038 4039 run_bbp_write(sc, 195, 0x80); 4040 run_bbp_write(sc, 196, 0xe0); 4041 run_bbp_write(sc, 195, 0x81); 4042 run_bbp_write(sc, 196, 0x1f); 4043 run_bbp_write(sc, 195, 0x82); 4044 run_bbp_write(sc, 196, 0x38); 4045 run_bbp_write(sc, 195, 0x83); 4046 run_bbp_write(sc, 196, 0x32); 4047 run_bbp_write(sc, 195, 0x85); 4048 run_bbp_write(sc, 196, 0x28); 4049 run_bbp_write(sc, 195, 0x86); 4050 run_bbp_write(sc, 196, 0x19); 4051 } else if (sc->mac_ver >= 0x5390) 4052 run_bbp_write(sc, 75, 0x50); 4053 else { 4054 run_bbp_write(sc, 82, 4055 (sc->mac_ver == 0x3593) ? 0x62 : 0x84); 4056 run_bbp_write(sc, 75, 0x50); 4057 } 4058 } 4059 } else { 4060 if (sc->mac_ver == 0x5592) { 4061 run_bbp_write(sc, 79, 0x18); 4062 run_bbp_write(sc, 80, 0x08); 4063 run_bbp_write(sc, 81, 0x38); 4064 run_bbp_write(sc, 82, 0x92); 4065 4066 run_bbp_write(sc, 195, 0x80); 4067 run_bbp_write(sc, 196, 0xf0); 4068 run_bbp_write(sc, 195, 0x81); 4069 run_bbp_write(sc, 196, 0x1e); 4070 run_bbp_write(sc, 195, 0x82); 4071 run_bbp_write(sc, 196, 0x28); 4072 run_bbp_write(sc, 195, 0x83); 4073 run_bbp_write(sc, 196, 0x20); 4074 run_bbp_write(sc, 195, 0x85); 4075 run_bbp_write(sc, 196, 0x7f); 4076 run_bbp_write(sc, 195, 0x86); 4077 run_bbp_write(sc, 196, 0x7f); 4078 } else if (sc->mac_ver == 0x3572) 4079 run_bbp_write(sc, 82, 0x94); 4080 else 4081 run_bbp_write(sc, 82, 4082 (sc->mac_ver == 0x3593) ? 0x82 : 0xf2); 4083 if (sc->ext_5ghz_lna) 4084 run_bbp_write(sc, 75, 0x46); 4085 else 4086 run_bbp_write(sc, 75, 0x50); 4087 } 4088 4089 run_read(sc, RT2860_TX_BAND_CFG, &tmp); 4090 tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P); 4091 tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P; 4092 run_write(sc, RT2860_TX_BAND_CFG, tmp); 4093 4094 /* enable appropriate Power Amplifiers and Low Noise Amplifiers */ 4095 tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN; 4096 if (sc->mac_ver == 0x3593) 4097 tmp |= 1 << 29 | 1 << 28; 4098 if (sc->nrxchains > 1) 4099 tmp |= RT2860_LNA_PE1_EN; 4100 if (group == 0) { /* 2GHz */ 4101 tmp |= RT2860_PA_PE_G0_EN; 4102 if (sc->ntxchains > 1) 4103 tmp |= RT2860_PA_PE_G1_EN; 4104 if (sc->mac_ver == 0x3593) { 4105 if (sc->ntxchains > 2) 4106 tmp |= 1 << 25; 4107 } 4108 } else { /* 5GHz */ 4109 tmp |= RT2860_PA_PE_A0_EN; 4110 if (sc->ntxchains > 1) 4111 tmp |= RT2860_PA_PE_A1_EN; 4112 } 4113 if (sc->mac_ver == 0x3572) { 4114 run_rt3070_rf_write(sc, 8, 0x00); 4115 run_write(sc, RT2860_TX_PIN_CFG, tmp); 4116 run_rt3070_rf_write(sc, 8, 0x80); 4117 } else 4118 run_write(sc, RT2860_TX_PIN_CFG, tmp); 4119 4120 if (sc->mac_ver == 0x5592) { 4121 run_bbp_write(sc, 195, 0x8d); 4122 run_bbp_write(sc, 196, 0x1a); 4123 } 4124 4125 if (sc->mac_ver == 0x3593) { 4126 run_read(sc, RT2860_GPIO_CTRL, &tmp); 4127 tmp &= ~0x01010000; 4128 if (group == 0) 4129 tmp |= 0x00010000; 4130 tmp = (tmp & ~0x00009090) | 0x00000090; 4131 run_write(sc, RT2860_GPIO_CTRL, tmp); 4132 } 4133 4134 /* set initial AGC value */ 4135 if (group == 0) { /* 2GHz band */ 4136 if (sc->mac_ver >= 0x3070) 4137 agc = 0x1c + sc->lna[0] * 2; 4138 else 4139 agc = 0x2e + sc->lna[0]; 4140 } else { /* 5GHz band */ 4141 if (sc->mac_ver == 0x5592) 4142 agc = 0x24 + sc->lna[group] * 2; 4143 else if (sc->mac_ver == 0x3572 || sc->mac_ver == 0x3593) 4144 agc = 0x22 + (sc->lna[group] * 5) / 3; 4145 else 4146 agc = 0x32 + (sc->lna[group] * 5) / 3; 4147 } 4148 run_set_agc(sc, agc); 4149 } 4150 4151 static void 4152 run_rt2870_set_chan(struct run_softc *sc, u_int chan) 4153 { 4154 const struct rfprog *rfprog = rt2860_rf2850; 4155 uint32_t r2, r3, r4; 4156 int8_t txpow1, txpow2; 4157 int i; 4158 4159 /* find the settings for this channel (we know it exists) */ 4160 for (i = 0; rfprog[i].chan != chan; i++); 4161 4162 r2 = rfprog[i].r2; 4163 if (sc->ntxchains == 1) 4164 r2 |= 1 << 14; /* 1T: disable Tx chain 2 */ 4165 if (sc->nrxchains == 1) 4166 r2 |= 1 << 17 | 1 << 6; /* 1R: disable Rx chains 2 & 3 */ 4167 else if (sc->nrxchains == 2) 4168 r2 |= 1 << 6; /* 2R: disable Rx chain 3 */ 4169 4170 /* use Tx power values from EEPROM */ 4171 txpow1 = sc->txpow1[i]; 4172 txpow2 = sc->txpow2[i]; 4173 4174 /* Initialize RF R3 and R4. */ 4175 r3 = rfprog[i].r3 & 0xffffc1ff; 4176 r4 = (rfprog[i].r4 & ~(0x001f87c0)) | (sc->freq << 15); 4177 if (chan > 14) { 4178 if (txpow1 >= 0) { 4179 txpow1 = (txpow1 > 0xf) ? (0xf) : (txpow1); 4180 r3 |= (txpow1 << 10) | (1 << 9); 4181 } else { 4182 txpow1 += 7; 4183 4184 /* txpow1 is not possible larger than 15. */ 4185 r3 |= (txpow1 << 10); 4186 } 4187 if (txpow2 >= 0) { 4188 txpow2 = (txpow2 > 0xf) ? (0xf) : (txpow2); 4189 r4 |= (txpow2 << 7) | (1 << 6); 4190 } else { 4191 txpow2 += 7; 4192 r4 |= (txpow2 << 7); 4193 } 4194 } else { 4195 /* Set Tx0 power. */ 4196 r3 |= (txpow1 << 9); 4197 4198 /* Set frequency offset and Tx1 power. */ 4199 r4 |= (txpow2 << 6); 4200 } 4201 4202 run_rt2870_rf_write(sc, rfprog[i].r1); 4203 run_rt2870_rf_write(sc, r2); 4204 run_rt2870_rf_write(sc, r3 & ~(1 << 2)); 4205 run_rt2870_rf_write(sc, r4); 4206 4207 run_delay(sc, 10); 4208 4209 run_rt2870_rf_write(sc, rfprog[i].r1); 4210 run_rt2870_rf_write(sc, r2); 4211 run_rt2870_rf_write(sc, r3 | (1 << 2)); 4212 run_rt2870_rf_write(sc, r4); 4213 4214 run_delay(sc, 10); 4215 4216 run_rt2870_rf_write(sc, rfprog[i].r1); 4217 run_rt2870_rf_write(sc, r2); 4218 run_rt2870_rf_write(sc, r3 & ~(1 << 2)); 4219 run_rt2870_rf_write(sc, r4); 4220 } 4221 4222 static void 4223 run_rt3070_set_chan(struct run_softc *sc, u_int chan) 4224 { 4225 int8_t txpow1, txpow2; 4226 uint8_t rf; 4227 int i; 4228 4229 /* find the settings for this channel (we know it exists) */ 4230 for (i = 0; rt2860_rf2850[i].chan != chan; i++); 4231 4232 /* use Tx power values from EEPROM */ 4233 txpow1 = sc->txpow1[i]; 4234 txpow2 = sc->txpow2[i]; 4235 4236 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 4237 4238 /* RT3370/RT3390: RF R3 [7:4] is not reserved bits. */ 4239 run_rt3070_rf_read(sc, 3, &rf); 4240 rf = (rf & ~0x0f) | rt3070_freqs[i].k; 4241 run_rt3070_rf_write(sc, 3, rf); 4242 4243 run_rt3070_rf_read(sc, 6, &rf); 4244 rf = (rf & ~0x03) | rt3070_freqs[i].r; 4245 run_rt3070_rf_write(sc, 6, rf); 4246 4247 /* set Tx0 power */ 4248 run_rt3070_rf_read(sc, 12, &rf); 4249 rf = (rf & ~0x1f) | txpow1; 4250 run_rt3070_rf_write(sc, 12, rf); 4251 4252 /* set Tx1 power */ 4253 run_rt3070_rf_read(sc, 13, &rf); 4254 rf = (rf & ~0x1f) | txpow2; 4255 run_rt3070_rf_write(sc, 13, rf); 4256 4257 run_rt3070_rf_read(sc, 1, &rf); 4258 rf &= ~0xfc; 4259 if (sc->ntxchains == 1) 4260 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 4261 else if (sc->ntxchains == 2) 4262 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 4263 if (sc->nrxchains == 1) 4264 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 4265 else if (sc->nrxchains == 2) 4266 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 4267 run_rt3070_rf_write(sc, 1, rf); 4268 4269 /* set RF offset */ 4270 run_rt3070_rf_read(sc, 23, &rf); 4271 rf = (rf & ~0x7f) | sc->freq; 4272 run_rt3070_rf_write(sc, 23, rf); 4273 4274 /* program RF filter */ 4275 run_rt3070_rf_read(sc, 24, &rf); /* Tx */ 4276 rf = (rf & ~0x3f) | sc->rf24_20mhz; 4277 run_rt3070_rf_write(sc, 24, rf); 4278 run_rt3070_rf_read(sc, 31, &rf); /* Rx */ 4279 rf = (rf & ~0x3f) | sc->rf24_20mhz; 4280 run_rt3070_rf_write(sc, 31, rf); 4281 4282 /* enable RF tuning */ 4283 run_rt3070_rf_read(sc, 7, &rf); 4284 run_rt3070_rf_write(sc, 7, rf | 0x01); 4285 } 4286 4287 static void 4288 run_rt3572_set_chan(struct run_softc *sc, u_int chan) 4289 { 4290 int8_t txpow1, txpow2; 4291 uint32_t tmp; 4292 uint8_t rf; 4293 int i; 4294 4295 /* find the settings for this channel (we know it exists) */ 4296 for (i = 0; rt2860_rf2850[i].chan != chan; i++); 4297 4298 /* use Tx power values from EEPROM */ 4299 txpow1 = sc->txpow1[i]; 4300 txpow2 = sc->txpow2[i]; 4301 4302 if (chan <= 14) { 4303 run_bbp_write(sc, 25, sc->bbp25); 4304 run_bbp_write(sc, 26, sc->bbp26); 4305 } else { 4306 /* enable IQ phase correction */ 4307 run_bbp_write(sc, 25, 0x09); 4308 run_bbp_write(sc, 26, 0xff); 4309 } 4310 4311 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 4312 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 4313 run_rt3070_rf_read(sc, 6, &rf); 4314 rf = (rf & ~0x0f) | rt3070_freqs[i].r; 4315 rf |= (chan <= 14) ? 0x08 : 0x04; 4316 run_rt3070_rf_write(sc, 6, rf); 4317 4318 /* set PLL mode */ 4319 run_rt3070_rf_read(sc, 5, &rf); 4320 rf &= ~(0x08 | 0x04); 4321 rf |= (chan <= 14) ? 0x04 : 0x08; 4322 run_rt3070_rf_write(sc, 5, rf); 4323 4324 /* set Tx power for chain 0 */ 4325 if (chan <= 14) 4326 rf = 0x60 | txpow1; 4327 else 4328 rf = 0xe0 | (txpow1 & 0xc) << 1 | (txpow1 & 0x3); 4329 run_rt3070_rf_write(sc, 12, rf); 4330 4331 /* set Tx power for chain 1 */ 4332 if (chan <= 14) 4333 rf = 0x60 | txpow2; 4334 else 4335 rf = 0xe0 | (txpow2 & 0xc) << 1 | (txpow2 & 0x3); 4336 run_rt3070_rf_write(sc, 13, rf); 4337 4338 /* set Tx/Rx streams */ 4339 run_rt3070_rf_read(sc, 1, &rf); 4340 rf &= ~0xfc; 4341 if (sc->ntxchains == 1) 4342 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 4343 else if (sc->ntxchains == 2) 4344 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 4345 if (sc->nrxchains == 1) 4346 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 4347 else if (sc->nrxchains == 2) 4348 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 4349 run_rt3070_rf_write(sc, 1, rf); 4350 4351 /* set RF offset */ 4352 run_rt3070_rf_read(sc, 23, &rf); 4353 rf = (rf & ~0x7f) | sc->freq; 4354 run_rt3070_rf_write(sc, 23, rf); 4355 4356 /* program RF filter */ 4357 rf = sc->rf24_20mhz; 4358 run_rt3070_rf_write(sc, 24, rf); /* Tx */ 4359 run_rt3070_rf_write(sc, 31, rf); /* Rx */ 4360 4361 /* enable RF tuning */ 4362 run_rt3070_rf_read(sc, 7, &rf); 4363 rf = (chan <= 14) ? 0xd8 : ((rf & ~0xc8) | 0x14); 4364 run_rt3070_rf_write(sc, 7, rf); 4365 4366 /* TSSI */ 4367 rf = (chan <= 14) ? 0xc3 : 0xc0; 4368 run_rt3070_rf_write(sc, 9, rf); 4369 4370 /* set loop filter 1 */ 4371 run_rt3070_rf_write(sc, 10, 0xf1); 4372 /* set loop filter 2 */ 4373 run_rt3070_rf_write(sc, 11, (chan <= 14) ? 0xb9 : 0x00); 4374 4375 /* set tx_mx2_ic */ 4376 run_rt3070_rf_write(sc, 15, (chan <= 14) ? 0x53 : 0x43); 4377 /* set tx_mx1_ic */ 4378 if (chan <= 14) 4379 rf = 0x48 | sc->txmixgain_2ghz; 4380 else 4381 rf = 0x78 | sc->txmixgain_5ghz; 4382 run_rt3070_rf_write(sc, 16, rf); 4383 4384 /* set tx_lo1 */ 4385 run_rt3070_rf_write(sc, 17, 0x23); 4386 /* set tx_lo2 */ 4387 if (chan <= 14) 4388 rf = 0x93; 4389 else if (chan <= 64) 4390 rf = 0xb7; 4391 else if (chan <= 128) 4392 rf = 0x74; 4393 else 4394 rf = 0x72; 4395 run_rt3070_rf_write(sc, 19, rf); 4396 4397 /* set rx_lo1 */ 4398 if (chan <= 14) 4399 rf = 0xb3; 4400 else if (chan <= 64) 4401 rf = 0xf6; 4402 else if (chan <= 128) 4403 rf = 0xf4; 4404 else 4405 rf = 0xf3; 4406 run_rt3070_rf_write(sc, 20, rf); 4407 4408 /* set pfd_delay */ 4409 if (chan <= 14) 4410 rf = 0x15; 4411 else if (chan <= 64) 4412 rf = 0x3d; 4413 else 4414 rf = 0x01; 4415 run_rt3070_rf_write(sc, 25, rf); 4416 4417 /* set rx_lo2 */ 4418 run_rt3070_rf_write(sc, 26, (chan <= 14) ? 0x85 : 0x87); 4419 /* set ldo_rf_vc */ 4420 run_rt3070_rf_write(sc, 27, (chan <= 14) ? 0x00 : 0x01); 4421 /* set drv_cc */ 4422 run_rt3070_rf_write(sc, 29, (chan <= 14) ? 0x9b : 0x9f); 4423 4424 run_read(sc, RT2860_GPIO_CTRL, &tmp); 4425 tmp &= ~0x8080; 4426 if (chan <= 14) 4427 tmp |= 0x80; 4428 run_write(sc, RT2860_GPIO_CTRL, tmp); 4429 4430 /* enable RF tuning */ 4431 run_rt3070_rf_read(sc, 7, &rf); 4432 run_rt3070_rf_write(sc, 7, rf | 0x01); 4433 4434 run_delay(sc, 2); 4435 } 4436 4437 static void 4438 run_rt3593_set_chan(struct run_softc *sc, u_int chan) 4439 { 4440 int8_t txpow1, txpow2, txpow3; 4441 uint8_t h20mhz, rf; 4442 int i; 4443 4444 /* find the settings for this channel (we know it exists) */ 4445 for (i = 0; rt2860_rf2850[i].chan != chan; i++); 4446 4447 /* use Tx power values from EEPROM */ 4448 txpow1 = sc->txpow1[i]; 4449 txpow2 = sc->txpow2[i]; 4450 txpow3 = (sc->ntxchains == 3) ? sc->txpow3[i] : 0; 4451 4452 if (chan <= 14) { 4453 run_bbp_write(sc, 25, sc->bbp25); 4454 run_bbp_write(sc, 26, sc->bbp26); 4455 } else { 4456 /* Enable IQ phase correction. */ 4457 run_bbp_write(sc, 25, 0x09); 4458 run_bbp_write(sc, 26, 0xff); 4459 } 4460 4461 run_rt3070_rf_write(sc, 8, rt3070_freqs[i].n); 4462 run_rt3070_rf_write(sc, 9, rt3070_freqs[i].k & 0x0f); 4463 run_rt3070_rf_read(sc, 11, &rf); 4464 rf = (rf & ~0x03) | (rt3070_freqs[i].r & 0x03); 4465 run_rt3070_rf_write(sc, 11, rf); 4466 4467 /* Set pll_idoh. */ 4468 run_rt3070_rf_read(sc, 11, &rf); 4469 rf &= ~0x4c; 4470 rf |= (chan <= 14) ? 0x44 : 0x48; 4471 run_rt3070_rf_write(sc, 11, rf); 4472 4473 if (chan <= 14) 4474 rf = txpow1 & 0x1f; 4475 else 4476 rf = 0x40 | ((txpow1 & 0x18) << 1) | (txpow1 & 0x07); 4477 run_rt3070_rf_write(sc, 53, rf); 4478 4479 if (chan <= 14) 4480 rf = txpow2 & 0x1f; 4481 else 4482 rf = 0x40 | ((txpow2 & 0x18) << 1) | (txpow2 & 0x07); 4483 run_rt3070_rf_write(sc, 55, rf); 4484 4485 if (chan <= 14) 4486 rf = txpow3 & 0x1f; 4487 else 4488 rf = 0x40 | ((txpow3 & 0x18) << 1) | (txpow3 & 0x07); 4489 run_rt3070_rf_write(sc, 54, rf); 4490 4491 rf = RT3070_RF_BLOCK | RT3070_PLL_PD; 4492 if (sc->ntxchains == 3) 4493 rf |= RT3070_TX0_PD | RT3070_TX1_PD | RT3070_TX2_PD; 4494 else 4495 rf |= RT3070_TX0_PD | RT3070_TX1_PD; 4496 rf |= RT3070_RX0_PD | RT3070_RX1_PD | RT3070_RX2_PD; 4497 run_rt3070_rf_write(sc, 1, rf); 4498 4499 run_adjust_freq_offset(sc); 4500 4501 run_rt3070_rf_write(sc, 31, (chan <= 14) ? 0xa0 : 0x80); 4502 4503 h20mhz = (sc->rf24_20mhz & 0x20) >> 5; 4504 run_rt3070_rf_read(sc, 30, &rf); 4505 rf = (rf & ~0x06) | (h20mhz << 1) | (h20mhz << 2); 4506 run_rt3070_rf_write(sc, 30, rf); 4507 4508 run_rt3070_rf_read(sc, 36, &rf); 4509 if (chan <= 14) 4510 rf |= 0x80; 4511 else 4512 rf &= ~0x80; 4513 run_rt3070_rf_write(sc, 36, rf); 4514 4515 /* Set vcolo_bs. */ 4516 run_rt3070_rf_write(sc, 34, (chan <= 14) ? 0x3c : 0x20); 4517 /* Set pfd_delay. */ 4518 run_rt3070_rf_write(sc, 12, (chan <= 14) ? 0x1a : 0x12); 4519 4520 /* Set vco bias current control. */ 4521 run_rt3070_rf_read(sc, 6, &rf); 4522 rf &= ~0xc0; 4523 if (chan <= 14) 4524 rf |= 0x40; 4525 else if (chan <= 128) 4526 rf |= 0x80; 4527 else 4528 rf |= 0x40; 4529 run_rt3070_rf_write(sc, 6, rf); 4530 4531 run_rt3070_rf_read(sc, 30, &rf); 4532 rf = (rf & ~0x18) | 0x10; 4533 run_rt3070_rf_write(sc, 30, rf); 4534 4535 run_rt3070_rf_write(sc, 10, (chan <= 14) ? 0xd3 : 0xd8); 4536 run_rt3070_rf_write(sc, 13, (chan <= 14) ? 0x12 : 0x23); 4537 4538 run_rt3070_rf_read(sc, 51, &rf); 4539 rf = (rf & ~0x03) | 0x01; 4540 run_rt3070_rf_write(sc, 51, rf); 4541 /* Set tx_mx1_cc. */ 4542 run_rt3070_rf_read(sc, 51, &rf); 4543 rf &= ~0x1c; 4544 rf |= (chan <= 14) ? 0x14 : 0x10; 4545 run_rt3070_rf_write(sc, 51, rf); 4546 /* Set tx_mx1_ic. */ 4547 run_rt3070_rf_read(sc, 51, &rf); 4548 rf &= ~0xe0; 4549 rf |= (chan <= 14) ? 0x60 : 0x40; 4550 run_rt3070_rf_write(sc, 51, rf); 4551 /* Set tx_lo1_ic. */ 4552 run_rt3070_rf_read(sc, 49, &rf); 4553 rf &= ~0x1c; 4554 rf |= (chan <= 14) ? 0x0c : 0x08; 4555 run_rt3070_rf_write(sc, 49, rf); 4556 /* Set tx_lo1_en. */ 4557 run_rt3070_rf_read(sc, 50, &rf); 4558 run_rt3070_rf_write(sc, 50, rf & ~0x20); 4559 /* Set drv_cc. */ 4560 run_rt3070_rf_read(sc, 57, &rf); 4561 rf &= ~0xfc; 4562 rf |= (chan <= 14) ? 0x6c : 0x3c; 4563 run_rt3070_rf_write(sc, 57, rf); 4564 /* Set rx_mix1_ic, rxa_lnactr, lna_vc, lna_inbias_en and lna_en. */ 4565 run_rt3070_rf_write(sc, 44, (chan <= 14) ? 0x93 : 0x9b); 4566 /* Set drv_gnd_a, tx_vga_cc_a and tx_mx2_gain. */ 4567 run_rt3070_rf_write(sc, 52, (chan <= 14) ? 0x45 : 0x05); 4568 /* Enable VCO calibration. */ 4569 run_rt3070_rf_read(sc, 3, &rf); 4570 rf &= ~RT5390_VCOCAL; 4571 rf |= (chan <= 14) ? RT5390_VCOCAL : 0xbe; 4572 run_rt3070_rf_write(sc, 3, rf); 4573 4574 if (chan <= 14) 4575 rf = 0x23; 4576 else if (chan <= 64) 4577 rf = 0x36; 4578 else if (chan <= 128) 4579 rf = 0x32; 4580 else 4581 rf = 0x30; 4582 run_rt3070_rf_write(sc, 39, rf); 4583 if (chan <= 14) 4584 rf = 0xbb; 4585 else if (chan <= 64) 4586 rf = 0xeb; 4587 else if (chan <= 128) 4588 rf = 0xb3; 4589 else 4590 rf = 0x9b; 4591 run_rt3070_rf_write(sc, 45, rf); 4592 4593 /* Set FEQ/AEQ control. */ 4594 run_bbp_write(sc, 105, 0x34); 4595 } 4596 4597 static void 4598 run_rt5390_set_chan(struct run_softc *sc, u_int chan) 4599 { 4600 int8_t txpow1, txpow2; 4601 uint8_t rf; 4602 int i; 4603 4604 /* find the settings for this channel (we know it exists) */ 4605 for (i = 0; rt2860_rf2850[i].chan != chan; i++); 4606 4607 /* use Tx power values from EEPROM */ 4608 txpow1 = sc->txpow1[i]; 4609 txpow2 = sc->txpow2[i]; 4610 4611 run_rt3070_rf_write(sc, 8, rt3070_freqs[i].n); 4612 run_rt3070_rf_write(sc, 9, rt3070_freqs[i].k & 0x0f); 4613 run_rt3070_rf_read(sc, 11, &rf); 4614 rf = (rf & ~0x03) | (rt3070_freqs[i].r & 0x03); 4615 run_rt3070_rf_write(sc, 11, rf); 4616 4617 run_rt3070_rf_read(sc, 49, &rf); 4618 rf = (rf & ~0x3f) | (txpow1 & 0x3f); 4619 /* The valid range of the RF R49 is 0x00 to 0x27. */ 4620 if ((rf & 0x3f) > 0x27) 4621 rf = (rf & ~0x3f) | 0x27; 4622 run_rt3070_rf_write(sc, 49, rf); 4623 4624 if (sc->mac_ver == 0x5392) { 4625 run_rt3070_rf_read(sc, 50, &rf); 4626 rf = (rf & ~0x3f) | (txpow2 & 0x3f); 4627 /* The valid range of the RF R50 is 0x00 to 0x27. */ 4628 if ((rf & 0x3f) > 0x27) 4629 rf = (rf & ~0x3f) | 0x27; 4630 run_rt3070_rf_write(sc, 50, rf); 4631 } 4632 4633 run_rt3070_rf_read(sc, 1, &rf); 4634 rf |= RT3070_RF_BLOCK | RT3070_PLL_PD | RT3070_RX0_PD | RT3070_TX0_PD; 4635 if (sc->mac_ver == 0x5392) 4636 rf |= RT3070_RX1_PD | RT3070_TX1_PD; 4637 run_rt3070_rf_write(sc, 1, rf); 4638 4639 if (sc->mac_ver != 0x5392) { 4640 run_rt3070_rf_read(sc, 2, &rf); 4641 rf |= 0x80; 4642 run_rt3070_rf_write(sc, 2, rf); 4643 run_delay(sc, 10); 4644 rf &= 0x7f; 4645 run_rt3070_rf_write(sc, 2, rf); 4646 } 4647 4648 run_adjust_freq_offset(sc); 4649 4650 if (sc->mac_ver == 0x5392) { 4651 /* Fix for RT5392C. */ 4652 if (sc->mac_rev >= 0x0223) { 4653 if (chan <= 4) 4654 rf = 0x0f; 4655 else if (chan >= 5 && chan <= 7) 4656 rf = 0x0e; 4657 else 4658 rf = 0x0d; 4659 run_rt3070_rf_write(sc, 23, rf); 4660 4661 if (chan <= 4) 4662 rf = 0x0c; 4663 else if (chan == 5) 4664 rf = 0x0b; 4665 else if (chan >= 6 && chan <= 7) 4666 rf = 0x0a; 4667 else if (chan >= 8 && chan <= 10) 4668 rf = 0x09; 4669 else 4670 rf = 0x08; 4671 run_rt3070_rf_write(sc, 59, rf); 4672 } else { 4673 if (chan <= 11) 4674 rf = 0x0f; 4675 else 4676 rf = 0x0b; 4677 run_rt3070_rf_write(sc, 59, rf); 4678 } 4679 } else { 4680 /* Fix for RT5390F. */ 4681 if (sc->mac_rev >= 0x0502) { 4682 if (chan <= 11) 4683 rf = 0x43; 4684 else 4685 rf = 0x23; 4686 run_rt3070_rf_write(sc, 55, rf); 4687 4688 if (chan <= 11) 4689 rf = 0x0f; 4690 else if (chan == 12) 4691 rf = 0x0d; 4692 else 4693 rf = 0x0b; 4694 run_rt3070_rf_write(sc, 59, rf); 4695 } else { 4696 run_rt3070_rf_write(sc, 55, 0x44); 4697 run_rt3070_rf_write(sc, 59, 0x8f); 4698 } 4699 } 4700 4701 /* Enable VCO calibration. */ 4702 run_rt3070_rf_read(sc, 3, &rf); 4703 rf |= RT5390_VCOCAL; 4704 run_rt3070_rf_write(sc, 3, rf); 4705 } 4706 4707 static void 4708 run_rt5592_set_chan(struct run_softc *sc, u_int chan) 4709 { 4710 const struct rt5592_freqs *freqs; 4711 uint32_t tmp; 4712 uint8_t reg, rf, txpow_bound; 4713 int8_t txpow1, txpow2; 4714 int i; 4715 4716 run_read(sc, RT5592_DEBUG_INDEX, &tmp); 4717 freqs = (tmp & RT5592_SEL_XTAL) ? 4718 rt5592_freqs_40mhz : rt5592_freqs_20mhz; 4719 4720 /* find the settings for this channel (we know it exists) */ 4721 for (i = 0; rt2860_rf2850[i].chan != chan; i++, freqs++); 4722 4723 /* use Tx power values from EEPROM */ 4724 txpow1 = sc->txpow1[i]; 4725 txpow2 = sc->txpow2[i]; 4726 4727 run_read(sc, RT3070_LDO_CFG0, &tmp); 4728 tmp &= ~0x1c000000; 4729 if (chan > 14) 4730 tmp |= 0x14000000; 4731 run_write(sc, RT3070_LDO_CFG0, tmp); 4732 4733 /* N setting. */ 4734 run_rt3070_rf_write(sc, 8, freqs->n & 0xff); 4735 run_rt3070_rf_read(sc, 9, &rf); 4736 rf &= ~(1 << 4); 4737 rf |= ((freqs->n & 0x0100) >> 8) << 4; 4738 run_rt3070_rf_write(sc, 9, rf); 4739 4740 /* K setting. */ 4741 run_rt3070_rf_read(sc, 9, &rf); 4742 rf &= ~0x0f; 4743 rf |= (freqs->k & 0x0f); 4744 run_rt3070_rf_write(sc, 9, rf); 4745 4746 /* Mode setting. */ 4747 run_rt3070_rf_read(sc, 11, &rf); 4748 rf &= ~0x0c; 4749 rf |= ((freqs->m - 0x8) & 0x3) << 2; 4750 run_rt3070_rf_write(sc, 11, rf); 4751 run_rt3070_rf_read(sc, 9, &rf); 4752 rf &= ~(1 << 7); 4753 rf |= (((freqs->m - 0x8) & 0x4) >> 2) << 7; 4754 run_rt3070_rf_write(sc, 9, rf); 4755 4756 /* R setting. */ 4757 run_rt3070_rf_read(sc, 11, &rf); 4758 rf &= ~0x03; 4759 rf |= (freqs->r - 0x1); 4760 run_rt3070_rf_write(sc, 11, rf); 4761 4762 if (chan <= 14) { 4763 /* Initialize RF registers for 2GHZ. */ 4764 for (i = 0; i < nitems(rt5592_2ghz_def_rf); i++) { 4765 run_rt3070_rf_write(sc, rt5592_2ghz_def_rf[i].reg, 4766 rt5592_2ghz_def_rf[i].val); 4767 } 4768 4769 rf = (chan <= 10) ? 0x07 : 0x06; 4770 run_rt3070_rf_write(sc, 23, rf); 4771 run_rt3070_rf_write(sc, 59, rf); 4772 4773 run_rt3070_rf_write(sc, 55, 0x43); 4774 4775 /* 4776 * RF R49/R50 Tx power ALC code. 4777 * G-band bit<7:6>=1:0, bit<5:0> range from 0x0 ~ 0x27. 4778 */ 4779 reg = 2; 4780 txpow_bound = 0x27; 4781 } else { 4782 /* Initialize RF registers for 5GHZ. */ 4783 for (i = 0; i < nitems(rt5592_5ghz_def_rf); i++) { 4784 run_rt3070_rf_write(sc, rt5592_5ghz_def_rf[i].reg, 4785 rt5592_5ghz_def_rf[i].val); 4786 } 4787 for (i = 0; i < nitems(rt5592_chan_5ghz); i++) { 4788 if (chan >= rt5592_chan_5ghz[i].firstchan && 4789 chan <= rt5592_chan_5ghz[i].lastchan) { 4790 run_rt3070_rf_write(sc, rt5592_chan_5ghz[i].reg, 4791 rt5592_chan_5ghz[i].val); 4792 } 4793 } 4794 4795 /* 4796 * RF R49/R50 Tx power ALC code. 4797 * A-band bit<7:6>=1:1, bit<5:0> range from 0x0 ~ 0x2b. 4798 */ 4799 reg = 3; 4800 txpow_bound = 0x2b; 4801 } 4802 4803 /* RF R49 ch0 Tx power ALC code. */ 4804 run_rt3070_rf_read(sc, 49, &rf); 4805 rf &= ~0xc0; 4806 rf |= (reg << 6); 4807 rf = (rf & ~0x3f) | (txpow1 & 0x3f); 4808 if ((rf & 0x3f) > txpow_bound) 4809 rf = (rf & ~0x3f) | txpow_bound; 4810 run_rt3070_rf_write(sc, 49, rf); 4811 4812 /* RF R50 ch1 Tx power ALC code. */ 4813 run_rt3070_rf_read(sc, 50, &rf); 4814 rf &= ~(1 << 7 | 1 << 6); 4815 rf |= (reg << 6); 4816 rf = (rf & ~0x3f) | (txpow2 & 0x3f); 4817 if ((rf & 0x3f) > txpow_bound) 4818 rf = (rf & ~0x3f) | txpow_bound; 4819 run_rt3070_rf_write(sc, 50, rf); 4820 4821 /* Enable RF_BLOCK, PLL_PD, RX0_PD, and TX0_PD. */ 4822 run_rt3070_rf_read(sc, 1, &rf); 4823 rf |= (RT3070_RF_BLOCK | RT3070_PLL_PD | RT3070_RX0_PD | RT3070_TX0_PD); 4824 if (sc->ntxchains > 1) 4825 rf |= RT3070_TX1_PD; 4826 if (sc->nrxchains > 1) 4827 rf |= RT3070_RX1_PD; 4828 run_rt3070_rf_write(sc, 1, rf); 4829 4830 run_rt3070_rf_write(sc, 6, 0xe4); 4831 4832 run_rt3070_rf_write(sc, 30, 0x10); 4833 run_rt3070_rf_write(sc, 31, 0x80); 4834 run_rt3070_rf_write(sc, 32, 0x80); 4835 4836 run_adjust_freq_offset(sc); 4837 4838 /* Enable VCO calibration. */ 4839 run_rt3070_rf_read(sc, 3, &rf); 4840 rf |= RT5390_VCOCAL; 4841 run_rt3070_rf_write(sc, 3, rf); 4842 } 4843 4844 static void 4845 run_set_rx_antenna(struct run_softc *sc, int aux) 4846 { 4847 uint32_t tmp; 4848 uint8_t bbp152; 4849 4850 if (aux) { 4851 if (sc->rf_rev == RT5390_RF_5370) { 4852 run_bbp_read(sc, 152, &bbp152); 4853 run_bbp_write(sc, 152, bbp152 & ~0x80); 4854 } else { 4855 run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, 0); 4856 run_read(sc, RT2860_GPIO_CTRL, &tmp); 4857 run_write(sc, RT2860_GPIO_CTRL, (tmp & ~0x0808) | 0x08); 4858 } 4859 } else { 4860 if (sc->rf_rev == RT5390_RF_5370) { 4861 run_bbp_read(sc, 152, &bbp152); 4862 run_bbp_write(sc, 152, bbp152 | 0x80); 4863 } else { 4864 run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, 1); 4865 run_read(sc, RT2860_GPIO_CTRL, &tmp); 4866 run_write(sc, RT2860_GPIO_CTRL, tmp & ~0x0808); 4867 } 4868 } 4869 } 4870 4871 static int 4872 run_set_chan(struct run_softc *sc, struct ieee80211_channel *c) 4873 { 4874 struct ieee80211com *ic = &sc->sc_ic; 4875 u_int chan, group; 4876 4877 chan = ieee80211_chan2ieee(ic, c); 4878 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 4879 return (EINVAL); 4880 4881 if (sc->mac_ver == 0x5592) 4882 run_rt5592_set_chan(sc, chan); 4883 else if (sc->mac_ver >= 0x5390) 4884 run_rt5390_set_chan(sc, chan); 4885 else if (sc->mac_ver == 0x3593) 4886 run_rt3593_set_chan(sc, chan); 4887 else if (sc->mac_ver == 0x3572) 4888 run_rt3572_set_chan(sc, chan); 4889 else if (sc->mac_ver >= 0x3070) 4890 run_rt3070_set_chan(sc, chan); 4891 else 4892 run_rt2870_set_chan(sc, chan); 4893 4894 /* determine channel group */ 4895 if (chan <= 14) 4896 group = 0; 4897 else if (chan <= 64) 4898 group = 1; 4899 else if (chan <= 128) 4900 group = 2; 4901 else 4902 group = 3; 4903 4904 /* XXX necessary only when group has changed! */ 4905 run_select_chan_group(sc, group); 4906 4907 run_delay(sc, 10); 4908 4909 /* Perform IQ calibration. */ 4910 if (sc->mac_ver >= 0x5392) 4911 run_iq_calib(sc, chan); 4912 4913 return (0); 4914 } 4915 4916 static void 4917 run_set_channel(struct ieee80211com *ic) 4918 { 4919 struct run_softc *sc = ic->ic_softc; 4920 4921 RUN_LOCK(sc); 4922 run_set_chan(sc, ic->ic_curchan); 4923 RUN_UNLOCK(sc); 4924 4925 return; 4926 } 4927 4928 static void 4929 run_getradiocaps(struct ieee80211com *ic, 4930 int maxchans, int *nchans, struct ieee80211_channel chans[]) 4931 { 4932 struct run_softc *sc = ic->ic_softc; 4933 uint8_t bands[IEEE80211_MODE_BYTES]; 4934 4935 memset(bands, 0, sizeof(bands)); 4936 setbit(bands, IEEE80211_MODE_11B); 4937 setbit(bands, IEEE80211_MODE_11G); 4938 if (sc->rf_rev != RT3070_RF_2020) 4939 setbit(bands, IEEE80211_MODE_11NG); 4940 4941 /* Note: for now, only support HT20 channels */ 4942 ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0); 4943 4944 if (sc->rf_rev == RT2860_RF_2750 || sc->rf_rev == RT2860_RF_2850 || 4945 sc->rf_rev == RT3070_RF_3052 || sc->rf_rev == RT3593_RF_3053 || 4946 sc->rf_rev == RT5592_RF_5592) { 4947 setbit(bands, IEEE80211_MODE_11A); 4948 if (sc->rf_rev != RT3070_RF_2020) 4949 setbit(bands, IEEE80211_MODE_11NA); 4950 /* Note: for now, only support HT20 channels */ 4951 ieee80211_add_channel_list_5ghz(chans, maxchans, nchans, 4952 run_chan_5ghz, nitems(run_chan_5ghz), bands, 0); 4953 } 4954 } 4955 4956 static void 4957 run_scan_start(struct ieee80211com *ic) 4958 { 4959 struct run_softc *sc = ic->ic_softc; 4960 4961 RUN_LOCK(sc); 4962 4963 /* abort TSF synchronization */ 4964 run_disable_tsf(sc); 4965 run_set_bssid(sc, ieee80211broadcastaddr); 4966 4967 RUN_UNLOCK(sc); 4968 4969 return; 4970 } 4971 4972 static void 4973 run_scan_end(struct ieee80211com *ic) 4974 { 4975 struct run_softc *sc = ic->ic_softc; 4976 4977 RUN_LOCK(sc); 4978 4979 run_enable_tsf_sync(sc); 4980 run_set_bssid(sc, sc->sc_bssid); 4981 4982 RUN_UNLOCK(sc); 4983 4984 return; 4985 } 4986 4987 /* 4988 * Could be called from ieee80211_node_timeout() 4989 * (non-sleepable thread) 4990 */ 4991 static void 4992 run_update_beacon(struct ieee80211vap *vap, int item) 4993 { 4994 struct ieee80211com *ic = vap->iv_ic; 4995 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 4996 struct ieee80211_node *ni = vap->iv_bss; 4997 struct run_softc *sc = ic->ic_softc; 4998 struct run_vap *rvp = RUN_VAP(vap); 4999 int mcast = 0; 5000 uint32_t i; 5001 5002 switch (item) { 5003 case IEEE80211_BEACON_ERP: 5004 run_updateslot(ic); 5005 break; 5006 case IEEE80211_BEACON_HTINFO: 5007 run_updateprot(ic); 5008 break; 5009 case IEEE80211_BEACON_TIM: 5010 mcast = 1; /*TODO*/ 5011 break; 5012 default: 5013 break; 5014 } 5015 5016 setbit(bo->bo_flags, item); 5017 if (rvp->beacon_mbuf == NULL) { 5018 rvp->beacon_mbuf = ieee80211_beacon_alloc(ni); 5019 if (rvp->beacon_mbuf == NULL) 5020 return; 5021 } 5022 ieee80211_beacon_update(ni, rvp->beacon_mbuf, mcast); 5023 5024 i = RUN_CMDQ_GET(&sc->cmdq_store); 5025 RUN_DPRINTF(sc, RUN_DEBUG_BEACON, "cmdq_store=%d\n", i); 5026 sc->cmdq[i].func = run_update_beacon_cb; 5027 sc->cmdq[i].arg0 = vap; 5028 ieee80211_runtask(ic, &sc->cmdq_task); 5029 5030 return; 5031 } 5032 5033 static void 5034 run_update_beacon_cb(void *arg) 5035 { 5036 struct ieee80211vap *vap = arg; 5037 struct ieee80211_node *ni = vap->iv_bss; 5038 struct run_vap *rvp = RUN_VAP(vap); 5039 struct ieee80211com *ic = vap->iv_ic; 5040 struct run_softc *sc = ic->ic_softc; 5041 struct rt2860_txwi txwi; 5042 struct mbuf *m; 5043 uint16_t txwisize; 5044 uint8_t ridx; 5045 5046 if (ni->ni_chan == IEEE80211_CHAN_ANYC) 5047 return; 5048 if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) 5049 return; 5050 5051 /* 5052 * No need to call ieee80211_beacon_update(), run_update_beacon() 5053 * is taking care of appropriate calls. 5054 */ 5055 if (rvp->beacon_mbuf == NULL) { 5056 rvp->beacon_mbuf = ieee80211_beacon_alloc(ni); 5057 if (rvp->beacon_mbuf == NULL) 5058 return; 5059 } 5060 m = rvp->beacon_mbuf; 5061 5062 memset(&txwi, 0, sizeof(txwi)); 5063 txwi.wcid = 0xff; 5064 txwi.len = htole16(m->m_pkthdr.len); 5065 5066 /* send beacons at the lowest available rate */ 5067 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 5068 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 5069 txwi.phy = htole16(rt2860_rates[ridx].mcs); 5070 if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM) 5071 txwi.phy |= htole16(RT2860_PHY_OFDM); 5072 txwi.txop = RT2860_TX_TXOP_HT; 5073 txwi.flags = RT2860_TX_TS; 5074 txwi.xflags = RT2860_TX_NSEQ; 5075 5076 txwisize = (sc->mac_ver == 0x5592) ? 5077 sizeof(txwi) + sizeof(uint32_t) : sizeof(txwi); 5078 run_write_region_1(sc, RT2860_BCN_BASE(rvp->rvp_id), (uint8_t *)&txwi, 5079 txwisize); 5080 run_write_region_1(sc, RT2860_BCN_BASE(rvp->rvp_id) + txwisize, 5081 mtod(m, uint8_t *), (m->m_pkthdr.len + 1) & ~1); 5082 } 5083 5084 static void 5085 run_updateprot(struct ieee80211com *ic) 5086 { 5087 struct run_softc *sc = ic->ic_softc; 5088 uint32_t i; 5089 5090 i = RUN_CMDQ_GET(&sc->cmdq_store); 5091 RUN_DPRINTF(sc, RUN_DEBUG_BEACON, "cmdq_store=%d\n", i); 5092 sc->cmdq[i].func = run_updateprot_cb; 5093 sc->cmdq[i].arg0 = ic; 5094 ieee80211_runtask(ic, &sc->cmdq_task); 5095 } 5096 5097 static void 5098 run_updateprot_cb(void *arg) 5099 { 5100 struct ieee80211com *ic = arg; 5101 struct run_softc *sc = ic->ic_softc; 5102 uint32_t tmp; 5103 5104 tmp = RT2860_RTSTH_EN | RT2860_PROT_NAV_SHORT | RT2860_TXOP_ALLOW_ALL; 5105 /* setup protection frame rate (MCS code) */ 5106 tmp |= (ic->ic_curmode == IEEE80211_MODE_11A) ? 5107 rt2860_rates[RT2860_RIDX_OFDM6].mcs | RT2860_PHY_OFDM : 5108 rt2860_rates[RT2860_RIDX_CCK11].mcs; 5109 5110 /* CCK frames don't require protection */ 5111 run_write(sc, RT2860_CCK_PROT_CFG, tmp); 5112 if (ic->ic_flags & IEEE80211_F_USEPROT) { 5113 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 5114 tmp |= RT2860_PROT_CTRL_RTS_CTS; 5115 else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 5116 tmp |= RT2860_PROT_CTRL_CTS; 5117 } 5118 run_write(sc, RT2860_OFDM_PROT_CFG, tmp); 5119 } 5120 5121 static void 5122 run_usb_timeout_cb(void *arg) 5123 { 5124 struct ieee80211vap *vap = arg; 5125 struct run_softc *sc = vap->iv_ic->ic_softc; 5126 5127 RUN_LOCK_ASSERT(sc, MA_OWNED); 5128 5129 if(vap->iv_state == IEEE80211_S_RUN && 5130 vap->iv_opmode != IEEE80211_M_STA) 5131 run_reset_livelock(sc); 5132 else if (vap->iv_state == IEEE80211_S_SCAN) { 5133 RUN_DPRINTF(sc, RUN_DEBUG_USB | RUN_DEBUG_STATE, 5134 "timeout caused by scan\n"); 5135 /* cancel bgscan */ 5136 ieee80211_cancel_scan(vap); 5137 } else 5138 RUN_DPRINTF(sc, RUN_DEBUG_USB | RUN_DEBUG_STATE, 5139 "timeout by unknown cause\n"); 5140 } 5141 5142 static void 5143 run_reset_livelock(struct run_softc *sc) 5144 { 5145 uint32_t tmp; 5146 5147 RUN_LOCK_ASSERT(sc, MA_OWNED); 5148 5149 /* 5150 * In IBSS or HostAP modes (when the hardware sends beacons), the MAC 5151 * can run into a livelock and start sending CTS-to-self frames like 5152 * crazy if protection is enabled. Reset MAC/BBP for a while 5153 */ 5154 run_read(sc, RT2860_DEBUG, &tmp); 5155 RUN_DPRINTF(sc, RUN_DEBUG_RESET, "debug reg %08x\n", tmp); 5156 if ((tmp & (1 << 29)) && (tmp & (1 << 7 | 1 << 5))) { 5157 RUN_DPRINTF(sc, RUN_DEBUG_RESET, 5158 "CTS-to-self livelock detected\n"); 5159 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_SRST); 5160 run_delay(sc, 1); 5161 run_write(sc, RT2860_MAC_SYS_CTRL, 5162 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 5163 } 5164 } 5165 5166 static void 5167 run_update_promisc_locked(struct run_softc *sc) 5168 { 5169 uint32_t tmp; 5170 5171 run_read(sc, RT2860_RX_FILTR_CFG, &tmp); 5172 5173 tmp |= RT2860_DROP_UC_NOME; 5174 if (sc->sc_ic.ic_promisc > 0) 5175 tmp &= ~RT2860_DROP_UC_NOME; 5176 5177 run_write(sc, RT2860_RX_FILTR_CFG, tmp); 5178 5179 RUN_DPRINTF(sc, RUN_DEBUG_RECV, "%s promiscuous mode\n", 5180 (sc->sc_ic.ic_promisc > 0) ? "entering" : "leaving"); 5181 } 5182 5183 static void 5184 run_update_promisc(struct ieee80211com *ic) 5185 { 5186 struct run_softc *sc = ic->ic_softc; 5187 5188 if ((sc->sc_flags & RUN_RUNNING) == 0) 5189 return; 5190 5191 RUN_LOCK(sc); 5192 run_update_promisc_locked(sc); 5193 RUN_UNLOCK(sc); 5194 } 5195 5196 static void 5197 run_enable_tsf_sync(struct run_softc *sc) 5198 { 5199 struct ieee80211com *ic = &sc->sc_ic; 5200 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5201 uint32_t tmp; 5202 5203 RUN_DPRINTF(sc, RUN_DEBUG_BEACON, "rvp_id=%d ic_opmode=%d\n", 5204 RUN_VAP(vap)->rvp_id, ic->ic_opmode); 5205 5206 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 5207 tmp &= ~0x1fffff; 5208 tmp |= vap->iv_bss->ni_intval * 16; 5209 tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN; 5210 5211 if (ic->ic_opmode == IEEE80211_M_STA) { 5212 /* 5213 * Local TSF is always updated with remote TSF on beacon 5214 * reception. 5215 */ 5216 tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT; 5217 } else if (ic->ic_opmode == IEEE80211_M_IBSS) { 5218 tmp |= RT2860_BCN_TX_EN; 5219 /* 5220 * Local TSF is updated with remote TSF on beacon reception 5221 * only if the remote TSF is greater than local TSF. 5222 */ 5223 tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT; 5224 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP || 5225 ic->ic_opmode == IEEE80211_M_MBSS) { 5226 tmp |= RT2860_BCN_TX_EN; 5227 /* SYNC with nobody */ 5228 tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT; 5229 } else { 5230 RUN_DPRINTF(sc, RUN_DEBUG_BEACON, 5231 "Enabling TSF failed. undefined opmode\n"); 5232 return; 5233 } 5234 5235 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 5236 } 5237 5238 static void 5239 run_enable_tsf(struct run_softc *sc) 5240 { 5241 uint32_t tmp; 5242 5243 if (run_read(sc, RT2860_BCN_TIME_CFG, &tmp) == 0) { 5244 tmp &= ~(RT2860_BCN_TX_EN | RT2860_TBTT_TIMER_EN); 5245 tmp |= RT2860_TSF_TIMER_EN; 5246 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 5247 } 5248 } 5249 5250 static void 5251 run_disable_tsf(struct run_softc *sc) 5252 { 5253 uint32_t tmp; 5254 5255 if (run_read(sc, RT2860_BCN_TIME_CFG, &tmp) == 0) { 5256 tmp &= ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 5257 RT2860_TBTT_TIMER_EN); 5258 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 5259 } 5260 } 5261 5262 static void 5263 run_get_tsf(struct run_softc *sc, uint64_t *buf) 5264 { 5265 run_read_region_1(sc, RT2860_TSF_TIMER_DW0, (uint8_t *)buf, 5266 sizeof(*buf)); 5267 } 5268 5269 static void 5270 run_enable_mrr(struct run_softc *sc) 5271 { 5272 #define CCK(mcs) (mcs) 5273 #define OFDM(mcs) (1 << 3 | (mcs)) 5274 run_write(sc, RT2860_LG_FBK_CFG0, 5275 OFDM(6) << 28 | /* 54->48 */ 5276 OFDM(5) << 24 | /* 48->36 */ 5277 OFDM(4) << 20 | /* 36->24 */ 5278 OFDM(3) << 16 | /* 24->18 */ 5279 OFDM(2) << 12 | /* 18->12 */ 5280 OFDM(1) << 8 | /* 12-> 9 */ 5281 OFDM(0) << 4 | /* 9-> 6 */ 5282 OFDM(0)); /* 6-> 6 */ 5283 5284 run_write(sc, RT2860_LG_FBK_CFG1, 5285 CCK(2) << 12 | /* 11->5.5 */ 5286 CCK(1) << 8 | /* 5.5-> 2 */ 5287 CCK(0) << 4 | /* 2-> 1 */ 5288 CCK(0)); /* 1-> 1 */ 5289 #undef OFDM 5290 #undef CCK 5291 } 5292 5293 static void 5294 run_set_txpreamble(struct run_softc *sc) 5295 { 5296 struct ieee80211com *ic = &sc->sc_ic; 5297 uint32_t tmp; 5298 5299 run_read(sc, RT2860_AUTO_RSP_CFG, &tmp); 5300 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 5301 tmp |= RT2860_CCK_SHORT_EN; 5302 else 5303 tmp &= ~RT2860_CCK_SHORT_EN; 5304 run_write(sc, RT2860_AUTO_RSP_CFG, tmp); 5305 } 5306 5307 static void 5308 run_set_basicrates(struct run_softc *sc) 5309 { 5310 struct ieee80211com *ic = &sc->sc_ic; 5311 5312 /* set basic rates mask */ 5313 if (ic->ic_curmode == IEEE80211_MODE_11B) 5314 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x003); 5315 else if (ic->ic_curmode == IEEE80211_MODE_11A) 5316 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x150); 5317 else /* 11g */ 5318 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x15f); 5319 } 5320 5321 static void 5322 run_set_leds(struct run_softc *sc, uint16_t which) 5323 { 5324 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LEDS, 5325 which | (sc->leds & 0x7f)); 5326 } 5327 5328 static void 5329 run_set_bssid(struct run_softc *sc, const uint8_t *bssid) 5330 { 5331 run_write(sc, RT2860_MAC_BSSID_DW0, 5332 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24); 5333 run_write(sc, RT2860_MAC_BSSID_DW1, 5334 bssid[4] | bssid[5] << 8); 5335 } 5336 5337 static void 5338 run_set_macaddr(struct run_softc *sc, const uint8_t *addr) 5339 { 5340 run_write(sc, RT2860_MAC_ADDR_DW0, 5341 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24); 5342 run_write(sc, RT2860_MAC_ADDR_DW1, 5343 addr[4] | addr[5] << 8 | 0xff << 16); 5344 } 5345 5346 static void 5347 run_updateslot(struct ieee80211com *ic) 5348 { 5349 struct run_softc *sc = ic->ic_softc; 5350 uint32_t i; 5351 5352 i = RUN_CMDQ_GET(&sc->cmdq_store); 5353 RUN_DPRINTF(sc, RUN_DEBUG_BEACON, "cmdq_store=%d\n", i); 5354 sc->cmdq[i].func = run_updateslot_cb; 5355 sc->cmdq[i].arg0 = ic; 5356 ieee80211_runtask(ic, &sc->cmdq_task); 5357 5358 return; 5359 } 5360 5361 /* ARGSUSED */ 5362 static void 5363 run_updateslot_cb(void *arg) 5364 { 5365 struct ieee80211com *ic = arg; 5366 struct run_softc *sc = ic->ic_softc; 5367 uint32_t tmp; 5368 5369 run_read(sc, RT2860_BKOFF_SLOT_CFG, &tmp); 5370 tmp &= ~0xff; 5371 tmp |= IEEE80211_GET_SLOTTIME(ic); 5372 run_write(sc, RT2860_BKOFF_SLOT_CFG, tmp); 5373 } 5374 5375 static void 5376 run_update_mcast(struct ieee80211com *ic) 5377 { 5378 } 5379 5380 static int8_t 5381 run_rssi2dbm(struct run_softc *sc, uint8_t rssi, uint8_t rxchain) 5382 { 5383 struct ieee80211com *ic = &sc->sc_ic; 5384 struct ieee80211_channel *c = ic->ic_curchan; 5385 int delta; 5386 5387 if (IEEE80211_IS_CHAN_5GHZ(c)) { 5388 u_int chan = ieee80211_chan2ieee(ic, c); 5389 delta = sc->rssi_5ghz[rxchain]; 5390 5391 /* determine channel group */ 5392 if (chan <= 64) 5393 delta -= sc->lna[1]; 5394 else if (chan <= 128) 5395 delta -= sc->lna[2]; 5396 else 5397 delta -= sc->lna[3]; 5398 } else 5399 delta = sc->rssi_2ghz[rxchain] - sc->lna[0]; 5400 5401 return (-12 - delta - rssi); 5402 } 5403 5404 static void 5405 run_rt5390_bbp_init(struct run_softc *sc) 5406 { 5407 u_int i; 5408 uint8_t bbp; 5409 5410 /* Apply maximum likelihood detection for 2 stream case. */ 5411 run_bbp_read(sc, 105, &bbp); 5412 if (sc->nrxchains > 1) 5413 run_bbp_write(sc, 105, bbp | RT5390_MLD); 5414 5415 /* Avoid data lost and CRC error. */ 5416 run_bbp_read(sc, 4, &bbp); 5417 run_bbp_write(sc, 4, bbp | RT5390_MAC_IF_CTRL); 5418 5419 if (sc->mac_ver == 0x5592) { 5420 for (i = 0; i < nitems(rt5592_def_bbp); i++) { 5421 run_bbp_write(sc, rt5592_def_bbp[i].reg, 5422 rt5592_def_bbp[i].val); 5423 } 5424 for (i = 0; i < nitems(rt5592_bbp_r196); i++) { 5425 run_bbp_write(sc, 195, i + 0x80); 5426 run_bbp_write(sc, 196, rt5592_bbp_r196[i]); 5427 } 5428 } else { 5429 for (i = 0; i < nitems(rt5390_def_bbp); i++) { 5430 run_bbp_write(sc, rt5390_def_bbp[i].reg, 5431 rt5390_def_bbp[i].val); 5432 } 5433 } 5434 if (sc->mac_ver == 0x5392) { 5435 run_bbp_write(sc, 88, 0x90); 5436 run_bbp_write(sc, 95, 0x9a); 5437 run_bbp_write(sc, 98, 0x12); 5438 run_bbp_write(sc, 106, 0x12); 5439 run_bbp_write(sc, 134, 0xd0); 5440 run_bbp_write(sc, 135, 0xf6); 5441 run_bbp_write(sc, 148, 0x84); 5442 } 5443 5444 run_bbp_read(sc, 152, &bbp); 5445 run_bbp_write(sc, 152, bbp | 0x80); 5446 5447 /* Fix BBP254 for RT5592C. */ 5448 if (sc->mac_ver == 0x5592 && sc->mac_rev >= 0x0221) { 5449 run_bbp_read(sc, 254, &bbp); 5450 run_bbp_write(sc, 254, bbp | 0x80); 5451 } 5452 5453 /* Disable hardware antenna diversity. */ 5454 if (sc->mac_ver == 0x5390) 5455 run_bbp_write(sc, 154, 0); 5456 5457 /* Initialize Rx CCK/OFDM frequency offset report. */ 5458 run_bbp_write(sc, 142, 1); 5459 run_bbp_write(sc, 143, 57); 5460 } 5461 5462 static int 5463 run_bbp_init(struct run_softc *sc) 5464 { 5465 int i, error, ntries; 5466 uint8_t bbp0; 5467 5468 /* wait for BBP to wake up */ 5469 for (ntries = 0; ntries < 20; ntries++) { 5470 if ((error = run_bbp_read(sc, 0, &bbp0)) != 0) 5471 return error; 5472 if (bbp0 != 0 && bbp0 != 0xff) 5473 break; 5474 } 5475 if (ntries == 20) 5476 return (ETIMEDOUT); 5477 5478 /* initialize BBP registers to default values */ 5479 if (sc->mac_ver >= 0x5390) 5480 run_rt5390_bbp_init(sc); 5481 else { 5482 for (i = 0; i < nitems(rt2860_def_bbp); i++) { 5483 run_bbp_write(sc, rt2860_def_bbp[i].reg, 5484 rt2860_def_bbp[i].val); 5485 } 5486 } 5487 5488 if (sc->mac_ver == 0x3593) { 5489 run_bbp_write(sc, 79, 0x13); 5490 run_bbp_write(sc, 80, 0x05); 5491 run_bbp_write(sc, 81, 0x33); 5492 run_bbp_write(sc, 86, 0x46); 5493 run_bbp_write(sc, 137, 0x0f); 5494 } 5495 5496 /* fix BBP84 for RT2860E */ 5497 if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101) 5498 run_bbp_write(sc, 84, 0x19); 5499 5500 if (sc->mac_ver >= 0x3070 && (sc->mac_ver != 0x3593 && 5501 sc->mac_ver != 0x5592)) { 5502 run_bbp_write(sc, 79, 0x13); 5503 run_bbp_write(sc, 80, 0x05); 5504 run_bbp_write(sc, 81, 0x33); 5505 } else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) { 5506 run_bbp_write(sc, 69, 0x16); 5507 run_bbp_write(sc, 73, 0x12); 5508 } 5509 return (0); 5510 } 5511 5512 static int 5513 run_rt3070_rf_init(struct run_softc *sc) 5514 { 5515 uint32_t tmp; 5516 uint8_t bbp4, mingain, rf, target; 5517 u_int i; 5518 5519 run_rt3070_rf_read(sc, 30, &rf); 5520 /* toggle RF R30 bit 7 */ 5521 run_rt3070_rf_write(sc, 30, rf | 0x80); 5522 run_delay(sc, 10); 5523 run_rt3070_rf_write(sc, 30, rf & ~0x80); 5524 5525 /* initialize RF registers to default value */ 5526 if (sc->mac_ver == 0x3572) { 5527 for (i = 0; i < nitems(rt3572_def_rf); i++) { 5528 run_rt3070_rf_write(sc, rt3572_def_rf[i].reg, 5529 rt3572_def_rf[i].val); 5530 } 5531 } else { 5532 for (i = 0; i < nitems(rt3070_def_rf); i++) { 5533 run_rt3070_rf_write(sc, rt3070_def_rf[i].reg, 5534 rt3070_def_rf[i].val); 5535 } 5536 } 5537 5538 if (sc->mac_ver == 0x3070 && sc->mac_rev < 0x0201) { 5539 /* 5540 * Change voltage from 1.2V to 1.35V for RT3070. 5541 * The DAC issue (RT3070_LDO_CFG0) has been fixed 5542 * in RT3070(F). 5543 */ 5544 run_read(sc, RT3070_LDO_CFG0, &tmp); 5545 tmp = (tmp & ~0x0f000000) | 0x0d000000; 5546 run_write(sc, RT3070_LDO_CFG0, tmp); 5547 5548 } else if (sc->mac_ver == 0x3071) { 5549 run_rt3070_rf_read(sc, 6, &rf); 5550 run_rt3070_rf_write(sc, 6, rf | 0x40); 5551 run_rt3070_rf_write(sc, 31, 0x14); 5552 5553 run_read(sc, RT3070_LDO_CFG0, &tmp); 5554 tmp &= ~0x1f000000; 5555 if (sc->mac_rev < 0x0211) 5556 tmp |= 0x0d000000; /* 1.3V */ 5557 else 5558 tmp |= 0x01000000; /* 1.2V */ 5559 run_write(sc, RT3070_LDO_CFG0, tmp); 5560 5561 /* patch LNA_PE_G1 */ 5562 run_read(sc, RT3070_GPIO_SWITCH, &tmp); 5563 run_write(sc, RT3070_GPIO_SWITCH, tmp & ~0x20); 5564 5565 } else if (sc->mac_ver == 0x3572) { 5566 run_rt3070_rf_read(sc, 6, &rf); 5567 run_rt3070_rf_write(sc, 6, rf | 0x40); 5568 5569 /* increase voltage from 1.2V to 1.35V */ 5570 run_read(sc, RT3070_LDO_CFG0, &tmp); 5571 tmp = (tmp & ~0x1f000000) | 0x0d000000; 5572 run_write(sc, RT3070_LDO_CFG0, tmp); 5573 5574 if (sc->mac_rev < 0x0211 || !sc->patch_dac) { 5575 run_delay(sc, 1); /* wait for 1msec */ 5576 /* decrease voltage back to 1.2V */ 5577 tmp = (tmp & ~0x1f000000) | 0x01000000; 5578 run_write(sc, RT3070_LDO_CFG0, tmp); 5579 } 5580 } 5581 5582 /* select 20MHz bandwidth */ 5583 run_rt3070_rf_read(sc, 31, &rf); 5584 run_rt3070_rf_write(sc, 31, rf & ~0x20); 5585 5586 /* calibrate filter for 20MHz bandwidth */ 5587 sc->rf24_20mhz = 0x1f; /* default value */ 5588 target = (sc->mac_ver < 0x3071) ? 0x16 : 0x13; 5589 run_rt3070_filter_calib(sc, 0x07, target, &sc->rf24_20mhz); 5590 5591 /* select 40MHz bandwidth */ 5592 run_bbp_read(sc, 4, &bbp4); 5593 run_bbp_write(sc, 4, (bbp4 & ~0x18) | 0x10); 5594 run_rt3070_rf_read(sc, 31, &rf); 5595 run_rt3070_rf_write(sc, 31, rf | 0x20); 5596 5597 /* calibrate filter for 40MHz bandwidth */ 5598 sc->rf24_40mhz = 0x2f; /* default value */ 5599 target = (sc->mac_ver < 0x3071) ? 0x19 : 0x15; 5600 run_rt3070_filter_calib(sc, 0x27, target, &sc->rf24_40mhz); 5601 5602 /* go back to 20MHz bandwidth */ 5603 run_bbp_read(sc, 4, &bbp4); 5604 run_bbp_write(sc, 4, bbp4 & ~0x18); 5605 5606 if (sc->mac_ver == 0x3572) { 5607 /* save default BBP registers 25 and 26 values */ 5608 run_bbp_read(sc, 25, &sc->bbp25); 5609 run_bbp_read(sc, 26, &sc->bbp26); 5610 } else if (sc->mac_rev < 0x0201 || sc->mac_rev < 0x0211) 5611 run_rt3070_rf_write(sc, 27, 0x03); 5612 5613 run_read(sc, RT3070_OPT_14, &tmp); 5614 run_write(sc, RT3070_OPT_14, tmp | 1); 5615 5616 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 5617 run_rt3070_rf_read(sc, 17, &rf); 5618 rf &= ~RT3070_TX_LO1; 5619 if ((sc->mac_ver == 0x3070 || 5620 (sc->mac_ver == 0x3071 && sc->mac_rev >= 0x0211)) && 5621 !sc->ext_2ghz_lna) 5622 rf |= 0x20; /* fix for long range Rx issue */ 5623 mingain = (sc->mac_ver == 0x3070) ? 1 : 2; 5624 if (sc->txmixgain_2ghz >= mingain) 5625 rf = (rf & ~0x7) | sc->txmixgain_2ghz; 5626 run_rt3070_rf_write(sc, 17, rf); 5627 } 5628 5629 if (sc->mac_ver == 0x3071) { 5630 run_rt3070_rf_read(sc, 1, &rf); 5631 rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD); 5632 rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD; 5633 run_rt3070_rf_write(sc, 1, rf); 5634 5635 run_rt3070_rf_read(sc, 15, &rf); 5636 run_rt3070_rf_write(sc, 15, rf & ~RT3070_TX_LO2); 5637 5638 run_rt3070_rf_read(sc, 20, &rf); 5639 run_rt3070_rf_write(sc, 20, rf & ~RT3070_RX_LO1); 5640 5641 run_rt3070_rf_read(sc, 21, &rf); 5642 run_rt3070_rf_write(sc, 21, rf & ~RT3070_RX_LO2); 5643 } 5644 5645 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 5646 /* fix Tx to Rx IQ glitch by raising RF voltage */ 5647 run_rt3070_rf_read(sc, 27, &rf); 5648 rf &= ~0x77; 5649 if (sc->mac_rev < 0x0211) 5650 rf |= 0x03; 5651 run_rt3070_rf_write(sc, 27, rf); 5652 } 5653 return (0); 5654 } 5655 5656 static void 5657 run_rt3593_rf_init(struct run_softc *sc) 5658 { 5659 uint32_t tmp; 5660 uint8_t rf; 5661 u_int i; 5662 5663 /* Disable the GPIO bits 4 and 7 for LNA PE control. */ 5664 run_read(sc, RT3070_GPIO_SWITCH, &tmp); 5665 tmp &= ~(1 << 4 | 1 << 7); 5666 run_write(sc, RT3070_GPIO_SWITCH, tmp); 5667 5668 /* Initialize RF registers to default value. */ 5669 for (i = 0; i < nitems(rt3593_def_rf); i++) { 5670 run_rt3070_rf_write(sc, rt3593_def_rf[i].reg, 5671 rt3593_def_rf[i].val); 5672 } 5673 5674 /* Toggle RF R2 to initiate calibration. */ 5675 run_rt3070_rf_write(sc, 2, RT5390_RESCAL); 5676 5677 /* Initialize RF frequency offset. */ 5678 run_adjust_freq_offset(sc); 5679 5680 run_rt3070_rf_read(sc, 18, &rf); 5681 run_rt3070_rf_write(sc, 18, rf | RT3593_AUTOTUNE_BYPASS); 5682 5683 /* 5684 * Increase voltage from 1.2V to 1.35V, wait for 1 msec to 5685 * decrease voltage back to 1.2V. 5686 */ 5687 run_read(sc, RT3070_LDO_CFG0, &tmp); 5688 tmp = (tmp & ~0x1f000000) | 0x0d000000; 5689 run_write(sc, RT3070_LDO_CFG0, tmp); 5690 run_delay(sc, 1); 5691 tmp = (tmp & ~0x1f000000) | 0x01000000; 5692 run_write(sc, RT3070_LDO_CFG0, tmp); 5693 5694 sc->rf24_20mhz = 0x1f; 5695 sc->rf24_40mhz = 0x2f; 5696 5697 /* Save default BBP registers 25 and 26 values. */ 5698 run_bbp_read(sc, 25, &sc->bbp25); 5699 run_bbp_read(sc, 26, &sc->bbp26); 5700 5701 run_read(sc, RT3070_OPT_14, &tmp); 5702 run_write(sc, RT3070_OPT_14, tmp | 1); 5703 } 5704 5705 static void 5706 run_rt5390_rf_init(struct run_softc *sc) 5707 { 5708 uint32_t tmp; 5709 uint8_t rf; 5710 u_int i; 5711 5712 /* Toggle RF R2 to initiate calibration. */ 5713 if (sc->mac_ver == 0x5390) { 5714 run_rt3070_rf_read(sc, 2, &rf); 5715 run_rt3070_rf_write(sc, 2, rf | RT5390_RESCAL); 5716 run_delay(sc, 10); 5717 run_rt3070_rf_write(sc, 2, rf & ~RT5390_RESCAL); 5718 } else { 5719 run_rt3070_rf_write(sc, 2, RT5390_RESCAL); 5720 run_delay(sc, 10); 5721 } 5722 5723 /* Initialize RF registers to default value. */ 5724 if (sc->mac_ver == 0x5592) { 5725 for (i = 0; i < nitems(rt5592_def_rf); i++) { 5726 run_rt3070_rf_write(sc, rt5592_def_rf[i].reg, 5727 rt5592_def_rf[i].val); 5728 } 5729 /* Initialize RF frequency offset. */ 5730 run_adjust_freq_offset(sc); 5731 } else if (sc->mac_ver == 0x5392) { 5732 for (i = 0; i < nitems(rt5392_def_rf); i++) { 5733 run_rt3070_rf_write(sc, rt5392_def_rf[i].reg, 5734 rt5392_def_rf[i].val); 5735 } 5736 if (sc->mac_rev >= 0x0223) { 5737 run_rt3070_rf_write(sc, 23, 0x0f); 5738 run_rt3070_rf_write(sc, 24, 0x3e); 5739 run_rt3070_rf_write(sc, 51, 0x32); 5740 run_rt3070_rf_write(sc, 53, 0x22); 5741 run_rt3070_rf_write(sc, 56, 0xc1); 5742 run_rt3070_rf_write(sc, 59, 0x0f); 5743 } 5744 } else { 5745 for (i = 0; i < nitems(rt5390_def_rf); i++) { 5746 run_rt3070_rf_write(sc, rt5390_def_rf[i].reg, 5747 rt5390_def_rf[i].val); 5748 } 5749 if (sc->mac_rev >= 0x0502) { 5750 run_rt3070_rf_write(sc, 6, 0xe0); 5751 run_rt3070_rf_write(sc, 25, 0x80); 5752 run_rt3070_rf_write(sc, 46, 0x73); 5753 run_rt3070_rf_write(sc, 53, 0x00); 5754 run_rt3070_rf_write(sc, 56, 0x42); 5755 run_rt3070_rf_write(sc, 61, 0xd1); 5756 } 5757 } 5758 5759 sc->rf24_20mhz = 0x1f; /* default value */ 5760 sc->rf24_40mhz = (sc->mac_ver == 0x5592) ? 0 : 0x2f; 5761 5762 if (sc->mac_rev < 0x0211) 5763 run_rt3070_rf_write(sc, 27, 0x3); 5764 5765 run_read(sc, RT3070_OPT_14, &tmp); 5766 run_write(sc, RT3070_OPT_14, tmp | 1); 5767 } 5768 5769 static int 5770 run_rt3070_filter_calib(struct run_softc *sc, uint8_t init, uint8_t target, 5771 uint8_t *val) 5772 { 5773 uint8_t rf22, rf24; 5774 uint8_t bbp55_pb, bbp55_sb, delta; 5775 int ntries; 5776 5777 /* program filter */ 5778 run_rt3070_rf_read(sc, 24, &rf24); 5779 rf24 = (rf24 & 0xc0) | init; /* initial filter value */ 5780 run_rt3070_rf_write(sc, 24, rf24); 5781 5782 /* enable baseband loopback mode */ 5783 run_rt3070_rf_read(sc, 22, &rf22); 5784 run_rt3070_rf_write(sc, 22, rf22 | 0x01); 5785 5786 /* set power and frequency of passband test tone */ 5787 run_bbp_write(sc, 24, 0x00); 5788 for (ntries = 0; ntries < 100; ntries++) { 5789 /* transmit test tone */ 5790 run_bbp_write(sc, 25, 0x90); 5791 run_delay(sc, 10); 5792 /* read received power */ 5793 run_bbp_read(sc, 55, &bbp55_pb); 5794 if (bbp55_pb != 0) 5795 break; 5796 } 5797 if (ntries == 100) 5798 return (ETIMEDOUT); 5799 5800 /* set power and frequency of stopband test tone */ 5801 run_bbp_write(sc, 24, 0x06); 5802 for (ntries = 0; ntries < 100; ntries++) { 5803 /* transmit test tone */ 5804 run_bbp_write(sc, 25, 0x90); 5805 run_delay(sc, 10); 5806 /* read received power */ 5807 run_bbp_read(sc, 55, &bbp55_sb); 5808 5809 delta = bbp55_pb - bbp55_sb; 5810 if (delta > target) 5811 break; 5812 5813 /* reprogram filter */ 5814 rf24++; 5815 run_rt3070_rf_write(sc, 24, rf24); 5816 } 5817 if (ntries < 100) { 5818 if (rf24 != init) 5819 rf24--; /* backtrack */ 5820 *val = rf24; 5821 run_rt3070_rf_write(sc, 24, rf24); 5822 } 5823 5824 /* restore initial state */ 5825 run_bbp_write(sc, 24, 0x00); 5826 5827 /* disable baseband loopback mode */ 5828 run_rt3070_rf_read(sc, 22, &rf22); 5829 run_rt3070_rf_write(sc, 22, rf22 & ~0x01); 5830 5831 return (0); 5832 } 5833 5834 static void 5835 run_rt3070_rf_setup(struct run_softc *sc) 5836 { 5837 uint8_t bbp, rf; 5838 int i; 5839 5840 if (sc->mac_ver == 0x3572) { 5841 /* enable DC filter */ 5842 if (sc->mac_rev >= 0x0201) 5843 run_bbp_write(sc, 103, 0xc0); 5844 5845 run_bbp_read(sc, 138, &bbp); 5846 if (sc->ntxchains == 1) 5847 bbp |= 0x20; /* turn off DAC1 */ 5848 if (sc->nrxchains == 1) 5849 bbp &= ~0x02; /* turn off ADC1 */ 5850 run_bbp_write(sc, 138, bbp); 5851 5852 if (sc->mac_rev >= 0x0211) { 5853 /* improve power consumption */ 5854 run_bbp_read(sc, 31, &bbp); 5855 run_bbp_write(sc, 31, bbp & ~0x03); 5856 } 5857 5858 run_rt3070_rf_read(sc, 16, &rf); 5859 rf = (rf & ~0x07) | sc->txmixgain_2ghz; 5860 run_rt3070_rf_write(sc, 16, rf); 5861 5862 } else if (sc->mac_ver == 0x3071) { 5863 if (sc->mac_rev >= 0x0211) { 5864 /* enable DC filter */ 5865 run_bbp_write(sc, 103, 0xc0); 5866 5867 /* improve power consumption */ 5868 run_bbp_read(sc, 31, &bbp); 5869 run_bbp_write(sc, 31, bbp & ~0x03); 5870 } 5871 5872 run_bbp_read(sc, 138, &bbp); 5873 if (sc->ntxchains == 1) 5874 bbp |= 0x20; /* turn off DAC1 */ 5875 if (sc->nrxchains == 1) 5876 bbp &= ~0x02; /* turn off ADC1 */ 5877 run_bbp_write(sc, 138, bbp); 5878 5879 run_write(sc, RT2860_TX_SW_CFG1, 0); 5880 if (sc->mac_rev < 0x0211) { 5881 run_write(sc, RT2860_TX_SW_CFG2, 5882 sc->patch_dac ? 0x2c : 0x0f); 5883 } else 5884 run_write(sc, RT2860_TX_SW_CFG2, 0); 5885 5886 } else if (sc->mac_ver == 0x3070) { 5887 if (sc->mac_rev >= 0x0201) { 5888 /* enable DC filter */ 5889 run_bbp_write(sc, 103, 0xc0); 5890 5891 /* improve power consumption */ 5892 run_bbp_read(sc, 31, &bbp); 5893 run_bbp_write(sc, 31, bbp & ~0x03); 5894 } 5895 5896 if (sc->mac_rev < 0x0201) { 5897 run_write(sc, RT2860_TX_SW_CFG1, 0); 5898 run_write(sc, RT2860_TX_SW_CFG2, 0x2c); 5899 } else 5900 run_write(sc, RT2860_TX_SW_CFG2, 0); 5901 } 5902 5903 /* initialize RF registers from ROM for >=RT3071*/ 5904 if (sc->mac_ver >= 0x3071) { 5905 for (i = 0; i < 10; i++) { 5906 if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff) 5907 continue; 5908 run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val); 5909 } 5910 } 5911 } 5912 5913 static void 5914 run_rt3593_rf_setup(struct run_softc *sc) 5915 { 5916 uint8_t bbp, rf; 5917 5918 if (sc->mac_rev >= 0x0211) { 5919 /* Enable DC filter. */ 5920 run_bbp_write(sc, 103, 0xc0); 5921 } 5922 run_write(sc, RT2860_TX_SW_CFG1, 0); 5923 if (sc->mac_rev < 0x0211) { 5924 run_write(sc, RT2860_TX_SW_CFG2, 5925 sc->patch_dac ? 0x2c : 0x0f); 5926 } else 5927 run_write(sc, RT2860_TX_SW_CFG2, 0); 5928 5929 run_rt3070_rf_read(sc, 50, &rf); 5930 run_rt3070_rf_write(sc, 50, rf & ~RT3593_TX_LO2); 5931 5932 run_rt3070_rf_read(sc, 51, &rf); 5933 rf = (rf & ~(RT3593_TX_LO1 | 0x0c)) | 5934 ((sc->txmixgain_2ghz & 0x07) << 2); 5935 run_rt3070_rf_write(sc, 51, rf); 5936 5937 run_rt3070_rf_read(sc, 38, &rf); 5938 run_rt3070_rf_write(sc, 38, rf & ~RT5390_RX_LO1); 5939 5940 run_rt3070_rf_read(sc, 39, &rf); 5941 run_rt3070_rf_write(sc, 39, rf & ~RT5390_RX_LO2); 5942 5943 run_rt3070_rf_read(sc, 1, &rf); 5944 run_rt3070_rf_write(sc, 1, rf & ~(RT3070_RF_BLOCK | RT3070_PLL_PD)); 5945 5946 run_rt3070_rf_read(sc, 30, &rf); 5947 rf = (rf & ~0x18) | 0x10; 5948 run_rt3070_rf_write(sc, 30, rf); 5949 5950 /* Apply maximum likelihood detection for 2 stream case. */ 5951 run_bbp_read(sc, 105, &bbp); 5952 if (sc->nrxchains > 1) 5953 run_bbp_write(sc, 105, bbp | RT5390_MLD); 5954 5955 /* Avoid data lost and CRC error. */ 5956 run_bbp_read(sc, 4, &bbp); 5957 run_bbp_write(sc, 4, bbp | RT5390_MAC_IF_CTRL); 5958 5959 run_bbp_write(sc, 92, 0x02); 5960 run_bbp_write(sc, 82, 0x82); 5961 run_bbp_write(sc, 106, 0x05); 5962 run_bbp_write(sc, 104, 0x92); 5963 run_bbp_write(sc, 88, 0x90); 5964 run_bbp_write(sc, 148, 0xc8); 5965 run_bbp_write(sc, 47, 0x48); 5966 run_bbp_write(sc, 120, 0x50); 5967 5968 run_bbp_write(sc, 163, 0x9d); 5969 5970 /* SNR mapping. */ 5971 run_bbp_write(sc, 142, 0x06); 5972 run_bbp_write(sc, 143, 0xa0); 5973 run_bbp_write(sc, 142, 0x07); 5974 run_bbp_write(sc, 143, 0xa1); 5975 run_bbp_write(sc, 142, 0x08); 5976 run_bbp_write(sc, 143, 0xa2); 5977 5978 run_bbp_write(sc, 31, 0x08); 5979 run_bbp_write(sc, 68, 0x0b); 5980 run_bbp_write(sc, 105, 0x04); 5981 } 5982 5983 static void 5984 run_rt5390_rf_setup(struct run_softc *sc) 5985 { 5986 uint8_t bbp, rf; 5987 5988 if (sc->mac_rev >= 0x0211) { 5989 /* Enable DC filter. */ 5990 run_bbp_write(sc, 103, 0xc0); 5991 5992 if (sc->mac_ver != 0x5592) { 5993 /* Improve power consumption. */ 5994 run_bbp_read(sc, 31, &bbp); 5995 run_bbp_write(sc, 31, bbp & ~0x03); 5996 } 5997 } 5998 5999 run_bbp_read(sc, 138, &bbp); 6000 if (sc->ntxchains == 1) 6001 bbp |= 0x20; /* turn off DAC1 */ 6002 if (sc->nrxchains == 1) 6003 bbp &= ~0x02; /* turn off ADC1 */ 6004 run_bbp_write(sc, 138, bbp); 6005 6006 run_rt3070_rf_read(sc, 38, &rf); 6007 run_rt3070_rf_write(sc, 38, rf & ~RT5390_RX_LO1); 6008 6009 run_rt3070_rf_read(sc, 39, &rf); 6010 run_rt3070_rf_write(sc, 39, rf & ~RT5390_RX_LO2); 6011 6012 /* Avoid data lost and CRC error. */ 6013 run_bbp_read(sc, 4, &bbp); 6014 run_bbp_write(sc, 4, bbp | RT5390_MAC_IF_CTRL); 6015 6016 run_rt3070_rf_read(sc, 30, &rf); 6017 rf = (rf & ~0x18) | 0x10; 6018 run_rt3070_rf_write(sc, 30, rf); 6019 6020 if (sc->mac_ver != 0x5592) { 6021 run_write(sc, RT2860_TX_SW_CFG1, 0); 6022 if (sc->mac_rev < 0x0211) { 6023 run_write(sc, RT2860_TX_SW_CFG2, 6024 sc->patch_dac ? 0x2c : 0x0f); 6025 } else 6026 run_write(sc, RT2860_TX_SW_CFG2, 0); 6027 } 6028 } 6029 6030 static int 6031 run_txrx_enable(struct run_softc *sc) 6032 { 6033 struct ieee80211com *ic = &sc->sc_ic; 6034 uint32_t tmp; 6035 int error, ntries; 6036 6037 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN); 6038 for (ntries = 0; ntries < 200; ntries++) { 6039 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 6040 return (error); 6041 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 6042 break; 6043 run_delay(sc, 50); 6044 } 6045 if (ntries == 200) 6046 return (ETIMEDOUT); 6047 6048 run_delay(sc, 50); 6049 6050 tmp |= RT2860_RX_DMA_EN | RT2860_TX_DMA_EN | RT2860_TX_WB_DDONE; 6051 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 6052 6053 /* enable Rx bulk aggregation (set timeout and limit) */ 6054 tmp = RT2860_USB_TX_EN | RT2860_USB_RX_EN | RT2860_USB_RX_AGG_EN | 6055 RT2860_USB_RX_AGG_TO(128) | RT2860_USB_RX_AGG_LMT(2); 6056 run_write(sc, RT2860_USB_DMA_CFG, tmp); 6057 6058 /* set Rx filter */ 6059 tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR; 6060 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 6061 tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL | 6062 RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK | 6063 RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV | 6064 RT2860_DROP_CFACK | RT2860_DROP_CFEND; 6065 if (ic->ic_opmode == IEEE80211_M_STA) 6066 tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL; 6067 } 6068 run_write(sc, RT2860_RX_FILTR_CFG, tmp); 6069 6070 run_write(sc, RT2860_MAC_SYS_CTRL, 6071 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 6072 6073 return (0); 6074 } 6075 6076 static void 6077 run_adjust_freq_offset(struct run_softc *sc) 6078 { 6079 uint8_t rf, tmp; 6080 6081 run_rt3070_rf_read(sc, 17, &rf); 6082 tmp = rf; 6083 rf = (rf & ~0x7f) | (sc->freq & 0x7f); 6084 rf = MIN(rf, 0x5f); 6085 6086 if (tmp != rf) 6087 run_mcu_cmd(sc, 0x74, (tmp << 8 ) | rf); 6088 } 6089 6090 static void 6091 run_init_locked(struct run_softc *sc) 6092 { 6093 struct ieee80211com *ic = &sc->sc_ic; 6094 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 6095 uint32_t tmp; 6096 uint8_t bbp1, bbp3; 6097 int i; 6098 int ridx; 6099 int ntries; 6100 6101 if (ic->ic_nrunning > 1) 6102 return; 6103 6104 run_stop(sc); 6105 6106 if (run_load_microcode(sc) != 0) { 6107 device_printf(sc->sc_dev, "could not load 8051 microcode\n"); 6108 goto fail; 6109 } 6110 6111 for (ntries = 0; ntries < 100; ntries++) { 6112 if (run_read(sc, RT2860_ASIC_VER_ID, &tmp) != 0) 6113 goto fail; 6114 if (tmp != 0 && tmp != 0xffffffff) 6115 break; 6116 run_delay(sc, 10); 6117 } 6118 if (ntries == 100) 6119 goto fail; 6120 6121 for (i = 0; i != RUN_EP_QUEUES; i++) 6122 run_setup_tx_list(sc, &sc->sc_epq[i]); 6123 6124 run_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr); 6125 6126 for (ntries = 0; ntries < 100; ntries++) { 6127 if (run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp) != 0) 6128 goto fail; 6129 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 6130 break; 6131 run_delay(sc, 10); 6132 } 6133 if (ntries == 100) { 6134 device_printf(sc->sc_dev, "timeout waiting for DMA engine\n"); 6135 goto fail; 6136 } 6137 tmp &= 0xff0; 6138 tmp |= RT2860_TX_WB_DDONE; 6139 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 6140 6141 /* turn off PME_OEN to solve high-current issue */ 6142 run_read(sc, RT2860_SYS_CTRL, &tmp); 6143 run_write(sc, RT2860_SYS_CTRL, tmp & ~RT2860_PME_OEN); 6144 6145 run_write(sc, RT2860_MAC_SYS_CTRL, 6146 RT2860_BBP_HRST | RT2860_MAC_SRST); 6147 run_write(sc, RT2860_USB_DMA_CFG, 0); 6148 6149 if (run_reset(sc) != 0) { 6150 device_printf(sc->sc_dev, "could not reset chipset\n"); 6151 goto fail; 6152 } 6153 6154 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 6155 6156 /* init Tx power for all Tx rates (from EEPROM) */ 6157 for (ridx = 0; ridx < 5; ridx++) { 6158 if (sc->txpow20mhz[ridx] == 0xffffffff) 6159 continue; 6160 run_write(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]); 6161 } 6162 6163 for (i = 0; i < nitems(rt2870_def_mac); i++) 6164 run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val); 6165 run_write(sc, RT2860_WMM_AIFSN_CFG, 0x00002273); 6166 run_write(sc, RT2860_WMM_CWMIN_CFG, 0x00002344); 6167 run_write(sc, RT2860_WMM_CWMAX_CFG, 0x000034aa); 6168 6169 if (sc->mac_ver >= 0x5390) { 6170 run_write(sc, RT2860_TX_SW_CFG0, 6171 4 << RT2860_DLY_PAPE_EN_SHIFT | 4); 6172 if (sc->mac_ver >= 0x5392) { 6173 run_write(sc, RT2860_MAX_LEN_CFG, 0x00002fff); 6174 if (sc->mac_ver == 0x5592) { 6175 run_write(sc, RT2860_HT_FBK_CFG1, 0xedcba980); 6176 run_write(sc, RT2860_TXOP_HLDR_ET, 0x00000082); 6177 } else { 6178 run_write(sc, RT2860_HT_FBK_CFG1, 0xedcb4980); 6179 run_write(sc, RT2860_LG_FBK_CFG0, 0xedcba322); 6180 } 6181 } 6182 } else if (sc->mac_ver == 0x3593) { 6183 run_write(sc, RT2860_TX_SW_CFG0, 6184 4 << RT2860_DLY_PAPE_EN_SHIFT | 2); 6185 } else if (sc->mac_ver >= 0x3070) { 6186 /* set delay of PA_PE assertion to 1us (unit of 0.25us) */ 6187 run_write(sc, RT2860_TX_SW_CFG0, 6188 4 << RT2860_DLY_PAPE_EN_SHIFT); 6189 } 6190 6191 /* wait while MAC is busy */ 6192 for (ntries = 0; ntries < 100; ntries++) { 6193 if (run_read(sc, RT2860_MAC_STATUS_REG, &tmp) != 0) 6194 goto fail; 6195 if (!(tmp & (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY))) 6196 break; 6197 run_delay(sc, 10); 6198 } 6199 if (ntries == 100) 6200 goto fail; 6201 6202 /* clear Host to MCU mailbox */ 6203 run_write(sc, RT2860_H2M_BBPAGENT, 0); 6204 run_write(sc, RT2860_H2M_MAILBOX, 0); 6205 run_delay(sc, 10); 6206 6207 if (run_bbp_init(sc) != 0) { 6208 device_printf(sc->sc_dev, "could not initialize BBP\n"); 6209 goto fail; 6210 } 6211 6212 /* abort TSF synchronization */ 6213 run_disable_tsf(sc); 6214 6215 /* clear RX WCID search table */ 6216 run_set_region_4(sc, RT2860_WCID_ENTRY(0), 0, 512); 6217 /* clear WCID attribute table */ 6218 run_set_region_4(sc, RT2860_WCID_ATTR(0), 0, 8 * 32); 6219 6220 /* hostapd sets a key before init. So, don't clear it. */ 6221 if (sc->cmdq_key_set != RUN_CMDQ_GO) { 6222 /* clear shared key table */ 6223 run_set_region_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32); 6224 /* clear shared key mode */ 6225 run_set_region_4(sc, RT2860_SKEY_MODE_0_7, 0, 4); 6226 } 6227 6228 run_read(sc, RT2860_US_CYC_CNT, &tmp); 6229 tmp = (tmp & ~0xff) | 0x1e; 6230 run_write(sc, RT2860_US_CYC_CNT, tmp); 6231 6232 if (sc->mac_rev != 0x0101) 6233 run_write(sc, RT2860_TXOP_CTRL_CFG, 0x0000583f); 6234 6235 run_write(sc, RT2860_WMM_TXOP0_CFG, 0); 6236 run_write(sc, RT2860_WMM_TXOP1_CFG, 48 << 16 | 96); 6237 6238 /* write vendor-specific BBP values (from EEPROM) */ 6239 if (sc->mac_ver < 0x3593) { 6240 for (i = 0; i < 10; i++) { 6241 if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff) 6242 continue; 6243 run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val); 6244 } 6245 } 6246 6247 /* select Main antenna for 1T1R devices */ 6248 if (sc->rf_rev == RT3070_RF_3020 || sc->rf_rev == RT5390_RF_5370) 6249 run_set_rx_antenna(sc, 0); 6250 6251 /* send LEDs operating mode to microcontroller */ 6252 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0]); 6253 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1]); 6254 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2]); 6255 6256 if (sc->mac_ver >= 0x5390) 6257 run_rt5390_rf_init(sc); 6258 else if (sc->mac_ver == 0x3593) 6259 run_rt3593_rf_init(sc); 6260 else if (sc->mac_ver >= 0x3070) 6261 run_rt3070_rf_init(sc); 6262 6263 /* disable non-existing Rx chains */ 6264 run_bbp_read(sc, 3, &bbp3); 6265 bbp3 &= ~(1 << 3 | 1 << 4); 6266 if (sc->nrxchains == 2) 6267 bbp3 |= 1 << 3; 6268 else if (sc->nrxchains == 3) 6269 bbp3 |= 1 << 4; 6270 run_bbp_write(sc, 3, bbp3); 6271 6272 /* disable non-existing Tx chains */ 6273 run_bbp_read(sc, 1, &bbp1); 6274 if (sc->ntxchains == 1) 6275 bbp1 &= ~(1 << 3 | 1 << 4); 6276 run_bbp_write(sc, 1, bbp1); 6277 6278 if (sc->mac_ver >= 0x5390) 6279 run_rt5390_rf_setup(sc); 6280 else if (sc->mac_ver == 0x3593) 6281 run_rt3593_rf_setup(sc); 6282 else if (sc->mac_ver >= 0x3070) 6283 run_rt3070_rf_setup(sc); 6284 6285 /* select default channel */ 6286 run_set_chan(sc, ic->ic_curchan); 6287 6288 /* setup initial protection mode */ 6289 run_updateprot_cb(ic); 6290 6291 /* turn radio LED on */ 6292 run_set_leds(sc, RT2860_LED_RADIO); 6293 6294 /* Set up AUTO_RSP_CFG register for auto response */ 6295 run_write(sc, RT2860_AUTO_RSP_CFG, RT2860_AUTO_RSP_EN | 6296 RT2860_BAC_ACKPOLICY_EN | RT2860_CTS_40M_MODE_EN); 6297 6298 sc->sc_flags |= RUN_RUNNING; 6299 sc->cmdq_run = RUN_CMDQ_GO; 6300 6301 for (i = 0; i != RUN_N_XFER; i++) 6302 usbd_xfer_set_stall(sc->sc_xfer[i]); 6303 6304 usbd_transfer_start(sc->sc_xfer[RUN_BULK_RX]); 6305 6306 if (run_txrx_enable(sc) != 0) 6307 goto fail; 6308 6309 return; 6310 6311 fail: 6312 run_stop(sc); 6313 } 6314 6315 static void 6316 run_stop(void *arg) 6317 { 6318 struct run_softc *sc = (struct run_softc *)arg; 6319 uint32_t tmp; 6320 int i; 6321 int ntries; 6322 6323 RUN_LOCK_ASSERT(sc, MA_OWNED); 6324 6325 if (sc->sc_flags & RUN_RUNNING) 6326 run_set_leds(sc, 0); /* turn all LEDs off */ 6327 6328 sc->sc_flags &= ~RUN_RUNNING; 6329 6330 sc->ratectl_run = RUN_RATECTL_OFF; 6331 sc->cmdq_run = sc->cmdq_key_set; 6332 6333 RUN_UNLOCK(sc); 6334 6335 for(i = 0; i < RUN_N_XFER; i++) 6336 usbd_transfer_drain(sc->sc_xfer[i]); 6337 6338 RUN_LOCK(sc); 6339 6340 run_drain_mbufq(sc); 6341 6342 if (sc->rx_m != NULL) { 6343 m_free(sc->rx_m); 6344 sc->rx_m = NULL; 6345 } 6346 6347 /* Disable Tx/Rx DMA. */ 6348 if (run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp) != 0) 6349 return; 6350 tmp &= ~(RT2860_RX_DMA_EN | RT2860_TX_DMA_EN); 6351 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 6352 6353 for (ntries = 0; ntries < 100; ntries++) { 6354 if (run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp) != 0) 6355 return; 6356 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 6357 break; 6358 run_delay(sc, 10); 6359 } 6360 if (ntries == 100) { 6361 device_printf(sc->sc_dev, "timeout waiting for DMA engine\n"); 6362 return; 6363 } 6364 6365 /* disable Tx/Rx */ 6366 run_read(sc, RT2860_MAC_SYS_CTRL, &tmp); 6367 tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 6368 run_write(sc, RT2860_MAC_SYS_CTRL, tmp); 6369 6370 /* wait for pending Tx to complete */ 6371 for (ntries = 0; ntries < 100; ntries++) { 6372 if (run_read(sc, RT2860_TXRXQ_PCNT, &tmp) != 0) { 6373 RUN_DPRINTF(sc, RUN_DEBUG_XMIT | RUN_DEBUG_RESET, 6374 "Cannot read Tx queue count\n"); 6375 break; 6376 } 6377 if ((tmp & RT2860_TX2Q_PCNT_MASK) == 0) { 6378 RUN_DPRINTF(sc, RUN_DEBUG_XMIT | RUN_DEBUG_RESET, 6379 "All Tx cleared\n"); 6380 break; 6381 } 6382 run_delay(sc, 10); 6383 } 6384 if (ntries >= 100) 6385 RUN_DPRINTF(sc, RUN_DEBUG_XMIT | RUN_DEBUG_RESET, 6386 "There are still pending Tx\n"); 6387 run_delay(sc, 10); 6388 run_write(sc, RT2860_USB_DMA_CFG, 0); 6389 6390 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST); 6391 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 6392 6393 for (i = 0; i != RUN_EP_QUEUES; i++) 6394 run_unsetup_tx_list(sc, &sc->sc_epq[i]); 6395 } 6396 6397 static void 6398 run_delay(struct run_softc *sc, u_int ms) 6399 { 6400 usb_pause_mtx(mtx_owned(&sc->sc_mtx) ? 6401 &sc->sc_mtx : NULL, USB_MS_TO_TICKS(ms)); 6402 } 6403 6404 static void 6405 run_update_chw(struct ieee80211com *ic) 6406 { 6407 6408 printf("%s: TODO\n", __func__); 6409 } 6410 6411 static int 6412 run_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 6413 { 6414 6415 /* For now, no A-MPDU TX support in the driver */ 6416 return (0); 6417 } 6418 6419 static device_method_t run_methods[] = { 6420 /* Device interface */ 6421 DEVMETHOD(device_probe, run_match), 6422 DEVMETHOD(device_attach, run_attach), 6423 DEVMETHOD(device_detach, run_detach), 6424 DEVMETHOD_END 6425 }; 6426 6427 static driver_t run_driver = { 6428 .name = "run", 6429 .methods = run_methods, 6430 .size = sizeof(struct run_softc) 6431 }; 6432 6433 DRIVER_MODULE(run, uhub, run_driver, run_driver_loaded, NULL); 6434 MODULE_DEPEND(run, wlan, 1, 1, 1); 6435 MODULE_DEPEND(run, usb, 1, 1, 1); 6436 MODULE_DEPEND(run, firmware, 1, 1, 1); 6437 MODULE_VERSION(run, 1); 6438 USB_PNP_HOST_INFO(run_devs); 6439