1 /* $FreeBSD$ */ 2 3 /*- 4 * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #define RT2573_NOISE_FLOOR -95 21 22 #define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 23 #define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 24 25 #define RT2573_CONFIG_NO 1 26 #define RT2573_IFACE_INDEX 0 27 28 #define RT2573_MCU_CNTL 0x01 29 #define RT2573_WRITE_MAC 0x02 30 #define RT2573_READ_MAC 0x03 31 #define RT2573_WRITE_MULTI_MAC 0x06 32 #define RT2573_READ_MULTI_MAC 0x07 33 #define RT2573_READ_EEPROM 0x09 34 #define RT2573_WRITE_LED 0x0a 35 36 /* 37 * WME registers. 38 */ 39 #define RT2573_AIFSN_CSR 0x0400 40 #define RT2573_CWMIN_CSR 0x0404 41 #define RT2573_CWMAX_CSR 0x0408 42 #define RT2573_TXOP01_CSR 0x040C 43 #define RT2573_TXOP23_CSR 0x0410 44 #define RT2573_MCU_CODE_BASE 0x0800 45 46 /* 47 * H/w encryption/decryption support 48 */ 49 #define KEY_SIZE (IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE) 50 #define RT2573_ADDR_MAX 64 51 #define RT2573_SKEY_MAX 4 52 53 #define RT2573_SKEY(vap, kidx) (0x1000 + ((vap) * RT2573_SKEY_MAX + \ 54 (kidx)) * KEY_SIZE) 55 #define RT2573_PKEY(id) (0x1200 + (id) * KEY_SIZE) 56 57 #define RT2573_ADDR_ENTRY(id) (0x1a00 + (id) * 8) 58 59 /* 60 * Shared memory area 61 */ 62 #define RT2573_HW_BCN_BASE(id) (0x2400 + (id) * 0x100) 63 64 /* 65 * Control and status registers. 66 */ 67 #define RT2573_MAC_CSR0 0x3000 68 #define RT2573_MAC_CSR1 0x3004 69 #define RT2573_MAC_CSR2 0x3008 70 #define RT2573_MAC_CSR3 0x300c 71 #define RT2573_MAC_CSR4 0x3010 72 #define RT2573_MAC_CSR5 0x3014 73 #define RT2573_MAC_CSR6 0x3018 74 #define RT2573_MAC_CSR7 0x301c 75 #define RT2573_MAC_CSR8 0x3020 76 #define RT2573_MAC_CSR9 0x3024 77 #define RT2573_MAC_CSR10 0x3028 78 #define RT2573_MAC_CSR11 0x302c 79 #define RT2573_MAC_CSR12 0x3030 80 #define RT2573_MAC_CSR13 0x3034 81 #define RT2573_MAC_CSR14 0x3038 82 #define RT2573_MAC_CSR15 0x303c 83 #define RT2573_TXRX_CSR0 0x3040 84 #define RT2573_TXRX_CSR1 0x3044 85 #define RT2573_TXRX_CSR2 0x3048 86 #define RT2573_TXRX_CSR3 0x304c 87 #define RT2573_TXRX_CSR4 0x3050 88 #define RT2573_TXRX_CSR5 0x3054 89 #define RT2573_TXRX_CSR6 0x3058 90 #define RT2573_TXRX_CSR7 0x305c 91 #define RT2573_TXRX_CSR8 0x3060 92 #define RT2573_TXRX_CSR9 0x3064 93 #define RT2573_TXRX_CSR10 0x3068 94 #define RT2573_TXRX_CSR11 0x306c 95 #define RT2573_TXRX_CSR12 0x3070 96 #define RT2573_TXRX_CSR13 0x3074 97 #define RT2573_TXRX_CSR14 0x3078 98 #define RT2573_TXRX_CSR15 0x307c 99 #define RT2573_PHY_CSR0 0x3080 100 #define RT2573_PHY_CSR1 0x3084 101 #define RT2573_PHY_CSR2 0x3088 102 #define RT2573_PHY_CSR3 0x308c 103 #define RT2573_PHY_CSR4 0x3090 104 #define RT2573_PHY_CSR5 0x3094 105 #define RT2573_PHY_CSR6 0x3098 106 #define RT2573_PHY_CSR7 0x309c 107 #define RT2573_SEC_CSR0 0x30a0 108 #define RT2573_SEC_CSR1 0x30a4 109 #define RT2573_SEC_CSR2 0x30a8 110 #define RT2573_SEC_CSR3 0x30ac 111 #define RT2573_SEC_CSR4 0x30b0 112 #define RT2573_SEC_CSR5 0x30b4 113 #define RT2573_STA_CSR0 0x30c0 114 #define RT2573_STA_CSR1 0x30c4 115 #define RT2573_STA_CSR2 0x30c8 116 #define RT2573_STA_CSR3 0x30cc 117 #define RT2573_STA_CSR4 0x30d0 118 #define RT2573_STA_CSR5 0x30d4 119 120 121 /* possible values for register RT2573_ADDR_MODE */ 122 #define RT2573_MODE_MASK 0x7 123 #define RT2573_MODE_NOSEC 0 124 #define RT2573_MODE_WEP40 1 125 #define RT2573_MODE_WEP104 2 126 #define RT2573_MODE_TKIP 3 127 #define RT2573_MODE_AES_CCMP 4 128 #define RT2573_MODE_CKIP40 5 129 #define RT2573_MODE_CKIP104 6 130 131 /* possible flags for register RT2573_MAC_CSR1 */ 132 #define RT2573_RESET_ASIC (1 << 0) 133 #define RT2573_RESET_BBP (1 << 1) 134 #define RT2573_HOST_READY (1 << 2) 135 136 /* possible flags for register MAC_CSR5 */ 137 #define RT2573_NUM_BSSID_MSK(n) (((n * 3) & 3) << 16) 138 139 /* possible flags for register TXRX_CSR0 */ 140 /* Tx filter flags are in the low 16 bits */ 141 #define RT2573_AUTO_TX_SEQ (1 << 15) 142 /* Rx filter flags are in the high 16 bits */ 143 #define RT2573_DISABLE_RX (1 << 16) 144 #define RT2573_DROP_CRC_ERROR (1 << 17) 145 #define RT2573_DROP_PHY_ERROR (1 << 18) 146 #define RT2573_DROP_CTL (1 << 19) 147 #define RT2573_DROP_NOT_TO_ME (1 << 20) 148 #define RT2573_DROP_TODS (1 << 21) 149 #define RT2573_DROP_VER_ERROR (1 << 22) 150 #define RT2573_DROP_MULTICAST (1 << 23) 151 #define RT2573_DROP_BROADCAST (1 << 24) 152 #define RT2573_DROP_ACKCTS (1 << 25) 153 154 /* possible flags for register TXRX_CSR4 */ 155 #define RT2573_SHORT_PREAMBLE (1 << 18) 156 #define RT2573_MRR_ENABLED (1 << 19) 157 #define RT2573_MRR_CCK_FALLBACK (1 << 22) 158 #define RT2573_LONG_RETRY(max) ((max) << 24) 159 #define RT2573_LONG_RETRY_MASK (0xf << 24) 160 #define RT2573_SHORT_RETRY(max) ((max) << 28) 161 #define RT2573_SHORT_RETRY_MASK (0xf << 28) 162 163 /* possible flags for register TXRX_CSR9 */ 164 #define RT2573_TSF_TIMER_EN (1 << 16) 165 #define RT2573_TSF_SYNC_MODE(x) (((x) & 0x3) << 17) 166 #define RT2573_TSF_SYNC_MODE_DIS 0 167 #define RT2573_TSF_SYNC_MODE_STA 1 168 #define RT2573_TSF_SYNC_MODE_IBSS 2 169 #define RT2573_TSF_SYNC_MODE_HOSTAP 3 170 #define RT2573_TBTT_TIMER_EN (1 << 19) 171 #define RT2573_BCN_TX_EN (1 << 20) 172 173 /* possible flags for register PHY_CSR0 */ 174 #define RT2573_PA_PE_2GHZ (1 << 16) 175 #define RT2573_PA_PE_5GHZ (1 << 17) 176 177 /* possible flags for register PHY_CSR3 */ 178 #define RT2573_BBP_READ (1 << 15) 179 #define RT2573_BBP_BUSY (1 << 16) 180 /* possible flags for register PHY_CSR4 */ 181 #define RT2573_RF_20BIT (20 << 24) 182 #define RT2573_RF_BUSY (1U << 31) 183 184 /* LED values */ 185 #define RT2573_LED_RADIO (1 << 8) 186 #define RT2573_LED_G (1 << 9) 187 #define RT2573_LED_A (1 << 10) 188 #define RT2573_LED_ON 0x1e1e 189 #define RT2573_LED_OFF 0x0 190 191 #define RT2573_MCU_RUN (1 << 3) 192 193 #define RT2573_SMART_MODE (1 << 0) 194 195 #define RT2573_BBPR94_DEFAULT 6 196 197 #define RT2573_BBP_WRITE (1 << 15) 198 199 /* dual-band RF */ 200 #define RT2573_RF_5226 1 201 #define RT2573_RF_5225 3 202 /* single-band RF */ 203 #define RT2573_RF_2528 2 204 #define RT2573_RF_2527 4 205 206 #define RT2573_BBP_VERSION 0 207 208 struct rum_tx_desc { 209 uint32_t flags; 210 #define RT2573_TX_BURST (1 << 0) 211 #define RT2573_TX_VALID (1 << 1) 212 #define RT2573_TX_MORE_FRAG (1 << 2) 213 #define RT2573_TX_NEED_ACK (1 << 3) 214 #define RT2573_TX_TIMESTAMP (1 << 4) 215 #define RT2573_TX_OFDM (1 << 5) 216 #define RT2573_TX_IFS_SIFS (1 << 6) 217 #define RT2573_TX_LONG_RETRY (1 << 7) 218 #define RT2573_TX_TKIPMIC (1 << 8) 219 #define RT2573_TX_KEY_PAIR (1 << 9) 220 #define RT2573_TX_KEY_ID(id) (((id) & 0x3f) << 10) 221 #define RT2573_TX_CIP_MODE(m) ((m) << 29) 222 223 uint16_t wme; 224 #define RT2573_QID(v) (v) 225 #define RT2573_AIFSN(v) ((v) << 4) 226 #define RT2573_LOGCWMIN(v) ((v) << 8) 227 #define RT2573_LOGCWMAX(v) ((v) << 12) 228 229 uint8_t hdrlen; 230 uint8_t xflags; 231 #define RT2573_TX_HWSEQ (1 << 4) 232 233 uint8_t plcp_signal; 234 uint8_t plcp_service; 235 #define RT2573_PLCP_LENGEXT 0x80 236 237 uint8_t plcp_length_lo; 238 uint8_t plcp_length_hi; 239 240 uint32_t iv; 241 uint32_t eiv; 242 243 uint8_t offset; 244 uint8_t qid; 245 uint8_t txpower; 246 #define RT2573_DEFAULT_TXPOWER 0 247 248 uint8_t reserved; 249 } __packed; 250 251 struct rum_rx_desc { 252 uint32_t flags; 253 #define RT2573_RX_BUSY (1 << 0) 254 #define RT2573_RX_DROP (1 << 1) 255 #define RT2573_RX_UC2ME (1 << 2) 256 #define RT2573_RX_MC (1 << 3) 257 #define RT2573_RX_BC (1 << 4) 258 #define RT2573_RX_MYBSS (1 << 5) 259 #define RT2573_RX_CRC_ERROR (1 << 6) 260 #define RT2573_RX_OFDM (1 << 7) 261 262 #define RT2573_RX_DEC_MASK (3 << 8) 263 #define RT2573_RX_DEC_OK (0 << 8) 264 265 #define RT2573_RX_IV_ERROR (1 << 8) 266 #define RT2573_RX_MIC_ERROR (2 << 8) 267 #define RT2573_RX_KEY_ERROR (3 << 8) 268 269 #define RT2573_RX_KEY_PAIR (1 << 28) 270 271 #define RT2573_RX_CIP_MASK (7 << 29) 272 #define RT2573_RX_CIP_MODE(m) ((m) << 29) 273 274 uint8_t rate; 275 uint8_t rssi; 276 uint8_t reserved1; 277 uint8_t offset; 278 uint32_t iv; 279 uint32_t eiv; 280 uint32_t reserved2[2]; 281 } __packed; 282 283 #define RT2573_RF1 0 284 #define RT2573_RF2 2 285 #define RT2573_RF3 1 286 #define RT2573_RF4 3 287 288 #define RT2573_EEPROM_MACBBP 0x0000 289 #define RT2573_EEPROM_ADDRESS 0x0004 290 #define RT2573_EEPROM_ANTENNA 0x0020 291 #define RT2573_EEPROM_CONFIG2 0x0022 292 #define RT2573_EEPROM_BBP_BASE 0x0026 293 #define RT2573_EEPROM_TXPOWER 0x0046 294 #define RT2573_EEPROM_FREQ_OFFSET 0x005e 295 #define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 296 #define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 297