1 /* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 #include <sys/cdefs.h> 19 __FBSDID("$FreeBSD$"); 20 21 /* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o 11n support 26 * o h/w crypto 27 * o hostap / ibss / mesh 28 */ 29 #include <sys/param.h> 30 #include <sys/endian.h> 31 #include <sys/sockio.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/rman.h> 39 #include <sys/firmware.h> 40 #include <sys/module.h> 41 42 #include <machine/bus.h> 43 #include <machine/resource.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_var.h> 48 #include <net/if_arp.h> 49 #include <net/if_dl.h> 50 #include <net/if_media.h> 51 #include <net/if_types.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/if_ether.h> 57 #include <netinet/ip.h> 58 59 #include <net80211/ieee80211_var.h> 60 #include <net80211/ieee80211_regdomain.h> 61 #include <net80211/ieee80211_radiotap.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include "usbdevs.h" 66 67 #define USB_DEBUG_VAR rsu_debug 68 #include <dev/usb/usb_debug.h> 69 70 #include <dev/usb/wlan/if_rsureg.h> 71 72 #ifdef USB_DEBUG 73 static int rsu_debug = 0; 74 SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 75 SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 76 "Debug level"); 77 #endif 78 79 static const STRUCT_USB_HOST_ID rsu_devs[] = { 80 #define RSU_HT_NOT_SUPPORTED 0 81 #define RSU_HT_SUPPORTED 1 82 #define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 83 RSU_HT_SUPPORTED) } 84 #define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 85 RSU_HT_NOT_SUPPORTED) } 86 RSU_DEV(ASUS, RTL8192SU), 87 RSU_DEV(AZUREWAVE, RTL8192SU_4), 88 RSU_DEV_HT(ACCTON, RTL8192SU), 89 RSU_DEV_HT(ASUS, USBN10), 90 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 91 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 92 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 93 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 94 RSU_DEV_HT(BELKIN, RTL8192SU_1), 95 RSU_DEV_HT(BELKIN, RTL8192SU_2), 96 RSU_DEV_HT(BELKIN, RTL8192SU_3), 97 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 98 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 99 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 100 RSU_DEV_HT(COREGA, RTL8192SU), 101 RSU_DEV_HT(DLINK2, DWA131A1), 102 RSU_DEV_HT(DLINK2, RTL8192SU_1), 103 RSU_DEV_HT(DLINK2, RTL8192SU_2), 104 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 105 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 106 RSU_DEV_HT(EDIMAX, EW7622UMN), 107 RSU_DEV_HT(GUILLEMOT, HWGUN54), 108 RSU_DEV_HT(GUILLEMOT, HWNUM300), 109 RSU_DEV_HT(HAWKING, RTL8192SU_1), 110 RSU_DEV_HT(HAWKING, RTL8192SU_2), 111 RSU_DEV_HT(PLANEX2, GWUSNANO), 112 RSU_DEV_HT(REALTEK, RTL8171), 113 RSU_DEV_HT(REALTEK, RTL8172), 114 RSU_DEV_HT(REALTEK, RTL8173), 115 RSU_DEV_HT(REALTEK, RTL8174), 116 RSU_DEV_HT(REALTEK, RTL8192SU), 117 RSU_DEV_HT(REALTEK, RTL8712), 118 RSU_DEV_HT(REALTEK, RTL8713), 119 RSU_DEV_HT(SENAO, RTL8192SU_1), 120 RSU_DEV_HT(SENAO, RTL8192SU_2), 121 RSU_DEV_HT(SITECOMEU, WL349V1), 122 RSU_DEV_HT(SITECOMEU, WL353), 123 RSU_DEV_HT(SWEEX2, LW154), 124 RSU_DEV_HT(TRENDNET, TEW646UBH), 125 #undef RSU_DEV_HT 126 #undef RSU_DEV 127 }; 128 129 static device_probe_t rsu_match; 130 static device_attach_t rsu_attach; 131 static device_detach_t rsu_detach; 132 static usb_callback_t rsu_bulk_tx_callback_be_bk; 133 static usb_callback_t rsu_bulk_tx_callback_vi_vo; 134 static usb_callback_t rsu_bulk_rx_callback; 135 static usb_error_t rsu_do_request(struct rsu_softc *, 136 struct usb_device_request *, void *); 137 static struct ieee80211vap * 138 rsu_vap_create(struct ieee80211com *, const char name[], 139 int, enum ieee80211_opmode, int, const uint8_t bssid[], 140 const uint8_t mac[]); 141 static void rsu_vap_delete(struct ieee80211vap *); 142 static void rsu_scan_start(struct ieee80211com *); 143 static void rsu_scan_end(struct ieee80211com *); 144 static void rsu_set_channel(struct ieee80211com *); 145 static void rsu_update_mcast(struct ieee80211com *); 146 static int rsu_alloc_rx_list(struct rsu_softc *); 147 static void rsu_free_rx_list(struct rsu_softc *); 148 static int rsu_alloc_tx_list(struct rsu_softc *); 149 static void rsu_free_tx_list(struct rsu_softc *); 150 static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 151 static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 152 static struct rsu_data *rsu_getbuf(struct rsu_softc *); 153 static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 154 int); 155 static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 156 static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 157 static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 158 static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 159 int); 160 static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 161 static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 162 static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 163 static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 164 static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 165 static int rsu_read_rom(struct rsu_softc *); 166 static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 167 static void rsu_calib_task(void *, int); 168 static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 169 #ifdef notyet 170 static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 171 static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 172 #endif 173 static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 174 static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 175 static int rsu_disconnect(struct rsu_softc *); 176 static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 177 static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 178 static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 179 static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 180 static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 181 static struct mbuf * 182 rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *); 183 static struct mbuf * 184 rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *); 185 static struct mbuf * 186 rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *); 187 static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 188 static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 189 const struct ieee80211_bpf_params *); 190 static void rsu_init(void *); 191 static void rsu_init_locked(struct rsu_softc *); 192 static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 193 struct mbuf *, struct rsu_data *); 194 static void rsu_start(struct ifnet *); 195 static void rsu_start_locked(struct ifnet *); 196 static int rsu_ioctl(struct ifnet *, u_long, caddr_t); 197 static void rsu_stop(struct ifnet *, int); 198 static void rsu_stop_locked(struct ifnet *, int); 199 static void rsu_ms_delay(struct rsu_softc *); 200 201 static device_method_t rsu_methods[] = { 202 DEVMETHOD(device_probe, rsu_match), 203 DEVMETHOD(device_attach, rsu_attach), 204 DEVMETHOD(device_detach, rsu_detach), 205 206 DEVMETHOD_END 207 }; 208 209 static driver_t rsu_driver = { 210 .name = "rsu", 211 .methods = rsu_methods, 212 .size = sizeof(struct rsu_softc) 213 }; 214 215 static devclass_t rsu_devclass; 216 217 DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 218 MODULE_DEPEND(rsu, wlan, 1, 1, 1); 219 MODULE_DEPEND(rsu, usb, 1, 1, 1); 220 MODULE_DEPEND(rsu, firmware, 1, 1, 1); 221 MODULE_VERSION(rsu, 1); 222 223 static uint8_t rsu_wme_ac_xfer_map[4] = { 224 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 225 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 226 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 227 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 228 }; 229 230 static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 231 [RSU_BULK_RX] = { 232 .type = UE_BULK, 233 .endpoint = UE_ADDR_ANY, 234 .direction = UE_DIR_IN, 235 .bufsize = RSU_RXBUFSZ, 236 .flags = { 237 .pipe_bof = 1, 238 .short_xfer_ok = 1 239 }, 240 .callback = rsu_bulk_rx_callback 241 }, 242 [RSU_BULK_TX_BE_BK] = { 243 .type = UE_BULK, 244 .endpoint = 0x06, 245 .direction = UE_DIR_OUT, 246 .bufsize = RSU_TXBUFSZ, 247 .flags = { 248 .ext_buffer = 1, 249 .pipe_bof = 1, 250 .force_short_xfer = 1 251 }, 252 .callback = rsu_bulk_tx_callback_be_bk, 253 .timeout = RSU_TX_TIMEOUT 254 }, 255 [RSU_BULK_TX_VI_VO] = { 256 .type = UE_BULK, 257 .endpoint = 0x04, 258 .direction = UE_DIR_OUT, 259 .bufsize = RSU_TXBUFSZ, 260 .flags = { 261 .ext_buffer = 1, 262 .pipe_bof = 1, 263 .force_short_xfer = 1 264 }, 265 .callback = rsu_bulk_tx_callback_vi_vo, 266 .timeout = RSU_TX_TIMEOUT 267 }, 268 }; 269 270 static int 271 rsu_match(device_t self) 272 { 273 struct usb_attach_arg *uaa = device_get_ivars(self); 274 275 if (uaa->usb_mode != USB_MODE_HOST || 276 uaa->info.bIfaceIndex != 0 || 277 uaa->info.bConfigIndex != 0) 278 return (ENXIO); 279 280 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 281 } 282 283 static int 284 rsu_attach(device_t self) 285 { 286 struct usb_attach_arg *uaa = device_get_ivars(self); 287 struct rsu_softc *sc = device_get_softc(self); 288 struct ifnet *ifp; 289 struct ieee80211com *ic; 290 int error; 291 uint8_t iface_index, bands; 292 293 device_set_usb_desc(self); 294 sc->sc_udev = uaa->device; 295 sc->sc_dev = self; 296 297 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 298 MTX_DEF); 299 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 300 rsu_calib_task, sc); 301 302 /* Allocate Tx/Rx buffers. */ 303 error = rsu_alloc_rx_list(sc); 304 if (error != 0) { 305 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 306 goto fail_usb; 307 } 308 309 error = rsu_alloc_tx_list(sc); 310 if (error != 0) { 311 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 312 rsu_free_rx_list(sc); 313 goto fail_usb; 314 } 315 316 iface_index = 0; 317 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 318 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 319 if (error) { 320 device_printf(sc->sc_dev, 321 "could not allocate USB transfers, err=%s\n", 322 usbd_errstr(error)); 323 goto fail_usb; 324 } 325 RSU_LOCK(sc); 326 /* Read chip revision. */ 327 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 328 if (sc->cut != 3) 329 sc->cut = (sc->cut >> 1) + 1; 330 error = rsu_read_rom(sc); 331 RSU_UNLOCK(sc); 332 if (error != 0) { 333 device_printf(self, "could not read ROM\n"); 334 goto fail_rom; 335 } 336 IEEE80211_ADDR_COPY(sc->sc_bssid, &sc->rom[0x12]); 337 device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut); 338 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 339 if (ifp == NULL) { 340 device_printf(self, "cannot allocate interface\n"); 341 goto fail_ifalloc; 342 } 343 ic = ifp->if_l2com; 344 ifp->if_softc = sc; 345 if_initname(ifp, "rsu", device_get_unit(self)); 346 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 347 ifp->if_init = rsu_init; 348 ifp->if_ioctl = rsu_ioctl; 349 ifp->if_start = rsu_start; 350 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 351 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 352 IFQ_SET_READY(&ifp->if_snd); 353 ifp->if_capabilities |= IFCAP_RXCSUM; 354 ifp->if_capenable |= IFCAP_RXCSUM; 355 ifp->if_hwassist = CSUM_TCP; 356 357 ic->ic_ifp = ifp; 358 ic->ic_softc = sc; 359 ic->ic_name = device_get_nameunit(self); 360 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 361 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 362 363 /* Set device capabilities. */ 364 ic->ic_caps = 365 IEEE80211_C_STA | /* station mode */ 366 IEEE80211_C_BGSCAN | /* Background scan. */ 367 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 368 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 369 IEEE80211_C_WPA; /* WPA/RSN. */ 370 371 #if 0 372 /* Check if HT support is present. */ 373 if (usb_lookup(rsu_devs_noht, uaa->vendor, uaa->product) == NULL) { 374 /* Set HT capabilities. */ 375 ic->ic_htcaps = 376 IEEE80211_HTCAP_CBW20_40 | 377 IEEE80211_HTCAP_DSSSCCK40; 378 /* Set supported HT rates. */ 379 for (i = 0; i < 2; i++) 380 ic->ic_sup_mcs[i] = 0xff; 381 } 382 #endif 383 384 /* Set supported .11b and .11g rates. */ 385 bands = 0; 386 setbit(&bands, IEEE80211_MODE_11B); 387 setbit(&bands, IEEE80211_MODE_11G); 388 ieee80211_init_channels(ic, NULL, &bands); 389 390 ieee80211_ifattach(ic, sc->sc_bssid); 391 ic->ic_raw_xmit = rsu_raw_xmit; 392 ic->ic_scan_start = rsu_scan_start; 393 ic->ic_scan_end = rsu_scan_end; 394 ic->ic_set_channel = rsu_set_channel; 395 ic->ic_vap_create = rsu_vap_create; 396 ic->ic_vap_delete = rsu_vap_delete; 397 ic->ic_update_mcast = rsu_update_mcast; 398 399 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 400 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 401 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 402 RSU_RX_RADIOTAP_PRESENT); 403 404 if (bootverbose) 405 ieee80211_announce(ic); 406 407 return (0); 408 409 fail_ifalloc: 410 fail_rom: 411 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 412 fail_usb: 413 mtx_destroy(&sc->sc_mtx); 414 return (ENXIO); 415 } 416 417 static int 418 rsu_detach(device_t self) 419 { 420 struct rsu_softc *sc = device_get_softc(self); 421 struct ifnet *ifp = sc->sc_ifp; 422 struct ieee80211com *ic = ifp->if_l2com; 423 424 rsu_stop(ifp, 1); 425 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 426 ieee80211_ifdetach(ic); 427 428 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 429 430 /* Free Tx/Rx buffers. */ 431 rsu_free_tx_list(sc); 432 rsu_free_rx_list(sc); 433 434 if_free(ifp); 435 mtx_destroy(&sc->sc_mtx); 436 437 return (0); 438 } 439 440 static usb_error_t 441 rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 442 void *data) 443 { 444 usb_error_t err; 445 int ntries = 10; 446 447 RSU_ASSERT_LOCKED(sc); 448 449 while (ntries--) { 450 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 451 req, data, 0, NULL, 250 /* ms */); 452 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 453 break; 454 DPRINTFN(1, "Control request failed, %s (retrying)\n", 455 usbd_errstr(err)); 456 usb_pause_mtx(&sc->sc_mtx, hz / 100); 457 } 458 459 return (err); 460 } 461 462 static struct ieee80211vap * 463 rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 464 enum ieee80211_opmode opmode, int flags, 465 const uint8_t bssid[IEEE80211_ADDR_LEN], 466 const uint8_t mac[IEEE80211_ADDR_LEN]) 467 { 468 struct rsu_vap *uvp; 469 struct ieee80211vap *vap; 470 471 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 472 return (NULL); 473 474 uvp = (struct rsu_vap *) malloc(sizeof(struct rsu_vap), 475 M_80211_VAP, M_NOWAIT | M_ZERO); 476 if (uvp == NULL) 477 return (NULL); 478 vap = &uvp->vap; 479 480 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 481 flags, bssid, mac) != 0) { 482 /* out of memory */ 483 free(uvp, M_80211_VAP); 484 return (NULL); 485 } 486 487 /* override state transition machine */ 488 uvp->newstate = vap->iv_newstate; 489 vap->iv_newstate = rsu_newstate; 490 491 /* complete setup */ 492 ieee80211_vap_attach(vap, ieee80211_media_change, 493 ieee80211_media_status); 494 ic->ic_opmode = opmode; 495 496 return (vap); 497 } 498 499 static void 500 rsu_vap_delete(struct ieee80211vap *vap) 501 { 502 struct rsu_vap *uvp = RSU_VAP(vap); 503 504 ieee80211_vap_detach(vap); 505 free(uvp, M_80211_VAP); 506 } 507 508 static void 509 rsu_scan_start(struct ieee80211com *ic) 510 { 511 int error; 512 struct ifnet *ifp = ic->ic_ifp; 513 struct rsu_softc *sc = ifp->if_softc; 514 515 /* Scanning is done by the firmware. */ 516 RSU_LOCK(sc); 517 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 518 RSU_UNLOCK(sc); 519 if (error != 0) 520 device_printf(sc->sc_dev, 521 "could not send site survey command\n"); 522 } 523 524 static void 525 rsu_scan_end(struct ieee80211com *ic) 526 { 527 /* Nothing to do here. */ 528 } 529 530 static void 531 rsu_set_channel(struct ieee80211com *ic __unused) 532 { 533 /* We are unable to switch channels, yet. */ 534 } 535 536 static void 537 rsu_update_mcast(struct ieee80211com *ic) 538 { 539 /* XXX do nothing? */ 540 } 541 542 static int 543 rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 544 int ndata, int maxsz) 545 { 546 int i, error; 547 548 for (i = 0; i < ndata; i++) { 549 struct rsu_data *dp = &data[i]; 550 dp->sc = sc; 551 dp->m = NULL; 552 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 553 if (dp->buf == NULL) { 554 device_printf(sc->sc_dev, 555 "could not allocate buffer\n"); 556 error = ENOMEM; 557 goto fail; 558 } 559 dp->ni = NULL; 560 } 561 562 return (0); 563 fail: 564 rsu_free_list(sc, data, ndata); 565 return (error); 566 } 567 568 static int 569 rsu_alloc_rx_list(struct rsu_softc *sc) 570 { 571 int error, i; 572 573 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 574 RSU_RXBUFSZ); 575 if (error != 0) 576 return (error); 577 578 STAILQ_INIT(&sc->sc_rx_active); 579 STAILQ_INIT(&sc->sc_rx_inactive); 580 581 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 582 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 583 584 return (0); 585 } 586 587 static int 588 rsu_alloc_tx_list(struct rsu_softc *sc) 589 { 590 int error, i; 591 592 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 593 RSU_TXBUFSZ); 594 if (error != 0) 595 return (error); 596 597 STAILQ_INIT(&sc->sc_tx_inactive); 598 599 for (i = 0; i != RSU_N_TRANSFER; i++) { 600 STAILQ_INIT(&sc->sc_tx_active[i]); 601 STAILQ_INIT(&sc->sc_tx_pending[i]); 602 } 603 604 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 605 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 606 } 607 608 return (0); 609 } 610 611 static void 612 rsu_free_tx_list(struct rsu_softc *sc) 613 { 614 int i; 615 616 /* prevent further allocations from TX list(s) */ 617 STAILQ_INIT(&sc->sc_tx_inactive); 618 619 for (i = 0; i != RSU_N_TRANSFER; i++) { 620 STAILQ_INIT(&sc->sc_tx_active[i]); 621 STAILQ_INIT(&sc->sc_tx_pending[i]); 622 } 623 624 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 625 } 626 627 static void 628 rsu_free_rx_list(struct rsu_softc *sc) 629 { 630 /* prevent further allocations from RX list(s) */ 631 STAILQ_INIT(&sc->sc_rx_inactive); 632 STAILQ_INIT(&sc->sc_rx_active); 633 634 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 635 } 636 637 static void 638 rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 639 { 640 int i; 641 642 for (i = 0; i < ndata; i++) { 643 struct rsu_data *dp = &data[i]; 644 645 if (dp->buf != NULL) { 646 free(dp->buf, M_USBDEV); 647 dp->buf = NULL; 648 } 649 if (dp->ni != NULL) { 650 ieee80211_free_node(dp->ni); 651 dp->ni = NULL; 652 } 653 } 654 } 655 656 static struct rsu_data * 657 _rsu_getbuf(struct rsu_softc *sc) 658 { 659 struct rsu_data *bf; 660 661 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 662 if (bf != NULL) 663 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 664 else 665 bf = NULL; 666 if (bf == NULL) 667 DPRINTF("out of xmit buffers\n"); 668 return (bf); 669 } 670 671 static struct rsu_data * 672 rsu_getbuf(struct rsu_softc *sc) 673 { 674 struct rsu_data *bf; 675 676 RSU_ASSERT_LOCKED(sc); 677 678 bf = _rsu_getbuf(sc); 679 if (bf == NULL) { 680 struct ifnet *ifp = sc->sc_ifp; 681 DPRINTF("stop queue\n"); 682 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 683 } 684 return (bf); 685 } 686 687 static int 688 rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 689 int len) 690 { 691 usb_device_request_t req; 692 693 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 694 req.bRequest = R92S_REQ_REGS; 695 USETW(req.wValue, addr); 696 USETW(req.wIndex, 0); 697 USETW(req.wLength, len); 698 699 return (rsu_do_request(sc, &req, buf)); 700 } 701 702 static void 703 rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 704 { 705 rsu_write_region_1(sc, addr, &val, 1); 706 } 707 708 static void 709 rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 710 { 711 val = htole16(val); 712 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 713 } 714 715 static void 716 rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 717 { 718 val = htole32(val); 719 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 720 } 721 722 static int 723 rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 724 int len) 725 { 726 usb_device_request_t req; 727 728 req.bmRequestType = UT_READ_VENDOR_DEVICE; 729 req.bRequest = R92S_REQ_REGS; 730 USETW(req.wValue, addr); 731 USETW(req.wIndex, 0); 732 USETW(req.wLength, len); 733 734 return (rsu_do_request(sc, &req, buf)); 735 } 736 737 static uint8_t 738 rsu_read_1(struct rsu_softc *sc, uint16_t addr) 739 { 740 uint8_t val; 741 742 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 743 return (0xff); 744 return (val); 745 } 746 747 static uint16_t 748 rsu_read_2(struct rsu_softc *sc, uint16_t addr) 749 { 750 uint16_t val; 751 752 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 753 return (0xffff); 754 return (le16toh(val)); 755 } 756 757 static uint32_t 758 rsu_read_4(struct rsu_softc *sc, uint16_t addr) 759 { 760 uint32_t val; 761 762 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 763 return (0xffffffff); 764 return (le32toh(val)); 765 } 766 767 static int 768 rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 769 { 770 int ntries; 771 772 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 773 rsu_ms_delay(sc); 774 for (ntries = 0; ntries < 50; ntries++) { 775 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 776 return (0); 777 rsu_ms_delay(sc); 778 } 779 return (ETIMEDOUT); 780 } 781 782 static uint8_t 783 rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 784 { 785 uint32_t reg; 786 int ntries; 787 788 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 789 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 790 reg &= ~R92S_EFUSE_CTRL_VALID; 791 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 792 /* Wait for read operation to complete. */ 793 for (ntries = 0; ntries < 100; ntries++) { 794 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 795 if (reg & R92S_EFUSE_CTRL_VALID) 796 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 797 rsu_ms_delay(sc); 798 } 799 device_printf(sc->sc_dev, 800 "could not read efuse byte at address 0x%x\n", addr); 801 return (0xff); 802 } 803 804 static int 805 rsu_read_rom(struct rsu_softc *sc) 806 { 807 uint8_t *rom = sc->rom; 808 uint16_t addr = 0; 809 uint32_t reg; 810 uint8_t off, msk; 811 int i; 812 813 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 814 reg = rsu_read_1(sc, R92S_EE_9346CR); 815 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 816 return (EIO); 817 818 /* Turn on 2.5V to prevent eFuse leakage. */ 819 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 820 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 821 rsu_ms_delay(sc); 822 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 823 824 /* Read full ROM image. */ 825 memset(&sc->rom, 0xff, sizeof(sc->rom)); 826 while (addr < 512) { 827 reg = rsu_efuse_read_1(sc, addr); 828 if (reg == 0xff) 829 break; 830 addr++; 831 off = reg >> 4; 832 msk = reg & 0xf; 833 for (i = 0; i < 4; i++) { 834 if (msk & (1 << i)) 835 continue; 836 rom[off * 8 + i * 2 + 0] = 837 rsu_efuse_read_1(sc, addr); 838 addr++; 839 rom[off * 8 + i * 2 + 1] = 840 rsu_efuse_read_1(sc, addr); 841 addr++; 842 } 843 } 844 #ifdef USB_DEBUG 845 if (rsu_debug >= 5) { 846 /* Dump ROM content. */ 847 printf("\n"); 848 for (i = 0; i < sizeof(sc->rom); i++) 849 printf("%02x:", rom[i]); 850 printf("\n"); 851 } 852 #endif 853 return (0); 854 } 855 856 static int 857 rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 858 { 859 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 860 struct rsu_data *data; 861 struct r92s_tx_desc *txd; 862 struct r92s_fw_cmd_hdr *cmd; 863 int cmdsz; 864 int xferlen; 865 866 data = rsu_getbuf(sc); 867 if (data == NULL) 868 return (ENOMEM); 869 870 /* Round-up command length to a multiple of 8 bytes. */ 871 cmdsz = (len + 7) & ~7; 872 873 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 874 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 875 memset(data->buf, 0, xferlen); 876 877 /* Setup Tx descriptor. */ 878 txd = (struct r92s_tx_desc *)data->buf; 879 txd->txdw0 = htole32( 880 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 881 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 882 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 883 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 884 885 /* Setup command header. */ 886 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 887 cmd->len = htole16(cmdsz); 888 cmd->code = code; 889 cmd->seq = sc->cmd_seq; 890 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 891 892 /* Copy command payload. */ 893 memcpy(&cmd[1], buf, len); 894 895 DPRINTFN(2, "Tx cmd code=0x%x len=0x%x\n", code, cmdsz); 896 data->buflen = xferlen; 897 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 898 usbd_transfer_start(sc->sc_xfer[which]); 899 900 return (0); 901 } 902 903 /* ARGSUSED */ 904 static void 905 rsu_calib_task(void *arg, int pending __unused) 906 { 907 struct rsu_softc *sc = arg; 908 uint32_t reg; 909 910 DPRINTFN(6, "running calibration task\n"); 911 912 RSU_LOCK(sc); 913 #ifdef notyet 914 /* Read WPS PBC status. */ 915 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 916 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 917 rsu_write_1(sc, R92S_GPIO_IO_SEL, 918 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 919 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 920 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 921 DPRINTF(("WPS PBC is pushed\n")); 922 #endif 923 /* Read current signal level. */ 924 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 925 reg = rsu_read_4(sc, R92S_IOCMD_DATA); 926 DPRINTFN(8, "RSSI=%d%%\n", reg >> 4); 927 } 928 if (sc->sc_calibrating) 929 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 930 RSU_UNLOCK(sc); 931 } 932 933 static int 934 rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 935 { 936 struct rsu_vap *uvp = RSU_VAP(vap); 937 struct ieee80211com *ic = vap->iv_ic; 938 struct rsu_softc *sc = ic->ic_ifp->if_softc; 939 struct ieee80211_node *ni; 940 struct ieee80211_rateset *rs; 941 enum ieee80211_state ostate; 942 int error, startcal = 0; 943 944 ostate = vap->iv_state; 945 DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 946 ieee80211_state_name[nstate]); 947 948 IEEE80211_UNLOCK(ic); 949 if (ostate == IEEE80211_S_RUN) { 950 RSU_LOCK(sc); 951 /* Stop calibration. */ 952 sc->sc_calibrating = 0; 953 RSU_UNLOCK(sc); 954 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 955 /* Disassociate from our current BSS. */ 956 RSU_LOCK(sc); 957 rsu_disconnect(sc); 958 } else 959 RSU_LOCK(sc); 960 switch (nstate) { 961 case IEEE80211_S_INIT: 962 break; 963 case IEEE80211_S_AUTH: 964 ni = ieee80211_ref_node(vap->iv_bss); 965 error = rsu_join_bss(sc, ni); 966 ieee80211_free_node(ni); 967 if (error != 0) { 968 device_printf(sc->sc_dev, 969 "could not send join command\n"); 970 } 971 break; 972 case IEEE80211_S_RUN: 973 ni = ieee80211_ref_node(vap->iv_bss); 974 rs = &ni->ni_rates; 975 /* Indicate highest supported rate. */ 976 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 977 ieee80211_free_node(ni); 978 startcal = 1; 979 break; 980 default: 981 break; 982 } 983 sc->sc_calibrating = 1; 984 /* Start periodic calibration. */ 985 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 986 RSU_UNLOCK(sc); 987 IEEE80211_LOCK(ic); 988 return (uvp->newstate(vap, nstate, arg)); 989 } 990 991 #ifdef notyet 992 static void 993 rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 994 { 995 struct r92s_fw_cmd_set_key key; 996 997 memset(&key, 0, sizeof(key)); 998 /* Map net80211 cipher to HW crypto algorithm. */ 999 switch (k->wk_cipher->ic_cipher) { 1000 case IEEE80211_CIPHER_WEP: 1001 if (k->wk_keylen < 8) 1002 key.algo = R92S_KEY_ALGO_WEP40; 1003 else 1004 key.algo = R92S_KEY_ALGO_WEP104; 1005 break; 1006 case IEEE80211_CIPHER_TKIP: 1007 key.algo = R92S_KEY_ALGO_TKIP; 1008 break; 1009 case IEEE80211_CIPHER_AES_CCM: 1010 key.algo = R92S_KEY_ALGO_AES; 1011 break; 1012 default: 1013 return; 1014 } 1015 key.id = k->wk_keyix; 1016 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1017 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1018 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1019 } 1020 1021 static void 1022 rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1023 { 1024 struct r92s_fw_cmd_set_key key; 1025 1026 memset(&key, 0, sizeof(key)); 1027 key.id = k->wk_keyix; 1028 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1029 } 1030 #endif 1031 1032 static int 1033 rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1034 { 1035 struct r92s_fw_cmd_sitesurvey cmd; 1036 struct ifnet *ifp = sc->sc_ifp; 1037 struct ieee80211com *ic = ifp->if_l2com; 1038 1039 memset(&cmd, 0, sizeof(cmd)); 1040 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->scan_pass == 1) 1041 cmd.active = htole32(1); 1042 cmd.limit = htole32(48); 1043 if (sc->scan_pass == 1 && vap->iv_des_nssid > 0) { 1044 /* Do a directed scan for second pass. */ 1045 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1046 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1047 vap->iv_des_ssid[0].len); 1048 1049 } 1050 DPRINTF("sending site survey command, pass=%d\n", sc->scan_pass); 1051 return (rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd))); 1052 } 1053 1054 static int 1055 rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1056 { 1057 struct ifnet *ifp = sc->sc_ifp; 1058 struct ieee80211com *ic = ifp->if_l2com; 1059 struct ieee80211vap *vap = ni->ni_vap; 1060 struct ndis_wlan_bssid_ex *bss; 1061 struct ndis_802_11_fixed_ies *fixed; 1062 struct r92s_fw_cmd_auth auth; 1063 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1064 uint8_t *frm; 1065 uint8_t opmode; 1066 int error; 1067 1068 /* Let the FW decide the opmode based on the capinfo field. */ 1069 opmode = NDIS802_11AUTOUNKNOWN; 1070 DPRINTF("setting operating mode to %d\n", opmode); 1071 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1072 if (error != 0) 1073 return (error); 1074 1075 memset(&auth, 0, sizeof(auth)); 1076 if (vap->iv_flags & IEEE80211_F_WPA) { 1077 auth.mode = R92S_AUTHMODE_WPA; 1078 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1079 } else 1080 auth.mode = R92S_AUTHMODE_OPEN; 1081 DPRINTF("setting auth mode to %d\n", auth.mode); 1082 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1083 if (error != 0) 1084 return (error); 1085 1086 memset(buf, 0, sizeof(buf)); 1087 bss = (struct ndis_wlan_bssid_ex *)buf; 1088 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1089 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1090 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1091 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1092 bss->privacy = htole32(1); 1093 bss->rssi = htole32(ni->ni_avgrssi); 1094 if (ic->ic_curmode == IEEE80211_MODE_11B) 1095 bss->networktype = htole32(NDIS802_11DS); 1096 else 1097 bss->networktype = htole32(NDIS802_11OFDM24); 1098 bss->config.len = htole32(sizeof(bss->config)); 1099 bss->config.bintval = htole32(ni->ni_intval); 1100 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1101 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1102 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1103 ni->ni_rates.rs_nrates); 1104 /* Write the fixed fields of the beacon frame. */ 1105 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1106 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1107 fixed->bintval = htole16(ni->ni_intval); 1108 fixed->capabilities = htole16(ni->ni_capinfo); 1109 /* Write IEs to be included in the association request. */ 1110 frm = (uint8_t *)&fixed[1]; 1111 frm = ieee80211_add_rsn(frm, vap); 1112 frm = ieee80211_add_wpa(frm, vap); 1113 frm = ieee80211_add_qos(frm, ni); 1114 if (ni->ni_flags & IEEE80211_NODE_HT) 1115 frm = ieee80211_add_htcap(frm, ni); 1116 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1117 bss->len = htole32(((frm - buf) + 3) & ~3); 1118 DPRINTF("sending join bss command to %s chan %d\n", 1119 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1120 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1121 } 1122 1123 static int 1124 rsu_disconnect(struct rsu_softc *sc) 1125 { 1126 uint32_t zero = 0; /* :-) */ 1127 1128 /* Disassociate from our current BSS. */ 1129 DPRINTF("sending disconnect command\n"); 1130 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1131 } 1132 1133 static void 1134 rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1135 { 1136 struct ifnet *ifp = sc->sc_ifp; 1137 struct ieee80211com *ic = ifp->if_l2com; 1138 struct ieee80211_frame *wh; 1139 struct ieee80211_channel *c; 1140 struct ndis_wlan_bssid_ex *bss; 1141 struct mbuf *m; 1142 int pktlen; 1143 1144 if (__predict_false(len < sizeof(*bss))) 1145 return; 1146 bss = (struct ndis_wlan_bssid_ex *)buf; 1147 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1148 return; 1149 1150 DPRINTFN(2, "found BSS %s: len=%d chan=%d inframode=%d " 1151 "networktype=%d privacy=%d\n", 1152 ether_sprintf(bss->macaddr), le32toh(bss->len), 1153 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1154 le32toh(bss->networktype), le32toh(bss->privacy)); 1155 1156 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1157 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1158 if (__predict_false(pktlen > MCLBYTES)) 1159 return; 1160 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1161 if (__predict_false(m == NULL)) 1162 return; 1163 wh = mtod(m, struct ieee80211_frame *); 1164 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1165 IEEE80211_FC0_SUBTYPE_BEACON; 1166 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1167 USETW(wh->i_dur, 0); 1168 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr); 1169 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1170 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1171 *(uint16_t *)wh->i_seq = 0; 1172 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1173 1174 /* Finalize mbuf. */ 1175 m->m_pkthdr.len = m->m_len = pktlen; 1176 m->m_pkthdr.rcvif = ifp; 1177 /* Fix the channel. */ 1178 c = ieee80211_find_channel_byieee(ic, 1179 le32toh(bss->config.dsconfig), 1180 IEEE80211_CHAN_G); 1181 if (c) { 1182 ic->ic_curchan = c; 1183 ieee80211_radiotap_chan_change(ic); 1184 } 1185 /* XXX avoid a LOR */ 1186 RSU_UNLOCK(sc); 1187 ieee80211_input_all(ic, m, le32toh(bss->rssi), 0); 1188 RSU_LOCK(sc); 1189 } 1190 1191 static void 1192 rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1193 { 1194 struct ifnet *ifp = sc->sc_ifp; 1195 struct ieee80211com *ic = ifp->if_l2com; 1196 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1197 struct ieee80211_node *ni = vap->iv_bss; 1198 struct r92s_event_join_bss *rsp; 1199 uint32_t tmp; 1200 int res; 1201 1202 if (__predict_false(len < sizeof(*rsp))) 1203 return; 1204 rsp = (struct r92s_event_join_bss *)buf; 1205 res = (int)le32toh(rsp->join_res); 1206 1207 DPRINTF("Rx join BSS event len=%d res=%d\n", len, res); 1208 if (res <= 0) { 1209 RSU_UNLOCK(sc); 1210 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1211 RSU_LOCK(sc); 1212 return; 1213 } 1214 tmp = le32toh(rsp->associd); 1215 if (tmp >= vap->iv_max_aid) { 1216 DPRINTF("Assoc ID overflow\n"); 1217 tmp = 1; 1218 } 1219 DPRINTF("associated with %s associd=%d\n", 1220 ether_sprintf(rsp->bss.macaddr), tmp); 1221 ni->ni_associd = tmp | 0xc000; 1222 RSU_UNLOCK(sc); 1223 ieee80211_new_state(vap, IEEE80211_S_RUN, 1224 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1225 RSU_LOCK(sc); 1226 } 1227 1228 static void 1229 rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1230 { 1231 struct ifnet *ifp = sc->sc_ifp; 1232 struct ieee80211com *ic = ifp->if_l2com; 1233 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1234 1235 DPRINTFN(4, "Rx event code=%d len=%d\n", code, len); 1236 switch (code) { 1237 case R92S_EVT_SURVEY: 1238 if (vap->iv_state == IEEE80211_S_SCAN) 1239 rsu_event_survey(sc, buf, len); 1240 break; 1241 case R92S_EVT_SURVEY_DONE: 1242 DPRINTF("site survey pass %d done, found %d BSS\n", 1243 sc->scan_pass, le32toh(*(uint32_t *)buf)); 1244 if (vap->iv_state != IEEE80211_S_SCAN) 1245 break; /* Ignore if not scanning. */ 1246 if (sc->scan_pass == 0 && vap->iv_des_nssid != 0) { 1247 /* Schedule a directed scan for hidden APs. */ 1248 sc->scan_pass = 1; 1249 RSU_UNLOCK(sc); 1250 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1251 RSU_LOCK(sc); 1252 break; 1253 } 1254 sc->scan_pass = 0; 1255 break; 1256 case R92S_EVT_JOIN_BSS: 1257 if (vap->iv_state == IEEE80211_S_AUTH) 1258 rsu_event_join_bss(sc, buf, len); 1259 break; 1260 #if 0 1261 XXX This event is occurring regularly, possibly due to some power saving event 1262 XXX and disrupts the WLAN traffic. Disable for now. 1263 case R92S_EVT_DEL_STA: 1264 DPRINTF("disassociated from %s\n", ether_sprintf(buf)); 1265 if (vap->iv_state == IEEE80211_S_RUN && 1266 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1267 RSU_UNLOCK(sc); 1268 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1269 RSU_LOCK(sc); 1270 } 1271 break; 1272 #endif 1273 case R92S_EVT_WPS_PBC: 1274 DPRINTF("WPS PBC pushed.\n"); 1275 break; 1276 case R92S_EVT_FWDBG: 1277 if (ifp->if_flags & IFF_DEBUG) { 1278 buf[60] = '\0'; 1279 printf("FWDBG: %s\n", (char *)buf); 1280 } 1281 break; 1282 default: 1283 break; 1284 } 1285 } 1286 1287 static void 1288 rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1289 { 1290 struct r92s_fw_cmd_hdr *cmd; 1291 int cmdsz; 1292 1293 DPRINTFN(6, "Rx events len=%d\n", len); 1294 1295 /* Skip Rx status. */ 1296 buf += sizeof(struct r92s_rx_stat); 1297 len -= sizeof(struct r92s_rx_stat); 1298 1299 /* Process all events. */ 1300 for (;;) { 1301 /* Check that command header fits. */ 1302 if (__predict_false(len < sizeof(*cmd))) 1303 break; 1304 cmd = (struct r92s_fw_cmd_hdr *)buf; 1305 /* Check that command payload fits. */ 1306 cmdsz = le16toh(cmd->len); 1307 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1308 break; 1309 1310 /* Process firmware event. */ 1311 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1312 1313 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1314 break; 1315 buf += sizeof(*cmd) + cmdsz; 1316 len -= sizeof(*cmd) + cmdsz; 1317 } 1318 } 1319 1320 static int8_t 1321 rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1322 { 1323 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1324 struct r92s_rx_phystat *phy; 1325 struct r92s_rx_cck *cck; 1326 uint8_t rpt; 1327 int8_t rssi; 1328 1329 if (rate <= 3) { 1330 cck = (struct r92s_rx_cck *)physt; 1331 rpt = (cck->agc_rpt >> 6) & 0x3; 1332 rssi = cck->agc_rpt & 0x3e; 1333 rssi = cckoff[rpt] - rssi; 1334 } else { /* OFDM/HT. */ 1335 phy = (struct r92s_rx_phystat *)physt; 1336 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1337 } 1338 return (rssi); 1339 } 1340 1341 static struct mbuf * 1342 rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi) 1343 { 1344 struct ifnet *ifp = sc->sc_ifp; 1345 struct ieee80211com *ic = ifp->if_l2com; 1346 struct ieee80211_frame *wh; 1347 struct r92s_rx_stat *stat; 1348 uint32_t rxdw0, rxdw3; 1349 struct mbuf *m; 1350 uint8_t rate; 1351 int infosz; 1352 1353 stat = (struct r92s_rx_stat *)buf; 1354 rxdw0 = le32toh(stat->rxdw0); 1355 rxdw3 = le32toh(stat->rxdw3); 1356 1357 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1358 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1359 return NULL; 1360 } 1361 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1362 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1363 return NULL; 1364 } 1365 1366 rate = MS(rxdw3, R92S_RXDW3_RATE); 1367 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1368 1369 /* Get RSSI from PHY status descriptor if present. */ 1370 if (infosz != 0) 1371 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1372 else 1373 *rssi = 0; 1374 1375 DPRINTFN(5, "Rx frame len=%d rate=%d infosz=%d rssi=%d\n", 1376 pktlen, rate, infosz, *rssi); 1377 1378 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1379 if (__predict_false(m == NULL)) { 1380 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1381 return NULL; 1382 } 1383 /* Finalize mbuf. */ 1384 m->m_pkthdr.rcvif = ifp; 1385 /* Hardware does Rx TCP checksum offload. */ 1386 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1387 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1388 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1389 } 1390 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1391 memcpy(mtod(m, uint8_t *), wh, pktlen); 1392 m->m_pkthdr.len = m->m_len = pktlen; 1393 1394 if (ieee80211_radiotap_active(ic)) { 1395 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1396 1397 /* Map HW rate index to 802.11 rate. */ 1398 tap->wr_flags = 2; 1399 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1400 switch (rate) { 1401 /* CCK. */ 1402 case 0: tap->wr_rate = 2; break; 1403 case 1: tap->wr_rate = 4; break; 1404 case 2: tap->wr_rate = 11; break; 1405 case 3: tap->wr_rate = 22; break; 1406 /* OFDM. */ 1407 case 4: tap->wr_rate = 12; break; 1408 case 5: tap->wr_rate = 18; break; 1409 case 6: tap->wr_rate = 24; break; 1410 case 7: tap->wr_rate = 36; break; 1411 case 8: tap->wr_rate = 48; break; 1412 case 9: tap->wr_rate = 72; break; 1413 case 10: tap->wr_rate = 96; break; 1414 case 11: tap->wr_rate = 108; break; 1415 } 1416 } else if (rate >= 12) { /* MCS0~15. */ 1417 /* Bit 7 set means HT MCS instead of rate. */ 1418 tap->wr_rate = 0x80 | (rate - 12); 1419 } 1420 tap->wr_dbm_antsignal = *rssi; 1421 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1422 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1423 } 1424 1425 return (m); 1426 } 1427 1428 static struct mbuf * 1429 rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi) 1430 { 1431 struct r92s_rx_stat *stat; 1432 uint32_t rxdw0; 1433 int totlen, pktlen, infosz, npkts; 1434 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1435 1436 /* Get the number of encapsulated frames. */ 1437 stat = (struct r92s_rx_stat *)buf; 1438 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1439 DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 1440 1441 /* Process all of them. */ 1442 while (npkts-- > 0) { 1443 if (__predict_false(len < sizeof(*stat))) 1444 break; 1445 stat = (struct r92s_rx_stat *)buf; 1446 rxdw0 = le32toh(stat->rxdw0); 1447 1448 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1449 if (__predict_false(pktlen == 0)) 1450 break; 1451 1452 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1453 1454 /* Make sure everything fits in xfer. */ 1455 totlen = sizeof(*stat) + infosz + pktlen; 1456 if (__predict_false(totlen > len)) 1457 break; 1458 1459 /* Process 802.11 frame. */ 1460 m = rsu_rx_frame(sc, buf, pktlen, rssi); 1461 if (m0 == NULL) 1462 m0 = m; 1463 if (prevm == NULL) 1464 prevm = m; 1465 else { 1466 prevm->m_next = m; 1467 prevm = m; 1468 } 1469 /* Next chunk is 128-byte aligned. */ 1470 totlen = (totlen + 127) & ~127; 1471 buf += totlen; 1472 len -= totlen; 1473 } 1474 1475 return (m0); 1476 } 1477 1478 static struct mbuf * 1479 rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi) 1480 { 1481 struct rsu_softc *sc = data->sc; 1482 struct r92s_rx_stat *stat; 1483 int len; 1484 1485 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1486 1487 if (__predict_false(len < sizeof(*stat))) { 1488 DPRINTF("xfer too short %d\n", len); 1489 if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1); 1490 return (NULL); 1491 } 1492 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1493 stat = (struct r92s_rx_stat *)data->buf; 1494 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1495 rsu_rx_multi_event(sc, data->buf, len); 1496 /* No packets to process. */ 1497 return (NULL); 1498 } else 1499 return (rsu_rx_multi_frame(sc, data->buf, len, rssi)); 1500 } 1501 1502 static void 1503 rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1504 { 1505 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1506 struct ifnet *ifp = sc->sc_ifp; 1507 struct ieee80211com *ic = ifp->if_l2com; 1508 struct ieee80211_frame *wh; 1509 struct ieee80211_node *ni; 1510 struct mbuf *m = NULL, *next; 1511 struct rsu_data *data; 1512 int rssi = 1; 1513 1514 RSU_ASSERT_LOCKED(sc); 1515 1516 switch (USB_GET_STATE(xfer)) { 1517 case USB_ST_TRANSFERRED: 1518 data = STAILQ_FIRST(&sc->sc_rx_active); 1519 if (data == NULL) 1520 goto tr_setup; 1521 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1522 m = rsu_rxeof(xfer, data, &rssi); 1523 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1524 /* FALLTHROUGH */ 1525 case USB_ST_SETUP: 1526 tr_setup: 1527 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1528 if (data == NULL) { 1529 KASSERT(m == NULL, ("mbuf isn't NULL")); 1530 return; 1531 } 1532 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1533 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1534 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1535 usbd_xfer_max_len(xfer)); 1536 usbd_transfer_submit(xfer); 1537 /* 1538 * To avoid LOR we should unlock our private mutex here to call 1539 * ieee80211_input() because here is at the end of a USB 1540 * callback and safe to unlock. 1541 */ 1542 RSU_UNLOCK(sc); 1543 while (m != NULL) { 1544 next = m->m_next; 1545 m->m_next = NULL; 1546 wh = mtod(m, struct ieee80211_frame *); 1547 ni = ieee80211_find_rxnode(ic, 1548 (struct ieee80211_frame_min *)wh); 1549 if (ni != NULL) { 1550 (void)ieee80211_input(ni, m, rssi, 0); 1551 ieee80211_free_node(ni); 1552 } else 1553 (void)ieee80211_input_all(ic, m, rssi, 0); 1554 m = next; 1555 } 1556 RSU_LOCK(sc); 1557 break; 1558 default: 1559 /* needs it to the inactive queue due to a error. */ 1560 data = STAILQ_FIRST(&sc->sc_rx_active); 1561 if (data != NULL) { 1562 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1563 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1564 } 1565 if (error != USB_ERR_CANCELLED) { 1566 usbd_xfer_set_stall(xfer); 1567 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1568 goto tr_setup; 1569 } 1570 break; 1571 } 1572 1573 } 1574 1575 1576 static void 1577 rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1578 { 1579 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1580 struct ifnet *ifp = sc->sc_ifp; 1581 struct mbuf *m; 1582 1583 RSU_ASSERT_LOCKED(sc); 1584 1585 /* 1586 * Do any tx complete callback. Note this must be done before releasing 1587 * the node reference. 1588 */ 1589 if (data->m) { 1590 m = data->m; 1591 if (m->m_flags & M_TXCB) { 1592 /* XXX status? */ 1593 ieee80211_process_callback(data->ni, m, 0); 1594 } 1595 m_freem(m); 1596 data->m = NULL; 1597 } 1598 if (data->ni) { 1599 ieee80211_free_node(data->ni); 1600 data->ni = NULL; 1601 } 1602 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1603 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1604 } 1605 1606 static void 1607 rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 1608 uint8_t which) 1609 { 1610 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1611 struct ifnet *ifp = sc->sc_ifp; 1612 struct rsu_data *data; 1613 1614 RSU_ASSERT_LOCKED(sc); 1615 1616 switch (USB_GET_STATE(xfer)) { 1617 case USB_ST_TRANSFERRED: 1618 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1619 if (data == NULL) 1620 goto tr_setup; 1621 DPRINTF("transfer done %p\n", data); 1622 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1623 rsu_txeof(xfer, data); 1624 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1625 /* FALLTHROUGH */ 1626 case USB_ST_SETUP: 1627 tr_setup: 1628 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 1629 if (data == NULL) { 1630 DPRINTF("empty pending queue sc %p\n", sc); 1631 return; 1632 } 1633 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 1634 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 1635 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1636 DPRINTF("submitting transfer %p\n", data); 1637 usbd_transfer_submit(xfer); 1638 break; 1639 default: 1640 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1641 if (data != NULL) { 1642 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1643 rsu_txeof(xfer, data); 1644 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1645 } 1646 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1647 1648 if (error != USB_ERR_CANCELLED) { 1649 usbd_xfer_set_stall(xfer); 1650 goto tr_setup; 1651 } 1652 break; 1653 } 1654 } 1655 1656 static void 1657 rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 1658 { 1659 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 1660 } 1661 1662 static void 1663 rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 1664 { 1665 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 1666 } 1667 1668 static int 1669 rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 1670 struct mbuf *m0, struct rsu_data *data) 1671 { 1672 struct ifnet *ifp = sc->sc_ifp; 1673 struct ieee80211com *ic = ifp->if_l2com; 1674 struct ieee80211vap *vap = ni->ni_vap; 1675 struct ieee80211_frame *wh; 1676 struct ieee80211_key *k = NULL; 1677 struct r92s_tx_desc *txd; 1678 uint8_t type; 1679 uint8_t tid = 0; 1680 uint8_t which; 1681 int hasqos; 1682 int xferlen; 1683 1684 RSU_ASSERT_LOCKED(sc); 1685 1686 wh = mtod(m0, struct ieee80211_frame *); 1687 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1688 1689 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1690 k = ieee80211_crypto_encap(ni, m0); 1691 if (k == NULL) { 1692 device_printf(sc->sc_dev, 1693 "ieee80211_crypto_encap returns NULL.\n"); 1694 /* XXX we don't expect the fragmented frames */ 1695 m_freem(m0); 1696 return (ENOBUFS); 1697 } 1698 wh = mtod(m0, struct ieee80211_frame *); 1699 } 1700 switch (type) { 1701 case IEEE80211_FC0_TYPE_CTL: 1702 case IEEE80211_FC0_TYPE_MGT: 1703 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 1704 break; 1705 default: 1706 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 1707 break; 1708 } 1709 hasqos = 0; 1710 1711 /* Fill Tx descriptor. */ 1712 txd = (struct r92s_tx_desc *)data->buf; 1713 memset(txd, 0, sizeof(*txd)); 1714 1715 txd->txdw0 |= htole32( 1716 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 1717 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1718 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1719 1720 txd->txdw1 |= htole32( 1721 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | 1722 SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_BE)); 1723 if (!hasqos) 1724 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 1725 #ifdef notyet 1726 if (k != NULL) { 1727 switch (k->wk_cipher->ic_cipher) { 1728 case IEEE80211_CIPHER_WEP: 1729 cipher = R92S_TXDW1_CIPHER_WEP; 1730 break; 1731 case IEEE80211_CIPHER_TKIP: 1732 cipher = R92S_TXDW1_CIPHER_TKIP; 1733 break; 1734 case IEEE80211_CIPHER_AES_CCM: 1735 cipher = R92S_TXDW1_CIPHER_AES; 1736 break; 1737 default: 1738 cipher = R92S_TXDW1_CIPHER_NONE; 1739 } 1740 txd->txdw1 |= htole32( 1741 SM(R92S_TXDW1_CIPHER, cipher) | 1742 SM(R92S_TXDW1_KEYIDX, k->k_id)); 1743 } 1744 #endif 1745 txd->txdw2 |= htole32(R92S_TXDW2_BK); 1746 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1747 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 1748 /* 1749 * Firmware will use and increment the sequence number for the 1750 * specified TID. 1751 */ 1752 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, tid)); 1753 1754 if (ieee80211_radiotap_active_vap(vap)) { 1755 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 1756 1757 tap->wt_flags = 0; 1758 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1759 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1760 ieee80211_radiotap_tx(vap, m0); 1761 } 1762 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 1763 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 1764 1765 data->buflen = xferlen; 1766 data->ni = ni; 1767 data->m = m0; 1768 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1769 1770 /* start transfer, if any */ 1771 usbd_transfer_start(sc->sc_xfer[which]); 1772 return (0); 1773 } 1774 1775 static void 1776 rsu_start(struct ifnet *ifp) 1777 { 1778 struct rsu_softc *sc = ifp->if_softc; 1779 1780 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1781 return; 1782 1783 RSU_LOCK(sc); 1784 rsu_start_locked(ifp); 1785 RSU_UNLOCK(sc); 1786 } 1787 1788 static void 1789 rsu_start_locked(struct ifnet *ifp) 1790 { 1791 struct rsu_softc *sc = ifp->if_softc; 1792 struct ieee80211_node *ni; 1793 struct rsu_data *bf; 1794 struct mbuf *m; 1795 1796 RSU_ASSERT_LOCKED(sc); 1797 1798 for (;;) { 1799 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1800 if (m == NULL) 1801 break; 1802 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1803 m->m_pkthdr.rcvif = NULL; 1804 1805 bf = rsu_getbuf(sc); 1806 if (bf == NULL) { 1807 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1808 m_freem(m); 1809 ieee80211_free_node(ni); 1810 } else if (rsu_tx_start(sc, ni, m, bf) != 0) { 1811 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1812 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1813 ieee80211_free_node(ni); 1814 } 1815 } 1816 } 1817 1818 static int 1819 rsu_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1820 { 1821 struct ieee80211com *ic = ifp->if_l2com; 1822 struct ifreq *ifr = (struct ifreq *) data; 1823 int error = 0, startall = 0; 1824 1825 switch (cmd) { 1826 case SIOCSIFFLAGS: 1827 if (ifp->if_flags & IFF_UP) { 1828 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1829 rsu_init(ifp->if_softc); 1830 startall = 1; 1831 } 1832 } else { 1833 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1834 rsu_stop(ifp, 1); 1835 } 1836 if (startall) 1837 ieee80211_start_all(ic); 1838 break; 1839 case SIOCGIFMEDIA: 1840 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1841 break; 1842 case SIOCGIFADDR: 1843 error = ether_ioctl(ifp, cmd, data); 1844 break; 1845 default: 1846 error = EINVAL; 1847 break; 1848 } 1849 1850 return (error); 1851 } 1852 1853 /* 1854 * Power on sequence for A-cut adapters. 1855 */ 1856 static void 1857 rsu_power_on_acut(struct rsu_softc *sc) 1858 { 1859 uint32_t reg; 1860 1861 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 1862 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 1863 1864 /* Enable AFE macro block's bandgap and Mbias. */ 1865 rsu_write_1(sc, R92S_AFE_MISC, 1866 rsu_read_1(sc, R92S_AFE_MISC) | 1867 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 1868 /* Enable LDOA15 block. */ 1869 rsu_write_1(sc, R92S_LDOA15_CTRL, 1870 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 1871 1872 rsu_write_1(sc, R92S_SPS1_CTRL, 1873 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 1874 usb_pause_mtx(&sc->sc_mtx, 2 * hz); 1875 /* Enable switch regulator block. */ 1876 rsu_write_1(sc, R92S_SPS1_CTRL, 1877 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 1878 1879 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 1880 1881 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1882 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 1883 1884 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1885 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 1886 1887 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1888 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 1889 1890 /* Enable AFE clock. */ 1891 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 1892 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 1893 /* Enable AFE PLL macro block. */ 1894 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 1895 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 1896 /* Attach AFE PLL to MACTOP/BB. */ 1897 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 1898 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 1899 1900 /* Switch to 40MHz clock instead of 80MHz. */ 1901 rsu_write_2(sc, R92S_SYS_CLKR, 1902 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 1903 1904 /* Enable MAC clock. */ 1905 rsu_write_2(sc, R92S_SYS_CLKR, 1906 rsu_read_2(sc, R92S_SYS_CLKR) | 1907 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 1908 1909 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 1910 1911 /* Enable digital core and IOREG R/W. */ 1912 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1913 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 1914 1915 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1916 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 1917 1918 /* Switch the control path to firmware. */ 1919 reg = rsu_read_2(sc, R92S_SYS_CLKR); 1920 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 1921 rsu_write_2(sc, R92S_SYS_CLKR, reg); 1922 1923 rsu_write_2(sc, R92S_CR, 0x37fc); 1924 1925 /* Fix USB RX FIFO issue. */ 1926 rsu_write_1(sc, 0xfe5c, 1927 rsu_read_1(sc, 0xfe5c) | 0x80); 1928 rsu_write_1(sc, 0x00ab, 1929 rsu_read_1(sc, 0x00ab) | 0xc0); 1930 1931 rsu_write_1(sc, R92S_SYS_CLKR, 1932 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 1933 } 1934 1935 /* 1936 * Power on sequence for B-cut and C-cut adapters. 1937 */ 1938 static void 1939 rsu_power_on_bcut(struct rsu_softc *sc) 1940 { 1941 uint32_t reg; 1942 int ntries; 1943 1944 /* Prevent eFuse leakage. */ 1945 rsu_write_1(sc, 0x37, 0xb0); 1946 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1947 rsu_write_1(sc, 0x37, 0x30); 1948 1949 /* Switch the control path to hardware. */ 1950 reg = rsu_read_2(sc, R92S_SYS_CLKR); 1951 if (reg & R92S_FWHW_SEL) { 1952 rsu_write_2(sc, R92S_SYS_CLKR, 1953 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 1954 } 1955 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1956 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 1957 rsu_ms_delay(sc); 1958 1959 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 1960 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 1961 1962 reg = rsu_read_1(sc, R92S_AFE_MISC); 1963 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 1964 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 1965 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 1966 1967 /* Enable PLL. */ 1968 rsu_write_1(sc, R92S_LDOA15_CTRL, 1969 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 1970 1971 rsu_write_1(sc, R92S_LDOV12D_CTRL, 1972 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 1973 1974 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1975 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 1976 1977 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1978 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 1979 1980 /* Support 64KB IMEM. */ 1981 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1982 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 1983 1984 /* Enable AFE clock. */ 1985 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 1986 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 1987 /* Enable AFE PLL macro block. */ 1988 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 1989 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 1990 rsu_ms_delay(sc); 1991 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 1992 rsu_ms_delay(sc); 1993 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 1994 rsu_ms_delay(sc); 1995 1996 /* Attach AFE PLL to MACTOP/BB. */ 1997 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 1998 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 1999 2000 /* Switch to 40MHz clock. */ 2001 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2002 /* Disable CPU clock and 80MHz SSC. */ 2003 rsu_write_1(sc, R92S_SYS_CLKR, 2004 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2005 /* Enable MAC clock. */ 2006 rsu_write_2(sc, R92S_SYS_CLKR, 2007 rsu_read_2(sc, R92S_SYS_CLKR) | 2008 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2009 2010 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2011 2012 /* Enable digital core and IOREG R/W. */ 2013 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2014 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2015 2016 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2017 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2018 2019 /* Switch the control path to firmware. */ 2020 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2021 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2022 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2023 2024 rsu_write_2(sc, R92S_CR, 0x37fc); 2025 2026 /* Fix USB RX FIFO issue. */ 2027 rsu_write_1(sc, 0xfe5c, 2028 rsu_read_1(sc, 0xfe5c) | 0x80); 2029 2030 rsu_write_1(sc, R92S_SYS_CLKR, 2031 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2032 2033 rsu_write_1(sc, 0xfe1c, 0x80); 2034 2035 /* Make sure TxDMA is ready to download firmware. */ 2036 for (ntries = 0; ntries < 20; ntries++) { 2037 reg = rsu_read_1(sc, R92S_TCR); 2038 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2039 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2040 break; 2041 rsu_ms_delay(sc); 2042 } 2043 if (ntries == 20) { 2044 DPRINTF("TxDMA is not ready\n"); 2045 /* Reset TxDMA. */ 2046 reg = rsu_read_1(sc, R92S_CR); 2047 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2048 rsu_ms_delay(sc); 2049 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2050 } 2051 } 2052 2053 static void 2054 rsu_power_off(struct rsu_softc *sc) 2055 { 2056 /* Turn RF off. */ 2057 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2058 usb_pause_mtx(&sc->sc_mtx, hz / 200); 2059 2060 /* Turn MAC off. */ 2061 /* Switch control path. */ 2062 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2063 /* Reset MACTOP. */ 2064 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2065 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2066 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2067 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2068 2069 /* Disable AFE PLL. */ 2070 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2071 /* Disable A15V. */ 2072 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2073 /* Disable eFuse 1.2V. */ 2074 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2075 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2076 /* Enable AFE macro block's bandgap and Mbias. */ 2077 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2078 /* Disable 1.6V LDO. */ 2079 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2080 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2081 } 2082 2083 static int 2084 rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2085 { 2086 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2087 struct rsu_data *data; 2088 struct r92s_tx_desc *txd; 2089 int mlen; 2090 2091 while (len > 0) { 2092 data = rsu_getbuf(sc); 2093 if (data == NULL) 2094 return (ENOMEM); 2095 txd = (struct r92s_tx_desc *)data->buf; 2096 memset(txd, 0, sizeof(*txd)); 2097 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2098 /* Last chunk. */ 2099 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2100 mlen = len; 2101 } else 2102 mlen = RSU_TXBUFSZ - sizeof(*txd); 2103 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2104 memcpy(&txd[1], buf, mlen); 2105 data->buflen = sizeof(*txd) + mlen; 2106 DPRINTF("starting transfer %p\n", data); 2107 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2108 buf += mlen; 2109 len -= mlen; 2110 } 2111 usbd_transfer_start(sc->sc_xfer[which]); 2112 return (0); 2113 } 2114 2115 static int 2116 rsu_load_firmware(struct rsu_softc *sc) 2117 { 2118 const struct r92s_fw_hdr *hdr; 2119 struct r92s_fw_priv *dmem; 2120 const uint8_t *imem, *emem; 2121 int imemsz, ememsz; 2122 const struct firmware *fw; 2123 size_t size; 2124 uint32_t reg; 2125 int ntries, error; 2126 2127 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2128 DPRINTF("Firmware already loaded\n"); 2129 return (0); 2130 } 2131 2132 RSU_UNLOCK(sc); 2133 /* Read firmware image from the filesystem. */ 2134 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2135 device_printf(sc->sc_dev, 2136 "%s: failed load firmware of file rsu-rtl8712fw\n", 2137 __func__); 2138 RSU_LOCK(sc); 2139 return (ENXIO); 2140 } 2141 RSU_LOCK(sc); 2142 size = fw->datasize; 2143 if (size < sizeof(*hdr)) { 2144 device_printf(sc->sc_dev, "firmware too short\n"); 2145 error = EINVAL; 2146 goto fail; 2147 } 2148 hdr = (const struct r92s_fw_hdr *)fw->data; 2149 if (hdr->signature != htole16(0x8712) && 2150 hdr->signature != htole16(0x8192)) { 2151 device_printf(sc->sc_dev, 2152 "invalid firmware signature 0x%x\n", 2153 le16toh(hdr->signature)); 2154 error = EINVAL; 2155 goto fail; 2156 } 2157 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2158 hdr->month, hdr->day, hdr->hour, hdr->minute); 2159 2160 /* Make sure that driver and firmware are in sync. */ 2161 if (hdr->privsz != htole32(sizeof(*dmem))) { 2162 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2163 error = EINVAL; 2164 goto fail; 2165 } 2166 /* Get FW sections sizes. */ 2167 imemsz = le32toh(hdr->imemsz); 2168 ememsz = le32toh(hdr->sramsz); 2169 /* Check that all FW sections fit in image. */ 2170 if (size < sizeof(*hdr) + imemsz + ememsz) { 2171 device_printf(sc->sc_dev, "firmware too short\n"); 2172 error = EINVAL; 2173 goto fail; 2174 } 2175 imem = (const uint8_t *)&hdr[1]; 2176 emem = imem + imemsz; 2177 2178 /* Load IMEM section. */ 2179 error = rsu_fw_loadsection(sc, imem, imemsz); 2180 if (error != 0) { 2181 device_printf(sc->sc_dev, 2182 "could not load firmware section %s\n", "IMEM"); 2183 goto fail; 2184 } 2185 /* Wait for load to complete. */ 2186 for (ntries = 0; ntries != 50; ntries++) { 2187 usb_pause_mtx(&sc->sc_mtx, hz / 100); 2188 reg = rsu_read_1(sc, R92S_TCR); 2189 if (reg & R92S_TCR_IMEM_CODE_DONE) 2190 break; 2191 } 2192 if (ntries == 50) { 2193 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2194 error = ETIMEDOUT; 2195 goto fail; 2196 } 2197 /* Load EMEM section. */ 2198 error = rsu_fw_loadsection(sc, emem, ememsz); 2199 if (error != 0) { 2200 device_printf(sc->sc_dev, 2201 "could not load firmware section %s\n", "EMEM"); 2202 goto fail; 2203 } 2204 /* Wait for load to complete. */ 2205 for (ntries = 0; ntries != 50; ntries++) { 2206 usb_pause_mtx(&sc->sc_mtx, hz / 100); 2207 reg = rsu_read_2(sc, R92S_TCR); 2208 if (reg & R92S_TCR_EMEM_CODE_DONE) 2209 break; 2210 } 2211 if (ntries == 50) { 2212 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2213 error = ETIMEDOUT; 2214 goto fail; 2215 } 2216 /* Enable CPU. */ 2217 rsu_write_1(sc, R92S_SYS_CLKR, 2218 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2219 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2220 device_printf(sc->sc_dev, "could not enable system clock\n"); 2221 error = EIO; 2222 goto fail; 2223 } 2224 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2225 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2226 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2227 device_printf(sc->sc_dev, 2228 "could not enable microcontroller\n"); 2229 error = EIO; 2230 goto fail; 2231 } 2232 /* Wait for CPU to initialize. */ 2233 for (ntries = 0; ntries < 100; ntries++) { 2234 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2235 break; 2236 rsu_ms_delay(sc); 2237 } 2238 if (ntries == 100) { 2239 device_printf(sc->sc_dev, 2240 "timeout waiting for microcontroller\n"); 2241 error = ETIMEDOUT; 2242 goto fail; 2243 } 2244 2245 /* Update DMEM section before loading. */ 2246 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2247 memset(dmem, 0, sizeof(*dmem)); 2248 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2249 dmem->nendpoints = 0; 2250 dmem->rf_config = 0x12; /* 1T2R */ 2251 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2252 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2253 #ifdef notyet 2254 dmem->bw40_en = (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_40) != 0; 2255 #endif 2256 dmem->turbo_mode = 1; 2257 /* Load DMEM section. */ 2258 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2259 if (error != 0) { 2260 device_printf(sc->sc_dev, 2261 "could not load firmware section %s\n", "DMEM"); 2262 goto fail; 2263 } 2264 /* Wait for load to complete. */ 2265 for (ntries = 0; ntries < 100; ntries++) { 2266 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2267 break; 2268 rsu_ms_delay(sc); 2269 } 2270 if (ntries == 100) { 2271 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2272 "DMEM"); 2273 error = ETIMEDOUT; 2274 goto fail; 2275 } 2276 /* Wait for firmware readiness. */ 2277 for (ntries = 0; ntries < 60; ntries++) { 2278 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2279 break; 2280 rsu_ms_delay(sc); 2281 } 2282 if (ntries == 60) { 2283 device_printf(sc->sc_dev, 2284 "timeout waiting for firmware readiness\n"); 2285 error = ETIMEDOUT; 2286 goto fail; 2287 } 2288 fail: 2289 firmware_put(fw, FIRMWARE_UNLOAD); 2290 return (error); 2291 } 2292 2293 2294 static int 2295 rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2296 const struct ieee80211_bpf_params *params) 2297 { 2298 struct ieee80211com *ic = ni->ni_ic; 2299 struct ifnet *ifp = ic->ic_ifp; 2300 struct rsu_softc *sc = ifp->if_softc; 2301 struct rsu_data *bf; 2302 2303 /* prevent management frames from being sent if we're not ready */ 2304 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2305 m_freem(m); 2306 ieee80211_free_node(ni); 2307 return (ENETDOWN); 2308 } 2309 RSU_LOCK(sc); 2310 bf = rsu_getbuf(sc); 2311 if (bf == NULL) { 2312 ieee80211_free_node(ni); 2313 m_freem(m); 2314 RSU_UNLOCK(sc); 2315 return (ENOBUFS); 2316 } 2317 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 2318 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2319 ieee80211_free_node(ni); 2320 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 2321 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2322 RSU_UNLOCK(sc); 2323 return (EIO); 2324 } 2325 RSU_UNLOCK(sc); 2326 2327 return (0); 2328 } 2329 2330 static void 2331 rsu_init(void *arg) 2332 { 2333 struct rsu_softc *sc = arg; 2334 2335 RSU_LOCK(sc); 2336 rsu_init_locked(arg); 2337 RSU_UNLOCK(sc); 2338 } 2339 2340 static void 2341 rsu_init_locked(struct rsu_softc *sc) 2342 { 2343 struct ifnet *ifp = sc->sc_ifp; 2344 struct r92s_set_pwr_mode cmd; 2345 int error; 2346 int i; 2347 2348 /* Init host async commands ring. */ 2349 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2350 2351 /* Power on adapter. */ 2352 if (sc->cut == 1) 2353 rsu_power_on_acut(sc); 2354 else 2355 rsu_power_on_bcut(sc); 2356 2357 /* Load firmware. */ 2358 error = rsu_load_firmware(sc); 2359 if (error != 0) 2360 goto fail; 2361 2362 /* Enable Rx TCP checksum offload. */ 2363 rsu_write_4(sc, R92S_RCR, 2364 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2365 /* Append PHY status. */ 2366 rsu_write_4(sc, R92S_RCR, 2367 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2368 2369 rsu_write_4(sc, R92S_CR, 2370 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2371 2372 /* Use 128 bytes pages. */ 2373 rsu_write_1(sc, 0x00b5, 2374 rsu_read_1(sc, 0x00b5) | 0x01); 2375 /* Enable USB Rx aggregation. */ 2376 rsu_write_1(sc, 0x00bd, 2377 rsu_read_1(sc, 0x00bd) | 0x80); 2378 /* Set USB Rx aggregation threshold. */ 2379 rsu_write_1(sc, 0x00d9, 0x01); 2380 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2381 rsu_write_1(sc, 0xfe5b, 0x04); 2382 /* Fix USB Rx FIFO issue. */ 2383 rsu_write_1(sc, 0xfe5c, 2384 rsu_read_1(sc, 0xfe5c) | 0x80); 2385 2386 /* Set MAC address. */ 2387 rsu_write_region_1(sc, R92S_MACID, IF_LLADDR(ifp), 2388 IEEE80211_ADDR_LEN); 2389 2390 /* It really takes 1.5 seconds for the firmware to boot: */ 2391 usb_pause_mtx(&sc->sc_mtx, (3 * hz) / 2); 2392 2393 DPRINTF("setting MAC address to %s\n", ether_sprintf(IF_LLADDR(ifp))); 2394 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, IF_LLADDR(ifp), 2395 IEEE80211_ADDR_LEN); 2396 if (error != 0) { 2397 device_printf(sc->sc_dev, "could not set MAC address\n"); 2398 goto fail; 2399 } 2400 2401 rsu_write_1(sc, R92S_USB_HRPWM, 2402 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 2403 2404 memset(&cmd, 0, sizeof(cmd)); 2405 cmd.mode = R92S_PS_MODE_ACTIVE; 2406 DPRINTF("setting ps mode to %d\n", cmd.mode); 2407 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 2408 if (error != 0) { 2409 device_printf(sc->sc_dev, "could not set PS mode\n"); 2410 goto fail; 2411 } 2412 2413 #if 0 2414 if (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_40) { 2415 /* Enable 40MHz mode. */ 2416 error = rsu_fw_iocmd(sc, 2417 SM(R92S_IOCMD_CLASS, 0xf4) | 2418 SM(R92S_IOCMD_INDEX, 0x00) | 2419 SM(R92S_IOCMD_VALUE, 0x0007)); 2420 if (error != 0) { 2421 device_printf(sc->sc_dev, 2422 "could not enable 40MHz mode\n"); 2423 goto fail; 2424 } 2425 } 2426 2427 /* Set default channel. */ 2428 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2429 #endif 2430 sc->scan_pass = 0; 2431 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2432 2433 /* We're ready to go. */ 2434 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2435 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2436 return; 2437 fail: 2438 /* Need to stop all failed transfers, if any */ 2439 for (i = 0; i != RSU_N_TRANSFER; i++) 2440 usbd_transfer_stop(sc->sc_xfer[i]); 2441 } 2442 2443 static void 2444 rsu_stop(struct ifnet *ifp, int disable) 2445 { 2446 struct rsu_softc *sc = ifp->if_softc; 2447 2448 RSU_LOCK(sc); 2449 rsu_stop_locked(ifp, disable); 2450 RSU_UNLOCK(sc); 2451 } 2452 2453 static void 2454 rsu_stop_locked(struct ifnet *ifp, int disable __unused) 2455 { 2456 struct rsu_softc *sc = ifp->if_softc; 2457 int i; 2458 2459 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2460 sc->sc_calibrating = 0; 2461 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2462 2463 /* Power off adapter. */ 2464 rsu_power_off(sc); 2465 2466 for (i = 0; i < RSU_N_TRANSFER; i++) 2467 usbd_transfer_stop(sc->sc_xfer[i]); 2468 } 2469 2470 static void 2471 rsu_ms_delay(struct rsu_softc *sc) 2472 { 2473 usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2474 } 2475