1 /* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 #include <sys/cdefs.h> 19 __FBSDID("$FreeBSD$"); 20 21 /* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o h/w crypto 26 * o hostap / ibss / mesh 27 * o sensible RSSI levels 28 * o power-save operation 29 */ 30 31 #include "opt_wlan.h" 32 33 #include <sys/param.h> 34 #include <sys/endian.h> 35 #include <sys/sockio.h> 36 #include <sys/malloc.h> 37 #include <sys/mbuf.h> 38 #include <sys/kernel.h> 39 #include <sys/socket.h> 40 #include <sys/systm.h> 41 #include <sys/conf.h> 42 #include <sys/bus.h> 43 #include <sys/rman.h> 44 #include <sys/firmware.h> 45 #include <sys/module.h> 46 47 #include <machine/bus.h> 48 #include <machine/resource.h> 49 50 #include <net/bpf.h> 51 #include <net/if.h> 52 #include <net/if_var.h> 53 #include <net/if_arp.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_types.h> 57 58 #include <netinet/in.h> 59 #include <netinet/in_systm.h> 60 #include <netinet/in_var.h> 61 #include <netinet/if_ether.h> 62 #include <netinet/ip.h> 63 64 #include <net80211/ieee80211_var.h> 65 #include <net80211/ieee80211_regdomain.h> 66 #include <net80211/ieee80211_radiotap.h> 67 68 #include <dev/usb/usb.h> 69 #include <dev/usb/usbdi.h> 70 #include "usbdevs.h" 71 72 #define USB_DEBUG_VAR rsu_debug 73 #include <dev/usb/usb_debug.h> 74 75 #include <dev/usb/wlan/if_rsureg.h> 76 77 #ifdef USB_DEBUG 78 static int rsu_debug = 0; 79 SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 80 SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 81 "Debug level"); 82 #define RSU_DPRINTF(_sc, _flg, ...) \ 83 do \ 84 if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \ 85 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 86 while (0) 87 #else 88 #define RSU_DPRINTF(_sc, _flg, ...) 89 #endif 90 91 static int rsu_enable_11n = 1; 92 TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n); 93 94 #define RSU_DEBUG_ANY 0xffffffff 95 #define RSU_DEBUG_TX 0x00000001 96 #define RSU_DEBUG_RX 0x00000002 97 #define RSU_DEBUG_RESET 0x00000004 98 #define RSU_DEBUG_CALIB 0x00000008 99 #define RSU_DEBUG_STATE 0x00000010 100 #define RSU_DEBUG_SCAN 0x00000020 101 #define RSU_DEBUG_FWCMD 0x00000040 102 #define RSU_DEBUG_TXDONE 0x00000080 103 #define RSU_DEBUG_FW 0x00000100 104 #define RSU_DEBUG_FWDBG 0x00000200 105 #define RSU_DEBUG_AMPDU 0x00000400 106 107 static const STRUCT_USB_HOST_ID rsu_devs[] = { 108 #define RSU_HT_NOT_SUPPORTED 0 109 #define RSU_HT_SUPPORTED 1 110 #define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 111 RSU_HT_SUPPORTED) } 112 #define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 113 RSU_HT_NOT_SUPPORTED) } 114 RSU_DEV(ASUS, RTL8192SU), 115 RSU_DEV(AZUREWAVE, RTL8192SU_4), 116 RSU_DEV_HT(ACCTON, RTL8192SU), 117 RSU_DEV_HT(ASUS, USBN10), 118 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 119 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 120 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 121 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 122 RSU_DEV_HT(BELKIN, RTL8192SU_1), 123 RSU_DEV_HT(BELKIN, RTL8192SU_2), 124 RSU_DEV_HT(BELKIN, RTL8192SU_3), 125 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 126 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 127 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 128 RSU_DEV_HT(COREGA, RTL8192SU), 129 RSU_DEV_HT(DLINK2, DWA131A1), 130 RSU_DEV_HT(DLINK2, RTL8192SU_1), 131 RSU_DEV_HT(DLINK2, RTL8192SU_2), 132 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 133 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 134 RSU_DEV_HT(EDIMAX, EW7622UMN), 135 RSU_DEV_HT(GUILLEMOT, HWGUN54), 136 RSU_DEV_HT(GUILLEMOT, HWNUM300), 137 RSU_DEV_HT(HAWKING, RTL8192SU_1), 138 RSU_DEV_HT(HAWKING, RTL8192SU_2), 139 RSU_DEV_HT(PLANEX2, GWUSNANO), 140 RSU_DEV_HT(REALTEK, RTL8171), 141 RSU_DEV_HT(REALTEK, RTL8172), 142 RSU_DEV_HT(REALTEK, RTL8173), 143 RSU_DEV_HT(REALTEK, RTL8174), 144 RSU_DEV_HT(REALTEK, RTL8192SU), 145 RSU_DEV_HT(REALTEK, RTL8712), 146 RSU_DEV_HT(REALTEK, RTL8713), 147 RSU_DEV_HT(SENAO, RTL8192SU_1), 148 RSU_DEV_HT(SENAO, RTL8192SU_2), 149 RSU_DEV_HT(SITECOMEU, WL349V1), 150 RSU_DEV_HT(SITECOMEU, WL353), 151 RSU_DEV_HT(SWEEX2, LW154), 152 RSU_DEV_HT(TRENDNET, TEW646UBH), 153 #undef RSU_DEV_HT 154 #undef RSU_DEV 155 }; 156 157 static device_probe_t rsu_match; 158 static device_attach_t rsu_attach; 159 static device_detach_t rsu_detach; 160 static usb_callback_t rsu_bulk_tx_callback_be_bk; 161 static usb_callback_t rsu_bulk_tx_callback_vi_vo; 162 static usb_callback_t rsu_bulk_tx_callback_h2c; 163 static usb_callback_t rsu_bulk_rx_callback; 164 static usb_error_t rsu_do_request(struct rsu_softc *, 165 struct usb_device_request *, void *); 166 static struct ieee80211vap * 167 rsu_vap_create(struct ieee80211com *, const char name[], 168 int, enum ieee80211_opmode, int, const uint8_t bssid[], 169 const uint8_t mac[]); 170 static void rsu_vap_delete(struct ieee80211vap *); 171 static void rsu_scan_start(struct ieee80211com *); 172 static void rsu_scan_end(struct ieee80211com *); 173 static void rsu_getradiocaps(struct ieee80211com *, int, int *, 174 struct ieee80211_channel[]); 175 static void rsu_set_channel(struct ieee80211com *); 176 static void rsu_update_mcast(struct ieee80211com *); 177 static int rsu_alloc_rx_list(struct rsu_softc *); 178 static void rsu_free_rx_list(struct rsu_softc *); 179 static int rsu_alloc_tx_list(struct rsu_softc *); 180 static void rsu_free_tx_list(struct rsu_softc *); 181 static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 182 static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 183 static struct rsu_data *rsu_getbuf(struct rsu_softc *); 184 static void rsu_freebuf(struct rsu_softc *, struct rsu_data *); 185 static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 186 int); 187 static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 188 static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 189 static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 190 static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 191 int); 192 static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 193 static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 194 static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 195 static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 196 static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 197 static int rsu_read_rom(struct rsu_softc *); 198 static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 199 static void rsu_calib_task(void *, int); 200 static void rsu_tx_task(void *, int); 201 static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 202 #ifdef notyet 203 static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 204 static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 205 #endif 206 static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 207 static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 208 static int rsu_disconnect(struct rsu_softc *); 209 static int rsu_hwrssi_to_rssi(struct rsu_softc *, int hw_rssi); 210 static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 211 static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 212 static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 213 static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 214 #if 0 215 static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 216 #endif 217 static struct mbuf * rsu_rx_frame(struct rsu_softc *, uint8_t *, int); 218 static struct mbuf * rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int); 219 static struct mbuf * 220 rsu_rxeof(struct usb_xfer *, struct rsu_data *); 221 static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 222 static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 223 const struct ieee80211_bpf_params *); 224 static void rsu_init(struct rsu_softc *); 225 static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 226 struct mbuf *, struct rsu_data *); 227 static int rsu_transmit(struct ieee80211com *, struct mbuf *); 228 static void rsu_start(struct rsu_softc *); 229 static void _rsu_start(struct rsu_softc *); 230 static void rsu_parent(struct ieee80211com *); 231 static void rsu_stop(struct rsu_softc *); 232 static void rsu_ms_delay(struct rsu_softc *, int); 233 234 static device_method_t rsu_methods[] = { 235 DEVMETHOD(device_probe, rsu_match), 236 DEVMETHOD(device_attach, rsu_attach), 237 DEVMETHOD(device_detach, rsu_detach), 238 239 DEVMETHOD_END 240 }; 241 242 static driver_t rsu_driver = { 243 .name = "rsu", 244 .methods = rsu_methods, 245 .size = sizeof(struct rsu_softc) 246 }; 247 248 static devclass_t rsu_devclass; 249 250 DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 251 MODULE_DEPEND(rsu, wlan, 1, 1, 1); 252 MODULE_DEPEND(rsu, usb, 1, 1, 1); 253 MODULE_DEPEND(rsu, firmware, 1, 1, 1); 254 MODULE_VERSION(rsu, 1); 255 USB_PNP_HOST_INFO(rsu_devs); 256 257 static const uint8_t rsu_chan_2ghz[] = 258 { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }; 259 260 static uint8_t rsu_wme_ac_xfer_map[4] = { 261 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 262 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 263 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 264 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 265 }; 266 267 /* XXX hard-coded */ 268 #define RSU_H2C_ENDPOINT 3 269 270 static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 271 [RSU_BULK_RX] = { 272 .type = UE_BULK, 273 .endpoint = UE_ADDR_ANY, 274 .direction = UE_DIR_IN, 275 .bufsize = RSU_RXBUFSZ, 276 .flags = { 277 .pipe_bof = 1, 278 .short_xfer_ok = 1 279 }, 280 .callback = rsu_bulk_rx_callback 281 }, 282 [RSU_BULK_TX_BE_BK] = { 283 .type = UE_BULK, 284 .endpoint = 0x06, 285 .direction = UE_DIR_OUT, 286 .bufsize = RSU_TXBUFSZ, 287 .flags = { 288 .ext_buffer = 1, 289 .pipe_bof = 1, 290 .force_short_xfer = 1 291 }, 292 .callback = rsu_bulk_tx_callback_be_bk, 293 .timeout = RSU_TX_TIMEOUT 294 }, 295 [RSU_BULK_TX_VI_VO] = { 296 .type = UE_BULK, 297 .endpoint = 0x04, 298 .direction = UE_DIR_OUT, 299 .bufsize = RSU_TXBUFSZ, 300 .flags = { 301 .ext_buffer = 1, 302 .pipe_bof = 1, 303 .force_short_xfer = 1 304 }, 305 .callback = rsu_bulk_tx_callback_vi_vo, 306 .timeout = RSU_TX_TIMEOUT 307 }, 308 [RSU_BULK_TX_H2C] = { 309 .type = UE_BULK, 310 .endpoint = 0x0d, 311 .direction = UE_DIR_OUT, 312 .bufsize = RSU_TXBUFSZ, 313 .flags = { 314 .ext_buffer = 1, 315 .pipe_bof = 1, 316 .short_xfer_ok = 1 317 }, 318 .callback = rsu_bulk_tx_callback_h2c, 319 .timeout = RSU_TX_TIMEOUT 320 }, 321 }; 322 323 static int 324 rsu_match(device_t self) 325 { 326 struct usb_attach_arg *uaa = device_get_ivars(self); 327 328 if (uaa->usb_mode != USB_MODE_HOST || 329 uaa->info.bIfaceIndex != 0 || 330 uaa->info.bConfigIndex != 0) 331 return (ENXIO); 332 333 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 334 } 335 336 static int 337 rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg) 338 { 339 340 return (ENOTSUP); 341 } 342 343 static void 344 rsu_update_chw(struct ieee80211com *ic) 345 { 346 347 } 348 349 /* 350 * notification from net80211 that it'd like to do A-MPDU on the given TID. 351 * 352 * Note: this actually hangs traffic at the present moment, so don't use it. 353 * The firmware debug does indiciate it's sending and establishing a TX AMPDU 354 * session, but then no traffic flows. 355 */ 356 static int 357 rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 358 { 359 #if 0 360 struct rsu_softc *sc = ni->ni_ic->ic_softc; 361 struct r92s_add_ba_req req; 362 363 /* Don't enable if it's requested or running */ 364 if (IEEE80211_AMPDU_REQUESTED(tap)) 365 return (0); 366 if (IEEE80211_AMPDU_RUNNING(tap)) 367 return (0); 368 369 /* We've decided to send addba; so send it */ 370 req.tid = htole32(tap->txa_tid); 371 372 /* Attempt net80211 state */ 373 if (ieee80211_ampdu_tx_request_ext(ni, tap->txa_tid) != 1) 374 return (0); 375 376 /* Send the firmware command */ 377 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: establishing AMPDU TX for TID %d\n", 378 __func__, 379 tap->txa_tid); 380 381 RSU_LOCK(sc); 382 if (rsu_fw_cmd(sc, R92S_CMD_ADDBA_REQ, &req, sizeof(req)) != 1) { 383 RSU_UNLOCK(sc); 384 /* Mark failure */ 385 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 0); 386 return (0); 387 } 388 RSU_UNLOCK(sc); 389 390 /* Mark success; we don't get any further notifications */ 391 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 1); 392 #endif 393 /* Return 0, we're driving this ourselves */ 394 return (0); 395 } 396 397 static int 398 rsu_wme_update(struct ieee80211com *ic) 399 { 400 401 /* Firmware handles this; not our problem */ 402 return (0); 403 } 404 405 static int 406 rsu_attach(device_t self) 407 { 408 struct usb_attach_arg *uaa = device_get_ivars(self); 409 struct rsu_softc *sc = device_get_softc(self); 410 struct ieee80211com *ic = &sc->sc_ic; 411 int error; 412 uint8_t iface_index; 413 struct usb_interface *iface; 414 const char *rft; 415 416 device_set_usb_desc(self); 417 sc->sc_udev = uaa->device; 418 sc->sc_dev = self; 419 if (rsu_enable_11n) 420 sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED); 421 422 /* Get number of endpoints */ 423 iface = usbd_get_iface(sc->sc_udev, 0); 424 sc->sc_nendpoints = iface->idesc->bNumEndpoints; 425 426 /* Endpoints are hard-coded for now, so enforce 4-endpoint only */ 427 if (sc->sc_nendpoints != 4) { 428 device_printf(sc->sc_dev, 429 "the driver currently only supports 4-endpoint devices\n"); 430 return (ENXIO); 431 } 432 433 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 434 MTX_DEF); 435 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 436 rsu_calib_task, sc); 437 TASK_INIT(&sc->tx_task, 0, rsu_tx_task, sc); 438 mbufq_init(&sc->sc_snd, ifqmaxlen); 439 440 /* Allocate Tx/Rx buffers. */ 441 error = rsu_alloc_rx_list(sc); 442 if (error != 0) { 443 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 444 goto fail_usb; 445 } 446 447 error = rsu_alloc_tx_list(sc); 448 if (error != 0) { 449 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 450 rsu_free_rx_list(sc); 451 goto fail_usb; 452 } 453 454 iface_index = 0; 455 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 456 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 457 if (error) { 458 device_printf(sc->sc_dev, 459 "could not allocate USB transfers, err=%s\n", 460 usbd_errstr(error)); 461 goto fail_usb; 462 } 463 RSU_LOCK(sc); 464 /* Read chip revision. */ 465 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 466 if (sc->cut != 3) 467 sc->cut = (sc->cut >> 1) + 1; 468 error = rsu_read_rom(sc); 469 RSU_UNLOCK(sc); 470 if (error != 0) { 471 device_printf(self, "could not read ROM\n"); 472 goto fail_rom; 473 } 474 475 /* Figure out TX/RX streams */ 476 switch (sc->rom[84]) { 477 case 0x0: 478 sc->sc_rftype = RTL8712_RFCONFIG_1T1R; 479 sc->sc_nrxstream = 1; 480 sc->sc_ntxstream = 1; 481 rft = "1T1R"; 482 break; 483 case 0x1: 484 sc->sc_rftype = RTL8712_RFCONFIG_1T2R; 485 sc->sc_nrxstream = 2; 486 sc->sc_ntxstream = 1; 487 rft = "1T2R"; 488 break; 489 case 0x2: 490 sc->sc_rftype = RTL8712_RFCONFIG_2T2R; 491 sc->sc_nrxstream = 2; 492 sc->sc_ntxstream = 2; 493 rft = "2T2R"; 494 break; 495 default: 496 device_printf(sc->sc_dev, 497 "%s: unknown board type (rfconfig=0x%02x)\n", 498 __func__, 499 sc->rom[84]); 500 goto fail_rom; 501 } 502 503 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]); 504 device_printf(self, "MAC/BB RTL8712 cut %d %s\n", sc->cut, rft); 505 506 ic->ic_softc = sc; 507 ic->ic_name = device_get_nameunit(self); 508 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 509 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 510 511 /* Set device capabilities. */ 512 ic->ic_caps = 513 IEEE80211_C_STA | /* station mode */ 514 #if 0 515 IEEE80211_C_BGSCAN | /* Background scan. */ 516 #endif 517 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 518 IEEE80211_C_WME | /* WME/QoS */ 519 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 520 IEEE80211_C_WPA; /* WPA/RSN. */ 521 522 /* Check if HT support is present. */ 523 if (sc->sc_ht) { 524 device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__); 525 526 /* Enable basic HT */ 527 ic->ic_htcaps = IEEE80211_HTC_HT | 528 #if 0 529 IEEE80211_HTC_AMPDU | 530 #endif 531 IEEE80211_HTC_AMSDU | 532 IEEE80211_HTCAP_MAXAMSDU_3839 | 533 IEEE80211_HTCAP_SMPS_OFF; 534 ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 535 536 /* set number of spatial streams */ 537 ic->ic_txstream = sc->sc_ntxstream; 538 ic->ic_rxstream = sc->sc_nrxstream; 539 } 540 541 rsu_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 542 ic->ic_channels); 543 544 ieee80211_ifattach(ic); 545 ic->ic_raw_xmit = rsu_raw_xmit; 546 ic->ic_scan_start = rsu_scan_start; 547 ic->ic_scan_end = rsu_scan_end; 548 ic->ic_getradiocaps = rsu_getradiocaps; 549 ic->ic_set_channel = rsu_set_channel; 550 ic->ic_vap_create = rsu_vap_create; 551 ic->ic_vap_delete = rsu_vap_delete; 552 ic->ic_update_mcast = rsu_update_mcast; 553 ic->ic_parent = rsu_parent; 554 ic->ic_transmit = rsu_transmit; 555 ic->ic_send_mgmt = rsu_send_mgmt; 556 ic->ic_update_chw = rsu_update_chw; 557 ic->ic_ampdu_enable = rsu_ampdu_enable; 558 ic->ic_wme.wme_update = rsu_wme_update; 559 560 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 561 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 562 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 563 RSU_RX_RADIOTAP_PRESENT); 564 565 if (bootverbose) 566 ieee80211_announce(ic); 567 568 return (0); 569 570 fail_rom: 571 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 572 fail_usb: 573 mtx_destroy(&sc->sc_mtx); 574 return (ENXIO); 575 } 576 577 static int 578 rsu_detach(device_t self) 579 { 580 struct rsu_softc *sc = device_get_softc(self); 581 struct ieee80211com *ic = &sc->sc_ic; 582 583 RSU_LOCK(sc); 584 rsu_stop(sc); 585 RSU_UNLOCK(sc); 586 587 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 588 589 /* 590 * Free buffers /before/ we detach from net80211, else node 591 * references to destroyed vaps will lead to a panic. 592 */ 593 /* Free Tx/Rx buffers. */ 594 RSU_LOCK(sc); 595 rsu_free_tx_list(sc); 596 rsu_free_rx_list(sc); 597 RSU_UNLOCK(sc); 598 599 /* Frames are freed; detach from net80211 */ 600 ieee80211_ifdetach(ic); 601 602 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 603 taskqueue_drain(taskqueue_thread, &sc->tx_task); 604 605 mtx_destroy(&sc->sc_mtx); 606 607 return (0); 608 } 609 610 static usb_error_t 611 rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 612 void *data) 613 { 614 usb_error_t err; 615 int ntries = 10; 616 617 RSU_ASSERT_LOCKED(sc); 618 619 while (ntries--) { 620 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 621 req, data, 0, NULL, 250 /* ms */); 622 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 623 break; 624 DPRINTFN(1, "Control request failed, %s (retrying)\n", 625 usbd_errstr(err)); 626 rsu_ms_delay(sc, 10); 627 } 628 629 return (err); 630 } 631 632 static struct ieee80211vap * 633 rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 634 enum ieee80211_opmode opmode, int flags, 635 const uint8_t bssid[IEEE80211_ADDR_LEN], 636 const uint8_t mac[IEEE80211_ADDR_LEN]) 637 { 638 struct rsu_vap *uvp; 639 struct ieee80211vap *vap; 640 641 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 642 return (NULL); 643 644 uvp = malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO); 645 vap = &uvp->vap; 646 647 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 648 flags, bssid) != 0) { 649 /* out of memory */ 650 free(uvp, M_80211_VAP); 651 return (NULL); 652 } 653 654 /* override state transition machine */ 655 uvp->newstate = vap->iv_newstate; 656 vap->iv_newstate = rsu_newstate; 657 658 /* Limits from the r92su driver */ 659 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 660 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K; 661 662 /* complete setup */ 663 ieee80211_vap_attach(vap, ieee80211_media_change, 664 ieee80211_media_status, mac); 665 ic->ic_opmode = opmode; 666 667 return (vap); 668 } 669 670 static void 671 rsu_vap_delete(struct ieee80211vap *vap) 672 { 673 struct rsu_vap *uvp = RSU_VAP(vap); 674 675 ieee80211_vap_detach(vap); 676 free(uvp, M_80211_VAP); 677 } 678 679 static void 680 rsu_scan_start(struct ieee80211com *ic) 681 { 682 struct rsu_softc *sc = ic->ic_softc; 683 int error; 684 685 /* Scanning is done by the firmware. */ 686 RSU_LOCK(sc); 687 /* XXX TODO: force awake if in in network-sleep? */ 688 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 689 RSU_UNLOCK(sc); 690 if (error != 0) 691 device_printf(sc->sc_dev, 692 "could not send site survey command\n"); 693 } 694 695 static void 696 rsu_scan_end(struct ieee80211com *ic) 697 { 698 /* Nothing to do here. */ 699 } 700 701 static void 702 rsu_getradiocaps(struct ieee80211com *ic, 703 int maxchans, int *nchans, struct ieee80211_channel chans[]) 704 { 705 struct rsu_softc *sc = ic->ic_softc; 706 uint8_t bands[IEEE80211_MODE_BYTES]; 707 708 /* Set supported .11b and .11g rates. */ 709 memset(bands, 0, sizeof(bands)); 710 setbit(bands, IEEE80211_MODE_11B); 711 setbit(bands, IEEE80211_MODE_11G); 712 if (sc->sc_ht) 713 setbit(bands, IEEE80211_MODE_11NG); 714 ieee80211_add_channel_list_2ghz(chans, maxchans, nchans, 715 rsu_chan_2ghz, nitems(rsu_chan_2ghz), bands, 0); 716 } 717 718 static void 719 rsu_set_channel(struct ieee80211com *ic __unused) 720 { 721 /* We are unable to switch channels, yet. */ 722 } 723 724 static void 725 rsu_update_mcast(struct ieee80211com *ic) 726 { 727 /* XXX do nothing? */ 728 } 729 730 static int 731 rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 732 int ndata, int maxsz) 733 { 734 int i, error; 735 736 for (i = 0; i < ndata; i++) { 737 struct rsu_data *dp = &data[i]; 738 dp->sc = sc; 739 dp->m = NULL; 740 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 741 if (dp->buf == NULL) { 742 device_printf(sc->sc_dev, 743 "could not allocate buffer\n"); 744 error = ENOMEM; 745 goto fail; 746 } 747 dp->ni = NULL; 748 } 749 750 return (0); 751 fail: 752 rsu_free_list(sc, data, ndata); 753 return (error); 754 } 755 756 static int 757 rsu_alloc_rx_list(struct rsu_softc *sc) 758 { 759 int error, i; 760 761 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 762 RSU_RXBUFSZ); 763 if (error != 0) 764 return (error); 765 766 STAILQ_INIT(&sc->sc_rx_active); 767 STAILQ_INIT(&sc->sc_rx_inactive); 768 769 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 770 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 771 772 return (0); 773 } 774 775 static int 776 rsu_alloc_tx_list(struct rsu_softc *sc) 777 { 778 int error, i; 779 780 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 781 RSU_TXBUFSZ); 782 if (error != 0) 783 return (error); 784 785 STAILQ_INIT(&sc->sc_tx_inactive); 786 787 for (i = 0; i != RSU_N_TRANSFER; i++) { 788 STAILQ_INIT(&sc->sc_tx_active[i]); 789 STAILQ_INIT(&sc->sc_tx_pending[i]); 790 } 791 792 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 793 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 794 } 795 796 return (0); 797 } 798 799 static void 800 rsu_free_tx_list(struct rsu_softc *sc) 801 { 802 int i; 803 804 /* prevent further allocations from TX list(s) */ 805 STAILQ_INIT(&sc->sc_tx_inactive); 806 807 for (i = 0; i != RSU_N_TRANSFER; i++) { 808 STAILQ_INIT(&sc->sc_tx_active[i]); 809 STAILQ_INIT(&sc->sc_tx_pending[i]); 810 } 811 812 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 813 } 814 815 static void 816 rsu_free_rx_list(struct rsu_softc *sc) 817 { 818 /* prevent further allocations from RX list(s) */ 819 STAILQ_INIT(&sc->sc_rx_inactive); 820 STAILQ_INIT(&sc->sc_rx_active); 821 822 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 823 } 824 825 static void 826 rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 827 { 828 int i; 829 830 for (i = 0; i < ndata; i++) { 831 struct rsu_data *dp = &data[i]; 832 833 if (dp->buf != NULL) { 834 free(dp->buf, M_USBDEV); 835 dp->buf = NULL; 836 } 837 if (dp->ni != NULL) { 838 ieee80211_free_node(dp->ni); 839 dp->ni = NULL; 840 } 841 } 842 } 843 844 static struct rsu_data * 845 _rsu_getbuf(struct rsu_softc *sc) 846 { 847 struct rsu_data *bf; 848 849 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 850 if (bf != NULL) 851 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 852 else 853 bf = NULL; 854 return (bf); 855 } 856 857 static struct rsu_data * 858 rsu_getbuf(struct rsu_softc *sc) 859 { 860 struct rsu_data *bf; 861 862 RSU_ASSERT_LOCKED(sc); 863 864 bf = _rsu_getbuf(sc); 865 if (bf == NULL) { 866 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: no buffers\n", __func__); 867 } 868 return (bf); 869 } 870 871 static void 872 rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf) 873 { 874 875 RSU_ASSERT_LOCKED(sc); 876 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next); 877 } 878 879 static int 880 rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 881 int len) 882 { 883 usb_device_request_t req; 884 885 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 886 req.bRequest = R92S_REQ_REGS; 887 USETW(req.wValue, addr); 888 USETW(req.wIndex, 0); 889 USETW(req.wLength, len); 890 891 return (rsu_do_request(sc, &req, buf)); 892 } 893 894 static void 895 rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 896 { 897 rsu_write_region_1(sc, addr, &val, 1); 898 } 899 900 static void 901 rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 902 { 903 val = htole16(val); 904 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 905 } 906 907 static void 908 rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 909 { 910 val = htole32(val); 911 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 912 } 913 914 static int 915 rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 916 int len) 917 { 918 usb_device_request_t req; 919 920 req.bmRequestType = UT_READ_VENDOR_DEVICE; 921 req.bRequest = R92S_REQ_REGS; 922 USETW(req.wValue, addr); 923 USETW(req.wIndex, 0); 924 USETW(req.wLength, len); 925 926 return (rsu_do_request(sc, &req, buf)); 927 } 928 929 static uint8_t 930 rsu_read_1(struct rsu_softc *sc, uint16_t addr) 931 { 932 uint8_t val; 933 934 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 935 return (0xff); 936 return (val); 937 } 938 939 static uint16_t 940 rsu_read_2(struct rsu_softc *sc, uint16_t addr) 941 { 942 uint16_t val; 943 944 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 945 return (0xffff); 946 return (le16toh(val)); 947 } 948 949 static uint32_t 950 rsu_read_4(struct rsu_softc *sc, uint16_t addr) 951 { 952 uint32_t val; 953 954 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 955 return (0xffffffff); 956 return (le32toh(val)); 957 } 958 959 static int 960 rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 961 { 962 int ntries; 963 964 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 965 rsu_ms_delay(sc, 1); 966 for (ntries = 0; ntries < 50; ntries++) { 967 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 968 return (0); 969 rsu_ms_delay(sc, 1); 970 } 971 return (ETIMEDOUT); 972 } 973 974 static uint8_t 975 rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 976 { 977 uint32_t reg; 978 int ntries; 979 980 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 981 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 982 reg &= ~R92S_EFUSE_CTRL_VALID; 983 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 984 /* Wait for read operation to complete. */ 985 for (ntries = 0; ntries < 100; ntries++) { 986 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 987 if (reg & R92S_EFUSE_CTRL_VALID) 988 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 989 rsu_ms_delay(sc, 1); 990 } 991 device_printf(sc->sc_dev, 992 "could not read efuse byte at address 0x%x\n", addr); 993 return (0xff); 994 } 995 996 static int 997 rsu_read_rom(struct rsu_softc *sc) 998 { 999 uint8_t *rom = sc->rom; 1000 uint16_t addr = 0; 1001 uint32_t reg; 1002 uint8_t off, msk; 1003 int i; 1004 1005 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 1006 reg = rsu_read_1(sc, R92S_EE_9346CR); 1007 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 1008 return (EIO); 1009 1010 /* Turn on 2.5V to prevent eFuse leakage. */ 1011 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 1012 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 1013 rsu_ms_delay(sc, 1); 1014 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 1015 1016 /* Read full ROM image. */ 1017 memset(&sc->rom, 0xff, sizeof(sc->rom)); 1018 while (addr < 512) { 1019 reg = rsu_efuse_read_1(sc, addr); 1020 if (reg == 0xff) 1021 break; 1022 addr++; 1023 off = reg >> 4; 1024 msk = reg & 0xf; 1025 for (i = 0; i < 4; i++) { 1026 if (msk & (1 << i)) 1027 continue; 1028 rom[off * 8 + i * 2 + 0] = 1029 rsu_efuse_read_1(sc, addr); 1030 addr++; 1031 rom[off * 8 + i * 2 + 1] = 1032 rsu_efuse_read_1(sc, addr); 1033 addr++; 1034 } 1035 } 1036 #ifdef USB_DEBUG 1037 if (rsu_debug >= 5) { 1038 /* Dump ROM content. */ 1039 printf("\n"); 1040 for (i = 0; i < sizeof(sc->rom); i++) 1041 printf("%02x:", rom[i]); 1042 printf("\n"); 1043 } 1044 #endif 1045 return (0); 1046 } 1047 1048 static int 1049 rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 1050 { 1051 const uint8_t which = RSU_H2C_ENDPOINT; 1052 struct rsu_data *data; 1053 struct r92s_tx_desc *txd; 1054 struct r92s_fw_cmd_hdr *cmd; 1055 int cmdsz; 1056 int xferlen; 1057 1058 RSU_ASSERT_LOCKED(sc); 1059 1060 data = rsu_getbuf(sc); 1061 if (data == NULL) 1062 return (ENOMEM); 1063 1064 /* Blank the entire payload, just to be safe */ 1065 memset(data->buf, '\0', RSU_TXBUFSZ); 1066 1067 /* Round-up command length to a multiple of 8 bytes. */ 1068 /* XXX TODO: is this required? */ 1069 cmdsz = (len + 7) & ~7; 1070 1071 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 1072 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 1073 memset(data->buf, 0, xferlen); 1074 1075 /* Setup Tx descriptor. */ 1076 txd = (struct r92s_tx_desc *)data->buf; 1077 txd->txdw0 = htole32( 1078 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1079 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 1080 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1081 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 1082 1083 /* Setup command header. */ 1084 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 1085 cmd->len = htole16(cmdsz); 1086 cmd->code = code; 1087 cmd->seq = sc->cmd_seq; 1088 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 1089 1090 /* Copy command payload. */ 1091 memcpy(&cmd[1], buf, len); 1092 1093 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD, 1094 "%s: Tx cmd code=0x%x len=0x%x\n", 1095 __func__, code, cmdsz); 1096 data->buflen = xferlen; 1097 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1098 usbd_transfer_start(sc->sc_xfer[which]); 1099 1100 return (0); 1101 } 1102 1103 /* ARGSUSED */ 1104 static void 1105 rsu_calib_task(void *arg, int pending __unused) 1106 { 1107 struct rsu_softc *sc = arg; 1108 #ifdef notyet 1109 uint32_t reg; 1110 #endif 1111 1112 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n", 1113 __func__); 1114 1115 RSU_LOCK(sc); 1116 #ifdef notyet 1117 /* Read WPS PBC status. */ 1118 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 1119 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 1120 rsu_write_1(sc, R92S_GPIO_IO_SEL, 1121 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 1122 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 1123 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 1124 DPRINTF(("WPS PBC is pushed\n")); 1125 #endif 1126 /* Read current signal level. */ 1127 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 1128 sc->sc_currssi = rsu_read_4(sc, R92S_IOCMD_DATA); 1129 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d (%d)\n", 1130 __func__, sc->sc_currssi, 1131 rsu_hwrssi_to_rssi(sc, sc->sc_currssi)); 1132 } 1133 if (sc->sc_calibrating) 1134 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1135 RSU_UNLOCK(sc); 1136 } 1137 1138 static void 1139 rsu_tx_task(void *arg, int pending __unused) 1140 { 1141 struct rsu_softc *sc = arg; 1142 1143 RSU_LOCK(sc); 1144 _rsu_start(sc); 1145 RSU_UNLOCK(sc); 1146 } 1147 1148 #define RSU_PWR_UNKNOWN 0x0 1149 #define RSU_PWR_ACTIVE 0x1 1150 #define RSU_PWR_OFF 0x2 1151 #define RSU_PWR_SLEEP 0x3 1152 1153 /* 1154 * Set the current power state. 1155 * 1156 * The rtlwifi code doesn't do this so aggressively; it 1157 * waits for an idle period after association with 1158 * no traffic before doing this. 1159 * 1160 * For now - it's on in all states except RUN, and 1161 * in RUN it'll transition to allow sleep. 1162 */ 1163 1164 struct r92s_pwr_cmd { 1165 uint8_t mode; 1166 uint8_t smart_ps; 1167 uint8_t bcn_pass_time; 1168 }; 1169 1170 static int 1171 rsu_set_fw_power_state(struct rsu_softc *sc, int state) 1172 { 1173 struct r92s_set_pwr_mode cmd; 1174 //struct r92s_pwr_cmd cmd; 1175 int error; 1176 1177 RSU_ASSERT_LOCKED(sc); 1178 1179 /* only change state if required */ 1180 if (sc->sc_curpwrstate == state) 1181 return (0); 1182 1183 memset(&cmd, 0, sizeof(cmd)); 1184 1185 switch (state) { 1186 case RSU_PWR_ACTIVE: 1187 /* Force the hardware awake */ 1188 rsu_write_1(sc, R92S_USB_HRPWM, 1189 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 1190 cmd.mode = R92S_PS_MODE_ACTIVE; 1191 break; 1192 case RSU_PWR_SLEEP: 1193 cmd.mode = R92S_PS_MODE_DTIM; /* XXX configurable? */ 1194 cmd.smart_ps = 1; /* XXX 2 if doing p2p */ 1195 cmd.bcn_pass_time = 5; /* in 100mS usb.c, linux/rtlwifi */ 1196 break; 1197 case RSU_PWR_OFF: 1198 cmd.mode = R92S_PS_MODE_RADIOOFF; 1199 break; 1200 default: 1201 device_printf(sc->sc_dev, "%s: unknown ps mode (%d)\n", 1202 __func__, 1203 state); 1204 return (ENXIO); 1205 } 1206 1207 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1208 "%s: setting ps mode to %d (mode %d)\n", 1209 __func__, state, cmd.mode); 1210 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 1211 if (error == 0) 1212 sc->sc_curpwrstate = state; 1213 1214 return (error); 1215 } 1216 1217 static int 1218 rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1219 { 1220 struct rsu_vap *uvp = RSU_VAP(vap); 1221 struct ieee80211com *ic = vap->iv_ic; 1222 struct rsu_softc *sc = ic->ic_softc; 1223 struct ieee80211_node *ni; 1224 struct ieee80211_rateset *rs; 1225 enum ieee80211_state ostate; 1226 int error, startcal = 0; 1227 1228 ostate = vap->iv_state; 1229 RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n", 1230 __func__, 1231 ieee80211_state_name[ostate], 1232 ieee80211_state_name[nstate]); 1233 1234 IEEE80211_UNLOCK(ic); 1235 if (ostate == IEEE80211_S_RUN) { 1236 RSU_LOCK(sc); 1237 /* Stop calibration. */ 1238 sc->sc_calibrating = 0; 1239 RSU_UNLOCK(sc); 1240 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 1241 taskqueue_drain(taskqueue_thread, &sc->tx_task); 1242 /* Disassociate from our current BSS. */ 1243 RSU_LOCK(sc); 1244 rsu_disconnect(sc); 1245 } else 1246 RSU_LOCK(sc); 1247 switch (nstate) { 1248 case IEEE80211_S_INIT: 1249 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1250 break; 1251 case IEEE80211_S_AUTH: 1252 ni = ieee80211_ref_node(vap->iv_bss); 1253 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1254 error = rsu_join_bss(sc, ni); 1255 ieee80211_free_node(ni); 1256 if (error != 0) { 1257 device_printf(sc->sc_dev, 1258 "could not send join command\n"); 1259 } 1260 break; 1261 case IEEE80211_S_RUN: 1262 ni = ieee80211_ref_node(vap->iv_bss); 1263 rs = &ni->ni_rates; 1264 /* Indicate highest supported rate. */ 1265 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1266 (void) rsu_set_fw_power_state(sc, RSU_PWR_SLEEP); 1267 ieee80211_free_node(ni); 1268 startcal = 1; 1269 break; 1270 default: 1271 break; 1272 } 1273 sc->sc_calibrating = 1; 1274 /* Start periodic calibration. */ 1275 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1276 RSU_UNLOCK(sc); 1277 IEEE80211_LOCK(ic); 1278 return (uvp->newstate(vap, nstate, arg)); 1279 } 1280 1281 #ifdef notyet 1282 static void 1283 rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1284 { 1285 struct r92s_fw_cmd_set_key key; 1286 1287 memset(&key, 0, sizeof(key)); 1288 /* Map net80211 cipher to HW crypto algorithm. */ 1289 switch (k->wk_cipher->ic_cipher) { 1290 case IEEE80211_CIPHER_WEP: 1291 if (k->wk_keylen < 8) 1292 key.algo = R92S_KEY_ALGO_WEP40; 1293 else 1294 key.algo = R92S_KEY_ALGO_WEP104; 1295 break; 1296 case IEEE80211_CIPHER_TKIP: 1297 key.algo = R92S_KEY_ALGO_TKIP; 1298 break; 1299 case IEEE80211_CIPHER_AES_CCM: 1300 key.algo = R92S_KEY_ALGO_AES; 1301 break; 1302 default: 1303 return; 1304 } 1305 key.id = k->wk_keyix; 1306 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1307 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1308 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1309 } 1310 1311 static void 1312 rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1313 { 1314 struct r92s_fw_cmd_set_key key; 1315 1316 memset(&key, 0, sizeof(key)); 1317 key.id = k->wk_keyix; 1318 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1319 } 1320 #endif 1321 1322 static int 1323 rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1324 { 1325 struct r92s_fw_cmd_sitesurvey cmd; 1326 struct ieee80211com *ic = &sc->sc_ic; 1327 int r; 1328 1329 RSU_ASSERT_LOCKED(sc); 1330 1331 memset(&cmd, 0, sizeof(cmd)); 1332 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1) 1333 cmd.active = htole32(1); 1334 cmd.limit = htole32(48); 1335 if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) { 1336 /* Do a directed scan for second pass. */ 1337 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1338 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1339 vap->iv_des_ssid[0].len); 1340 1341 } 1342 DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass); 1343 r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd)); 1344 if (r == 0) { 1345 sc->sc_scanning = 1; 1346 } 1347 return (r); 1348 } 1349 1350 static int 1351 rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1352 { 1353 struct ieee80211com *ic = &sc->sc_ic; 1354 struct ieee80211vap *vap = ni->ni_vap; 1355 struct ndis_wlan_bssid_ex *bss; 1356 struct ndis_802_11_fixed_ies *fixed; 1357 struct r92s_fw_cmd_auth auth; 1358 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1359 uint8_t *frm; 1360 uint8_t opmode; 1361 int error; 1362 int cnt; 1363 char *msg = "rsujoin"; 1364 1365 RSU_ASSERT_LOCKED(sc); 1366 1367 /* 1368 * Until net80211 scanning doesn't automatically finish 1369 * before we tell it to, let's just wait until any pending 1370 * scan is done. 1371 * 1372 * XXX TODO: yes, this releases and re-acquires the lock. 1373 * We should re-verify the state whenever we re-attempt this! 1374 */ 1375 cnt = 0; 1376 while (sc->sc_scanning && cnt < 10) { 1377 device_printf(sc->sc_dev, 1378 "%s: still scanning! (attempt %d)\n", 1379 __func__, cnt); 1380 msleep(msg, &sc->sc_mtx, 0, msg, hz / 2); 1381 cnt++; 1382 } 1383 1384 /* Let the FW decide the opmode based on the capinfo field. */ 1385 opmode = NDIS802_11AUTOUNKNOWN; 1386 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1387 "%s: setting operating mode to %d\n", 1388 __func__, opmode); 1389 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1390 if (error != 0) 1391 return (error); 1392 1393 memset(&auth, 0, sizeof(auth)); 1394 if (vap->iv_flags & IEEE80211_F_WPA) { 1395 auth.mode = R92S_AUTHMODE_WPA; 1396 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1397 } else 1398 auth.mode = R92S_AUTHMODE_OPEN; 1399 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1400 "%s: setting auth mode to %d\n", 1401 __func__, auth.mode); 1402 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1403 if (error != 0) 1404 return (error); 1405 1406 memset(buf, 0, sizeof(buf)); 1407 bss = (struct ndis_wlan_bssid_ex *)buf; 1408 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1409 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1410 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1411 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1412 bss->privacy = htole32(1); 1413 bss->rssi = htole32(ni->ni_avgrssi); 1414 if (ic->ic_curmode == IEEE80211_MODE_11B) 1415 bss->networktype = htole32(NDIS802_11DS); 1416 else 1417 bss->networktype = htole32(NDIS802_11OFDM24); 1418 bss->config.len = htole32(sizeof(bss->config)); 1419 bss->config.bintval = htole32(ni->ni_intval); 1420 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1421 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1422 /* XXX verify how this is supposed to look! */ 1423 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1424 ni->ni_rates.rs_nrates); 1425 /* Write the fixed fields of the beacon frame. */ 1426 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1427 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1428 fixed->bintval = htole16(ni->ni_intval); 1429 fixed->capabilities = htole16(ni->ni_capinfo); 1430 /* Write IEs to be included in the association request. */ 1431 frm = (uint8_t *)&fixed[1]; 1432 frm = ieee80211_add_rsn(frm, vap); 1433 frm = ieee80211_add_wpa(frm, vap); 1434 frm = ieee80211_add_qos(frm, ni); 1435 if ((ic->ic_flags & IEEE80211_F_WME) && 1436 (ni->ni_ies.wme_ie != NULL)) 1437 frm = ieee80211_add_wme_info(frm, &ic->ic_wme); 1438 if (ni->ni_flags & IEEE80211_NODE_HT) { 1439 frm = ieee80211_add_htcap(frm, ni); 1440 frm = ieee80211_add_htinfo(frm, ni); 1441 } 1442 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1443 bss->len = htole32(((frm - buf) + 3) & ~3); 1444 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD, 1445 "%s: sending join bss command to %s chan %d\n", 1446 __func__, 1447 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1448 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1449 } 1450 1451 static int 1452 rsu_disconnect(struct rsu_softc *sc) 1453 { 1454 uint32_t zero = 0; /* :-) */ 1455 1456 /* Disassociate from our current BSS. */ 1457 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1458 "%s: sending disconnect command\n", __func__); 1459 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1460 } 1461 1462 /* 1463 * Map the hardware provided RSSI value to a signal level. 1464 * For the most part it's just something we divide by and cap 1465 * so it doesn't overflow the representation by net80211. 1466 */ 1467 static int 1468 rsu_hwrssi_to_rssi(struct rsu_softc *sc, int hw_rssi) 1469 { 1470 int v; 1471 1472 if (hw_rssi == 0) 1473 return (0); 1474 v = hw_rssi >> 4; 1475 if (v > 80) 1476 v = 80; 1477 return (v); 1478 } 1479 1480 static void 1481 rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1482 { 1483 struct ieee80211com *ic = &sc->sc_ic; 1484 struct ieee80211_frame *wh; 1485 struct ndis_wlan_bssid_ex *bss; 1486 struct ieee80211_rx_stats rxs; 1487 struct mbuf *m; 1488 int pktlen; 1489 1490 if (__predict_false(len < sizeof(*bss))) 1491 return; 1492 bss = (struct ndis_wlan_bssid_ex *)buf; 1493 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1494 return; 1495 1496 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1497 "%s: found BSS %s: len=%d chan=%d inframode=%d " 1498 "networktype=%d privacy=%d, RSSI=%d\n", 1499 __func__, 1500 ether_sprintf(bss->macaddr), le32toh(bss->len), 1501 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1502 le32toh(bss->networktype), le32toh(bss->privacy), 1503 le32toh(bss->rssi)); 1504 1505 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1506 /* XXX TODO: just call the new scan API methods! */ 1507 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1508 if (__predict_false(pktlen > MCLBYTES)) 1509 return; 1510 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1511 if (__predict_false(m == NULL)) 1512 return; 1513 wh = mtod(m, struct ieee80211_frame *); 1514 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1515 IEEE80211_FC0_SUBTYPE_BEACON; 1516 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1517 USETW(wh->i_dur, 0); 1518 IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr); 1519 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1520 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1521 *(uint16_t *)wh->i_seq = 0; 1522 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1523 1524 /* Finalize mbuf. */ 1525 m->m_pkthdr.len = m->m_len = pktlen; 1526 1527 /* Set channel flags for input path */ 1528 bzero(&rxs, sizeof(rxs)); 1529 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 1530 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 1531 rxs.c_ieee = le32toh(bss->config.dsconfig); 1532 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 1533 /* This is a number from 0..100; so let's just divide it down a bit */ 1534 rxs.rssi = le32toh(bss->rssi) / 2; 1535 rxs.nf = -96; 1536 1537 /* XXX avoid a LOR */ 1538 RSU_UNLOCK(sc); 1539 ieee80211_input_mimo_all(ic, m, &rxs); 1540 RSU_LOCK(sc); 1541 } 1542 1543 static void 1544 rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1545 { 1546 struct ieee80211com *ic = &sc->sc_ic; 1547 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1548 struct ieee80211_node *ni = vap->iv_bss; 1549 struct r92s_event_join_bss *rsp; 1550 uint32_t tmp; 1551 int res; 1552 1553 if (__predict_false(len < sizeof(*rsp))) 1554 return; 1555 rsp = (struct r92s_event_join_bss *)buf; 1556 res = (int)le32toh(rsp->join_res); 1557 1558 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1559 "%s: Rx join BSS event len=%d res=%d\n", 1560 __func__, len, res); 1561 1562 /* 1563 * XXX Don't do this; there's likely a better way to tell 1564 * the caller we failed. 1565 */ 1566 if (res <= 0) { 1567 RSU_UNLOCK(sc); 1568 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1569 RSU_LOCK(sc); 1570 return; 1571 } 1572 1573 tmp = le32toh(rsp->associd); 1574 if (tmp >= vap->iv_max_aid) { 1575 DPRINTF("Assoc ID overflow\n"); 1576 tmp = 1; 1577 } 1578 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1579 "%s: associated with %s associd=%d\n", 1580 __func__, ether_sprintf(rsp->bss.macaddr), tmp); 1581 /* XXX is this required? What's the top two bits for again? */ 1582 ni->ni_associd = tmp | 0xc000; 1583 RSU_UNLOCK(sc); 1584 ieee80211_new_state(vap, IEEE80211_S_RUN, 1585 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1586 RSU_LOCK(sc); 1587 } 1588 1589 static void 1590 rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len) 1591 { 1592 struct ieee80211com *ic = &sc->sc_ic; 1593 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1594 struct r92s_add_ba_event *ba = (void *) buf; 1595 struct ieee80211_node *ni; 1596 1597 if (len < sizeof(*ba)) { 1598 device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len); 1599 return; 1600 } 1601 1602 if (vap == NULL) 1603 return; 1604 1605 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: mac=%s, tid=%d, ssn=%d\n", 1606 __func__, 1607 ether_sprintf(ba->mac_addr), 1608 (int) ba->tid, 1609 (int) le16toh(ba->ssn)); 1610 1611 /* XXX do node lookup; this is STA specific */ 1612 1613 ni = ieee80211_ref_node(vap->iv_bss); 1614 ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32); 1615 ieee80211_free_node(ni); 1616 } 1617 1618 static void 1619 rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1620 { 1621 struct ieee80211com *ic = &sc->sc_ic; 1622 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1623 1624 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1625 "%s: Rx event code=%d len=%d\n", __func__, code, len); 1626 switch (code) { 1627 case R92S_EVT_SURVEY: 1628 rsu_event_survey(sc, buf, len); 1629 break; 1630 case R92S_EVT_SURVEY_DONE: 1631 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1632 "%s: site survey pass %d done, found %d BSS\n", 1633 __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf)); 1634 sc->sc_scanning = 0; 1635 if (vap->iv_state != IEEE80211_S_SCAN) 1636 break; /* Ignore if not scanning. */ 1637 1638 /* 1639 * XXX TODO: This needs to be done without a transition to 1640 * the SCAN state again. Grr. 1641 */ 1642 if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) { 1643 /* Schedule a directed scan for hidden APs. */ 1644 /* XXX bad! */ 1645 sc->sc_scan_pass = 1; 1646 RSU_UNLOCK(sc); 1647 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1648 RSU_LOCK(sc); 1649 break; 1650 } 1651 sc->sc_scan_pass = 0; 1652 break; 1653 case R92S_EVT_JOIN_BSS: 1654 if (vap->iv_state == IEEE80211_S_AUTH) 1655 rsu_event_join_bss(sc, buf, len); 1656 break; 1657 case R92S_EVT_DEL_STA: 1658 RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE, 1659 "%s: disassociated from %s\n", __func__, 1660 ether_sprintf(buf)); 1661 if (vap->iv_state == IEEE80211_S_RUN && 1662 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1663 RSU_UNLOCK(sc); 1664 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1665 RSU_LOCK(sc); 1666 } 1667 break; 1668 case R92S_EVT_WPS_PBC: 1669 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1670 "%s: WPS PBC pushed.\n", __func__); 1671 break; 1672 case R92S_EVT_FWDBG: 1673 buf[60] = '\0'; 1674 RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf); 1675 break; 1676 case R92S_EVT_ADDBA_REQ_REPORT: 1677 rsu_event_addba_req_report(sc, buf, len); 1678 break; 1679 default: 1680 device_printf(sc->sc_dev, "%s: unhandled code (%d)\n", __func__, code); 1681 break; 1682 } 1683 } 1684 1685 static void 1686 rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1687 { 1688 struct r92s_fw_cmd_hdr *cmd; 1689 int cmdsz; 1690 1691 RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len); 1692 1693 /* Skip Rx status. */ 1694 buf += sizeof(struct r92s_rx_stat); 1695 len -= sizeof(struct r92s_rx_stat); 1696 1697 /* Process all events. */ 1698 for (;;) { 1699 /* Check that command header fits. */ 1700 if (__predict_false(len < sizeof(*cmd))) 1701 break; 1702 cmd = (struct r92s_fw_cmd_hdr *)buf; 1703 /* Check that command payload fits. */ 1704 cmdsz = le16toh(cmd->len); 1705 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1706 break; 1707 1708 /* Process firmware event. */ 1709 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1710 1711 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1712 break; 1713 buf += sizeof(*cmd) + cmdsz; 1714 len -= sizeof(*cmd) + cmdsz; 1715 } 1716 } 1717 1718 #if 0 1719 static int8_t 1720 rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1721 { 1722 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1723 struct r92s_rx_phystat *phy; 1724 struct r92s_rx_cck *cck; 1725 uint8_t rpt; 1726 int8_t rssi; 1727 1728 if (rate <= 3) { 1729 cck = (struct r92s_rx_cck *)physt; 1730 rpt = (cck->agc_rpt >> 6) & 0x3; 1731 rssi = cck->agc_rpt & 0x3e; 1732 rssi = cckoff[rpt] - rssi; 1733 } else { /* OFDM/HT. */ 1734 phy = (struct r92s_rx_phystat *)physt; 1735 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1736 } 1737 return (rssi); 1738 } 1739 #endif 1740 1741 static struct mbuf * 1742 rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen) 1743 { 1744 struct ieee80211com *ic = &sc->sc_ic; 1745 struct ieee80211_frame *wh; 1746 struct r92s_rx_stat *stat; 1747 uint32_t rxdw0, rxdw3; 1748 struct mbuf *m; 1749 uint8_t rate; 1750 int infosz; 1751 1752 stat = (struct r92s_rx_stat *)buf; 1753 rxdw0 = le32toh(stat->rxdw0); 1754 rxdw3 = le32toh(stat->rxdw3); 1755 1756 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1757 counter_u64_add(ic->ic_ierrors, 1); 1758 return NULL; 1759 } 1760 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1761 counter_u64_add(ic->ic_ierrors, 1); 1762 return NULL; 1763 } 1764 1765 rate = MS(rxdw3, R92S_RXDW3_RATE); 1766 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1767 1768 #if 0 1769 /* Get RSSI from PHY status descriptor if present. */ 1770 if (infosz != 0) 1771 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1772 else 1773 *rssi = 0; 1774 #endif 1775 1776 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1777 "%s: Rx frame len=%d rate=%d infosz=%d\n", 1778 __func__, pktlen, rate, infosz); 1779 1780 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1781 if (__predict_false(m == NULL)) { 1782 counter_u64_add(ic->ic_ierrors, 1); 1783 return NULL; 1784 } 1785 /* Hardware does Rx TCP checksum offload. */ 1786 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1787 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1788 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1789 } 1790 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1791 memcpy(mtod(m, uint8_t *), wh, pktlen); 1792 m->m_pkthdr.len = m->m_len = pktlen; 1793 1794 if (ieee80211_radiotap_active(ic)) { 1795 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1796 1797 /* Map HW rate index to 802.11 rate. */ 1798 tap->wr_flags = 2; 1799 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1800 switch (rate) { 1801 /* CCK. */ 1802 case 0: tap->wr_rate = 2; break; 1803 case 1: tap->wr_rate = 4; break; 1804 case 2: tap->wr_rate = 11; break; 1805 case 3: tap->wr_rate = 22; break; 1806 /* OFDM. */ 1807 case 4: tap->wr_rate = 12; break; 1808 case 5: tap->wr_rate = 18; break; 1809 case 6: tap->wr_rate = 24; break; 1810 case 7: tap->wr_rate = 36; break; 1811 case 8: tap->wr_rate = 48; break; 1812 case 9: tap->wr_rate = 72; break; 1813 case 10: tap->wr_rate = 96; break; 1814 case 11: tap->wr_rate = 108; break; 1815 } 1816 } else if (rate >= 12) { /* MCS0~15. */ 1817 /* Bit 7 set means HT MCS instead of rate. */ 1818 tap->wr_rate = 0x80 | (rate - 12); 1819 } 1820 #if 0 1821 tap->wr_dbm_antsignal = *rssi; 1822 #endif 1823 /* XXX not nice */ 1824 tap->wr_dbm_antsignal = rsu_hwrssi_to_rssi(sc, sc->sc_currssi); 1825 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1826 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1827 } 1828 1829 return (m); 1830 } 1831 1832 static struct mbuf * 1833 rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len) 1834 { 1835 struct r92s_rx_stat *stat; 1836 uint32_t rxdw0; 1837 int totlen, pktlen, infosz, npkts; 1838 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1839 1840 /* Get the number of encapsulated frames. */ 1841 stat = (struct r92s_rx_stat *)buf; 1842 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1843 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1844 "%s: Rx %d frames in one chunk\n", __func__, npkts); 1845 1846 /* Process all of them. */ 1847 while (npkts-- > 0) { 1848 if (__predict_false(len < sizeof(*stat))) 1849 break; 1850 stat = (struct r92s_rx_stat *)buf; 1851 rxdw0 = le32toh(stat->rxdw0); 1852 1853 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1854 if (__predict_false(pktlen == 0)) 1855 break; 1856 1857 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1858 1859 /* Make sure everything fits in xfer. */ 1860 totlen = sizeof(*stat) + infosz + pktlen; 1861 if (__predict_false(totlen > len)) 1862 break; 1863 1864 /* Process 802.11 frame. */ 1865 m = rsu_rx_frame(sc, buf, pktlen); 1866 if (m0 == NULL) 1867 m0 = m; 1868 if (prevm == NULL) 1869 prevm = m; 1870 else { 1871 prevm->m_next = m; 1872 prevm = m; 1873 } 1874 /* Next chunk is 128-byte aligned. */ 1875 totlen = (totlen + 127) & ~127; 1876 buf += totlen; 1877 len -= totlen; 1878 } 1879 1880 return (m0); 1881 } 1882 1883 static struct mbuf * 1884 rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data) 1885 { 1886 struct rsu_softc *sc = data->sc; 1887 struct ieee80211com *ic = &sc->sc_ic; 1888 struct r92s_rx_stat *stat; 1889 int len; 1890 1891 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1892 1893 if (__predict_false(len < sizeof(*stat))) { 1894 DPRINTF("xfer too short %d\n", len); 1895 counter_u64_add(ic->ic_ierrors, 1); 1896 return (NULL); 1897 } 1898 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1899 stat = (struct r92s_rx_stat *)data->buf; 1900 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1901 rsu_rx_multi_event(sc, data->buf, len); 1902 /* No packets to process. */ 1903 return (NULL); 1904 } else 1905 return (rsu_rx_multi_frame(sc, data->buf, len)); 1906 } 1907 1908 static void 1909 rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1910 { 1911 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1912 struct ieee80211com *ic = &sc->sc_ic; 1913 struct ieee80211_frame *wh; 1914 struct ieee80211_node *ni; 1915 struct mbuf *m = NULL, *next; 1916 struct rsu_data *data; 1917 1918 RSU_ASSERT_LOCKED(sc); 1919 1920 switch (USB_GET_STATE(xfer)) { 1921 case USB_ST_TRANSFERRED: 1922 data = STAILQ_FIRST(&sc->sc_rx_active); 1923 if (data == NULL) 1924 goto tr_setup; 1925 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1926 m = rsu_rxeof(xfer, data); 1927 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1928 /* FALLTHROUGH */ 1929 case USB_ST_SETUP: 1930 tr_setup: 1931 /* 1932 * XXX TODO: if we have an mbuf list, but then 1933 * we hit data == NULL, what now? 1934 */ 1935 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1936 if (data == NULL) { 1937 KASSERT(m == NULL, ("mbuf isn't NULL")); 1938 return; 1939 } 1940 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1941 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1942 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1943 usbd_xfer_max_len(xfer)); 1944 usbd_transfer_submit(xfer); 1945 /* 1946 * To avoid LOR we should unlock our private mutex here to call 1947 * ieee80211_input() because here is at the end of a USB 1948 * callback and safe to unlock. 1949 */ 1950 RSU_UNLOCK(sc); 1951 while (m != NULL) { 1952 int rssi; 1953 1954 /* Cheat and get the last calibrated RSSI */ 1955 rssi = rsu_hwrssi_to_rssi(sc, sc->sc_currssi); 1956 1957 next = m->m_next; 1958 m->m_next = NULL; 1959 wh = mtod(m, struct ieee80211_frame *); 1960 ni = ieee80211_find_rxnode(ic, 1961 (struct ieee80211_frame_min *)wh); 1962 if (ni != NULL) { 1963 if (ni->ni_flags & IEEE80211_NODE_HT) 1964 m->m_flags |= M_AMPDU; 1965 (void)ieee80211_input(ni, m, rssi, -96); 1966 ieee80211_free_node(ni); 1967 } else 1968 (void)ieee80211_input_all(ic, m, rssi, -96); 1969 m = next; 1970 } 1971 RSU_LOCK(sc); 1972 break; 1973 default: 1974 /* needs it to the inactive queue due to a error. */ 1975 data = STAILQ_FIRST(&sc->sc_rx_active); 1976 if (data != NULL) { 1977 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1978 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1979 } 1980 if (error != USB_ERR_CANCELLED) { 1981 usbd_xfer_set_stall(xfer); 1982 counter_u64_add(ic->ic_ierrors, 1); 1983 goto tr_setup; 1984 } 1985 break; 1986 } 1987 1988 } 1989 1990 static void 1991 rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1992 { 1993 #ifdef USB_DEBUG 1994 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1995 #endif 1996 1997 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n", 1998 __func__, 1999 data); 2000 2001 if (data->m) { 2002 /* XXX status? */ 2003 ieee80211_tx_complete(data->ni, data->m, 0); 2004 data->m = NULL; 2005 data->ni = NULL; 2006 } 2007 } 2008 2009 static void 2010 rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 2011 uint8_t which) 2012 { 2013 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2014 struct ieee80211com *ic = &sc->sc_ic; 2015 struct rsu_data *data; 2016 2017 RSU_ASSERT_LOCKED(sc); 2018 2019 switch (USB_GET_STATE(xfer)) { 2020 case USB_ST_TRANSFERRED: 2021 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 2022 if (data == NULL) 2023 goto tr_setup; 2024 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n", 2025 __func__, data); 2026 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 2027 rsu_txeof(xfer, data); 2028 rsu_freebuf(sc, data); 2029 /* FALLTHROUGH */ 2030 case USB_ST_SETUP: 2031 tr_setup: 2032 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 2033 if (data == NULL) { 2034 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 2035 "%s: empty pending queue sc %p\n", __func__, sc); 2036 return; 2037 } 2038 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 2039 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 2040 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 2041 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 2042 "%s: submitting transfer %p\n", 2043 __func__, 2044 data); 2045 usbd_transfer_submit(xfer); 2046 break; 2047 default: 2048 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 2049 if (data != NULL) { 2050 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 2051 rsu_txeof(xfer, data); 2052 rsu_freebuf(sc, data); 2053 } 2054 counter_u64_add(ic->ic_oerrors, 1); 2055 2056 if (error != USB_ERR_CANCELLED) { 2057 usbd_xfer_set_stall(xfer); 2058 goto tr_setup; 2059 } 2060 break; 2061 } 2062 2063 /* 2064 * XXX TODO: if the queue is low, flush out FF TX frames. 2065 * Remember to unlock the driver for now; net80211 doesn't 2066 * defer it for us. 2067 */ 2068 } 2069 2070 static void 2071 rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 2072 { 2073 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2074 2075 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 2076 2077 /* This kicks the TX taskqueue */ 2078 rsu_start(sc); 2079 } 2080 2081 static void 2082 rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 2083 { 2084 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2085 2086 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 2087 2088 /* This kicks the TX taskqueue */ 2089 rsu_start(sc); 2090 } 2091 2092 static void 2093 rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error) 2094 { 2095 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2096 2097 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C); 2098 2099 /* This kicks the TX taskqueue */ 2100 rsu_start(sc); 2101 } 2102 2103 /* 2104 * Transmit the given frame. 2105 * 2106 * This doesn't free the node or mbuf upon failure. 2107 */ 2108 static int 2109 rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 2110 struct mbuf *m0, struct rsu_data *data) 2111 { 2112 struct ieee80211com *ic = &sc->sc_ic; 2113 struct ieee80211vap *vap = ni->ni_vap; 2114 struct ieee80211_frame *wh; 2115 struct ieee80211_key *k = NULL; 2116 struct r92s_tx_desc *txd; 2117 uint8_t type; 2118 int prio = 0; 2119 uint8_t which; 2120 int hasqos; 2121 int xferlen; 2122 int qid; 2123 2124 RSU_ASSERT_LOCKED(sc); 2125 2126 wh = mtod(m0, struct ieee80211_frame *); 2127 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2128 2129 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n", 2130 __func__, data, m0); 2131 2132 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2133 k = ieee80211_crypto_encap(ni, m0); 2134 if (k == NULL) { 2135 device_printf(sc->sc_dev, 2136 "ieee80211_crypto_encap returns NULL.\n"); 2137 /* XXX we don't expect the fragmented frames */ 2138 return (ENOBUFS); 2139 } 2140 wh = mtod(m0, struct ieee80211_frame *); 2141 } 2142 /* If we have QoS then use it */ 2143 /* XXX TODO: mbuf WME/PRI versus TID? */ 2144 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2145 /* Has QoS */ 2146 prio = M_WME_GETAC(m0); 2147 which = rsu_wme_ac_xfer_map[prio]; 2148 hasqos = 1; 2149 } else { 2150 /* Non-QoS TID */ 2151 /* XXX TODO: tid=0 for non-qos TID? */ 2152 which = rsu_wme_ac_xfer_map[WME_AC_BE]; 2153 hasqos = 0; 2154 prio = 0; 2155 } 2156 2157 qid = rsu_ac2qid[prio]; 2158 #if 0 2159 switch (type) { 2160 case IEEE80211_FC0_TYPE_CTL: 2161 case IEEE80211_FC0_TYPE_MGT: 2162 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2163 break; 2164 default: 2165 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 2166 break; 2167 } 2168 hasqos = 0; 2169 #endif 2170 2171 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n", 2172 __func__, 2173 prio, 2174 which, 2175 hasqos); 2176 2177 /* Fill Tx descriptor. */ 2178 txd = (struct r92s_tx_desc *)data->buf; 2179 memset(txd, 0, sizeof(*txd)); 2180 2181 txd->txdw0 |= htole32( 2182 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 2183 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 2184 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 2185 2186 txd->txdw1 |= htole32( 2187 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid)); 2188 if (!hasqos) 2189 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 2190 #ifdef notyet 2191 if (k != NULL) { 2192 switch (k->wk_cipher->ic_cipher) { 2193 case IEEE80211_CIPHER_WEP: 2194 cipher = R92S_TXDW1_CIPHER_WEP; 2195 break; 2196 case IEEE80211_CIPHER_TKIP: 2197 cipher = R92S_TXDW1_CIPHER_TKIP; 2198 break; 2199 case IEEE80211_CIPHER_AES_CCM: 2200 cipher = R92S_TXDW1_CIPHER_AES; 2201 break; 2202 default: 2203 cipher = R92S_TXDW1_CIPHER_NONE; 2204 } 2205 txd->txdw1 |= htole32( 2206 SM(R92S_TXDW1_CIPHER, cipher) | 2207 SM(R92S_TXDW1_KEYIDX, k->k_id)); 2208 } 2209 #endif 2210 /* XXX todo: set AGGEN bit if appropriate? */ 2211 txd->txdw2 |= htole32(R92S_TXDW2_BK); 2212 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 2213 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 2214 /* 2215 * Firmware will use and increment the sequence number for the 2216 * specified priority. 2217 */ 2218 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio)); 2219 2220 if (ieee80211_radiotap_active_vap(vap)) { 2221 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 2222 2223 tap->wt_flags = 0; 2224 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2225 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2226 ieee80211_radiotap_tx(vap, m0); 2227 } 2228 2229 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 2230 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 2231 2232 data->buflen = xferlen; 2233 data->ni = ni; 2234 data->m = m0; 2235 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2236 2237 /* start transfer, if any */ 2238 usbd_transfer_start(sc->sc_xfer[which]); 2239 return (0); 2240 } 2241 2242 static int 2243 rsu_transmit(struct ieee80211com *ic, struct mbuf *m) 2244 { 2245 struct rsu_softc *sc = ic->ic_softc; 2246 int error; 2247 2248 RSU_LOCK(sc); 2249 if (!sc->sc_running) { 2250 RSU_UNLOCK(sc); 2251 return (ENXIO); 2252 } 2253 2254 /* 2255 * XXX TODO: ensure that we treat 'm' as a list of frames 2256 * to transmit! 2257 */ 2258 error = mbufq_enqueue(&sc->sc_snd, m); 2259 if (error) { 2260 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2261 "%s: mbufq_enable: failed (%d)\n", 2262 __func__, 2263 error); 2264 RSU_UNLOCK(sc); 2265 return (error); 2266 } 2267 RSU_UNLOCK(sc); 2268 2269 /* This kicks the TX taskqueue */ 2270 rsu_start(sc); 2271 2272 return (0); 2273 } 2274 2275 static void 2276 rsu_drain_mbufq(struct rsu_softc *sc) 2277 { 2278 struct mbuf *m; 2279 struct ieee80211_node *ni; 2280 2281 RSU_ASSERT_LOCKED(sc); 2282 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2283 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2284 m->m_pkthdr.rcvif = NULL; 2285 ieee80211_free_node(ni); 2286 m_freem(m); 2287 } 2288 } 2289 2290 static void 2291 _rsu_start(struct rsu_softc *sc) 2292 { 2293 struct ieee80211_node *ni; 2294 struct rsu_data *bf; 2295 struct mbuf *m; 2296 2297 RSU_ASSERT_LOCKED(sc); 2298 2299 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2300 bf = rsu_getbuf(sc); 2301 if (bf == NULL) { 2302 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2303 "%s: failed to get buffer\n", __func__); 2304 mbufq_prepend(&sc->sc_snd, m); 2305 break; 2306 } 2307 2308 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2309 m->m_pkthdr.rcvif = NULL; 2310 2311 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2312 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2313 "%s: failed to transmit\n", __func__); 2314 if_inc_counter(ni->ni_vap->iv_ifp, 2315 IFCOUNTER_OERRORS, 1); 2316 rsu_freebuf(sc, bf); 2317 ieee80211_free_node(ni); 2318 m_freem(m); 2319 break; 2320 } 2321 } 2322 } 2323 2324 static void 2325 rsu_start(struct rsu_softc *sc) 2326 { 2327 2328 taskqueue_enqueue(taskqueue_thread, &sc->tx_task); 2329 } 2330 2331 static void 2332 rsu_parent(struct ieee80211com *ic) 2333 { 2334 struct rsu_softc *sc = ic->ic_softc; 2335 int startall = 0; 2336 2337 RSU_LOCK(sc); 2338 if (ic->ic_nrunning > 0) { 2339 if (!sc->sc_running) { 2340 rsu_init(sc); 2341 startall = 1; 2342 } 2343 } else if (sc->sc_running) 2344 rsu_stop(sc); 2345 RSU_UNLOCK(sc); 2346 2347 if (startall) 2348 ieee80211_start_all(ic); 2349 } 2350 2351 /* 2352 * Power on sequence for A-cut adapters. 2353 */ 2354 static void 2355 rsu_power_on_acut(struct rsu_softc *sc) 2356 { 2357 uint32_t reg; 2358 2359 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2360 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2361 2362 /* Enable AFE macro block's bandgap and Mbias. */ 2363 rsu_write_1(sc, R92S_AFE_MISC, 2364 rsu_read_1(sc, R92S_AFE_MISC) | 2365 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 2366 /* Enable LDOA15 block. */ 2367 rsu_write_1(sc, R92S_LDOA15_CTRL, 2368 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2369 2370 rsu_write_1(sc, R92S_SPS1_CTRL, 2371 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 2372 rsu_ms_delay(sc, 2000); 2373 /* Enable switch regulator block. */ 2374 rsu_write_1(sc, R92S_SPS1_CTRL, 2375 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 2376 2377 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 2378 2379 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2380 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2381 2382 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2383 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2384 2385 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2386 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 2387 2388 /* Enable AFE clock. */ 2389 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2390 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2391 /* Enable AFE PLL macro block. */ 2392 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 2393 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 2394 /* Attach AFE PLL to MACTOP/BB. */ 2395 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2396 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2397 2398 /* Switch to 40MHz clock instead of 80MHz. */ 2399 rsu_write_2(sc, R92S_SYS_CLKR, 2400 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 2401 2402 /* Enable MAC clock. */ 2403 rsu_write_2(sc, R92S_SYS_CLKR, 2404 rsu_read_2(sc, R92S_SYS_CLKR) | 2405 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2406 2407 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2408 2409 /* Enable digital core and IOREG R/W. */ 2410 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2411 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2412 2413 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2414 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2415 2416 /* Switch the control path to firmware. */ 2417 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2418 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2419 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2420 2421 rsu_write_2(sc, R92S_CR, 0x37fc); 2422 2423 /* Fix USB RX FIFO issue. */ 2424 rsu_write_1(sc, 0xfe5c, 2425 rsu_read_1(sc, 0xfe5c) | 0x80); 2426 rsu_write_1(sc, 0x00ab, 2427 rsu_read_1(sc, 0x00ab) | 0xc0); 2428 2429 rsu_write_1(sc, R92S_SYS_CLKR, 2430 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2431 } 2432 2433 /* 2434 * Power on sequence for B-cut and C-cut adapters. 2435 */ 2436 static void 2437 rsu_power_on_bcut(struct rsu_softc *sc) 2438 { 2439 uint32_t reg; 2440 int ntries; 2441 2442 /* Prevent eFuse leakage. */ 2443 rsu_write_1(sc, 0x37, 0xb0); 2444 rsu_ms_delay(sc, 10); 2445 rsu_write_1(sc, 0x37, 0x30); 2446 2447 /* Switch the control path to hardware. */ 2448 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2449 if (reg & R92S_FWHW_SEL) { 2450 rsu_write_2(sc, R92S_SYS_CLKR, 2451 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 2452 } 2453 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2454 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 2455 rsu_ms_delay(sc, 1); 2456 2457 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2458 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2459 2460 reg = rsu_read_1(sc, R92S_AFE_MISC); 2461 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 2462 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 2463 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 2464 2465 /* Enable PLL. */ 2466 rsu_write_1(sc, R92S_LDOA15_CTRL, 2467 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2468 2469 rsu_write_1(sc, R92S_LDOV12D_CTRL, 2470 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 2471 2472 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2473 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2474 2475 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2476 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2477 2478 /* Support 64KB IMEM. */ 2479 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2480 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 2481 2482 /* Enable AFE clock. */ 2483 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2484 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2485 /* Enable AFE PLL macro block. */ 2486 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 2487 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2488 rsu_ms_delay(sc, 1); 2489 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 2490 rsu_ms_delay(sc, 1); 2491 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2492 rsu_ms_delay(sc, 1); 2493 2494 /* Attach AFE PLL to MACTOP/BB. */ 2495 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2496 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2497 2498 /* Switch to 40MHz clock. */ 2499 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2500 /* Disable CPU clock and 80MHz SSC. */ 2501 rsu_write_1(sc, R92S_SYS_CLKR, 2502 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2503 /* Enable MAC clock. */ 2504 rsu_write_2(sc, R92S_SYS_CLKR, 2505 rsu_read_2(sc, R92S_SYS_CLKR) | 2506 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2507 2508 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2509 2510 /* Enable digital core and IOREG R/W. */ 2511 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2512 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2513 2514 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2515 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2516 2517 /* Switch the control path to firmware. */ 2518 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2519 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2520 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2521 2522 rsu_write_2(sc, R92S_CR, 0x37fc); 2523 2524 /* Fix USB RX FIFO issue. */ 2525 rsu_write_1(sc, 0xfe5c, 2526 rsu_read_1(sc, 0xfe5c) | 0x80); 2527 2528 rsu_write_1(sc, R92S_SYS_CLKR, 2529 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2530 2531 rsu_write_1(sc, 0xfe1c, 0x80); 2532 2533 /* Make sure TxDMA is ready to download firmware. */ 2534 for (ntries = 0; ntries < 20; ntries++) { 2535 reg = rsu_read_1(sc, R92S_TCR); 2536 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2537 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2538 break; 2539 rsu_ms_delay(sc, 1); 2540 } 2541 if (ntries == 20) { 2542 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX, 2543 "%s: TxDMA is not ready\n", 2544 __func__); 2545 /* Reset TxDMA. */ 2546 reg = rsu_read_1(sc, R92S_CR); 2547 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2548 rsu_ms_delay(sc, 1); 2549 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2550 } 2551 } 2552 2553 static void 2554 rsu_power_off(struct rsu_softc *sc) 2555 { 2556 /* Turn RF off. */ 2557 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2558 rsu_ms_delay(sc, 5); 2559 2560 /* Turn MAC off. */ 2561 /* Switch control path. */ 2562 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2563 /* Reset MACTOP. */ 2564 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2565 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2566 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2567 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2568 2569 /* Disable AFE PLL. */ 2570 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2571 /* Disable A15V. */ 2572 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2573 /* Disable eFuse 1.2V. */ 2574 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2575 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2576 /* Enable AFE macro block's bandgap and Mbias. */ 2577 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2578 /* Disable 1.6V LDO. */ 2579 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2580 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2581 2582 /* Firmware - tell it to switch things off */ 2583 (void) rsu_set_fw_power_state(sc, RSU_PWR_OFF); 2584 } 2585 2586 static int 2587 rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2588 { 2589 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2590 struct rsu_data *data; 2591 struct r92s_tx_desc *txd; 2592 int mlen; 2593 2594 while (len > 0) { 2595 data = rsu_getbuf(sc); 2596 if (data == NULL) 2597 return (ENOMEM); 2598 txd = (struct r92s_tx_desc *)data->buf; 2599 memset(txd, 0, sizeof(*txd)); 2600 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2601 /* Last chunk. */ 2602 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2603 mlen = len; 2604 } else 2605 mlen = RSU_TXBUFSZ - sizeof(*txd); 2606 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2607 memcpy(&txd[1], buf, mlen); 2608 data->buflen = sizeof(*txd) + mlen; 2609 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET, 2610 "%s: starting transfer %p\n", 2611 __func__, data); 2612 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2613 buf += mlen; 2614 len -= mlen; 2615 } 2616 usbd_transfer_start(sc->sc_xfer[which]); 2617 return (0); 2618 } 2619 2620 static int 2621 rsu_load_firmware(struct rsu_softc *sc) 2622 { 2623 const struct r92s_fw_hdr *hdr; 2624 struct r92s_fw_priv *dmem; 2625 struct ieee80211com *ic = &sc->sc_ic; 2626 const uint8_t *imem, *emem; 2627 int imemsz, ememsz; 2628 const struct firmware *fw; 2629 size_t size; 2630 uint32_t reg; 2631 int ntries, error; 2632 2633 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2634 RSU_DPRINTF(sc, RSU_DEBUG_ANY, 2635 "%s: Firmware already loaded\n", 2636 __func__); 2637 return (0); 2638 } 2639 2640 RSU_UNLOCK(sc); 2641 /* Read firmware image from the filesystem. */ 2642 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2643 device_printf(sc->sc_dev, 2644 "%s: failed load firmware of file rsu-rtl8712fw\n", 2645 __func__); 2646 RSU_LOCK(sc); 2647 return (ENXIO); 2648 } 2649 RSU_LOCK(sc); 2650 size = fw->datasize; 2651 if (size < sizeof(*hdr)) { 2652 device_printf(sc->sc_dev, "firmware too short\n"); 2653 error = EINVAL; 2654 goto fail; 2655 } 2656 hdr = (const struct r92s_fw_hdr *)fw->data; 2657 if (hdr->signature != htole16(0x8712) && 2658 hdr->signature != htole16(0x8192)) { 2659 device_printf(sc->sc_dev, 2660 "invalid firmware signature 0x%x\n", 2661 le16toh(hdr->signature)); 2662 error = EINVAL; 2663 goto fail; 2664 } 2665 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2666 hdr->month, hdr->day, hdr->hour, hdr->minute); 2667 2668 /* Make sure that driver and firmware are in sync. */ 2669 if (hdr->privsz != htole32(sizeof(*dmem))) { 2670 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2671 error = EINVAL; 2672 goto fail; 2673 } 2674 /* Get FW sections sizes. */ 2675 imemsz = le32toh(hdr->imemsz); 2676 ememsz = le32toh(hdr->sramsz); 2677 /* Check that all FW sections fit in image. */ 2678 if (size < sizeof(*hdr) + imemsz + ememsz) { 2679 device_printf(sc->sc_dev, "firmware too short\n"); 2680 error = EINVAL; 2681 goto fail; 2682 } 2683 imem = (const uint8_t *)&hdr[1]; 2684 emem = imem + imemsz; 2685 2686 /* Load IMEM section. */ 2687 error = rsu_fw_loadsection(sc, imem, imemsz); 2688 if (error != 0) { 2689 device_printf(sc->sc_dev, 2690 "could not load firmware section %s\n", "IMEM"); 2691 goto fail; 2692 } 2693 /* Wait for load to complete. */ 2694 for (ntries = 0; ntries != 50; ntries++) { 2695 rsu_ms_delay(sc, 10); 2696 reg = rsu_read_1(sc, R92S_TCR); 2697 if (reg & R92S_TCR_IMEM_CODE_DONE) 2698 break; 2699 } 2700 if (ntries == 50) { 2701 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2702 error = ETIMEDOUT; 2703 goto fail; 2704 } 2705 /* Load EMEM section. */ 2706 error = rsu_fw_loadsection(sc, emem, ememsz); 2707 if (error != 0) { 2708 device_printf(sc->sc_dev, 2709 "could not load firmware section %s\n", "EMEM"); 2710 goto fail; 2711 } 2712 /* Wait for load to complete. */ 2713 for (ntries = 0; ntries != 50; ntries++) { 2714 rsu_ms_delay(sc, 10); 2715 reg = rsu_read_2(sc, R92S_TCR); 2716 if (reg & R92S_TCR_EMEM_CODE_DONE) 2717 break; 2718 } 2719 if (ntries == 50) { 2720 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2721 error = ETIMEDOUT; 2722 goto fail; 2723 } 2724 /* Enable CPU. */ 2725 rsu_write_1(sc, R92S_SYS_CLKR, 2726 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2727 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2728 device_printf(sc->sc_dev, "could not enable system clock\n"); 2729 error = EIO; 2730 goto fail; 2731 } 2732 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2733 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2734 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2735 device_printf(sc->sc_dev, 2736 "could not enable microcontroller\n"); 2737 error = EIO; 2738 goto fail; 2739 } 2740 /* Wait for CPU to initialize. */ 2741 for (ntries = 0; ntries < 100; ntries++) { 2742 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2743 break; 2744 rsu_ms_delay(sc, 1); 2745 } 2746 if (ntries == 100) { 2747 device_printf(sc->sc_dev, 2748 "timeout waiting for microcontroller\n"); 2749 error = ETIMEDOUT; 2750 goto fail; 2751 } 2752 2753 /* Update DMEM section before loading. */ 2754 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2755 memset(dmem, 0, sizeof(*dmem)); 2756 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2757 dmem->nendpoints = sc->sc_nendpoints; 2758 dmem->chip_version = sc->cut; 2759 dmem->rf_config = sc->sc_rftype; 2760 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2761 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2762 dmem->turbo_mode = 0; 2763 dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40); 2764 dmem->amsdu2ampdu_en = !! (sc->sc_ht); 2765 dmem->ampdu_en = !! (sc->sc_ht); 2766 dmem->agg_offload = !! (sc->sc_ht); 2767 dmem->qos_en = 1; 2768 dmem->ps_offload = 1; 2769 dmem->lowpower_mode = 1; /* XXX TODO: configurable? */ 2770 /* Load DMEM section. */ 2771 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2772 if (error != 0) { 2773 device_printf(sc->sc_dev, 2774 "could not load firmware section %s\n", "DMEM"); 2775 goto fail; 2776 } 2777 /* Wait for load to complete. */ 2778 for (ntries = 0; ntries < 100; ntries++) { 2779 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2780 break; 2781 rsu_ms_delay(sc, 1); 2782 } 2783 if (ntries == 100) { 2784 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2785 "DMEM"); 2786 error = ETIMEDOUT; 2787 goto fail; 2788 } 2789 /* Wait for firmware readiness. */ 2790 for (ntries = 0; ntries < 60; ntries++) { 2791 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2792 break; 2793 rsu_ms_delay(sc, 1); 2794 } 2795 if (ntries == 60) { 2796 device_printf(sc->sc_dev, 2797 "timeout waiting for firmware readiness\n"); 2798 error = ETIMEDOUT; 2799 goto fail; 2800 } 2801 fail: 2802 firmware_put(fw, FIRMWARE_UNLOAD); 2803 return (error); 2804 } 2805 2806 2807 static int 2808 rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2809 const struct ieee80211_bpf_params *params) 2810 { 2811 struct ieee80211com *ic = ni->ni_ic; 2812 struct rsu_softc *sc = ic->ic_softc; 2813 struct rsu_data *bf; 2814 2815 /* prevent management frames from being sent if we're not ready */ 2816 if (!sc->sc_running) { 2817 m_freem(m); 2818 return (ENETDOWN); 2819 } 2820 RSU_LOCK(sc); 2821 bf = rsu_getbuf(sc); 2822 if (bf == NULL) { 2823 m_freem(m); 2824 RSU_UNLOCK(sc); 2825 return (ENOBUFS); 2826 } 2827 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2828 m_freem(m); 2829 rsu_freebuf(sc, bf); 2830 RSU_UNLOCK(sc); 2831 return (EIO); 2832 } 2833 RSU_UNLOCK(sc); 2834 2835 return (0); 2836 } 2837 2838 static void 2839 rsu_init(struct rsu_softc *sc) 2840 { 2841 struct ieee80211com *ic = &sc->sc_ic; 2842 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2843 uint8_t macaddr[IEEE80211_ADDR_LEN]; 2844 int error; 2845 int i; 2846 2847 RSU_ASSERT_LOCKED(sc); 2848 2849 /* Ensure the mbuf queue is drained */ 2850 rsu_drain_mbufq(sc); 2851 2852 /* Init host async commands ring. */ 2853 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2854 2855 /* Reset power management state. */ 2856 rsu_write_1(sc, R92S_USB_HRPWM, 0); 2857 2858 /* Power on adapter. */ 2859 if (sc->cut == 1) 2860 rsu_power_on_acut(sc); 2861 else 2862 rsu_power_on_bcut(sc); 2863 2864 /* Load firmware. */ 2865 error = rsu_load_firmware(sc); 2866 if (error != 0) 2867 goto fail; 2868 2869 /* Enable Rx TCP checksum offload. */ 2870 rsu_write_4(sc, R92S_RCR, 2871 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2872 /* Append PHY status. */ 2873 rsu_write_4(sc, R92S_RCR, 2874 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2875 2876 rsu_write_4(sc, R92S_CR, 2877 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2878 2879 /* Use 128 bytes pages. */ 2880 rsu_write_1(sc, 0x00b5, 2881 rsu_read_1(sc, 0x00b5) | 0x01); 2882 /* Enable USB Rx aggregation. */ 2883 rsu_write_1(sc, 0x00bd, 2884 rsu_read_1(sc, 0x00bd) | 0x80); 2885 /* Set USB Rx aggregation threshold. */ 2886 rsu_write_1(sc, 0x00d9, 0x01); 2887 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2888 rsu_write_1(sc, 0xfe5b, 0x04); 2889 /* Fix USB Rx FIFO issue. */ 2890 rsu_write_1(sc, 0xfe5c, 2891 rsu_read_1(sc, 0xfe5c) | 0x80); 2892 2893 /* Set MAC address. */ 2894 IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 2895 rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN); 2896 2897 /* It really takes 1.5 seconds for the firmware to boot: */ 2898 rsu_ms_delay(sc, 2000); 2899 2900 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n", 2901 __func__, 2902 ether_sprintf(macaddr)); 2903 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr, 2904 IEEE80211_ADDR_LEN); 2905 if (error != 0) { 2906 device_printf(sc->sc_dev, "could not set MAC address\n"); 2907 goto fail; 2908 } 2909 2910 /* Set PS mode fully active */ 2911 error = rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 2912 2913 if (error != 0) { 2914 device_printf(sc->sc_dev, "could not set PS mode\n"); 2915 goto fail; 2916 } 2917 2918 sc->sc_scan_pass = 0; 2919 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2920 2921 /* We're ready to go. */ 2922 sc->sc_running = 1; 2923 sc->sc_scanning = 0; 2924 return; 2925 fail: 2926 /* Need to stop all failed transfers, if any */ 2927 for (i = 0; i != RSU_N_TRANSFER; i++) 2928 usbd_transfer_stop(sc->sc_xfer[i]); 2929 } 2930 2931 static void 2932 rsu_stop(struct rsu_softc *sc) 2933 { 2934 int i; 2935 2936 RSU_ASSERT_LOCKED(sc); 2937 2938 sc->sc_running = 0; 2939 sc->sc_calibrating = 0; 2940 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2941 taskqueue_cancel(taskqueue_thread, &sc->tx_task, NULL); 2942 2943 /* Power off adapter. */ 2944 rsu_power_off(sc); 2945 2946 for (i = 0; i < RSU_N_TRANSFER; i++) 2947 usbd_transfer_stop(sc->sc_xfer[i]); 2948 2949 /* Ensure the mbuf queue is drained */ 2950 rsu_drain_mbufq(sc); 2951 } 2952 2953 /* 2954 * Note: usb_pause_mtx() actually releases the mutex before calling pause(), 2955 * which breaks any kind of driver serialisation. 2956 */ 2957 static void 2958 rsu_ms_delay(struct rsu_softc *sc, int ms) 2959 { 2960 2961 //usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2962 DELAY(ms * 1000); 2963 } 2964