1 /* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 #include <sys/cdefs.h> 19 __FBSDID("$FreeBSD$"); 20 21 /* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o h/w crypto 26 * o hostap / ibss / mesh 27 * o sensible RSSI levels 28 * o power-save operation 29 */ 30 31 #include "opt_wlan.h" 32 33 #include <sys/param.h> 34 #include <sys/endian.h> 35 #include <sys/sockio.h> 36 #include <sys/malloc.h> 37 #include <sys/mbuf.h> 38 #include <sys/kernel.h> 39 #include <sys/socket.h> 40 #include <sys/systm.h> 41 #include <sys/conf.h> 42 #include <sys/bus.h> 43 #include <sys/rman.h> 44 #include <sys/firmware.h> 45 #include <sys/module.h> 46 47 #include <machine/bus.h> 48 #include <machine/resource.h> 49 50 #include <net/bpf.h> 51 #include <net/if.h> 52 #include <net/if_var.h> 53 #include <net/if_arp.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_types.h> 57 58 #include <netinet/in.h> 59 #include <netinet/in_systm.h> 60 #include <netinet/in_var.h> 61 #include <netinet/if_ether.h> 62 #include <netinet/ip.h> 63 64 #include <net80211/ieee80211_var.h> 65 #include <net80211/ieee80211_regdomain.h> 66 #include <net80211/ieee80211_radiotap.h> 67 68 #include <dev/usb/usb.h> 69 #include <dev/usb/usbdi.h> 70 #include "usbdevs.h" 71 72 #define USB_DEBUG_VAR rsu_debug 73 #include <dev/usb/usb_debug.h> 74 75 #include <dev/usb/wlan/if_rsureg.h> 76 77 #ifdef USB_DEBUG 78 static int rsu_debug = 0; 79 SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 80 SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 81 "Debug level"); 82 #define RSU_DPRINTF(_sc, _flg, ...) \ 83 do \ 84 if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \ 85 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 86 while (0) 87 #else 88 #define RSU_DPRINTF(_sc, _flg, ...) 89 #endif 90 91 static int rsu_enable_11n = 1; 92 TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n); 93 94 #define RSU_DEBUG_ANY 0xffffffff 95 #define RSU_DEBUG_TX 0x00000001 96 #define RSU_DEBUG_RX 0x00000002 97 #define RSU_DEBUG_RESET 0x00000004 98 #define RSU_DEBUG_CALIB 0x00000008 99 #define RSU_DEBUG_STATE 0x00000010 100 #define RSU_DEBUG_SCAN 0x00000020 101 #define RSU_DEBUG_FWCMD 0x00000040 102 #define RSU_DEBUG_TXDONE 0x00000080 103 #define RSU_DEBUG_FW 0x00000100 104 #define RSU_DEBUG_FWDBG 0x00000200 105 #define RSU_DEBUG_AMPDU 0x00000400 106 107 static const STRUCT_USB_HOST_ID rsu_devs[] = { 108 #define RSU_HT_NOT_SUPPORTED 0 109 #define RSU_HT_SUPPORTED 1 110 #define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 111 RSU_HT_SUPPORTED) } 112 #define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 113 RSU_HT_NOT_SUPPORTED) } 114 RSU_DEV(ASUS, RTL8192SU), 115 RSU_DEV(AZUREWAVE, RTL8192SU_4), 116 RSU_DEV_HT(ACCTON, RTL8192SU), 117 RSU_DEV_HT(ASUS, USBN10), 118 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 119 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 120 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 121 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 122 RSU_DEV_HT(BELKIN, RTL8192SU_1), 123 RSU_DEV_HT(BELKIN, RTL8192SU_2), 124 RSU_DEV_HT(BELKIN, RTL8192SU_3), 125 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 126 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 127 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 128 RSU_DEV_HT(COREGA, RTL8192SU), 129 RSU_DEV_HT(DLINK2, DWA131A1), 130 RSU_DEV_HT(DLINK2, RTL8192SU_1), 131 RSU_DEV_HT(DLINK2, RTL8192SU_2), 132 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 133 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 134 RSU_DEV_HT(EDIMAX, EW7622UMN), 135 RSU_DEV_HT(GUILLEMOT, HWGUN54), 136 RSU_DEV_HT(GUILLEMOT, HWNUM300), 137 RSU_DEV_HT(HAWKING, RTL8192SU_1), 138 RSU_DEV_HT(HAWKING, RTL8192SU_2), 139 RSU_DEV_HT(PLANEX2, GWUSNANO), 140 RSU_DEV_HT(REALTEK, RTL8171), 141 RSU_DEV_HT(REALTEK, RTL8172), 142 RSU_DEV_HT(REALTEK, RTL8173), 143 RSU_DEV_HT(REALTEK, RTL8174), 144 RSU_DEV_HT(REALTEK, RTL8192SU), 145 RSU_DEV_HT(REALTEK, RTL8712), 146 RSU_DEV_HT(REALTEK, RTL8713), 147 RSU_DEV_HT(SENAO, RTL8192SU_1), 148 RSU_DEV_HT(SENAO, RTL8192SU_2), 149 RSU_DEV_HT(SITECOMEU, WL349V1), 150 RSU_DEV_HT(SITECOMEU, WL353), 151 RSU_DEV_HT(SWEEX2, LW154), 152 RSU_DEV_HT(TRENDNET, TEW646UBH), 153 #undef RSU_DEV_HT 154 #undef RSU_DEV 155 }; 156 157 static device_probe_t rsu_match; 158 static device_attach_t rsu_attach; 159 static device_detach_t rsu_detach; 160 static usb_callback_t rsu_bulk_tx_callback_be_bk; 161 static usb_callback_t rsu_bulk_tx_callback_vi_vo; 162 static usb_callback_t rsu_bulk_tx_callback_h2c; 163 static usb_callback_t rsu_bulk_rx_callback; 164 static usb_error_t rsu_do_request(struct rsu_softc *, 165 struct usb_device_request *, void *); 166 static struct ieee80211vap * 167 rsu_vap_create(struct ieee80211com *, const char name[], 168 int, enum ieee80211_opmode, int, const uint8_t bssid[], 169 const uint8_t mac[]); 170 static void rsu_vap_delete(struct ieee80211vap *); 171 static void rsu_scan_start(struct ieee80211com *); 172 static void rsu_scan_end(struct ieee80211com *); 173 static void rsu_getradiocaps(struct ieee80211com *, int, int *, 174 struct ieee80211_channel[]); 175 static void rsu_set_channel(struct ieee80211com *); 176 static void rsu_update_mcast(struct ieee80211com *); 177 static int rsu_alloc_rx_list(struct rsu_softc *); 178 static void rsu_free_rx_list(struct rsu_softc *); 179 static int rsu_alloc_tx_list(struct rsu_softc *); 180 static void rsu_free_tx_list(struct rsu_softc *); 181 static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 182 static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 183 static struct rsu_data *rsu_getbuf(struct rsu_softc *); 184 static void rsu_freebuf(struct rsu_softc *, struct rsu_data *); 185 static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 186 int); 187 static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 188 static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 189 static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 190 static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 191 int); 192 static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 193 static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 194 static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 195 static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 196 static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 197 static int rsu_read_rom(struct rsu_softc *); 198 static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 199 static void rsu_calib_task(void *, int); 200 static void rsu_tx_task(void *, int); 201 static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 202 #ifdef notyet 203 static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 204 static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 205 #endif 206 static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 207 static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 208 static int rsu_disconnect(struct rsu_softc *); 209 static int rsu_hwrssi_to_rssi(struct rsu_softc *, int hw_rssi); 210 static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 211 static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 212 static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 213 static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 214 #if 0 215 static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 216 #endif 217 static struct mbuf * rsu_rx_frame(struct rsu_softc *, uint8_t *, int); 218 static struct mbuf * rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int); 219 static struct mbuf * 220 rsu_rxeof(struct usb_xfer *, struct rsu_data *); 221 static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 222 static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 223 const struct ieee80211_bpf_params *); 224 static void rsu_init(struct rsu_softc *); 225 static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 226 struct mbuf *, struct rsu_data *); 227 static int rsu_transmit(struct ieee80211com *, struct mbuf *); 228 static void rsu_start(struct rsu_softc *); 229 static void _rsu_start(struct rsu_softc *); 230 static void rsu_parent(struct ieee80211com *); 231 static void rsu_stop(struct rsu_softc *); 232 static void rsu_ms_delay(struct rsu_softc *, int); 233 234 static device_method_t rsu_methods[] = { 235 DEVMETHOD(device_probe, rsu_match), 236 DEVMETHOD(device_attach, rsu_attach), 237 DEVMETHOD(device_detach, rsu_detach), 238 239 DEVMETHOD_END 240 }; 241 242 static driver_t rsu_driver = { 243 .name = "rsu", 244 .methods = rsu_methods, 245 .size = sizeof(struct rsu_softc) 246 }; 247 248 static devclass_t rsu_devclass; 249 250 DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 251 MODULE_DEPEND(rsu, wlan, 1, 1, 1); 252 MODULE_DEPEND(rsu, usb, 1, 1, 1); 253 MODULE_DEPEND(rsu, firmware, 1, 1, 1); 254 MODULE_VERSION(rsu, 1); 255 USB_PNP_HOST_INFO(rsu_devs); 256 257 static const uint8_t rsu_chan_2ghz[] = 258 { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }; 259 260 static uint8_t rsu_wme_ac_xfer_map[4] = { 261 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 262 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 263 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 264 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 265 }; 266 267 /* XXX hard-coded */ 268 #define RSU_H2C_ENDPOINT 3 269 270 static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 271 [RSU_BULK_RX] = { 272 .type = UE_BULK, 273 .endpoint = UE_ADDR_ANY, 274 .direction = UE_DIR_IN, 275 .bufsize = RSU_RXBUFSZ, 276 .flags = { 277 .pipe_bof = 1, 278 .short_xfer_ok = 1 279 }, 280 .callback = rsu_bulk_rx_callback 281 }, 282 [RSU_BULK_TX_BE_BK] = { 283 .type = UE_BULK, 284 .endpoint = 0x06, 285 .direction = UE_DIR_OUT, 286 .bufsize = RSU_TXBUFSZ, 287 .flags = { 288 .ext_buffer = 1, 289 .pipe_bof = 1, 290 .force_short_xfer = 1 291 }, 292 .callback = rsu_bulk_tx_callback_be_bk, 293 .timeout = RSU_TX_TIMEOUT 294 }, 295 [RSU_BULK_TX_VI_VO] = { 296 .type = UE_BULK, 297 .endpoint = 0x04, 298 .direction = UE_DIR_OUT, 299 .bufsize = RSU_TXBUFSZ, 300 .flags = { 301 .ext_buffer = 1, 302 .pipe_bof = 1, 303 .force_short_xfer = 1 304 }, 305 .callback = rsu_bulk_tx_callback_vi_vo, 306 .timeout = RSU_TX_TIMEOUT 307 }, 308 [RSU_BULK_TX_H2C] = { 309 .type = UE_BULK, 310 .endpoint = 0x0d, 311 .direction = UE_DIR_OUT, 312 .bufsize = RSU_TXBUFSZ, 313 .flags = { 314 .ext_buffer = 1, 315 .pipe_bof = 1, 316 .short_xfer_ok = 1 317 }, 318 .callback = rsu_bulk_tx_callback_h2c, 319 .timeout = RSU_TX_TIMEOUT 320 }, 321 }; 322 323 static int 324 rsu_match(device_t self) 325 { 326 struct usb_attach_arg *uaa = device_get_ivars(self); 327 328 if (uaa->usb_mode != USB_MODE_HOST || 329 uaa->info.bIfaceIndex != 0 || 330 uaa->info.bConfigIndex != 0) 331 return (ENXIO); 332 333 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 334 } 335 336 static int 337 rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg) 338 { 339 340 return (ENOTSUP); 341 } 342 343 static void 344 rsu_update_chw(struct ieee80211com *ic) 345 { 346 347 } 348 349 /* 350 * notification from net80211 that it'd like to do A-MPDU on the given TID. 351 * 352 * Note: this actually hangs traffic at the present moment, so don't use it. 353 * The firmware debug does indiciate it's sending and establishing a TX AMPDU 354 * session, but then no traffic flows. 355 */ 356 static int 357 rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 358 { 359 #if 0 360 struct rsu_softc *sc = ni->ni_ic->ic_softc; 361 struct r92s_add_ba_req req; 362 363 /* Don't enable if it's requested or running */ 364 if (IEEE80211_AMPDU_REQUESTED(tap)) 365 return (0); 366 if (IEEE80211_AMPDU_RUNNING(tap)) 367 return (0); 368 369 /* We've decided to send addba; so send it */ 370 req.tid = htole32(tap->txa_tid); 371 372 /* Attempt net80211 state */ 373 if (ieee80211_ampdu_tx_request_ext(ni, tap->txa_tid) != 1) 374 return (0); 375 376 /* Send the firmware command */ 377 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: establishing AMPDU TX for TID %d\n", 378 __func__, 379 tap->txa_tid); 380 381 RSU_LOCK(sc); 382 if (rsu_fw_cmd(sc, R92S_CMD_ADDBA_REQ, &req, sizeof(req)) != 1) { 383 RSU_UNLOCK(sc); 384 /* Mark failure */ 385 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 0); 386 return (0); 387 } 388 RSU_UNLOCK(sc); 389 390 /* Mark success; we don't get any further notifications */ 391 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 1); 392 #endif 393 /* Return 0, we're driving this ourselves */ 394 return (0); 395 } 396 397 static int 398 rsu_wme_update(struct ieee80211com *ic) 399 { 400 401 /* Firmware handles this; not our problem */ 402 return (0); 403 } 404 405 static int 406 rsu_attach(device_t self) 407 { 408 struct usb_attach_arg *uaa = device_get_ivars(self); 409 struct rsu_softc *sc = device_get_softc(self); 410 struct ieee80211com *ic = &sc->sc_ic; 411 int error; 412 uint8_t iface_index; 413 struct usb_interface *iface; 414 const char *rft; 415 416 device_set_usb_desc(self); 417 sc->sc_udev = uaa->device; 418 sc->sc_dev = self; 419 if (rsu_enable_11n) 420 sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED); 421 422 /* Get number of endpoints */ 423 iface = usbd_get_iface(sc->sc_udev, 0); 424 sc->sc_nendpoints = iface->idesc->bNumEndpoints; 425 426 /* Endpoints are hard-coded for now, so enforce 4-endpoint only */ 427 if (sc->sc_nendpoints != 4) { 428 device_printf(sc->sc_dev, 429 "the driver currently only supports 4-endpoint devices\n"); 430 return (ENXIO); 431 } 432 433 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 434 MTX_DEF); 435 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 436 rsu_calib_task, sc); 437 TASK_INIT(&sc->tx_task, 0, rsu_tx_task, sc); 438 mbufq_init(&sc->sc_snd, ifqmaxlen); 439 440 /* Allocate Tx/Rx buffers. */ 441 error = rsu_alloc_rx_list(sc); 442 if (error != 0) { 443 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 444 goto fail_usb; 445 } 446 447 error = rsu_alloc_tx_list(sc); 448 if (error != 0) { 449 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 450 rsu_free_rx_list(sc); 451 goto fail_usb; 452 } 453 454 iface_index = 0; 455 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 456 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 457 if (error) { 458 device_printf(sc->sc_dev, 459 "could not allocate USB transfers, err=%s\n", 460 usbd_errstr(error)); 461 goto fail_usb; 462 } 463 RSU_LOCK(sc); 464 /* Read chip revision. */ 465 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 466 if (sc->cut != 3) 467 sc->cut = (sc->cut >> 1) + 1; 468 error = rsu_read_rom(sc); 469 RSU_UNLOCK(sc); 470 if (error != 0) { 471 device_printf(self, "could not read ROM\n"); 472 goto fail_rom; 473 } 474 475 /* Figure out TX/RX streams */ 476 switch (sc->rom[84]) { 477 case 0x0: 478 sc->sc_rftype = RTL8712_RFCONFIG_1T1R; 479 sc->sc_nrxstream = 1; 480 sc->sc_ntxstream = 1; 481 rft = "1T1R"; 482 break; 483 case 0x1: 484 sc->sc_rftype = RTL8712_RFCONFIG_1T2R; 485 sc->sc_nrxstream = 2; 486 sc->sc_ntxstream = 1; 487 rft = "1T2R"; 488 break; 489 case 0x2: 490 sc->sc_rftype = RTL8712_RFCONFIG_2T2R; 491 sc->sc_nrxstream = 2; 492 sc->sc_ntxstream = 2; 493 rft = "2T2R"; 494 break; 495 default: 496 device_printf(sc->sc_dev, 497 "%s: unknown board type (rfconfig=0x%02x)\n", 498 __func__, 499 sc->rom[84]); 500 goto fail_rom; 501 } 502 503 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]); 504 device_printf(self, "MAC/BB RTL8712 cut %d %s\n", sc->cut, rft); 505 506 ic->ic_softc = sc; 507 ic->ic_name = device_get_nameunit(self); 508 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 509 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 510 511 /* Set device capabilities. */ 512 ic->ic_caps = 513 IEEE80211_C_STA | /* station mode */ 514 #if 0 515 IEEE80211_C_BGSCAN | /* Background scan. */ 516 #endif 517 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 518 IEEE80211_C_WME | /* WME/QoS */ 519 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 520 IEEE80211_C_WPA; /* WPA/RSN. */ 521 522 /* Check if HT support is present. */ 523 if (sc->sc_ht) { 524 device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__); 525 526 /* Enable basic HT */ 527 ic->ic_htcaps = IEEE80211_HTC_HT | 528 #if 0 529 IEEE80211_HTC_AMPDU | 530 #endif 531 IEEE80211_HTC_AMSDU | 532 IEEE80211_HTCAP_MAXAMSDU_3839 | 533 IEEE80211_HTCAP_SMPS_OFF; 534 ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 535 536 /* set number of spatial streams */ 537 ic->ic_txstream = sc->sc_ntxstream; 538 ic->ic_rxstream = sc->sc_nrxstream; 539 } 540 541 rsu_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 542 ic->ic_channels); 543 544 ieee80211_ifattach(ic); 545 ic->ic_raw_xmit = rsu_raw_xmit; 546 ic->ic_scan_start = rsu_scan_start; 547 ic->ic_scan_end = rsu_scan_end; 548 ic->ic_getradiocaps = rsu_getradiocaps; 549 ic->ic_set_channel = rsu_set_channel; 550 ic->ic_vap_create = rsu_vap_create; 551 ic->ic_vap_delete = rsu_vap_delete; 552 ic->ic_update_mcast = rsu_update_mcast; 553 ic->ic_parent = rsu_parent; 554 ic->ic_transmit = rsu_transmit; 555 ic->ic_send_mgmt = rsu_send_mgmt; 556 ic->ic_update_chw = rsu_update_chw; 557 ic->ic_ampdu_enable = rsu_ampdu_enable; 558 ic->ic_wme.wme_update = rsu_wme_update; 559 560 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 561 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 562 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 563 RSU_RX_RADIOTAP_PRESENT); 564 565 if (bootverbose) 566 ieee80211_announce(ic); 567 568 return (0); 569 570 fail_rom: 571 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 572 fail_usb: 573 mtx_destroy(&sc->sc_mtx); 574 return (ENXIO); 575 } 576 577 static int 578 rsu_detach(device_t self) 579 { 580 struct rsu_softc *sc = device_get_softc(self); 581 struct ieee80211com *ic = &sc->sc_ic; 582 583 RSU_LOCK(sc); 584 rsu_stop(sc); 585 RSU_UNLOCK(sc); 586 587 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 588 589 /* 590 * Free buffers /before/ we detach from net80211, else node 591 * references to destroyed vaps will lead to a panic. 592 */ 593 /* Free Tx/Rx buffers. */ 594 RSU_LOCK(sc); 595 rsu_free_tx_list(sc); 596 rsu_free_rx_list(sc); 597 RSU_UNLOCK(sc); 598 599 /* Frames are freed; detach from net80211 */ 600 ieee80211_ifdetach(ic); 601 602 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 603 taskqueue_drain(taskqueue_thread, &sc->tx_task); 604 605 mtx_destroy(&sc->sc_mtx); 606 607 return (0); 608 } 609 610 static usb_error_t 611 rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 612 void *data) 613 { 614 usb_error_t err; 615 int ntries = 10; 616 617 RSU_ASSERT_LOCKED(sc); 618 619 while (ntries--) { 620 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 621 req, data, 0, NULL, 250 /* ms */); 622 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 623 break; 624 DPRINTFN(1, "Control request failed, %s (retrying)\n", 625 usbd_errstr(err)); 626 rsu_ms_delay(sc, 10); 627 } 628 629 return (err); 630 } 631 632 static struct ieee80211vap * 633 rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 634 enum ieee80211_opmode opmode, int flags, 635 const uint8_t bssid[IEEE80211_ADDR_LEN], 636 const uint8_t mac[IEEE80211_ADDR_LEN]) 637 { 638 struct rsu_vap *uvp; 639 struct ieee80211vap *vap; 640 641 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 642 return (NULL); 643 644 uvp = malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO); 645 vap = &uvp->vap; 646 647 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 648 flags, bssid) != 0) { 649 /* out of memory */ 650 free(uvp, M_80211_VAP); 651 return (NULL); 652 } 653 654 /* override state transition machine */ 655 uvp->newstate = vap->iv_newstate; 656 vap->iv_newstate = rsu_newstate; 657 658 /* Limits from the r92su driver */ 659 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 660 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K; 661 662 /* complete setup */ 663 ieee80211_vap_attach(vap, ieee80211_media_change, 664 ieee80211_media_status, mac); 665 ic->ic_opmode = opmode; 666 667 return (vap); 668 } 669 670 static void 671 rsu_vap_delete(struct ieee80211vap *vap) 672 { 673 struct rsu_vap *uvp = RSU_VAP(vap); 674 675 ieee80211_vap_detach(vap); 676 free(uvp, M_80211_VAP); 677 } 678 679 static void 680 rsu_scan_start(struct ieee80211com *ic) 681 { 682 struct rsu_softc *sc = ic->ic_softc; 683 int error; 684 685 /* Scanning is done by the firmware. */ 686 RSU_LOCK(sc); 687 /* XXX TODO: force awake if in in network-sleep? */ 688 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 689 RSU_UNLOCK(sc); 690 if (error != 0) 691 device_printf(sc->sc_dev, 692 "could not send site survey command\n"); 693 } 694 695 static void 696 rsu_scan_end(struct ieee80211com *ic) 697 { 698 /* Nothing to do here. */ 699 } 700 701 static void 702 rsu_getradiocaps(struct ieee80211com *ic, 703 int maxchans, int *nchans, struct ieee80211_channel chans[]) 704 { 705 struct rsu_softc *sc = ic->ic_softc; 706 uint8_t bands[IEEE80211_MODE_BYTES]; 707 708 /* Set supported .11b and .11g rates. */ 709 memset(bands, 0, sizeof(bands)); 710 setbit(bands, IEEE80211_MODE_11B); 711 setbit(bands, IEEE80211_MODE_11G); 712 if (sc->sc_ht) 713 setbit(bands, IEEE80211_MODE_11NG); 714 ieee80211_add_channel_list_2ghz(chans, maxchans, nchans, 715 rsu_chan_2ghz, nitems(rsu_chan_2ghz), bands, 0); 716 } 717 718 static void 719 rsu_set_channel(struct ieee80211com *ic __unused) 720 { 721 /* We are unable to switch channels, yet. */ 722 } 723 724 static void 725 rsu_update_mcast(struct ieee80211com *ic) 726 { 727 /* XXX do nothing? */ 728 } 729 730 static int 731 rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 732 int ndata, int maxsz) 733 { 734 int i, error; 735 736 for (i = 0; i < ndata; i++) { 737 struct rsu_data *dp = &data[i]; 738 dp->sc = sc; 739 dp->m = NULL; 740 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 741 if (dp->buf == NULL) { 742 device_printf(sc->sc_dev, 743 "could not allocate buffer\n"); 744 error = ENOMEM; 745 goto fail; 746 } 747 dp->ni = NULL; 748 } 749 750 return (0); 751 fail: 752 rsu_free_list(sc, data, ndata); 753 return (error); 754 } 755 756 static int 757 rsu_alloc_rx_list(struct rsu_softc *sc) 758 { 759 int error, i; 760 761 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 762 RSU_RXBUFSZ); 763 if (error != 0) 764 return (error); 765 766 STAILQ_INIT(&sc->sc_rx_active); 767 STAILQ_INIT(&sc->sc_rx_inactive); 768 769 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 770 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 771 772 return (0); 773 } 774 775 static int 776 rsu_alloc_tx_list(struct rsu_softc *sc) 777 { 778 int error, i; 779 780 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 781 RSU_TXBUFSZ); 782 if (error != 0) 783 return (error); 784 785 STAILQ_INIT(&sc->sc_tx_inactive); 786 787 for (i = 0; i != RSU_N_TRANSFER; i++) { 788 STAILQ_INIT(&sc->sc_tx_active[i]); 789 STAILQ_INIT(&sc->sc_tx_pending[i]); 790 } 791 792 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 793 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 794 } 795 796 return (0); 797 } 798 799 static void 800 rsu_free_tx_list(struct rsu_softc *sc) 801 { 802 int i; 803 804 /* prevent further allocations from TX list(s) */ 805 STAILQ_INIT(&sc->sc_tx_inactive); 806 807 for (i = 0; i != RSU_N_TRANSFER; i++) { 808 STAILQ_INIT(&sc->sc_tx_active[i]); 809 STAILQ_INIT(&sc->sc_tx_pending[i]); 810 } 811 812 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 813 } 814 815 static void 816 rsu_free_rx_list(struct rsu_softc *sc) 817 { 818 /* prevent further allocations from RX list(s) */ 819 STAILQ_INIT(&sc->sc_rx_inactive); 820 STAILQ_INIT(&sc->sc_rx_active); 821 822 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 823 } 824 825 static void 826 rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 827 { 828 int i; 829 830 for (i = 0; i < ndata; i++) { 831 struct rsu_data *dp = &data[i]; 832 833 if (dp->buf != NULL) { 834 free(dp->buf, M_USBDEV); 835 dp->buf = NULL; 836 } 837 if (dp->ni != NULL) { 838 ieee80211_free_node(dp->ni); 839 dp->ni = NULL; 840 } 841 } 842 } 843 844 static struct rsu_data * 845 _rsu_getbuf(struct rsu_softc *sc) 846 { 847 struct rsu_data *bf; 848 849 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 850 if (bf != NULL) 851 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 852 else 853 bf = NULL; 854 return (bf); 855 } 856 857 static struct rsu_data * 858 rsu_getbuf(struct rsu_softc *sc) 859 { 860 struct rsu_data *bf; 861 862 RSU_ASSERT_LOCKED(sc); 863 864 bf = _rsu_getbuf(sc); 865 if (bf == NULL) { 866 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: no buffers\n", __func__); 867 } 868 return (bf); 869 } 870 871 static void 872 rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf) 873 { 874 875 RSU_ASSERT_LOCKED(sc); 876 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next); 877 } 878 879 static int 880 rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 881 int len) 882 { 883 usb_device_request_t req; 884 885 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 886 req.bRequest = R92S_REQ_REGS; 887 USETW(req.wValue, addr); 888 USETW(req.wIndex, 0); 889 USETW(req.wLength, len); 890 891 return (rsu_do_request(sc, &req, buf)); 892 } 893 894 static void 895 rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 896 { 897 rsu_write_region_1(sc, addr, &val, 1); 898 } 899 900 static void 901 rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 902 { 903 val = htole16(val); 904 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 905 } 906 907 static void 908 rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 909 { 910 val = htole32(val); 911 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 912 } 913 914 static int 915 rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 916 int len) 917 { 918 usb_device_request_t req; 919 920 req.bmRequestType = UT_READ_VENDOR_DEVICE; 921 req.bRequest = R92S_REQ_REGS; 922 USETW(req.wValue, addr); 923 USETW(req.wIndex, 0); 924 USETW(req.wLength, len); 925 926 return (rsu_do_request(sc, &req, buf)); 927 } 928 929 static uint8_t 930 rsu_read_1(struct rsu_softc *sc, uint16_t addr) 931 { 932 uint8_t val; 933 934 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 935 return (0xff); 936 return (val); 937 } 938 939 static uint16_t 940 rsu_read_2(struct rsu_softc *sc, uint16_t addr) 941 { 942 uint16_t val; 943 944 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 945 return (0xffff); 946 return (le16toh(val)); 947 } 948 949 static uint32_t 950 rsu_read_4(struct rsu_softc *sc, uint16_t addr) 951 { 952 uint32_t val; 953 954 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 955 return (0xffffffff); 956 return (le32toh(val)); 957 } 958 959 static int 960 rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 961 { 962 int ntries; 963 964 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 965 rsu_ms_delay(sc, 1); 966 for (ntries = 0; ntries < 50; ntries++) { 967 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 968 return (0); 969 rsu_ms_delay(sc, 1); 970 } 971 return (ETIMEDOUT); 972 } 973 974 static uint8_t 975 rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 976 { 977 uint32_t reg; 978 int ntries; 979 980 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 981 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 982 reg &= ~R92S_EFUSE_CTRL_VALID; 983 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 984 /* Wait for read operation to complete. */ 985 for (ntries = 0; ntries < 100; ntries++) { 986 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 987 if (reg & R92S_EFUSE_CTRL_VALID) 988 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 989 rsu_ms_delay(sc, 1); 990 } 991 device_printf(sc->sc_dev, 992 "could not read efuse byte at address 0x%x\n", addr); 993 return (0xff); 994 } 995 996 static int 997 rsu_read_rom(struct rsu_softc *sc) 998 { 999 uint8_t *rom = sc->rom; 1000 uint16_t addr = 0; 1001 uint32_t reg; 1002 uint8_t off, msk; 1003 int i; 1004 1005 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 1006 reg = rsu_read_1(sc, R92S_EE_9346CR); 1007 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 1008 return (EIO); 1009 1010 /* Turn on 2.5V to prevent eFuse leakage. */ 1011 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 1012 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 1013 rsu_ms_delay(sc, 1); 1014 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 1015 1016 /* Read full ROM image. */ 1017 memset(&sc->rom, 0xff, sizeof(sc->rom)); 1018 while (addr < 512) { 1019 reg = rsu_efuse_read_1(sc, addr); 1020 if (reg == 0xff) 1021 break; 1022 addr++; 1023 off = reg >> 4; 1024 msk = reg & 0xf; 1025 for (i = 0; i < 4; i++) { 1026 if (msk & (1 << i)) 1027 continue; 1028 rom[off * 8 + i * 2 + 0] = 1029 rsu_efuse_read_1(sc, addr); 1030 addr++; 1031 rom[off * 8 + i * 2 + 1] = 1032 rsu_efuse_read_1(sc, addr); 1033 addr++; 1034 } 1035 } 1036 #ifdef USB_DEBUG 1037 if (rsu_debug >= 5) { 1038 /* Dump ROM content. */ 1039 printf("\n"); 1040 for (i = 0; i < sizeof(sc->rom); i++) 1041 printf("%02x:", rom[i]); 1042 printf("\n"); 1043 } 1044 #endif 1045 return (0); 1046 } 1047 1048 static int 1049 rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 1050 { 1051 const uint8_t which = RSU_H2C_ENDPOINT; 1052 struct rsu_data *data; 1053 struct r92s_tx_desc *txd; 1054 struct r92s_fw_cmd_hdr *cmd; 1055 int cmdsz; 1056 int xferlen; 1057 1058 RSU_ASSERT_LOCKED(sc); 1059 1060 data = rsu_getbuf(sc); 1061 if (data == NULL) 1062 return (ENOMEM); 1063 1064 /* Blank the entire payload, just to be safe */ 1065 memset(data->buf, '\0', RSU_TXBUFSZ); 1066 1067 /* Round-up command length to a multiple of 8 bytes. */ 1068 /* XXX TODO: is this required? */ 1069 cmdsz = (len + 7) & ~7; 1070 1071 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 1072 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 1073 memset(data->buf, 0, xferlen); 1074 1075 /* Setup Tx descriptor. */ 1076 txd = (struct r92s_tx_desc *)data->buf; 1077 txd->txdw0 = htole32( 1078 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1079 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 1080 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1081 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 1082 1083 /* Setup command header. */ 1084 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 1085 cmd->len = htole16(cmdsz); 1086 cmd->code = code; 1087 cmd->seq = sc->cmd_seq; 1088 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 1089 1090 /* Copy command payload. */ 1091 memcpy(&cmd[1], buf, len); 1092 1093 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD, 1094 "%s: Tx cmd code=0x%x len=0x%x\n", 1095 __func__, code, cmdsz); 1096 data->buflen = xferlen; 1097 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1098 usbd_transfer_start(sc->sc_xfer[which]); 1099 1100 return (0); 1101 } 1102 1103 /* ARGSUSED */ 1104 static void 1105 rsu_calib_task(void *arg, int pending __unused) 1106 { 1107 struct rsu_softc *sc = arg; 1108 #ifdef notyet 1109 uint32_t reg; 1110 #endif 1111 1112 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n", 1113 __func__); 1114 1115 RSU_LOCK(sc); 1116 #ifdef notyet 1117 /* Read WPS PBC status. */ 1118 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 1119 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 1120 rsu_write_1(sc, R92S_GPIO_IO_SEL, 1121 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 1122 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 1123 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 1124 DPRINTF(("WPS PBC is pushed\n")); 1125 #endif 1126 /* Read current signal level. */ 1127 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 1128 sc->sc_currssi = rsu_read_4(sc, R92S_IOCMD_DATA); 1129 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d (%d)\n", 1130 __func__, sc->sc_currssi, 1131 rsu_hwrssi_to_rssi(sc, sc->sc_currssi)); 1132 } 1133 if (sc->sc_calibrating) 1134 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1135 RSU_UNLOCK(sc); 1136 } 1137 1138 static void 1139 rsu_tx_task(void *arg, int pending __unused) 1140 { 1141 struct rsu_softc *sc = arg; 1142 1143 RSU_LOCK(sc); 1144 _rsu_start(sc); 1145 RSU_UNLOCK(sc); 1146 } 1147 1148 #define RSU_PWR_UNKNOWN 0x0 1149 #define RSU_PWR_ACTIVE 0x1 1150 #define RSU_PWR_OFF 0x2 1151 #define RSU_PWR_SLEEP 0x3 1152 1153 /* 1154 * Set the current power state. 1155 * 1156 * The rtlwifi code doesn't do this so aggressively; it 1157 * waits for an idle period after association with 1158 * no traffic before doing this. 1159 * 1160 * For now - it's on in all states except RUN, and 1161 * in RUN it'll transition to allow sleep. 1162 */ 1163 1164 struct r92s_pwr_cmd { 1165 uint8_t mode; 1166 uint8_t smart_ps; 1167 uint8_t bcn_pass_time; 1168 }; 1169 1170 static int 1171 rsu_set_fw_power_state(struct rsu_softc *sc, int state) 1172 { 1173 struct r92s_set_pwr_mode cmd; 1174 //struct r92s_pwr_cmd cmd; 1175 int error; 1176 1177 RSU_ASSERT_LOCKED(sc); 1178 1179 /* only change state if required */ 1180 if (sc->sc_curpwrstate == state) 1181 return (0); 1182 1183 memset(&cmd, 0, sizeof(cmd)); 1184 1185 switch (state) { 1186 case RSU_PWR_ACTIVE: 1187 /* Force the hardware awake */ 1188 rsu_write_1(sc, R92S_USB_HRPWM, 1189 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 1190 cmd.mode = R92S_PS_MODE_ACTIVE; 1191 break; 1192 case RSU_PWR_SLEEP: 1193 cmd.mode = R92S_PS_MODE_DTIM; /* XXX configurable? */ 1194 cmd.smart_ps = 1; /* XXX 2 if doing p2p */ 1195 cmd.bcn_pass_time = 5; /* in 100mS usb.c, linux/rtlwifi */ 1196 break; 1197 case RSU_PWR_OFF: 1198 cmd.mode = R92S_PS_MODE_RADIOOFF; 1199 break; 1200 default: 1201 device_printf(sc->sc_dev, "%s: unknown ps mode (%d)\n", 1202 __func__, 1203 state); 1204 return (ENXIO); 1205 } 1206 1207 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1208 "%s: setting ps mode to %d (mode %d)\n", 1209 __func__, state, cmd.mode); 1210 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 1211 if (error == 0) 1212 sc->sc_curpwrstate = state; 1213 1214 return (error); 1215 } 1216 1217 static int 1218 rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1219 { 1220 struct rsu_vap *uvp = RSU_VAP(vap); 1221 struct ieee80211com *ic = vap->iv_ic; 1222 struct rsu_softc *sc = ic->ic_softc; 1223 struct ieee80211_node *ni; 1224 struct ieee80211_rateset *rs; 1225 enum ieee80211_state ostate; 1226 int error, startcal = 0; 1227 1228 ostate = vap->iv_state; 1229 RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n", 1230 __func__, 1231 ieee80211_state_name[ostate], 1232 ieee80211_state_name[nstate]); 1233 1234 IEEE80211_UNLOCK(ic); 1235 if (ostate == IEEE80211_S_RUN) { 1236 RSU_LOCK(sc); 1237 /* Stop calibration. */ 1238 sc->sc_calibrating = 0; 1239 RSU_UNLOCK(sc); 1240 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 1241 taskqueue_drain(taskqueue_thread, &sc->tx_task); 1242 /* Disassociate from our current BSS. */ 1243 RSU_LOCK(sc); 1244 rsu_disconnect(sc); 1245 } else 1246 RSU_LOCK(sc); 1247 switch (nstate) { 1248 case IEEE80211_S_INIT: 1249 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1250 break; 1251 case IEEE80211_S_AUTH: 1252 ni = ieee80211_ref_node(vap->iv_bss); 1253 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1254 error = rsu_join_bss(sc, ni); 1255 ieee80211_free_node(ni); 1256 if (error != 0) { 1257 device_printf(sc->sc_dev, 1258 "could not send join command\n"); 1259 } 1260 break; 1261 case IEEE80211_S_RUN: 1262 ni = ieee80211_ref_node(vap->iv_bss); 1263 rs = &ni->ni_rates; 1264 /* Indicate highest supported rate. */ 1265 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1266 (void) rsu_set_fw_power_state(sc, RSU_PWR_SLEEP); 1267 ieee80211_free_node(ni); 1268 startcal = 1; 1269 break; 1270 default: 1271 break; 1272 } 1273 if (startcal != 0) { 1274 sc->sc_calibrating = 1; 1275 /* Start periodic calibration. */ 1276 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, 1277 hz); 1278 } 1279 RSU_UNLOCK(sc); 1280 IEEE80211_LOCK(ic); 1281 return (uvp->newstate(vap, nstate, arg)); 1282 } 1283 1284 #ifdef notyet 1285 static void 1286 rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1287 { 1288 struct r92s_fw_cmd_set_key key; 1289 1290 memset(&key, 0, sizeof(key)); 1291 /* Map net80211 cipher to HW crypto algorithm. */ 1292 switch (k->wk_cipher->ic_cipher) { 1293 case IEEE80211_CIPHER_WEP: 1294 if (k->wk_keylen < 8) 1295 key.algo = R92S_KEY_ALGO_WEP40; 1296 else 1297 key.algo = R92S_KEY_ALGO_WEP104; 1298 break; 1299 case IEEE80211_CIPHER_TKIP: 1300 key.algo = R92S_KEY_ALGO_TKIP; 1301 break; 1302 case IEEE80211_CIPHER_AES_CCM: 1303 key.algo = R92S_KEY_ALGO_AES; 1304 break; 1305 default: 1306 return; 1307 } 1308 key.id = k->wk_keyix; 1309 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1310 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1311 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1312 } 1313 1314 static void 1315 rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1316 { 1317 struct r92s_fw_cmd_set_key key; 1318 1319 memset(&key, 0, sizeof(key)); 1320 key.id = k->wk_keyix; 1321 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1322 } 1323 #endif 1324 1325 static int 1326 rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1327 { 1328 struct r92s_fw_cmd_sitesurvey cmd; 1329 struct ieee80211com *ic = &sc->sc_ic; 1330 int r; 1331 1332 RSU_ASSERT_LOCKED(sc); 1333 1334 memset(&cmd, 0, sizeof(cmd)); 1335 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1) 1336 cmd.active = htole32(1); 1337 cmd.limit = htole32(48); 1338 if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) { 1339 /* Do a directed scan for second pass. */ 1340 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1341 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1342 vap->iv_des_ssid[0].len); 1343 1344 } 1345 DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass); 1346 r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd)); 1347 if (r == 0) { 1348 sc->sc_scanning = 1; 1349 } 1350 return (r); 1351 } 1352 1353 static int 1354 rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1355 { 1356 struct ieee80211com *ic = &sc->sc_ic; 1357 struct ieee80211vap *vap = ni->ni_vap; 1358 struct ndis_wlan_bssid_ex *bss; 1359 struct ndis_802_11_fixed_ies *fixed; 1360 struct r92s_fw_cmd_auth auth; 1361 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1362 uint8_t *frm; 1363 uint8_t opmode; 1364 int error; 1365 int cnt; 1366 char *msg = "rsujoin"; 1367 1368 RSU_ASSERT_LOCKED(sc); 1369 1370 /* 1371 * Until net80211 scanning doesn't automatically finish 1372 * before we tell it to, let's just wait until any pending 1373 * scan is done. 1374 * 1375 * XXX TODO: yes, this releases and re-acquires the lock. 1376 * We should re-verify the state whenever we re-attempt this! 1377 */ 1378 cnt = 0; 1379 while (sc->sc_scanning && cnt < 10) { 1380 device_printf(sc->sc_dev, 1381 "%s: still scanning! (attempt %d)\n", 1382 __func__, cnt); 1383 msleep(msg, &sc->sc_mtx, 0, msg, hz / 2); 1384 cnt++; 1385 } 1386 1387 /* Let the FW decide the opmode based on the capinfo field. */ 1388 opmode = NDIS802_11AUTOUNKNOWN; 1389 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1390 "%s: setting operating mode to %d\n", 1391 __func__, opmode); 1392 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1393 if (error != 0) 1394 return (error); 1395 1396 memset(&auth, 0, sizeof(auth)); 1397 if (vap->iv_flags & IEEE80211_F_WPA) { 1398 auth.mode = R92S_AUTHMODE_WPA; 1399 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1400 } else 1401 auth.mode = R92S_AUTHMODE_OPEN; 1402 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1403 "%s: setting auth mode to %d\n", 1404 __func__, auth.mode); 1405 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1406 if (error != 0) 1407 return (error); 1408 1409 memset(buf, 0, sizeof(buf)); 1410 bss = (struct ndis_wlan_bssid_ex *)buf; 1411 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1412 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1413 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1414 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1415 bss->privacy = htole32(1); 1416 bss->rssi = htole32(ni->ni_avgrssi); 1417 if (ic->ic_curmode == IEEE80211_MODE_11B) 1418 bss->networktype = htole32(NDIS802_11DS); 1419 else 1420 bss->networktype = htole32(NDIS802_11OFDM24); 1421 bss->config.len = htole32(sizeof(bss->config)); 1422 bss->config.bintval = htole32(ni->ni_intval); 1423 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1424 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1425 /* XXX verify how this is supposed to look! */ 1426 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1427 ni->ni_rates.rs_nrates); 1428 /* Write the fixed fields of the beacon frame. */ 1429 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1430 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1431 fixed->bintval = htole16(ni->ni_intval); 1432 fixed->capabilities = htole16(ni->ni_capinfo); 1433 /* Write IEs to be included in the association request. */ 1434 frm = (uint8_t *)&fixed[1]; 1435 frm = ieee80211_add_rsn(frm, vap); 1436 frm = ieee80211_add_wpa(frm, vap); 1437 frm = ieee80211_add_qos(frm, ni); 1438 if ((ic->ic_flags & IEEE80211_F_WME) && 1439 (ni->ni_ies.wme_ie != NULL)) 1440 frm = ieee80211_add_wme_info(frm, &ic->ic_wme); 1441 if (ni->ni_flags & IEEE80211_NODE_HT) { 1442 frm = ieee80211_add_htcap(frm, ni); 1443 frm = ieee80211_add_htinfo(frm, ni); 1444 } 1445 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1446 bss->len = htole32(((frm - buf) + 3) & ~3); 1447 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD, 1448 "%s: sending join bss command to %s chan %d\n", 1449 __func__, 1450 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1451 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1452 } 1453 1454 static int 1455 rsu_disconnect(struct rsu_softc *sc) 1456 { 1457 uint32_t zero = 0; /* :-) */ 1458 1459 /* Disassociate from our current BSS. */ 1460 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1461 "%s: sending disconnect command\n", __func__); 1462 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1463 } 1464 1465 /* 1466 * Map the hardware provided RSSI value to a signal level. 1467 * For the most part it's just something we divide by and cap 1468 * so it doesn't overflow the representation by net80211. 1469 */ 1470 static int 1471 rsu_hwrssi_to_rssi(struct rsu_softc *sc, int hw_rssi) 1472 { 1473 int v; 1474 1475 if (hw_rssi == 0) 1476 return (0); 1477 v = hw_rssi >> 4; 1478 if (v > 80) 1479 v = 80; 1480 return (v); 1481 } 1482 1483 static void 1484 rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1485 { 1486 struct ieee80211com *ic = &sc->sc_ic; 1487 struct ieee80211_frame *wh; 1488 struct ndis_wlan_bssid_ex *bss; 1489 struct ieee80211_rx_stats rxs; 1490 struct mbuf *m; 1491 int pktlen; 1492 1493 if (__predict_false(len < sizeof(*bss))) 1494 return; 1495 bss = (struct ndis_wlan_bssid_ex *)buf; 1496 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1497 return; 1498 1499 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1500 "%s: found BSS %s: len=%d chan=%d inframode=%d " 1501 "networktype=%d privacy=%d, RSSI=%d\n", 1502 __func__, 1503 ether_sprintf(bss->macaddr), le32toh(bss->len), 1504 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1505 le32toh(bss->networktype), le32toh(bss->privacy), 1506 le32toh(bss->rssi)); 1507 1508 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1509 /* XXX TODO: just call the new scan API methods! */ 1510 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1511 if (__predict_false(pktlen > MCLBYTES)) 1512 return; 1513 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1514 if (__predict_false(m == NULL)) 1515 return; 1516 wh = mtod(m, struct ieee80211_frame *); 1517 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1518 IEEE80211_FC0_SUBTYPE_BEACON; 1519 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1520 USETW(wh->i_dur, 0); 1521 IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr); 1522 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1523 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1524 *(uint16_t *)wh->i_seq = 0; 1525 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1526 1527 /* Finalize mbuf. */ 1528 m->m_pkthdr.len = m->m_len = pktlen; 1529 1530 /* Set channel flags for input path */ 1531 bzero(&rxs, sizeof(rxs)); 1532 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 1533 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 1534 rxs.c_ieee = le32toh(bss->config.dsconfig); 1535 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 1536 /* This is a number from 0..100; so let's just divide it down a bit */ 1537 rxs.c_rssi = le32toh(bss->rssi) / 2; 1538 rxs.c_nf = -96; 1539 if (ieee80211_add_rx_params(m, &rxs) == 0) 1540 return; 1541 1542 /* XXX avoid a LOR */ 1543 RSU_UNLOCK(sc); 1544 ieee80211_input_mimo_all(ic, m); 1545 RSU_LOCK(sc); 1546 } 1547 1548 static void 1549 rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1550 { 1551 struct ieee80211com *ic = &sc->sc_ic; 1552 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1553 struct ieee80211_node *ni = vap->iv_bss; 1554 struct r92s_event_join_bss *rsp; 1555 uint32_t tmp; 1556 int res; 1557 1558 if (__predict_false(len < sizeof(*rsp))) 1559 return; 1560 rsp = (struct r92s_event_join_bss *)buf; 1561 res = (int)le32toh(rsp->join_res); 1562 1563 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1564 "%s: Rx join BSS event len=%d res=%d\n", 1565 __func__, len, res); 1566 1567 /* 1568 * XXX Don't do this; there's likely a better way to tell 1569 * the caller we failed. 1570 */ 1571 if (res <= 0) { 1572 RSU_UNLOCK(sc); 1573 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1574 RSU_LOCK(sc); 1575 return; 1576 } 1577 1578 tmp = le32toh(rsp->associd); 1579 if (tmp >= vap->iv_max_aid) { 1580 DPRINTF("Assoc ID overflow\n"); 1581 tmp = 1; 1582 } 1583 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1584 "%s: associated with %s associd=%d\n", 1585 __func__, ether_sprintf(rsp->bss.macaddr), tmp); 1586 /* XXX is this required? What's the top two bits for again? */ 1587 ni->ni_associd = tmp | 0xc000; 1588 RSU_UNLOCK(sc); 1589 ieee80211_new_state(vap, IEEE80211_S_RUN, 1590 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1591 RSU_LOCK(sc); 1592 } 1593 1594 static void 1595 rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len) 1596 { 1597 struct ieee80211com *ic = &sc->sc_ic; 1598 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1599 struct r92s_add_ba_event *ba = (void *) buf; 1600 struct ieee80211_node *ni; 1601 1602 if (len < sizeof(*ba)) { 1603 device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len); 1604 return; 1605 } 1606 1607 if (vap == NULL) 1608 return; 1609 1610 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: mac=%s, tid=%d, ssn=%d\n", 1611 __func__, 1612 ether_sprintf(ba->mac_addr), 1613 (int) ba->tid, 1614 (int) le16toh(ba->ssn)); 1615 1616 /* XXX do node lookup; this is STA specific */ 1617 1618 ni = ieee80211_ref_node(vap->iv_bss); 1619 ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32); 1620 ieee80211_free_node(ni); 1621 } 1622 1623 static void 1624 rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1625 { 1626 struct ieee80211com *ic = &sc->sc_ic; 1627 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1628 1629 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1630 "%s: Rx event code=%d len=%d\n", __func__, code, len); 1631 switch (code) { 1632 case R92S_EVT_SURVEY: 1633 rsu_event_survey(sc, buf, len); 1634 break; 1635 case R92S_EVT_SURVEY_DONE: 1636 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1637 "%s: site survey pass %d done, found %d BSS\n", 1638 __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf)); 1639 sc->sc_scanning = 0; 1640 if (vap->iv_state != IEEE80211_S_SCAN) 1641 break; /* Ignore if not scanning. */ 1642 1643 /* 1644 * XXX TODO: This needs to be done without a transition to 1645 * the SCAN state again. Grr. 1646 */ 1647 if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) { 1648 /* Schedule a directed scan for hidden APs. */ 1649 /* XXX bad! */ 1650 sc->sc_scan_pass = 1; 1651 RSU_UNLOCK(sc); 1652 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1653 RSU_LOCK(sc); 1654 break; 1655 } 1656 sc->sc_scan_pass = 0; 1657 break; 1658 case R92S_EVT_JOIN_BSS: 1659 if (vap->iv_state == IEEE80211_S_AUTH) 1660 rsu_event_join_bss(sc, buf, len); 1661 break; 1662 case R92S_EVT_DEL_STA: 1663 RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE, 1664 "%s: disassociated from %s\n", __func__, 1665 ether_sprintf(buf)); 1666 if (vap->iv_state == IEEE80211_S_RUN && 1667 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1668 RSU_UNLOCK(sc); 1669 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1670 RSU_LOCK(sc); 1671 } 1672 break; 1673 case R92S_EVT_WPS_PBC: 1674 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1675 "%s: WPS PBC pushed.\n", __func__); 1676 break; 1677 case R92S_EVT_FWDBG: 1678 buf[60] = '\0'; 1679 RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf); 1680 break; 1681 case R92S_EVT_ADDBA_REQ_REPORT: 1682 rsu_event_addba_req_report(sc, buf, len); 1683 break; 1684 default: 1685 device_printf(sc->sc_dev, "%s: unhandled code (%d)\n", __func__, code); 1686 break; 1687 } 1688 } 1689 1690 static void 1691 rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1692 { 1693 struct r92s_fw_cmd_hdr *cmd; 1694 int cmdsz; 1695 1696 RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len); 1697 1698 /* Skip Rx status. */ 1699 buf += sizeof(struct r92s_rx_stat); 1700 len -= sizeof(struct r92s_rx_stat); 1701 1702 /* Process all events. */ 1703 for (;;) { 1704 /* Check that command header fits. */ 1705 if (__predict_false(len < sizeof(*cmd))) 1706 break; 1707 cmd = (struct r92s_fw_cmd_hdr *)buf; 1708 /* Check that command payload fits. */ 1709 cmdsz = le16toh(cmd->len); 1710 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1711 break; 1712 1713 /* Process firmware event. */ 1714 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1715 1716 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1717 break; 1718 buf += sizeof(*cmd) + cmdsz; 1719 len -= sizeof(*cmd) + cmdsz; 1720 } 1721 } 1722 1723 #if 0 1724 static int8_t 1725 rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1726 { 1727 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1728 struct r92s_rx_phystat *phy; 1729 struct r92s_rx_cck *cck; 1730 uint8_t rpt; 1731 int8_t rssi; 1732 1733 if (rate <= 3) { 1734 cck = (struct r92s_rx_cck *)physt; 1735 rpt = (cck->agc_rpt >> 6) & 0x3; 1736 rssi = cck->agc_rpt & 0x3e; 1737 rssi = cckoff[rpt] - rssi; 1738 } else { /* OFDM/HT. */ 1739 phy = (struct r92s_rx_phystat *)physt; 1740 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1741 } 1742 return (rssi); 1743 } 1744 #endif 1745 1746 static struct mbuf * 1747 rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen) 1748 { 1749 struct ieee80211com *ic = &sc->sc_ic; 1750 struct ieee80211_frame *wh; 1751 struct r92s_rx_stat *stat; 1752 uint32_t rxdw0, rxdw3; 1753 struct mbuf *m; 1754 uint8_t rate; 1755 int infosz; 1756 1757 stat = (struct r92s_rx_stat *)buf; 1758 rxdw0 = le32toh(stat->rxdw0); 1759 rxdw3 = le32toh(stat->rxdw3); 1760 1761 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1762 counter_u64_add(ic->ic_ierrors, 1); 1763 return NULL; 1764 } 1765 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1766 counter_u64_add(ic->ic_ierrors, 1); 1767 return NULL; 1768 } 1769 1770 rate = MS(rxdw3, R92S_RXDW3_RATE); 1771 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1772 1773 #if 0 1774 /* Get RSSI from PHY status descriptor if present. */ 1775 if (infosz != 0) 1776 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1777 else 1778 *rssi = 0; 1779 #endif 1780 1781 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1782 "%s: Rx frame len=%d rate=%d infosz=%d\n", 1783 __func__, pktlen, rate, infosz); 1784 1785 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1786 if (__predict_false(m == NULL)) { 1787 counter_u64_add(ic->ic_ierrors, 1); 1788 return NULL; 1789 } 1790 /* Hardware does Rx TCP checksum offload. */ 1791 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1792 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1793 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1794 } 1795 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1796 memcpy(mtod(m, uint8_t *), wh, pktlen); 1797 m->m_pkthdr.len = m->m_len = pktlen; 1798 1799 if (ieee80211_radiotap_active(ic)) { 1800 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1801 1802 /* Map HW rate index to 802.11 rate. */ 1803 tap->wr_flags = 2; 1804 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1805 switch (rate) { 1806 /* CCK. */ 1807 case 0: tap->wr_rate = 2; break; 1808 case 1: tap->wr_rate = 4; break; 1809 case 2: tap->wr_rate = 11; break; 1810 case 3: tap->wr_rate = 22; break; 1811 /* OFDM. */ 1812 case 4: tap->wr_rate = 12; break; 1813 case 5: tap->wr_rate = 18; break; 1814 case 6: tap->wr_rate = 24; break; 1815 case 7: tap->wr_rate = 36; break; 1816 case 8: tap->wr_rate = 48; break; 1817 case 9: tap->wr_rate = 72; break; 1818 case 10: tap->wr_rate = 96; break; 1819 case 11: tap->wr_rate = 108; break; 1820 } 1821 } else if (rate >= 12) { /* MCS0~15. */ 1822 /* Bit 7 set means HT MCS instead of rate. */ 1823 tap->wr_rate = 0x80 | (rate - 12); 1824 } 1825 #if 0 1826 tap->wr_dbm_antsignal = *rssi; 1827 #endif 1828 /* XXX not nice */ 1829 tap->wr_dbm_antsignal = rsu_hwrssi_to_rssi(sc, sc->sc_currssi); 1830 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1831 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1832 } 1833 1834 return (m); 1835 } 1836 1837 static struct mbuf * 1838 rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len) 1839 { 1840 struct r92s_rx_stat *stat; 1841 uint32_t rxdw0; 1842 int totlen, pktlen, infosz, npkts; 1843 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1844 1845 /* Get the number of encapsulated frames. */ 1846 stat = (struct r92s_rx_stat *)buf; 1847 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1848 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1849 "%s: Rx %d frames in one chunk\n", __func__, npkts); 1850 1851 /* Process all of them. */ 1852 while (npkts-- > 0) { 1853 if (__predict_false(len < sizeof(*stat))) 1854 break; 1855 stat = (struct r92s_rx_stat *)buf; 1856 rxdw0 = le32toh(stat->rxdw0); 1857 1858 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1859 if (__predict_false(pktlen == 0)) 1860 break; 1861 1862 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1863 1864 /* Make sure everything fits in xfer. */ 1865 totlen = sizeof(*stat) + infosz + pktlen; 1866 if (__predict_false(totlen > len)) 1867 break; 1868 1869 /* Process 802.11 frame. */ 1870 m = rsu_rx_frame(sc, buf, pktlen); 1871 if (m0 == NULL) 1872 m0 = m; 1873 if (prevm == NULL) 1874 prevm = m; 1875 else { 1876 prevm->m_next = m; 1877 prevm = m; 1878 } 1879 /* Next chunk is 128-byte aligned. */ 1880 totlen = (totlen + 127) & ~127; 1881 buf += totlen; 1882 len -= totlen; 1883 } 1884 1885 return (m0); 1886 } 1887 1888 static struct mbuf * 1889 rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data) 1890 { 1891 struct rsu_softc *sc = data->sc; 1892 struct ieee80211com *ic = &sc->sc_ic; 1893 struct r92s_rx_stat *stat; 1894 int len; 1895 1896 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1897 1898 if (__predict_false(len < sizeof(*stat))) { 1899 DPRINTF("xfer too short %d\n", len); 1900 counter_u64_add(ic->ic_ierrors, 1); 1901 return (NULL); 1902 } 1903 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1904 stat = (struct r92s_rx_stat *)data->buf; 1905 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1906 rsu_rx_multi_event(sc, data->buf, len); 1907 /* No packets to process. */ 1908 return (NULL); 1909 } else 1910 return (rsu_rx_multi_frame(sc, data->buf, len)); 1911 } 1912 1913 static void 1914 rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1915 { 1916 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1917 struct ieee80211com *ic = &sc->sc_ic; 1918 struct ieee80211_frame *wh; 1919 struct ieee80211_node *ni; 1920 struct mbuf *m = NULL, *next; 1921 struct rsu_data *data; 1922 1923 RSU_ASSERT_LOCKED(sc); 1924 1925 switch (USB_GET_STATE(xfer)) { 1926 case USB_ST_TRANSFERRED: 1927 data = STAILQ_FIRST(&sc->sc_rx_active); 1928 if (data == NULL) 1929 goto tr_setup; 1930 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1931 m = rsu_rxeof(xfer, data); 1932 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1933 /* FALLTHROUGH */ 1934 case USB_ST_SETUP: 1935 tr_setup: 1936 /* 1937 * XXX TODO: if we have an mbuf list, but then 1938 * we hit data == NULL, what now? 1939 */ 1940 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1941 if (data == NULL) { 1942 KASSERT(m == NULL, ("mbuf isn't NULL")); 1943 return; 1944 } 1945 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1946 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1947 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1948 usbd_xfer_max_len(xfer)); 1949 usbd_transfer_submit(xfer); 1950 /* 1951 * To avoid LOR we should unlock our private mutex here to call 1952 * ieee80211_input() because here is at the end of a USB 1953 * callback and safe to unlock. 1954 */ 1955 RSU_UNLOCK(sc); 1956 while (m != NULL) { 1957 int rssi; 1958 1959 /* Cheat and get the last calibrated RSSI */ 1960 rssi = rsu_hwrssi_to_rssi(sc, sc->sc_currssi); 1961 1962 next = m->m_next; 1963 m->m_next = NULL; 1964 wh = mtod(m, struct ieee80211_frame *); 1965 ni = ieee80211_find_rxnode(ic, 1966 (struct ieee80211_frame_min *)wh); 1967 if (ni != NULL) { 1968 if (ni->ni_flags & IEEE80211_NODE_HT) 1969 m->m_flags |= M_AMPDU; 1970 (void)ieee80211_input(ni, m, rssi, -96); 1971 ieee80211_free_node(ni); 1972 } else 1973 (void)ieee80211_input_all(ic, m, rssi, -96); 1974 m = next; 1975 } 1976 RSU_LOCK(sc); 1977 break; 1978 default: 1979 /* needs it to the inactive queue due to a error. */ 1980 data = STAILQ_FIRST(&sc->sc_rx_active); 1981 if (data != NULL) { 1982 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1983 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1984 } 1985 if (error != USB_ERR_CANCELLED) { 1986 usbd_xfer_set_stall(xfer); 1987 counter_u64_add(ic->ic_ierrors, 1); 1988 goto tr_setup; 1989 } 1990 break; 1991 } 1992 1993 } 1994 1995 static void 1996 rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1997 { 1998 #ifdef USB_DEBUG 1999 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2000 #endif 2001 2002 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n", 2003 __func__, 2004 data); 2005 2006 if (data->m) { 2007 /* XXX status? */ 2008 ieee80211_tx_complete(data->ni, data->m, 0); 2009 data->m = NULL; 2010 data->ni = NULL; 2011 } 2012 } 2013 2014 static void 2015 rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 2016 uint8_t which) 2017 { 2018 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2019 struct ieee80211com *ic = &sc->sc_ic; 2020 struct rsu_data *data; 2021 2022 RSU_ASSERT_LOCKED(sc); 2023 2024 switch (USB_GET_STATE(xfer)) { 2025 case USB_ST_TRANSFERRED: 2026 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 2027 if (data == NULL) 2028 goto tr_setup; 2029 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n", 2030 __func__, data); 2031 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 2032 rsu_txeof(xfer, data); 2033 rsu_freebuf(sc, data); 2034 /* FALLTHROUGH */ 2035 case USB_ST_SETUP: 2036 tr_setup: 2037 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 2038 if (data == NULL) { 2039 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 2040 "%s: empty pending queue sc %p\n", __func__, sc); 2041 return; 2042 } 2043 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 2044 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 2045 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 2046 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 2047 "%s: submitting transfer %p\n", 2048 __func__, 2049 data); 2050 usbd_transfer_submit(xfer); 2051 break; 2052 default: 2053 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 2054 if (data != NULL) { 2055 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 2056 rsu_txeof(xfer, data); 2057 rsu_freebuf(sc, data); 2058 } 2059 counter_u64_add(ic->ic_oerrors, 1); 2060 2061 if (error != USB_ERR_CANCELLED) { 2062 usbd_xfer_set_stall(xfer); 2063 goto tr_setup; 2064 } 2065 break; 2066 } 2067 2068 /* 2069 * XXX TODO: if the queue is low, flush out FF TX frames. 2070 * Remember to unlock the driver for now; net80211 doesn't 2071 * defer it for us. 2072 */ 2073 } 2074 2075 static void 2076 rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 2077 { 2078 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2079 2080 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 2081 2082 /* This kicks the TX taskqueue */ 2083 rsu_start(sc); 2084 } 2085 2086 static void 2087 rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 2088 { 2089 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2090 2091 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 2092 2093 /* This kicks the TX taskqueue */ 2094 rsu_start(sc); 2095 } 2096 2097 static void 2098 rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error) 2099 { 2100 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2101 2102 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C); 2103 2104 /* This kicks the TX taskqueue */ 2105 rsu_start(sc); 2106 } 2107 2108 /* 2109 * Transmit the given frame. 2110 * 2111 * This doesn't free the node or mbuf upon failure. 2112 */ 2113 static int 2114 rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 2115 struct mbuf *m0, struct rsu_data *data) 2116 { 2117 struct ieee80211com *ic = &sc->sc_ic; 2118 struct ieee80211vap *vap = ni->ni_vap; 2119 struct ieee80211_frame *wh; 2120 struct ieee80211_key *k = NULL; 2121 struct r92s_tx_desc *txd; 2122 uint8_t type; 2123 int prio = 0; 2124 uint8_t which; 2125 int hasqos; 2126 int xferlen; 2127 int qid; 2128 2129 RSU_ASSERT_LOCKED(sc); 2130 2131 wh = mtod(m0, struct ieee80211_frame *); 2132 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2133 2134 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n", 2135 __func__, data, m0); 2136 2137 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2138 k = ieee80211_crypto_encap(ni, m0); 2139 if (k == NULL) { 2140 device_printf(sc->sc_dev, 2141 "ieee80211_crypto_encap returns NULL.\n"); 2142 /* XXX we don't expect the fragmented frames */ 2143 return (ENOBUFS); 2144 } 2145 wh = mtod(m0, struct ieee80211_frame *); 2146 } 2147 /* If we have QoS then use it */ 2148 /* XXX TODO: mbuf WME/PRI versus TID? */ 2149 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2150 /* Has QoS */ 2151 prio = M_WME_GETAC(m0); 2152 which = rsu_wme_ac_xfer_map[prio]; 2153 hasqos = 1; 2154 } else { 2155 /* Non-QoS TID */ 2156 /* XXX TODO: tid=0 for non-qos TID? */ 2157 which = rsu_wme_ac_xfer_map[WME_AC_BE]; 2158 hasqos = 0; 2159 prio = 0; 2160 } 2161 2162 qid = rsu_ac2qid[prio]; 2163 #if 0 2164 switch (type) { 2165 case IEEE80211_FC0_TYPE_CTL: 2166 case IEEE80211_FC0_TYPE_MGT: 2167 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2168 break; 2169 default: 2170 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 2171 break; 2172 } 2173 hasqos = 0; 2174 #endif 2175 2176 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n", 2177 __func__, 2178 prio, 2179 which, 2180 hasqos); 2181 2182 /* Fill Tx descriptor. */ 2183 txd = (struct r92s_tx_desc *)data->buf; 2184 memset(txd, 0, sizeof(*txd)); 2185 2186 txd->txdw0 |= htole32( 2187 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 2188 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 2189 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 2190 2191 txd->txdw1 |= htole32( 2192 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid)); 2193 if (!hasqos) 2194 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 2195 #ifdef notyet 2196 if (k != NULL) { 2197 switch (k->wk_cipher->ic_cipher) { 2198 case IEEE80211_CIPHER_WEP: 2199 cipher = R92S_TXDW1_CIPHER_WEP; 2200 break; 2201 case IEEE80211_CIPHER_TKIP: 2202 cipher = R92S_TXDW1_CIPHER_TKIP; 2203 break; 2204 case IEEE80211_CIPHER_AES_CCM: 2205 cipher = R92S_TXDW1_CIPHER_AES; 2206 break; 2207 default: 2208 cipher = R92S_TXDW1_CIPHER_NONE; 2209 } 2210 txd->txdw1 |= htole32( 2211 SM(R92S_TXDW1_CIPHER, cipher) | 2212 SM(R92S_TXDW1_KEYIDX, k->k_id)); 2213 } 2214 #endif 2215 /* XXX todo: set AGGEN bit if appropriate? */ 2216 txd->txdw2 |= htole32(R92S_TXDW2_BK); 2217 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 2218 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 2219 /* 2220 * Firmware will use and increment the sequence number for the 2221 * specified priority. 2222 */ 2223 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio)); 2224 2225 if (ieee80211_radiotap_active_vap(vap)) { 2226 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 2227 2228 tap->wt_flags = 0; 2229 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2230 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2231 ieee80211_radiotap_tx(vap, m0); 2232 } 2233 2234 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 2235 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 2236 2237 data->buflen = xferlen; 2238 data->ni = ni; 2239 data->m = m0; 2240 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2241 2242 /* start transfer, if any */ 2243 usbd_transfer_start(sc->sc_xfer[which]); 2244 return (0); 2245 } 2246 2247 static int 2248 rsu_transmit(struct ieee80211com *ic, struct mbuf *m) 2249 { 2250 struct rsu_softc *sc = ic->ic_softc; 2251 int error; 2252 2253 RSU_LOCK(sc); 2254 if (!sc->sc_running) { 2255 RSU_UNLOCK(sc); 2256 return (ENXIO); 2257 } 2258 2259 /* 2260 * XXX TODO: ensure that we treat 'm' as a list of frames 2261 * to transmit! 2262 */ 2263 error = mbufq_enqueue(&sc->sc_snd, m); 2264 if (error) { 2265 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2266 "%s: mbufq_enable: failed (%d)\n", 2267 __func__, 2268 error); 2269 RSU_UNLOCK(sc); 2270 return (error); 2271 } 2272 RSU_UNLOCK(sc); 2273 2274 /* This kicks the TX taskqueue */ 2275 rsu_start(sc); 2276 2277 return (0); 2278 } 2279 2280 static void 2281 rsu_drain_mbufq(struct rsu_softc *sc) 2282 { 2283 struct mbuf *m; 2284 struct ieee80211_node *ni; 2285 2286 RSU_ASSERT_LOCKED(sc); 2287 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2288 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2289 m->m_pkthdr.rcvif = NULL; 2290 ieee80211_free_node(ni); 2291 m_freem(m); 2292 } 2293 } 2294 2295 static void 2296 _rsu_start(struct rsu_softc *sc) 2297 { 2298 struct ieee80211_node *ni; 2299 struct rsu_data *bf; 2300 struct mbuf *m; 2301 2302 RSU_ASSERT_LOCKED(sc); 2303 2304 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2305 bf = rsu_getbuf(sc); 2306 if (bf == NULL) { 2307 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2308 "%s: failed to get buffer\n", __func__); 2309 mbufq_prepend(&sc->sc_snd, m); 2310 break; 2311 } 2312 2313 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2314 m->m_pkthdr.rcvif = NULL; 2315 2316 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2317 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2318 "%s: failed to transmit\n", __func__); 2319 if_inc_counter(ni->ni_vap->iv_ifp, 2320 IFCOUNTER_OERRORS, 1); 2321 rsu_freebuf(sc, bf); 2322 ieee80211_free_node(ni); 2323 m_freem(m); 2324 break; 2325 } 2326 } 2327 } 2328 2329 static void 2330 rsu_start(struct rsu_softc *sc) 2331 { 2332 2333 taskqueue_enqueue(taskqueue_thread, &sc->tx_task); 2334 } 2335 2336 static void 2337 rsu_parent(struct ieee80211com *ic) 2338 { 2339 struct rsu_softc *sc = ic->ic_softc; 2340 int startall = 0; 2341 2342 RSU_LOCK(sc); 2343 if (ic->ic_nrunning > 0) { 2344 if (!sc->sc_running) { 2345 rsu_init(sc); 2346 startall = 1; 2347 } 2348 } else if (sc->sc_running) 2349 rsu_stop(sc); 2350 RSU_UNLOCK(sc); 2351 2352 if (startall) 2353 ieee80211_start_all(ic); 2354 } 2355 2356 /* 2357 * Power on sequence for A-cut adapters. 2358 */ 2359 static void 2360 rsu_power_on_acut(struct rsu_softc *sc) 2361 { 2362 uint32_t reg; 2363 2364 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2365 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2366 2367 /* Enable AFE macro block's bandgap and Mbias. */ 2368 rsu_write_1(sc, R92S_AFE_MISC, 2369 rsu_read_1(sc, R92S_AFE_MISC) | 2370 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 2371 /* Enable LDOA15 block. */ 2372 rsu_write_1(sc, R92S_LDOA15_CTRL, 2373 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2374 2375 rsu_write_1(sc, R92S_SPS1_CTRL, 2376 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 2377 rsu_ms_delay(sc, 2000); 2378 /* Enable switch regulator block. */ 2379 rsu_write_1(sc, R92S_SPS1_CTRL, 2380 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 2381 2382 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 2383 2384 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2385 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2386 2387 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2388 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2389 2390 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2391 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 2392 2393 /* Enable AFE clock. */ 2394 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2395 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2396 /* Enable AFE PLL macro block. */ 2397 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 2398 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 2399 /* Attach AFE PLL to MACTOP/BB. */ 2400 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2401 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2402 2403 /* Switch to 40MHz clock instead of 80MHz. */ 2404 rsu_write_2(sc, R92S_SYS_CLKR, 2405 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 2406 2407 /* Enable MAC clock. */ 2408 rsu_write_2(sc, R92S_SYS_CLKR, 2409 rsu_read_2(sc, R92S_SYS_CLKR) | 2410 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2411 2412 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2413 2414 /* Enable digital core and IOREG R/W. */ 2415 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2416 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2417 2418 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2419 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2420 2421 /* Switch the control path to firmware. */ 2422 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2423 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2424 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2425 2426 rsu_write_2(sc, R92S_CR, 0x37fc); 2427 2428 /* Fix USB RX FIFO issue. */ 2429 rsu_write_1(sc, 0xfe5c, 2430 rsu_read_1(sc, 0xfe5c) | 0x80); 2431 rsu_write_1(sc, 0x00ab, 2432 rsu_read_1(sc, 0x00ab) | 0xc0); 2433 2434 rsu_write_1(sc, R92S_SYS_CLKR, 2435 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2436 } 2437 2438 /* 2439 * Power on sequence for B-cut and C-cut adapters. 2440 */ 2441 static void 2442 rsu_power_on_bcut(struct rsu_softc *sc) 2443 { 2444 uint32_t reg; 2445 int ntries; 2446 2447 /* Prevent eFuse leakage. */ 2448 rsu_write_1(sc, 0x37, 0xb0); 2449 rsu_ms_delay(sc, 10); 2450 rsu_write_1(sc, 0x37, 0x30); 2451 2452 /* Switch the control path to hardware. */ 2453 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2454 if (reg & R92S_FWHW_SEL) { 2455 rsu_write_2(sc, R92S_SYS_CLKR, 2456 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 2457 } 2458 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2459 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 2460 rsu_ms_delay(sc, 1); 2461 2462 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2463 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2464 2465 reg = rsu_read_1(sc, R92S_AFE_MISC); 2466 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 2467 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 2468 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 2469 2470 /* Enable PLL. */ 2471 rsu_write_1(sc, R92S_LDOA15_CTRL, 2472 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2473 2474 rsu_write_1(sc, R92S_LDOV12D_CTRL, 2475 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 2476 2477 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2478 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2479 2480 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2481 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2482 2483 /* Support 64KB IMEM. */ 2484 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2485 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 2486 2487 /* Enable AFE clock. */ 2488 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2489 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2490 /* Enable AFE PLL macro block. */ 2491 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 2492 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2493 rsu_ms_delay(sc, 1); 2494 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 2495 rsu_ms_delay(sc, 1); 2496 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2497 rsu_ms_delay(sc, 1); 2498 2499 /* Attach AFE PLL to MACTOP/BB. */ 2500 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2501 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2502 2503 /* Switch to 40MHz clock. */ 2504 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2505 /* Disable CPU clock and 80MHz SSC. */ 2506 rsu_write_1(sc, R92S_SYS_CLKR, 2507 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2508 /* Enable MAC clock. */ 2509 rsu_write_2(sc, R92S_SYS_CLKR, 2510 rsu_read_2(sc, R92S_SYS_CLKR) | 2511 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2512 2513 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2514 2515 /* Enable digital core and IOREG R/W. */ 2516 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2517 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2518 2519 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2520 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2521 2522 /* Switch the control path to firmware. */ 2523 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2524 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2525 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2526 2527 rsu_write_2(sc, R92S_CR, 0x37fc); 2528 2529 /* Fix USB RX FIFO issue. */ 2530 rsu_write_1(sc, 0xfe5c, 2531 rsu_read_1(sc, 0xfe5c) | 0x80); 2532 2533 rsu_write_1(sc, R92S_SYS_CLKR, 2534 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2535 2536 rsu_write_1(sc, 0xfe1c, 0x80); 2537 2538 /* Make sure TxDMA is ready to download firmware. */ 2539 for (ntries = 0; ntries < 20; ntries++) { 2540 reg = rsu_read_1(sc, R92S_TCR); 2541 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2542 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2543 break; 2544 rsu_ms_delay(sc, 1); 2545 } 2546 if (ntries == 20) { 2547 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX, 2548 "%s: TxDMA is not ready\n", 2549 __func__); 2550 /* Reset TxDMA. */ 2551 reg = rsu_read_1(sc, R92S_CR); 2552 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2553 rsu_ms_delay(sc, 1); 2554 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2555 } 2556 } 2557 2558 static void 2559 rsu_power_off(struct rsu_softc *sc) 2560 { 2561 /* Turn RF off. */ 2562 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2563 rsu_ms_delay(sc, 5); 2564 2565 /* Turn MAC off. */ 2566 /* Switch control path. */ 2567 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2568 /* Reset MACTOP. */ 2569 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2570 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2571 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2572 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2573 2574 /* Disable AFE PLL. */ 2575 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2576 /* Disable A15V. */ 2577 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2578 /* Disable eFuse 1.2V. */ 2579 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2580 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2581 /* Enable AFE macro block's bandgap and Mbias. */ 2582 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2583 /* Disable 1.6V LDO. */ 2584 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2585 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2586 2587 /* Firmware - tell it to switch things off */ 2588 (void) rsu_set_fw_power_state(sc, RSU_PWR_OFF); 2589 } 2590 2591 static int 2592 rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2593 { 2594 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2595 struct rsu_data *data; 2596 struct r92s_tx_desc *txd; 2597 int mlen; 2598 2599 while (len > 0) { 2600 data = rsu_getbuf(sc); 2601 if (data == NULL) 2602 return (ENOMEM); 2603 txd = (struct r92s_tx_desc *)data->buf; 2604 memset(txd, 0, sizeof(*txd)); 2605 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2606 /* Last chunk. */ 2607 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2608 mlen = len; 2609 } else 2610 mlen = RSU_TXBUFSZ - sizeof(*txd); 2611 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2612 memcpy(&txd[1], buf, mlen); 2613 data->buflen = sizeof(*txd) + mlen; 2614 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET, 2615 "%s: starting transfer %p\n", 2616 __func__, data); 2617 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2618 buf += mlen; 2619 len -= mlen; 2620 } 2621 usbd_transfer_start(sc->sc_xfer[which]); 2622 return (0); 2623 } 2624 2625 static int 2626 rsu_load_firmware(struct rsu_softc *sc) 2627 { 2628 const struct r92s_fw_hdr *hdr; 2629 struct r92s_fw_priv *dmem; 2630 struct ieee80211com *ic = &sc->sc_ic; 2631 const uint8_t *imem, *emem; 2632 int imemsz, ememsz; 2633 const struct firmware *fw; 2634 size_t size; 2635 uint32_t reg; 2636 int ntries, error; 2637 2638 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2639 RSU_DPRINTF(sc, RSU_DEBUG_ANY, 2640 "%s: Firmware already loaded\n", 2641 __func__); 2642 return (0); 2643 } 2644 2645 RSU_UNLOCK(sc); 2646 /* Read firmware image from the filesystem. */ 2647 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2648 device_printf(sc->sc_dev, 2649 "%s: failed load firmware of file rsu-rtl8712fw\n", 2650 __func__); 2651 RSU_LOCK(sc); 2652 return (ENXIO); 2653 } 2654 RSU_LOCK(sc); 2655 size = fw->datasize; 2656 if (size < sizeof(*hdr)) { 2657 device_printf(sc->sc_dev, "firmware too short\n"); 2658 error = EINVAL; 2659 goto fail; 2660 } 2661 hdr = (const struct r92s_fw_hdr *)fw->data; 2662 if (hdr->signature != htole16(0x8712) && 2663 hdr->signature != htole16(0x8192)) { 2664 device_printf(sc->sc_dev, 2665 "invalid firmware signature 0x%x\n", 2666 le16toh(hdr->signature)); 2667 error = EINVAL; 2668 goto fail; 2669 } 2670 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2671 hdr->month, hdr->day, hdr->hour, hdr->minute); 2672 2673 /* Make sure that driver and firmware are in sync. */ 2674 if (hdr->privsz != htole32(sizeof(*dmem))) { 2675 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2676 error = EINVAL; 2677 goto fail; 2678 } 2679 /* Get FW sections sizes. */ 2680 imemsz = le32toh(hdr->imemsz); 2681 ememsz = le32toh(hdr->sramsz); 2682 /* Check that all FW sections fit in image. */ 2683 if (size < sizeof(*hdr) + imemsz + ememsz) { 2684 device_printf(sc->sc_dev, "firmware too short\n"); 2685 error = EINVAL; 2686 goto fail; 2687 } 2688 imem = (const uint8_t *)&hdr[1]; 2689 emem = imem + imemsz; 2690 2691 /* Load IMEM section. */ 2692 error = rsu_fw_loadsection(sc, imem, imemsz); 2693 if (error != 0) { 2694 device_printf(sc->sc_dev, 2695 "could not load firmware section %s\n", "IMEM"); 2696 goto fail; 2697 } 2698 /* Wait for load to complete. */ 2699 for (ntries = 0; ntries != 50; ntries++) { 2700 rsu_ms_delay(sc, 10); 2701 reg = rsu_read_1(sc, R92S_TCR); 2702 if (reg & R92S_TCR_IMEM_CODE_DONE) 2703 break; 2704 } 2705 if (ntries == 50) { 2706 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2707 error = ETIMEDOUT; 2708 goto fail; 2709 } 2710 /* Load EMEM section. */ 2711 error = rsu_fw_loadsection(sc, emem, ememsz); 2712 if (error != 0) { 2713 device_printf(sc->sc_dev, 2714 "could not load firmware section %s\n", "EMEM"); 2715 goto fail; 2716 } 2717 /* Wait for load to complete. */ 2718 for (ntries = 0; ntries != 50; ntries++) { 2719 rsu_ms_delay(sc, 10); 2720 reg = rsu_read_2(sc, R92S_TCR); 2721 if (reg & R92S_TCR_EMEM_CODE_DONE) 2722 break; 2723 } 2724 if (ntries == 50) { 2725 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2726 error = ETIMEDOUT; 2727 goto fail; 2728 } 2729 /* Enable CPU. */ 2730 rsu_write_1(sc, R92S_SYS_CLKR, 2731 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2732 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2733 device_printf(sc->sc_dev, "could not enable system clock\n"); 2734 error = EIO; 2735 goto fail; 2736 } 2737 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2738 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2739 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2740 device_printf(sc->sc_dev, 2741 "could not enable microcontroller\n"); 2742 error = EIO; 2743 goto fail; 2744 } 2745 /* Wait for CPU to initialize. */ 2746 for (ntries = 0; ntries < 100; ntries++) { 2747 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2748 break; 2749 rsu_ms_delay(sc, 1); 2750 } 2751 if (ntries == 100) { 2752 device_printf(sc->sc_dev, 2753 "timeout waiting for microcontroller\n"); 2754 error = ETIMEDOUT; 2755 goto fail; 2756 } 2757 2758 /* Update DMEM section before loading. */ 2759 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2760 memset(dmem, 0, sizeof(*dmem)); 2761 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2762 dmem->nendpoints = sc->sc_nendpoints; 2763 dmem->chip_version = sc->cut; 2764 dmem->rf_config = sc->sc_rftype; 2765 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2766 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2767 dmem->turbo_mode = 0; 2768 dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40); 2769 dmem->amsdu2ampdu_en = !! (sc->sc_ht); 2770 dmem->ampdu_en = !! (sc->sc_ht); 2771 dmem->agg_offload = !! (sc->sc_ht); 2772 dmem->qos_en = 1; 2773 dmem->ps_offload = 1; 2774 dmem->lowpower_mode = 1; /* XXX TODO: configurable? */ 2775 /* Load DMEM section. */ 2776 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2777 if (error != 0) { 2778 device_printf(sc->sc_dev, 2779 "could not load firmware section %s\n", "DMEM"); 2780 goto fail; 2781 } 2782 /* Wait for load to complete. */ 2783 for (ntries = 0; ntries < 100; ntries++) { 2784 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2785 break; 2786 rsu_ms_delay(sc, 1); 2787 } 2788 if (ntries == 100) { 2789 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2790 "DMEM"); 2791 error = ETIMEDOUT; 2792 goto fail; 2793 } 2794 /* Wait for firmware readiness. */ 2795 for (ntries = 0; ntries < 60; ntries++) { 2796 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2797 break; 2798 rsu_ms_delay(sc, 1); 2799 } 2800 if (ntries == 60) { 2801 device_printf(sc->sc_dev, 2802 "timeout waiting for firmware readiness\n"); 2803 error = ETIMEDOUT; 2804 goto fail; 2805 } 2806 fail: 2807 firmware_put(fw, FIRMWARE_UNLOAD); 2808 return (error); 2809 } 2810 2811 2812 static int 2813 rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2814 const struct ieee80211_bpf_params *params) 2815 { 2816 struct ieee80211com *ic = ni->ni_ic; 2817 struct rsu_softc *sc = ic->ic_softc; 2818 struct rsu_data *bf; 2819 2820 /* prevent management frames from being sent if we're not ready */ 2821 if (!sc->sc_running) { 2822 m_freem(m); 2823 return (ENETDOWN); 2824 } 2825 RSU_LOCK(sc); 2826 bf = rsu_getbuf(sc); 2827 if (bf == NULL) { 2828 m_freem(m); 2829 RSU_UNLOCK(sc); 2830 return (ENOBUFS); 2831 } 2832 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2833 m_freem(m); 2834 rsu_freebuf(sc, bf); 2835 RSU_UNLOCK(sc); 2836 return (EIO); 2837 } 2838 RSU_UNLOCK(sc); 2839 2840 return (0); 2841 } 2842 2843 static void 2844 rsu_init(struct rsu_softc *sc) 2845 { 2846 struct ieee80211com *ic = &sc->sc_ic; 2847 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2848 uint8_t macaddr[IEEE80211_ADDR_LEN]; 2849 int error; 2850 int i; 2851 2852 RSU_ASSERT_LOCKED(sc); 2853 2854 /* Ensure the mbuf queue is drained */ 2855 rsu_drain_mbufq(sc); 2856 2857 /* Init host async commands ring. */ 2858 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2859 2860 /* Reset power management state. */ 2861 rsu_write_1(sc, R92S_USB_HRPWM, 0); 2862 2863 /* Power on adapter. */ 2864 if (sc->cut == 1) 2865 rsu_power_on_acut(sc); 2866 else 2867 rsu_power_on_bcut(sc); 2868 2869 /* Load firmware. */ 2870 error = rsu_load_firmware(sc); 2871 if (error != 0) 2872 goto fail; 2873 2874 /* Enable Rx TCP checksum offload. */ 2875 rsu_write_4(sc, R92S_RCR, 2876 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2877 /* Append PHY status. */ 2878 rsu_write_4(sc, R92S_RCR, 2879 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2880 2881 rsu_write_4(sc, R92S_CR, 2882 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2883 2884 /* Use 128 bytes pages. */ 2885 rsu_write_1(sc, 0x00b5, 2886 rsu_read_1(sc, 0x00b5) | 0x01); 2887 /* Enable USB Rx aggregation. */ 2888 rsu_write_1(sc, 0x00bd, 2889 rsu_read_1(sc, 0x00bd) | 0x80); 2890 /* Set USB Rx aggregation threshold. */ 2891 rsu_write_1(sc, 0x00d9, 0x01); 2892 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2893 rsu_write_1(sc, 0xfe5b, 0x04); 2894 /* Fix USB Rx FIFO issue. */ 2895 rsu_write_1(sc, 0xfe5c, 2896 rsu_read_1(sc, 0xfe5c) | 0x80); 2897 2898 /* Set MAC address. */ 2899 IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 2900 rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN); 2901 2902 /* It really takes 1.5 seconds for the firmware to boot: */ 2903 rsu_ms_delay(sc, 2000); 2904 2905 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n", 2906 __func__, 2907 ether_sprintf(macaddr)); 2908 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr, 2909 IEEE80211_ADDR_LEN); 2910 if (error != 0) { 2911 device_printf(sc->sc_dev, "could not set MAC address\n"); 2912 goto fail; 2913 } 2914 2915 /* Set PS mode fully active */ 2916 error = rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 2917 2918 if (error != 0) { 2919 device_printf(sc->sc_dev, "could not set PS mode\n"); 2920 goto fail; 2921 } 2922 2923 sc->sc_scan_pass = 0; 2924 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2925 2926 /* We're ready to go. */ 2927 sc->sc_running = 1; 2928 sc->sc_scanning = 0; 2929 return; 2930 fail: 2931 /* Need to stop all failed transfers, if any */ 2932 for (i = 0; i != RSU_N_TRANSFER; i++) 2933 usbd_transfer_stop(sc->sc_xfer[i]); 2934 } 2935 2936 static void 2937 rsu_stop(struct rsu_softc *sc) 2938 { 2939 int i; 2940 2941 RSU_ASSERT_LOCKED(sc); 2942 2943 sc->sc_running = 0; 2944 sc->sc_calibrating = 0; 2945 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2946 taskqueue_cancel(taskqueue_thread, &sc->tx_task, NULL); 2947 2948 /* Power off adapter. */ 2949 rsu_power_off(sc); 2950 2951 for (i = 0; i < RSU_N_TRANSFER; i++) 2952 usbd_transfer_stop(sc->sc_xfer[i]); 2953 2954 /* Ensure the mbuf queue is drained */ 2955 rsu_drain_mbufq(sc); 2956 } 2957 2958 /* 2959 * Note: usb_pause_mtx() actually releases the mutex before calling pause(), 2960 * which breaks any kind of driver serialisation. 2961 */ 2962 static void 2963 rsu_ms_delay(struct rsu_softc *sc, int ms) 2964 { 2965 2966 //usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2967 DELAY(ms * 1000); 2968 } 2969