1 /* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 #include <sys/cdefs.h> 19 __FBSDID("$FreeBSD$"); 20 21 /* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o 11n HT40 support 26 * o h/w crypto 27 * o hostap / ibss / mesh 28 * o sensible RSSI levels 29 * o power-save operation 30 */ 31 32 #include <sys/param.h> 33 #include <sys/endian.h> 34 #include <sys/sockio.h> 35 #include <sys/mbuf.h> 36 #include <sys/kernel.h> 37 #include <sys/socket.h> 38 #include <sys/systm.h> 39 #include <sys/conf.h> 40 #include <sys/bus.h> 41 #include <sys/rman.h> 42 #include <sys/firmware.h> 43 #include <sys/module.h> 44 45 #include <machine/bus.h> 46 #include <machine/resource.h> 47 48 #include <net/bpf.h> 49 #include <net/if.h> 50 #include <net/if_var.h> 51 #include <net/if_arp.h> 52 #include <net/if_dl.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/if_ether.h> 60 #include <netinet/ip.h> 61 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_regdomain.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include "usbdevs.h" 69 70 #define USB_DEBUG_VAR rsu_debug 71 #include <dev/usb/usb_debug.h> 72 73 #include <dev/usb/wlan/if_rsureg.h> 74 75 #ifdef USB_DEBUG 76 static int rsu_debug = 0; 77 SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 78 SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 79 "Debug level"); 80 #define RSU_DPRINTF(_sc, _flg, ...) \ 81 do \ 82 if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \ 83 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 84 while (0) 85 #else 86 #define RSU_DPRINTF(_sc, _flg, ...) 87 #endif 88 89 static int rsu_enable_11n = 1; 90 TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n); 91 92 #define RSU_DEBUG_ANY 0xffffffff 93 #define RSU_DEBUG_TX 0x00000001 94 #define RSU_DEBUG_RX 0x00000002 95 #define RSU_DEBUG_RESET 0x00000004 96 #define RSU_DEBUG_CALIB 0x00000008 97 #define RSU_DEBUG_STATE 0x00000010 98 #define RSU_DEBUG_SCAN 0x00000020 99 #define RSU_DEBUG_FWCMD 0x00000040 100 #define RSU_DEBUG_TXDONE 0x00000080 101 #define RSU_DEBUG_FW 0x00000100 102 #define RSU_DEBUG_FWDBG 0x00000200 103 #define RSU_DEBUG_AMPDU 0x00000400 104 105 static const STRUCT_USB_HOST_ID rsu_devs[] = { 106 #define RSU_HT_NOT_SUPPORTED 0 107 #define RSU_HT_SUPPORTED 1 108 #define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 109 RSU_HT_SUPPORTED) } 110 #define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 111 RSU_HT_NOT_SUPPORTED) } 112 RSU_DEV(ASUS, RTL8192SU), 113 RSU_DEV(AZUREWAVE, RTL8192SU_4), 114 RSU_DEV_HT(ACCTON, RTL8192SU), 115 RSU_DEV_HT(ASUS, USBN10), 116 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 117 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 118 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 119 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 120 RSU_DEV_HT(BELKIN, RTL8192SU_1), 121 RSU_DEV_HT(BELKIN, RTL8192SU_2), 122 RSU_DEV_HT(BELKIN, RTL8192SU_3), 123 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 124 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 125 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 126 RSU_DEV_HT(COREGA, RTL8192SU), 127 RSU_DEV_HT(DLINK2, DWA131A1), 128 RSU_DEV_HT(DLINK2, RTL8192SU_1), 129 RSU_DEV_HT(DLINK2, RTL8192SU_2), 130 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 131 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 132 RSU_DEV_HT(EDIMAX, EW7622UMN), 133 RSU_DEV_HT(GUILLEMOT, HWGUN54), 134 RSU_DEV_HT(GUILLEMOT, HWNUM300), 135 RSU_DEV_HT(HAWKING, RTL8192SU_1), 136 RSU_DEV_HT(HAWKING, RTL8192SU_2), 137 RSU_DEV_HT(PLANEX2, GWUSNANO), 138 RSU_DEV_HT(REALTEK, RTL8171), 139 RSU_DEV_HT(REALTEK, RTL8172), 140 RSU_DEV_HT(REALTEK, RTL8173), 141 RSU_DEV_HT(REALTEK, RTL8174), 142 RSU_DEV_HT(REALTEK, RTL8192SU), 143 RSU_DEV_HT(REALTEK, RTL8712), 144 RSU_DEV_HT(REALTEK, RTL8713), 145 RSU_DEV_HT(SENAO, RTL8192SU_1), 146 RSU_DEV_HT(SENAO, RTL8192SU_2), 147 RSU_DEV_HT(SITECOMEU, WL349V1), 148 RSU_DEV_HT(SITECOMEU, WL353), 149 RSU_DEV_HT(SWEEX2, LW154), 150 RSU_DEV_HT(TRENDNET, TEW646UBH), 151 #undef RSU_DEV_HT 152 #undef RSU_DEV 153 }; 154 155 static device_probe_t rsu_match; 156 static device_attach_t rsu_attach; 157 static device_detach_t rsu_detach; 158 static usb_callback_t rsu_bulk_tx_callback_be_bk; 159 static usb_callback_t rsu_bulk_tx_callback_vi_vo; 160 static usb_callback_t rsu_bulk_tx_callback_h2c; 161 static usb_callback_t rsu_bulk_rx_callback; 162 static usb_error_t rsu_do_request(struct rsu_softc *, 163 struct usb_device_request *, void *); 164 static struct ieee80211vap * 165 rsu_vap_create(struct ieee80211com *, const char name[], 166 int, enum ieee80211_opmode, int, const uint8_t bssid[], 167 const uint8_t mac[]); 168 static void rsu_vap_delete(struct ieee80211vap *); 169 static void rsu_scan_start(struct ieee80211com *); 170 static void rsu_scan_end(struct ieee80211com *); 171 static void rsu_set_channel(struct ieee80211com *); 172 static void rsu_update_mcast(struct ieee80211com *); 173 static int rsu_alloc_rx_list(struct rsu_softc *); 174 static void rsu_free_rx_list(struct rsu_softc *); 175 static int rsu_alloc_tx_list(struct rsu_softc *); 176 static void rsu_free_tx_list(struct rsu_softc *); 177 static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 178 static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 179 static struct rsu_data *rsu_getbuf(struct rsu_softc *); 180 static void rsu_freebuf(struct rsu_softc *, struct rsu_data *); 181 static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 182 int); 183 static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 184 static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 185 static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 186 static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 187 int); 188 static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 189 static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 190 static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 191 static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 192 static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 193 static int rsu_read_rom(struct rsu_softc *); 194 static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 195 static void rsu_calib_task(void *, int); 196 static void rsu_tx_task(void *, int); 197 static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 198 #ifdef notyet 199 static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 200 static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 201 #endif 202 static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 203 static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 204 static int rsu_disconnect(struct rsu_softc *); 205 static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 206 static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 207 static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 208 static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 209 static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 210 static struct mbuf * 211 rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *); 212 static struct mbuf * 213 rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *); 214 static struct mbuf * 215 rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *); 216 static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 217 static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 218 const struct ieee80211_bpf_params *); 219 static void rsu_init(struct rsu_softc *); 220 static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 221 struct mbuf *, struct rsu_data *); 222 static int rsu_transmit(struct ieee80211com *, struct mbuf *); 223 static void rsu_start(struct rsu_softc *); 224 static void _rsu_start(struct rsu_softc *); 225 static void rsu_parent(struct ieee80211com *); 226 static void rsu_stop(struct rsu_softc *); 227 static void rsu_ms_delay(struct rsu_softc *, int); 228 229 static device_method_t rsu_methods[] = { 230 DEVMETHOD(device_probe, rsu_match), 231 DEVMETHOD(device_attach, rsu_attach), 232 DEVMETHOD(device_detach, rsu_detach), 233 234 DEVMETHOD_END 235 }; 236 237 static driver_t rsu_driver = { 238 .name = "rsu", 239 .methods = rsu_methods, 240 .size = sizeof(struct rsu_softc) 241 }; 242 243 static devclass_t rsu_devclass; 244 245 DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 246 MODULE_DEPEND(rsu, wlan, 1, 1, 1); 247 MODULE_DEPEND(rsu, usb, 1, 1, 1); 248 MODULE_DEPEND(rsu, firmware, 1, 1, 1); 249 MODULE_VERSION(rsu, 1); 250 251 static uint8_t rsu_wme_ac_xfer_map[4] = { 252 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 253 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 254 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 255 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 256 }; 257 258 /* XXX hard-coded */ 259 #define RSU_H2C_ENDPOINT 3 260 261 static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 262 [RSU_BULK_RX] = { 263 .type = UE_BULK, 264 .endpoint = UE_ADDR_ANY, 265 .direction = UE_DIR_IN, 266 .bufsize = RSU_RXBUFSZ, 267 .flags = { 268 .pipe_bof = 1, 269 .short_xfer_ok = 1 270 }, 271 .callback = rsu_bulk_rx_callback 272 }, 273 [RSU_BULK_TX_BE_BK] = { 274 .type = UE_BULK, 275 .endpoint = 0x06, 276 .direction = UE_DIR_OUT, 277 .bufsize = RSU_TXBUFSZ, 278 .flags = { 279 .ext_buffer = 1, 280 .pipe_bof = 1, 281 .force_short_xfer = 1 282 }, 283 .callback = rsu_bulk_tx_callback_be_bk, 284 .timeout = RSU_TX_TIMEOUT 285 }, 286 [RSU_BULK_TX_VI_VO] = { 287 .type = UE_BULK, 288 .endpoint = 0x04, 289 .direction = UE_DIR_OUT, 290 .bufsize = RSU_TXBUFSZ, 291 .flags = { 292 .ext_buffer = 1, 293 .pipe_bof = 1, 294 .force_short_xfer = 1 295 }, 296 .callback = rsu_bulk_tx_callback_vi_vo, 297 .timeout = RSU_TX_TIMEOUT 298 }, 299 [RSU_BULK_TX_H2C] = { 300 .type = UE_BULK, 301 .endpoint = 0x0d, 302 .direction = UE_DIR_OUT, 303 .bufsize = RSU_TXBUFSZ, 304 .flags = { 305 .ext_buffer = 1, 306 .pipe_bof = 1, 307 .short_xfer_ok = 1 308 }, 309 .callback = rsu_bulk_tx_callback_h2c, 310 .timeout = RSU_TX_TIMEOUT 311 }, 312 }; 313 314 static int 315 rsu_match(device_t self) 316 { 317 struct usb_attach_arg *uaa = device_get_ivars(self); 318 319 if (uaa->usb_mode != USB_MODE_HOST || 320 uaa->info.bIfaceIndex != 0 || 321 uaa->info.bConfigIndex != 0) 322 return (ENXIO); 323 324 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 325 } 326 327 static int 328 rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg) 329 { 330 331 return (ENOTSUP); 332 } 333 334 static void 335 rsu_update_chw(struct ieee80211com *ic) 336 { 337 338 } 339 340 /* 341 * notification from net80211 that it'd like to do A-MPDU on the given TID. 342 * 343 * Note: this actually hangs traffic at the present moment, so don't use it. 344 * The firmware debug does indiciate it's sending and establishing a TX AMPDU 345 * session, but then no traffic flows. 346 */ 347 static int 348 rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 349 { 350 #if 0 351 struct rsu_softc *sc = ni->ni_ic->ic_softc; 352 struct r92s_add_ba_req req; 353 354 /* Don't enable if it's requested or running */ 355 if (IEEE80211_AMPDU_REQUESTED(tap)) 356 return (0); 357 if (IEEE80211_AMPDU_RUNNING(tap)) 358 return (0); 359 360 /* We've decided to send addba; so send it */ 361 req.tid = htole32(tap->txa_tid); 362 363 /* Attempt net80211 state */ 364 if (ieee80211_ampdu_tx_request_ext(ni, tap->txa_tid) != 1) 365 return (0); 366 367 /* Send the firmware command */ 368 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: establishing AMPDU TX for TID %d\n", 369 __func__, 370 tap->txa_tid); 371 372 RSU_LOCK(sc); 373 if (rsu_fw_cmd(sc, R92S_CMD_ADDBA_REQ, &req, sizeof(req)) != 1) { 374 RSU_UNLOCK(sc); 375 /* Mark failure */ 376 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 0); 377 return (0); 378 } 379 RSU_UNLOCK(sc); 380 381 /* Mark success; we don't get any further notifications */ 382 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 1); 383 #endif 384 /* Return 0, we're driving this ourselves */ 385 return (0); 386 } 387 388 static int 389 rsu_wme_update(struct ieee80211com *ic) 390 { 391 392 /* Firmware handles this; not our problem */ 393 return (0); 394 } 395 396 static int 397 rsu_attach(device_t self) 398 { 399 struct usb_attach_arg *uaa = device_get_ivars(self); 400 struct rsu_softc *sc = device_get_softc(self); 401 struct ieee80211com *ic = &sc->sc_ic; 402 int error; 403 uint8_t iface_index, bands; 404 struct usb_interface *iface; 405 406 device_set_usb_desc(self); 407 sc->sc_udev = uaa->device; 408 sc->sc_dev = self; 409 if (rsu_enable_11n) 410 sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED); 411 412 /* Get number of endpoints */ 413 iface = usbd_get_iface(sc->sc_udev, 0); 414 sc->sc_nendpoints = iface->idesc->bNumEndpoints; 415 416 /* Endpoints are hard-coded for now, so enforce 4-endpoint only */ 417 if (sc->sc_nendpoints != 4) { 418 device_printf(sc->sc_dev, 419 "the driver currently only supports 4-endpoint devices\n"); 420 return (ENXIO); 421 } 422 423 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 424 MTX_DEF); 425 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 426 rsu_calib_task, sc); 427 TASK_INIT(&sc->tx_task, 0, rsu_tx_task, sc); 428 mbufq_init(&sc->sc_snd, ifqmaxlen); 429 430 /* Allocate Tx/Rx buffers. */ 431 error = rsu_alloc_rx_list(sc); 432 if (error != 0) { 433 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 434 goto fail_usb; 435 } 436 437 error = rsu_alloc_tx_list(sc); 438 if (error != 0) { 439 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 440 rsu_free_rx_list(sc); 441 goto fail_usb; 442 } 443 444 iface_index = 0; 445 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 446 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 447 if (error) { 448 device_printf(sc->sc_dev, 449 "could not allocate USB transfers, err=%s\n", 450 usbd_errstr(error)); 451 goto fail_usb; 452 } 453 RSU_LOCK(sc); 454 /* Read chip revision. */ 455 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 456 if (sc->cut != 3) 457 sc->cut = (sc->cut >> 1) + 1; 458 error = rsu_read_rom(sc); 459 RSU_UNLOCK(sc); 460 if (error != 0) { 461 device_printf(self, "could not read ROM\n"); 462 goto fail_rom; 463 } 464 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]); 465 device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut); 466 467 ic->ic_softc = sc; 468 ic->ic_name = device_get_nameunit(self); 469 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 470 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 471 472 /* Set device capabilities. */ 473 ic->ic_caps = 474 IEEE80211_C_STA | /* station mode */ 475 #if 0 476 IEEE80211_C_BGSCAN | /* Background scan. */ 477 #endif 478 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 479 IEEE80211_C_WME | /* WME/QoS */ 480 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 481 IEEE80211_C_WPA; /* WPA/RSN. */ 482 483 /* Check if HT support is present. */ 484 if (sc->sc_ht) { 485 device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__); 486 487 /* Enable basic HT */ 488 ic->ic_htcaps = IEEE80211_HTC_HT | 489 IEEE80211_HTC_AMPDU | 490 IEEE80211_HTC_AMSDU | 491 IEEE80211_HTCAP_MAXAMSDU_3839 | 492 IEEE80211_HTCAP_SMPS_OFF; 493 494 /* 495 * XXX HT40 isn't working in this driver yet - there's 496 * something missing. Disable it for now. 497 */ 498 #if 0 499 ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 500 #endif 501 502 /* set number of spatial streams */ 503 ic->ic_txstream = 1; 504 ic->ic_rxstream = 1; 505 } 506 507 /* Set supported .11b and .11g rates. */ 508 bands = 0; 509 setbit(&bands, IEEE80211_MODE_11B); 510 setbit(&bands, IEEE80211_MODE_11G); 511 if (sc->sc_ht) 512 setbit(&bands, IEEE80211_MODE_11NG); 513 ieee80211_init_channels(ic, NULL, &bands); 514 515 ieee80211_ifattach(ic); 516 ic->ic_raw_xmit = rsu_raw_xmit; 517 ic->ic_scan_start = rsu_scan_start; 518 ic->ic_scan_end = rsu_scan_end; 519 ic->ic_set_channel = rsu_set_channel; 520 ic->ic_vap_create = rsu_vap_create; 521 ic->ic_vap_delete = rsu_vap_delete; 522 ic->ic_update_mcast = rsu_update_mcast; 523 ic->ic_parent = rsu_parent; 524 ic->ic_transmit = rsu_transmit; 525 ic->ic_send_mgmt = rsu_send_mgmt; 526 ic->ic_update_chw = rsu_update_chw; 527 ic->ic_ampdu_enable = rsu_ampdu_enable; 528 ic->ic_wme.wme_update = rsu_wme_update; 529 530 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 531 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 532 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 533 RSU_RX_RADIOTAP_PRESENT); 534 535 if (bootverbose) 536 ieee80211_announce(ic); 537 538 return (0); 539 540 fail_rom: 541 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 542 fail_usb: 543 mtx_destroy(&sc->sc_mtx); 544 return (ENXIO); 545 } 546 547 static int 548 rsu_detach(device_t self) 549 { 550 struct rsu_softc *sc = device_get_softc(self); 551 struct ieee80211com *ic = &sc->sc_ic; 552 553 RSU_LOCK(sc); 554 rsu_stop(sc); 555 RSU_UNLOCK(sc); 556 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 557 558 /* Frames are freed; detach from net80211 */ 559 ieee80211_ifdetach(ic); 560 561 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 562 taskqueue_drain(taskqueue_thread, &sc->tx_task); 563 564 /* Free Tx/Rx buffers. */ 565 rsu_free_tx_list(sc); 566 rsu_free_rx_list(sc); 567 568 mtx_destroy(&sc->sc_mtx); 569 570 return (0); 571 } 572 573 static usb_error_t 574 rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 575 void *data) 576 { 577 usb_error_t err; 578 int ntries = 10; 579 580 RSU_ASSERT_LOCKED(sc); 581 582 while (ntries--) { 583 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 584 req, data, 0, NULL, 250 /* ms */); 585 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 586 break; 587 DPRINTFN(1, "Control request failed, %s (retrying)\n", 588 usbd_errstr(err)); 589 rsu_ms_delay(sc, 10); 590 } 591 592 return (err); 593 } 594 595 static struct ieee80211vap * 596 rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 597 enum ieee80211_opmode opmode, int flags, 598 const uint8_t bssid[IEEE80211_ADDR_LEN], 599 const uint8_t mac[IEEE80211_ADDR_LEN]) 600 { 601 struct rsu_vap *uvp; 602 struct ieee80211vap *vap; 603 604 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 605 return (NULL); 606 607 uvp = malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO); 608 vap = &uvp->vap; 609 610 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 611 flags, bssid) != 0) { 612 /* out of memory */ 613 free(uvp, M_80211_VAP); 614 return (NULL); 615 } 616 617 /* override state transition machine */ 618 uvp->newstate = vap->iv_newstate; 619 vap->iv_newstate = rsu_newstate; 620 621 /* Limits from the r92su driver */ 622 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 623 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K; 624 625 /* complete setup */ 626 ieee80211_vap_attach(vap, ieee80211_media_change, 627 ieee80211_media_status, mac); 628 ic->ic_opmode = opmode; 629 630 return (vap); 631 } 632 633 static void 634 rsu_vap_delete(struct ieee80211vap *vap) 635 { 636 struct rsu_vap *uvp = RSU_VAP(vap); 637 638 ieee80211_vap_detach(vap); 639 free(uvp, M_80211_VAP); 640 } 641 642 static void 643 rsu_scan_start(struct ieee80211com *ic) 644 { 645 struct rsu_softc *sc = ic->ic_softc; 646 int error; 647 648 /* Scanning is done by the firmware. */ 649 RSU_LOCK(sc); 650 /* XXX TODO: force awake if in in network-sleep? */ 651 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 652 RSU_UNLOCK(sc); 653 if (error != 0) 654 device_printf(sc->sc_dev, 655 "could not send site survey command\n"); 656 } 657 658 static void 659 rsu_scan_end(struct ieee80211com *ic) 660 { 661 /* Nothing to do here. */ 662 } 663 664 static void 665 rsu_set_channel(struct ieee80211com *ic __unused) 666 { 667 /* We are unable to switch channels, yet. */ 668 } 669 670 static void 671 rsu_update_mcast(struct ieee80211com *ic) 672 { 673 /* XXX do nothing? */ 674 } 675 676 static int 677 rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 678 int ndata, int maxsz) 679 { 680 int i, error; 681 682 for (i = 0; i < ndata; i++) { 683 struct rsu_data *dp = &data[i]; 684 dp->sc = sc; 685 dp->m = NULL; 686 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 687 if (dp->buf == NULL) { 688 device_printf(sc->sc_dev, 689 "could not allocate buffer\n"); 690 error = ENOMEM; 691 goto fail; 692 } 693 dp->ni = NULL; 694 } 695 696 return (0); 697 fail: 698 rsu_free_list(sc, data, ndata); 699 return (error); 700 } 701 702 static int 703 rsu_alloc_rx_list(struct rsu_softc *sc) 704 { 705 int error, i; 706 707 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 708 RSU_RXBUFSZ); 709 if (error != 0) 710 return (error); 711 712 STAILQ_INIT(&sc->sc_rx_active); 713 STAILQ_INIT(&sc->sc_rx_inactive); 714 715 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 716 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 717 718 return (0); 719 } 720 721 static int 722 rsu_alloc_tx_list(struct rsu_softc *sc) 723 { 724 int error, i; 725 726 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 727 RSU_TXBUFSZ); 728 if (error != 0) 729 return (error); 730 731 STAILQ_INIT(&sc->sc_tx_inactive); 732 733 for (i = 0; i != RSU_N_TRANSFER; i++) { 734 STAILQ_INIT(&sc->sc_tx_active[i]); 735 STAILQ_INIT(&sc->sc_tx_pending[i]); 736 } 737 738 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 739 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 740 } 741 742 return (0); 743 } 744 745 static void 746 rsu_free_tx_list(struct rsu_softc *sc) 747 { 748 int i; 749 750 /* prevent further allocations from TX list(s) */ 751 STAILQ_INIT(&sc->sc_tx_inactive); 752 753 for (i = 0; i != RSU_N_TRANSFER; i++) { 754 STAILQ_INIT(&sc->sc_tx_active[i]); 755 STAILQ_INIT(&sc->sc_tx_pending[i]); 756 } 757 758 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 759 } 760 761 static void 762 rsu_free_rx_list(struct rsu_softc *sc) 763 { 764 /* prevent further allocations from RX list(s) */ 765 STAILQ_INIT(&sc->sc_rx_inactive); 766 STAILQ_INIT(&sc->sc_rx_active); 767 768 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 769 } 770 771 static void 772 rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 773 { 774 int i; 775 776 for (i = 0; i < ndata; i++) { 777 struct rsu_data *dp = &data[i]; 778 779 if (dp->buf != NULL) { 780 free(dp->buf, M_USBDEV); 781 dp->buf = NULL; 782 } 783 if (dp->ni != NULL) { 784 ieee80211_free_node(dp->ni); 785 dp->ni = NULL; 786 } 787 } 788 } 789 790 static struct rsu_data * 791 _rsu_getbuf(struct rsu_softc *sc) 792 { 793 struct rsu_data *bf; 794 795 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 796 if (bf != NULL) 797 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 798 else 799 bf = NULL; 800 return (bf); 801 } 802 803 static struct rsu_data * 804 rsu_getbuf(struct rsu_softc *sc) 805 { 806 struct rsu_data *bf; 807 808 RSU_ASSERT_LOCKED(sc); 809 810 bf = _rsu_getbuf(sc); 811 if (bf == NULL) { 812 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: no buffers\n", __func__); 813 } 814 return (bf); 815 } 816 817 static void 818 rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf) 819 { 820 821 RSU_ASSERT_LOCKED(sc); 822 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next); 823 } 824 825 static int 826 rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 827 int len) 828 { 829 usb_device_request_t req; 830 831 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 832 req.bRequest = R92S_REQ_REGS; 833 USETW(req.wValue, addr); 834 USETW(req.wIndex, 0); 835 USETW(req.wLength, len); 836 837 return (rsu_do_request(sc, &req, buf)); 838 } 839 840 static void 841 rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 842 { 843 rsu_write_region_1(sc, addr, &val, 1); 844 } 845 846 static void 847 rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 848 { 849 val = htole16(val); 850 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 851 } 852 853 static void 854 rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 855 { 856 val = htole32(val); 857 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 858 } 859 860 static int 861 rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 862 int len) 863 { 864 usb_device_request_t req; 865 866 req.bmRequestType = UT_READ_VENDOR_DEVICE; 867 req.bRequest = R92S_REQ_REGS; 868 USETW(req.wValue, addr); 869 USETW(req.wIndex, 0); 870 USETW(req.wLength, len); 871 872 return (rsu_do_request(sc, &req, buf)); 873 } 874 875 static uint8_t 876 rsu_read_1(struct rsu_softc *sc, uint16_t addr) 877 { 878 uint8_t val; 879 880 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 881 return (0xff); 882 return (val); 883 } 884 885 static uint16_t 886 rsu_read_2(struct rsu_softc *sc, uint16_t addr) 887 { 888 uint16_t val; 889 890 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 891 return (0xffff); 892 return (le16toh(val)); 893 } 894 895 static uint32_t 896 rsu_read_4(struct rsu_softc *sc, uint16_t addr) 897 { 898 uint32_t val; 899 900 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 901 return (0xffffffff); 902 return (le32toh(val)); 903 } 904 905 static int 906 rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 907 { 908 int ntries; 909 910 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 911 rsu_ms_delay(sc, 1); 912 for (ntries = 0; ntries < 50; ntries++) { 913 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 914 return (0); 915 rsu_ms_delay(sc, 1); 916 } 917 return (ETIMEDOUT); 918 } 919 920 static uint8_t 921 rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 922 { 923 uint32_t reg; 924 int ntries; 925 926 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 927 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 928 reg &= ~R92S_EFUSE_CTRL_VALID; 929 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 930 /* Wait for read operation to complete. */ 931 for (ntries = 0; ntries < 100; ntries++) { 932 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 933 if (reg & R92S_EFUSE_CTRL_VALID) 934 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 935 rsu_ms_delay(sc, 1); 936 } 937 device_printf(sc->sc_dev, 938 "could not read efuse byte at address 0x%x\n", addr); 939 return (0xff); 940 } 941 942 static int 943 rsu_read_rom(struct rsu_softc *sc) 944 { 945 uint8_t *rom = sc->rom; 946 uint16_t addr = 0; 947 uint32_t reg; 948 uint8_t off, msk; 949 int i; 950 951 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 952 reg = rsu_read_1(sc, R92S_EE_9346CR); 953 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 954 return (EIO); 955 956 /* Turn on 2.5V to prevent eFuse leakage. */ 957 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 958 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 959 rsu_ms_delay(sc, 1); 960 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 961 962 /* Read full ROM image. */ 963 memset(&sc->rom, 0xff, sizeof(sc->rom)); 964 while (addr < 512) { 965 reg = rsu_efuse_read_1(sc, addr); 966 if (reg == 0xff) 967 break; 968 addr++; 969 off = reg >> 4; 970 msk = reg & 0xf; 971 for (i = 0; i < 4; i++) { 972 if (msk & (1 << i)) 973 continue; 974 rom[off * 8 + i * 2 + 0] = 975 rsu_efuse_read_1(sc, addr); 976 addr++; 977 rom[off * 8 + i * 2 + 1] = 978 rsu_efuse_read_1(sc, addr); 979 addr++; 980 } 981 } 982 #ifdef USB_DEBUG 983 if (rsu_debug >= 5) { 984 /* Dump ROM content. */ 985 printf("\n"); 986 for (i = 0; i < sizeof(sc->rom); i++) 987 printf("%02x:", rom[i]); 988 printf("\n"); 989 } 990 #endif 991 return (0); 992 } 993 994 static int 995 rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 996 { 997 const uint8_t which = RSU_H2C_ENDPOINT; 998 struct rsu_data *data; 999 struct r92s_tx_desc *txd; 1000 struct r92s_fw_cmd_hdr *cmd; 1001 int cmdsz; 1002 int xferlen; 1003 1004 RSU_ASSERT_LOCKED(sc); 1005 1006 data = rsu_getbuf(sc); 1007 if (data == NULL) 1008 return (ENOMEM); 1009 1010 /* Blank the entire payload, just to be safe */ 1011 memset(data->buf, '\0', RSU_TXBUFSZ); 1012 1013 /* Round-up command length to a multiple of 8 bytes. */ 1014 /* XXX TODO: is this required? */ 1015 cmdsz = (len + 7) & ~7; 1016 1017 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 1018 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 1019 memset(data->buf, 0, xferlen); 1020 1021 /* Setup Tx descriptor. */ 1022 txd = (struct r92s_tx_desc *)data->buf; 1023 txd->txdw0 = htole32( 1024 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1025 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 1026 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1027 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 1028 1029 /* Setup command header. */ 1030 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 1031 cmd->len = htole16(cmdsz); 1032 cmd->code = code; 1033 cmd->seq = sc->cmd_seq; 1034 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 1035 1036 /* Copy command payload. */ 1037 memcpy(&cmd[1], buf, len); 1038 1039 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD, 1040 "%s: Tx cmd code=0x%x len=0x%x\n", 1041 __func__, code, cmdsz); 1042 data->buflen = xferlen; 1043 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1044 usbd_transfer_start(sc->sc_xfer[which]); 1045 1046 return (0); 1047 } 1048 1049 /* ARGSUSED */ 1050 static void 1051 rsu_calib_task(void *arg, int pending __unused) 1052 { 1053 struct rsu_softc *sc = arg; 1054 uint32_t reg; 1055 1056 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n", 1057 __func__); 1058 1059 RSU_LOCK(sc); 1060 #ifdef notyet 1061 /* Read WPS PBC status. */ 1062 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 1063 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 1064 rsu_write_1(sc, R92S_GPIO_IO_SEL, 1065 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 1066 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 1067 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 1068 DPRINTF(("WPS PBC is pushed\n")); 1069 #endif 1070 /* Read current signal level. */ 1071 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 1072 reg = rsu_read_4(sc, R92S_IOCMD_DATA); 1073 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d%%\n", 1074 __func__, reg >> 4); 1075 } 1076 if (sc->sc_calibrating) 1077 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1078 RSU_UNLOCK(sc); 1079 } 1080 1081 static void 1082 rsu_tx_task(void *arg, int pending __unused) 1083 { 1084 struct rsu_softc *sc = arg; 1085 1086 RSU_LOCK(sc); 1087 _rsu_start(sc); 1088 RSU_UNLOCK(sc); 1089 } 1090 1091 #define RSU_PWR_UNKNOWN 0x0 1092 #define RSU_PWR_ACTIVE 0x1 1093 #define RSU_PWR_OFF 0x2 1094 #define RSU_PWR_SLEEP 0x3 1095 1096 /* 1097 * Set the current power state. 1098 * 1099 * The rtlwifi code doesn't do this so aggressively; it 1100 * waits for an idle period after association with 1101 * no traffic before doing this. 1102 * 1103 * For now - it's on in all states except RUN, and 1104 * in RUN it'll transition to allow sleep. 1105 */ 1106 1107 struct r92s_pwr_cmd { 1108 uint8_t mode; 1109 uint8_t smart_ps; 1110 uint8_t bcn_pass_time; 1111 }; 1112 1113 static int 1114 rsu_set_fw_power_state(struct rsu_softc *sc, int state) 1115 { 1116 struct r92s_set_pwr_mode cmd; 1117 //struct r92s_pwr_cmd cmd; 1118 int error; 1119 1120 RSU_ASSERT_LOCKED(sc); 1121 1122 /* only change state if required */ 1123 if (sc->sc_curpwrstate == state) 1124 return (0); 1125 1126 memset(&cmd, 0, sizeof(cmd)); 1127 1128 switch (state) { 1129 case RSU_PWR_ACTIVE: 1130 /* Force the hardware awake */ 1131 rsu_write_1(sc, R92S_USB_HRPWM, 1132 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 1133 cmd.mode = R92S_PS_MODE_ACTIVE; 1134 break; 1135 case RSU_PWR_SLEEP: 1136 cmd.mode = R92S_PS_MODE_DTIM; /* XXX configurable? */ 1137 cmd.smart_ps = 1; /* XXX 2 if doing p2p */ 1138 cmd.bcn_pass_time = 5; /* in 100mS usb.c, linux/rtlwifi */ 1139 break; 1140 case RSU_PWR_OFF: 1141 cmd.mode = R92S_PS_MODE_RADIOOFF; 1142 break; 1143 default: 1144 device_printf(sc->sc_dev, "%s: unknown ps mode (%d)\n", 1145 __func__, 1146 state); 1147 return (ENXIO); 1148 } 1149 1150 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1151 "%s: setting ps mode to %d (mode %d)\n", 1152 __func__, state, cmd.mode); 1153 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 1154 if (error == 0) 1155 sc->sc_curpwrstate = state; 1156 1157 return (error); 1158 } 1159 1160 static int 1161 rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1162 { 1163 struct rsu_vap *uvp = RSU_VAP(vap); 1164 struct ieee80211com *ic = vap->iv_ic; 1165 struct rsu_softc *sc = ic->ic_softc; 1166 struct ieee80211_node *ni; 1167 struct ieee80211_rateset *rs; 1168 enum ieee80211_state ostate; 1169 int error, startcal = 0; 1170 1171 ostate = vap->iv_state; 1172 RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n", 1173 __func__, 1174 ieee80211_state_name[ostate], 1175 ieee80211_state_name[nstate]); 1176 1177 IEEE80211_UNLOCK(ic); 1178 if (ostate == IEEE80211_S_RUN) { 1179 RSU_LOCK(sc); 1180 /* Stop calibration. */ 1181 sc->sc_calibrating = 0; 1182 RSU_UNLOCK(sc); 1183 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 1184 taskqueue_drain(taskqueue_thread, &sc->tx_task); 1185 /* Disassociate from our current BSS. */ 1186 RSU_LOCK(sc); 1187 rsu_disconnect(sc); 1188 } else 1189 RSU_LOCK(sc); 1190 switch (nstate) { 1191 case IEEE80211_S_INIT: 1192 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1193 break; 1194 case IEEE80211_S_AUTH: 1195 ni = ieee80211_ref_node(vap->iv_bss); 1196 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1197 error = rsu_join_bss(sc, ni); 1198 ieee80211_free_node(ni); 1199 if (error != 0) { 1200 device_printf(sc->sc_dev, 1201 "could not send join command\n"); 1202 } 1203 break; 1204 case IEEE80211_S_RUN: 1205 ni = ieee80211_ref_node(vap->iv_bss); 1206 rs = &ni->ni_rates; 1207 /* Indicate highest supported rate. */ 1208 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1209 (void) rsu_set_fw_power_state(sc, RSU_PWR_SLEEP); 1210 ieee80211_free_node(ni); 1211 startcal = 1; 1212 break; 1213 default: 1214 break; 1215 } 1216 sc->sc_calibrating = 1; 1217 /* Start periodic calibration. */ 1218 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1219 RSU_UNLOCK(sc); 1220 IEEE80211_LOCK(ic); 1221 return (uvp->newstate(vap, nstate, arg)); 1222 } 1223 1224 #ifdef notyet 1225 static void 1226 rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1227 { 1228 struct r92s_fw_cmd_set_key key; 1229 1230 memset(&key, 0, sizeof(key)); 1231 /* Map net80211 cipher to HW crypto algorithm. */ 1232 switch (k->wk_cipher->ic_cipher) { 1233 case IEEE80211_CIPHER_WEP: 1234 if (k->wk_keylen < 8) 1235 key.algo = R92S_KEY_ALGO_WEP40; 1236 else 1237 key.algo = R92S_KEY_ALGO_WEP104; 1238 break; 1239 case IEEE80211_CIPHER_TKIP: 1240 key.algo = R92S_KEY_ALGO_TKIP; 1241 break; 1242 case IEEE80211_CIPHER_AES_CCM: 1243 key.algo = R92S_KEY_ALGO_AES; 1244 break; 1245 default: 1246 return; 1247 } 1248 key.id = k->wk_keyix; 1249 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1250 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1251 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1252 } 1253 1254 static void 1255 rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1256 { 1257 struct r92s_fw_cmd_set_key key; 1258 1259 memset(&key, 0, sizeof(key)); 1260 key.id = k->wk_keyix; 1261 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1262 } 1263 #endif 1264 1265 static int 1266 rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1267 { 1268 struct r92s_fw_cmd_sitesurvey cmd; 1269 struct ieee80211com *ic = &sc->sc_ic; 1270 int r; 1271 1272 RSU_ASSERT_LOCKED(sc); 1273 1274 memset(&cmd, 0, sizeof(cmd)); 1275 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1) 1276 cmd.active = htole32(1); 1277 cmd.limit = htole32(48); 1278 if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) { 1279 /* Do a directed scan for second pass. */ 1280 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1281 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1282 vap->iv_des_ssid[0].len); 1283 1284 } 1285 DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass); 1286 r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd)); 1287 if (r == 0) { 1288 sc->sc_scanning = 1; 1289 } 1290 return (r); 1291 } 1292 1293 static int 1294 rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1295 { 1296 struct ieee80211com *ic = &sc->sc_ic; 1297 struct ieee80211vap *vap = ni->ni_vap; 1298 struct ndis_wlan_bssid_ex *bss; 1299 struct ndis_802_11_fixed_ies *fixed; 1300 struct r92s_fw_cmd_auth auth; 1301 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1302 uint8_t *frm; 1303 uint8_t opmode; 1304 int error; 1305 int cnt; 1306 char *msg = "rsujoin"; 1307 1308 RSU_ASSERT_LOCKED(sc); 1309 1310 /* 1311 * Until net80211 scanning doesn't automatically finish 1312 * before we tell it to, let's just wait until any pending 1313 * scan is done. 1314 * 1315 * XXX TODO: yes, this releases and re-acquires the lock. 1316 * We should re-verify the state whenever we re-attempt this! 1317 */ 1318 cnt = 0; 1319 while (sc->sc_scanning && cnt < 10) { 1320 device_printf(sc->sc_dev, 1321 "%s: still scanning! (attempt %d)\n", 1322 __func__, cnt); 1323 msleep(msg, &sc->sc_mtx, 0, msg, hz / 2); 1324 cnt++; 1325 } 1326 1327 /* Let the FW decide the opmode based on the capinfo field. */ 1328 opmode = NDIS802_11AUTOUNKNOWN; 1329 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1330 "%s: setting operating mode to %d\n", 1331 __func__, opmode); 1332 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1333 if (error != 0) 1334 return (error); 1335 1336 memset(&auth, 0, sizeof(auth)); 1337 if (vap->iv_flags & IEEE80211_F_WPA) { 1338 auth.mode = R92S_AUTHMODE_WPA; 1339 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1340 } else 1341 auth.mode = R92S_AUTHMODE_OPEN; 1342 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1343 "%s: setting auth mode to %d\n", 1344 __func__, auth.mode); 1345 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1346 if (error != 0) 1347 return (error); 1348 1349 memset(buf, 0, sizeof(buf)); 1350 bss = (struct ndis_wlan_bssid_ex *)buf; 1351 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1352 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1353 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1354 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1355 bss->privacy = htole32(1); 1356 bss->rssi = htole32(ni->ni_avgrssi); 1357 if (ic->ic_curmode == IEEE80211_MODE_11B) 1358 bss->networktype = htole32(NDIS802_11DS); 1359 else 1360 bss->networktype = htole32(NDIS802_11OFDM24); 1361 bss->config.len = htole32(sizeof(bss->config)); 1362 bss->config.bintval = htole32(ni->ni_intval); 1363 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1364 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1365 /* XXX verify how this is supposed to look! */ 1366 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1367 ni->ni_rates.rs_nrates); 1368 /* Write the fixed fields of the beacon frame. */ 1369 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1370 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1371 fixed->bintval = htole16(ni->ni_intval); 1372 fixed->capabilities = htole16(ni->ni_capinfo); 1373 /* Write IEs to be included in the association request. */ 1374 frm = (uint8_t *)&fixed[1]; 1375 frm = ieee80211_add_rsn(frm, vap); 1376 frm = ieee80211_add_wpa(frm, vap); 1377 frm = ieee80211_add_qos(frm, ni); 1378 if ((ic->ic_flags & IEEE80211_F_WME) && 1379 (ni->ni_ies.wme_ie != NULL)) 1380 frm = ieee80211_add_wme_info(frm, &ic->ic_wme); 1381 if (ni->ni_flags & IEEE80211_NODE_HT) 1382 frm = ieee80211_add_htcap(frm, ni); 1383 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1384 bss->len = htole32(((frm - buf) + 3) & ~3); 1385 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD, 1386 "%s: sending join bss command to %s chan %d\n", 1387 __func__, 1388 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1389 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1390 } 1391 1392 static int 1393 rsu_disconnect(struct rsu_softc *sc) 1394 { 1395 uint32_t zero = 0; /* :-) */ 1396 1397 /* Disassociate from our current BSS. */ 1398 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1399 "%s: sending disconnect command\n", __func__); 1400 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1401 } 1402 1403 static void 1404 rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1405 { 1406 struct ieee80211com *ic = &sc->sc_ic; 1407 struct ieee80211_frame *wh; 1408 struct ndis_wlan_bssid_ex *bss; 1409 struct ieee80211_rx_stats rxs; 1410 struct mbuf *m; 1411 int pktlen; 1412 1413 if (__predict_false(len < sizeof(*bss))) 1414 return; 1415 bss = (struct ndis_wlan_bssid_ex *)buf; 1416 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1417 return; 1418 1419 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1420 "%s: found BSS %s: len=%d chan=%d inframode=%d " 1421 "networktype=%d privacy=%d, RSSI=%d\n", 1422 __func__, 1423 ether_sprintf(bss->macaddr), le32toh(bss->len), 1424 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1425 le32toh(bss->networktype), le32toh(bss->privacy), 1426 le32toh(bss->rssi)); 1427 1428 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1429 /* XXX TODO: just call the new scan API methods! */ 1430 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1431 if (__predict_false(pktlen > MCLBYTES)) 1432 return; 1433 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1434 if (__predict_false(m == NULL)) 1435 return; 1436 wh = mtod(m, struct ieee80211_frame *); 1437 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1438 IEEE80211_FC0_SUBTYPE_BEACON; 1439 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1440 USETW(wh->i_dur, 0); 1441 IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr); 1442 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1443 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1444 *(uint16_t *)wh->i_seq = 0; 1445 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1446 1447 /* Finalize mbuf. */ 1448 m->m_pkthdr.len = m->m_len = pktlen; 1449 1450 /* Set channel flags for input path */ 1451 bzero(&rxs, sizeof(rxs)); 1452 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 1453 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 1454 rxs.c_ieee = le32toh(bss->config.dsconfig); 1455 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 1456 rxs.rssi = le32toh(bss->rssi); 1457 rxs.nf = 0; /* XXX */ 1458 1459 /* XXX avoid a LOR */ 1460 RSU_UNLOCK(sc); 1461 ieee80211_input_mimo_all(ic, m, &rxs); 1462 RSU_LOCK(sc); 1463 } 1464 1465 static void 1466 rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1467 { 1468 struct ieee80211com *ic = &sc->sc_ic; 1469 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1470 struct ieee80211_node *ni = vap->iv_bss; 1471 struct r92s_event_join_bss *rsp; 1472 uint32_t tmp; 1473 int res; 1474 1475 if (__predict_false(len < sizeof(*rsp))) 1476 return; 1477 rsp = (struct r92s_event_join_bss *)buf; 1478 res = (int)le32toh(rsp->join_res); 1479 1480 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1481 "%s: Rx join BSS event len=%d res=%d\n", 1482 __func__, len, res); 1483 1484 /* 1485 * XXX Don't do this; there's likely a better way to tell 1486 * the caller we failed. 1487 */ 1488 if (res <= 0) { 1489 RSU_UNLOCK(sc); 1490 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1491 RSU_LOCK(sc); 1492 return; 1493 } 1494 1495 tmp = le32toh(rsp->associd); 1496 if (tmp >= vap->iv_max_aid) { 1497 DPRINTF("Assoc ID overflow\n"); 1498 tmp = 1; 1499 } 1500 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1501 "%s: associated with %s associd=%d\n", 1502 __func__, ether_sprintf(rsp->bss.macaddr), tmp); 1503 /* XXX is this required? What's the top two bits for again? */ 1504 ni->ni_associd = tmp | 0xc000; 1505 RSU_UNLOCK(sc); 1506 ieee80211_new_state(vap, IEEE80211_S_RUN, 1507 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1508 RSU_LOCK(sc); 1509 } 1510 1511 static void 1512 rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len) 1513 { 1514 struct ieee80211com *ic = &sc->sc_ic; 1515 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1516 struct r92s_add_ba_event *ba = (void *) buf; 1517 struct ieee80211_node *ni; 1518 1519 if (len < sizeof(*ba)) { 1520 device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len); 1521 return; 1522 } 1523 1524 if (vap == NULL) 1525 return; 1526 1527 device_printf(sc->sc_dev, "%s: mac=%s, tid=%d, ssn=%d\n", 1528 __func__, 1529 ether_sprintf(ba->mac_addr), 1530 (int) ba->tid, 1531 (int) le16toh(ba->ssn)); 1532 1533 /* XXX do node lookup; this is STA specific */ 1534 1535 ni = ieee80211_ref_node(vap->iv_bss); 1536 ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32); 1537 ieee80211_free_node(ni); 1538 } 1539 1540 static void 1541 rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1542 { 1543 struct ieee80211com *ic = &sc->sc_ic; 1544 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1545 1546 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1547 "%s: Rx event code=%d len=%d\n", __func__, code, len); 1548 switch (code) { 1549 case R92S_EVT_SURVEY: 1550 rsu_event_survey(sc, buf, len); 1551 break; 1552 case R92S_EVT_SURVEY_DONE: 1553 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1554 "%s: site survey pass %d done, found %d BSS\n", 1555 __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf)); 1556 sc->sc_scanning = 0; 1557 if (vap->iv_state != IEEE80211_S_SCAN) 1558 break; /* Ignore if not scanning. */ 1559 1560 /* 1561 * XXX TODO: This needs to be done without a transition to 1562 * the SCAN state again. Grr. 1563 */ 1564 if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) { 1565 /* Schedule a directed scan for hidden APs. */ 1566 /* XXX bad! */ 1567 sc->sc_scan_pass = 1; 1568 RSU_UNLOCK(sc); 1569 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1570 RSU_LOCK(sc); 1571 break; 1572 } 1573 sc->sc_scan_pass = 0; 1574 break; 1575 case R92S_EVT_JOIN_BSS: 1576 if (vap->iv_state == IEEE80211_S_AUTH) 1577 rsu_event_join_bss(sc, buf, len); 1578 break; 1579 case R92S_EVT_DEL_STA: 1580 RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE, 1581 "%s: disassociated from %s\n", __func__, 1582 ether_sprintf(buf)); 1583 if (vap->iv_state == IEEE80211_S_RUN && 1584 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1585 RSU_UNLOCK(sc); 1586 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1587 RSU_LOCK(sc); 1588 } 1589 break; 1590 case R92S_EVT_WPS_PBC: 1591 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1592 "%s: WPS PBC pushed.\n", __func__); 1593 break; 1594 case R92S_EVT_FWDBG: 1595 buf[60] = '\0'; 1596 RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf); 1597 break; 1598 case R92S_EVT_ADDBA_REQ_REPORT: 1599 rsu_event_addba_req_report(sc, buf, len); 1600 break; 1601 default: 1602 device_printf(sc->sc_dev, "%s: unhandled code (%d)\n", __func__, code); 1603 break; 1604 } 1605 } 1606 1607 static void 1608 rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1609 { 1610 struct r92s_fw_cmd_hdr *cmd; 1611 int cmdsz; 1612 1613 RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len); 1614 1615 /* Skip Rx status. */ 1616 buf += sizeof(struct r92s_rx_stat); 1617 len -= sizeof(struct r92s_rx_stat); 1618 1619 /* Process all events. */ 1620 for (;;) { 1621 /* Check that command header fits. */ 1622 if (__predict_false(len < sizeof(*cmd))) 1623 break; 1624 cmd = (struct r92s_fw_cmd_hdr *)buf; 1625 /* Check that command payload fits. */ 1626 cmdsz = le16toh(cmd->len); 1627 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1628 break; 1629 1630 /* Process firmware event. */ 1631 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1632 1633 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1634 break; 1635 buf += sizeof(*cmd) + cmdsz; 1636 len -= sizeof(*cmd) + cmdsz; 1637 } 1638 } 1639 1640 static int8_t 1641 rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1642 { 1643 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1644 struct r92s_rx_phystat *phy; 1645 struct r92s_rx_cck *cck; 1646 uint8_t rpt; 1647 int8_t rssi; 1648 1649 if (rate <= 3) { 1650 cck = (struct r92s_rx_cck *)physt; 1651 rpt = (cck->agc_rpt >> 6) & 0x3; 1652 rssi = cck->agc_rpt & 0x3e; 1653 rssi = cckoff[rpt] - rssi; 1654 } else { /* OFDM/HT. */ 1655 phy = (struct r92s_rx_phystat *)physt; 1656 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1657 } 1658 return (rssi); 1659 } 1660 1661 static struct mbuf * 1662 rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi) 1663 { 1664 struct ieee80211com *ic = &sc->sc_ic; 1665 struct ieee80211_frame *wh; 1666 struct r92s_rx_stat *stat; 1667 uint32_t rxdw0, rxdw3; 1668 struct mbuf *m; 1669 uint8_t rate; 1670 int infosz; 1671 1672 stat = (struct r92s_rx_stat *)buf; 1673 rxdw0 = le32toh(stat->rxdw0); 1674 rxdw3 = le32toh(stat->rxdw3); 1675 1676 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1677 counter_u64_add(ic->ic_ierrors, 1); 1678 return NULL; 1679 } 1680 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1681 counter_u64_add(ic->ic_ierrors, 1); 1682 return NULL; 1683 } 1684 1685 rate = MS(rxdw3, R92S_RXDW3_RATE); 1686 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1687 1688 /* Get RSSI from PHY status descriptor if present. */ 1689 if (infosz != 0) 1690 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1691 else 1692 *rssi = 0; 1693 1694 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1695 "%s: Rx frame len=%d rate=%d infosz=%d rssi=%d\n", 1696 __func__, 1697 pktlen, rate, infosz, *rssi); 1698 1699 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1700 if (__predict_false(m == NULL)) { 1701 counter_u64_add(ic->ic_ierrors, 1); 1702 return NULL; 1703 } 1704 /* Hardware does Rx TCP checksum offload. */ 1705 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1706 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1707 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1708 } 1709 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1710 memcpy(mtod(m, uint8_t *), wh, pktlen); 1711 m->m_pkthdr.len = m->m_len = pktlen; 1712 1713 if (ieee80211_radiotap_active(ic)) { 1714 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1715 1716 /* Map HW rate index to 802.11 rate. */ 1717 tap->wr_flags = 2; 1718 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1719 switch (rate) { 1720 /* CCK. */ 1721 case 0: tap->wr_rate = 2; break; 1722 case 1: tap->wr_rate = 4; break; 1723 case 2: tap->wr_rate = 11; break; 1724 case 3: tap->wr_rate = 22; break; 1725 /* OFDM. */ 1726 case 4: tap->wr_rate = 12; break; 1727 case 5: tap->wr_rate = 18; break; 1728 case 6: tap->wr_rate = 24; break; 1729 case 7: tap->wr_rate = 36; break; 1730 case 8: tap->wr_rate = 48; break; 1731 case 9: tap->wr_rate = 72; break; 1732 case 10: tap->wr_rate = 96; break; 1733 case 11: tap->wr_rate = 108; break; 1734 } 1735 } else if (rate >= 12) { /* MCS0~15. */ 1736 /* Bit 7 set means HT MCS instead of rate. */ 1737 tap->wr_rate = 0x80 | (rate - 12); 1738 } 1739 tap->wr_dbm_antsignal = *rssi; 1740 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1741 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1742 } 1743 1744 return (m); 1745 } 1746 1747 static struct mbuf * 1748 rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi) 1749 { 1750 struct r92s_rx_stat *stat; 1751 uint32_t rxdw0; 1752 int totlen, pktlen, infosz, npkts; 1753 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1754 1755 /* Get the number of encapsulated frames. */ 1756 stat = (struct r92s_rx_stat *)buf; 1757 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1758 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1759 "%s: Rx %d frames in one chunk\n", __func__, npkts); 1760 1761 /* Process all of them. */ 1762 while (npkts-- > 0) { 1763 if (__predict_false(len < sizeof(*stat))) 1764 break; 1765 stat = (struct r92s_rx_stat *)buf; 1766 rxdw0 = le32toh(stat->rxdw0); 1767 1768 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1769 if (__predict_false(pktlen == 0)) 1770 break; 1771 1772 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1773 1774 /* Make sure everything fits in xfer. */ 1775 totlen = sizeof(*stat) + infosz + pktlen; 1776 if (__predict_false(totlen > len)) 1777 break; 1778 1779 /* Process 802.11 frame. */ 1780 m = rsu_rx_frame(sc, buf, pktlen, rssi); 1781 if (m0 == NULL) 1782 m0 = m; 1783 if (prevm == NULL) 1784 prevm = m; 1785 else { 1786 prevm->m_next = m; 1787 prevm = m; 1788 } 1789 /* Next chunk is 128-byte aligned. */ 1790 totlen = (totlen + 127) & ~127; 1791 buf += totlen; 1792 len -= totlen; 1793 } 1794 1795 return (m0); 1796 } 1797 1798 static struct mbuf * 1799 rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi) 1800 { 1801 struct rsu_softc *sc = data->sc; 1802 struct ieee80211com *ic = &sc->sc_ic; 1803 struct r92s_rx_stat *stat; 1804 int len; 1805 1806 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1807 1808 if (__predict_false(len < sizeof(*stat))) { 1809 DPRINTF("xfer too short %d\n", len); 1810 counter_u64_add(ic->ic_ierrors, 1); 1811 return (NULL); 1812 } 1813 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1814 stat = (struct r92s_rx_stat *)data->buf; 1815 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1816 rsu_rx_multi_event(sc, data->buf, len); 1817 /* No packets to process. */ 1818 return (NULL); 1819 } else 1820 return (rsu_rx_multi_frame(sc, data->buf, len, rssi)); 1821 } 1822 1823 static void 1824 rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1825 { 1826 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1827 struct ieee80211com *ic = &sc->sc_ic; 1828 struct ieee80211_frame *wh; 1829 struct ieee80211_node *ni; 1830 struct mbuf *m = NULL, *next; 1831 struct rsu_data *data; 1832 int rssi = 1; 1833 1834 RSU_ASSERT_LOCKED(sc); 1835 1836 switch (USB_GET_STATE(xfer)) { 1837 case USB_ST_TRANSFERRED: 1838 data = STAILQ_FIRST(&sc->sc_rx_active); 1839 if (data == NULL) 1840 goto tr_setup; 1841 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1842 m = rsu_rxeof(xfer, data, &rssi); 1843 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1844 /* FALLTHROUGH */ 1845 case USB_ST_SETUP: 1846 tr_setup: 1847 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1848 if (data == NULL) { 1849 KASSERT(m == NULL, ("mbuf isn't NULL")); 1850 return; 1851 } 1852 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1853 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1854 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1855 usbd_xfer_max_len(xfer)); 1856 usbd_transfer_submit(xfer); 1857 /* 1858 * To avoid LOR we should unlock our private mutex here to call 1859 * ieee80211_input() because here is at the end of a USB 1860 * callback and safe to unlock. 1861 */ 1862 RSU_UNLOCK(sc); 1863 while (m != NULL) { 1864 next = m->m_next; 1865 m->m_next = NULL; 1866 wh = mtod(m, struct ieee80211_frame *); 1867 ni = ieee80211_find_rxnode(ic, 1868 (struct ieee80211_frame_min *)wh); 1869 if (ni != NULL) { 1870 if (ni->ni_flags & IEEE80211_NODE_HT) 1871 m->m_flags |= M_AMPDU; 1872 (void)ieee80211_input(ni, m, rssi, 0); 1873 ieee80211_free_node(ni); 1874 } else 1875 (void)ieee80211_input_all(ic, m, rssi, 0); 1876 m = next; 1877 } 1878 RSU_LOCK(sc); 1879 break; 1880 default: 1881 /* needs it to the inactive queue due to a error. */ 1882 data = STAILQ_FIRST(&sc->sc_rx_active); 1883 if (data != NULL) { 1884 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1885 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1886 } 1887 if (error != USB_ERR_CANCELLED) { 1888 usbd_xfer_set_stall(xfer); 1889 counter_u64_add(ic->ic_ierrors, 1); 1890 goto tr_setup; 1891 } 1892 break; 1893 } 1894 1895 } 1896 1897 static void 1898 rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1899 { 1900 #ifdef USB_DEBUG 1901 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1902 #endif 1903 1904 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n", 1905 __func__, 1906 data); 1907 1908 if (data->m) { 1909 /* XXX status? */ 1910 ieee80211_tx_complete(data->ni, data->m, 0); 1911 data->m = NULL; 1912 data->ni = NULL; 1913 } 1914 } 1915 1916 static void 1917 rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 1918 uint8_t which) 1919 { 1920 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1921 struct ieee80211com *ic = &sc->sc_ic; 1922 struct rsu_data *data; 1923 1924 RSU_ASSERT_LOCKED(sc); 1925 1926 switch (USB_GET_STATE(xfer)) { 1927 case USB_ST_TRANSFERRED: 1928 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1929 if (data == NULL) 1930 goto tr_setup; 1931 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n", 1932 __func__, data); 1933 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1934 rsu_txeof(xfer, data); 1935 rsu_freebuf(sc, data); 1936 /* FALLTHROUGH */ 1937 case USB_ST_SETUP: 1938 tr_setup: 1939 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 1940 if (data == NULL) { 1941 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1942 "%s: empty pending queue sc %p\n", __func__, sc); 1943 return; 1944 } 1945 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 1946 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 1947 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1948 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1949 "%s: submitting transfer %p\n", 1950 __func__, 1951 data); 1952 usbd_transfer_submit(xfer); 1953 break; 1954 default: 1955 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1956 if (data != NULL) { 1957 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1958 rsu_txeof(xfer, data); 1959 rsu_freebuf(sc, data); 1960 } 1961 counter_u64_add(ic->ic_oerrors, 1); 1962 1963 if (error != USB_ERR_CANCELLED) { 1964 usbd_xfer_set_stall(xfer); 1965 goto tr_setup; 1966 } 1967 break; 1968 } 1969 } 1970 1971 static void 1972 rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 1973 { 1974 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1975 1976 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 1977 1978 /* This kicks the TX taskqueue */ 1979 rsu_start(sc); 1980 } 1981 1982 static void 1983 rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 1984 { 1985 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1986 1987 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 1988 1989 /* This kicks the TX taskqueue */ 1990 rsu_start(sc); 1991 } 1992 1993 static void 1994 rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error) 1995 { 1996 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1997 1998 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C); 1999 2000 /* This kicks the TX taskqueue */ 2001 rsu_start(sc); 2002 } 2003 2004 static int 2005 rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 2006 struct mbuf *m0, struct rsu_data *data) 2007 { 2008 struct ieee80211com *ic = &sc->sc_ic; 2009 struct ieee80211vap *vap = ni->ni_vap; 2010 struct ieee80211_frame *wh; 2011 struct ieee80211_key *k = NULL; 2012 struct r92s_tx_desc *txd; 2013 uint8_t type; 2014 int prio = 0; 2015 uint8_t which; 2016 int hasqos; 2017 int xferlen; 2018 int qid; 2019 2020 RSU_ASSERT_LOCKED(sc); 2021 2022 wh = mtod(m0, struct ieee80211_frame *); 2023 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2024 2025 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n", 2026 __func__, data, m0); 2027 2028 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2029 k = ieee80211_crypto_encap(ni, m0); 2030 if (k == NULL) { 2031 device_printf(sc->sc_dev, 2032 "ieee80211_crypto_encap returns NULL.\n"); 2033 /* XXX we don't expect the fragmented frames */ 2034 m_freem(m0); 2035 return (ENOBUFS); 2036 } 2037 wh = mtod(m0, struct ieee80211_frame *); 2038 } 2039 /* If we have QoS then use it */ 2040 /* XXX TODO: mbuf WME/PRI versus TID? */ 2041 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2042 /* Has QoS */ 2043 prio = M_WME_GETAC(m0); 2044 which = rsu_wme_ac_xfer_map[prio]; 2045 hasqos = 1; 2046 } else { 2047 /* Non-QoS TID */ 2048 /* XXX TODO: tid=0 for non-qos TID? */ 2049 which = rsu_wme_ac_xfer_map[WME_AC_BE]; 2050 hasqos = 0; 2051 prio = 0; 2052 } 2053 2054 qid = rsu_ac2qid[prio]; 2055 #if 0 2056 switch (type) { 2057 case IEEE80211_FC0_TYPE_CTL: 2058 case IEEE80211_FC0_TYPE_MGT: 2059 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2060 break; 2061 default: 2062 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 2063 break; 2064 } 2065 hasqos = 0; 2066 #endif 2067 2068 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n", 2069 __func__, 2070 prio, 2071 which, 2072 hasqos); 2073 2074 /* Fill Tx descriptor. */ 2075 txd = (struct r92s_tx_desc *)data->buf; 2076 memset(txd, 0, sizeof(*txd)); 2077 2078 txd->txdw0 |= htole32( 2079 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 2080 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 2081 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 2082 2083 txd->txdw1 |= htole32( 2084 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid)); 2085 if (!hasqos) 2086 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 2087 #ifdef notyet 2088 if (k != NULL) { 2089 switch (k->wk_cipher->ic_cipher) { 2090 case IEEE80211_CIPHER_WEP: 2091 cipher = R92S_TXDW1_CIPHER_WEP; 2092 break; 2093 case IEEE80211_CIPHER_TKIP: 2094 cipher = R92S_TXDW1_CIPHER_TKIP; 2095 break; 2096 case IEEE80211_CIPHER_AES_CCM: 2097 cipher = R92S_TXDW1_CIPHER_AES; 2098 break; 2099 default: 2100 cipher = R92S_TXDW1_CIPHER_NONE; 2101 } 2102 txd->txdw1 |= htole32( 2103 SM(R92S_TXDW1_CIPHER, cipher) | 2104 SM(R92S_TXDW1_KEYIDX, k->k_id)); 2105 } 2106 #endif 2107 /* XXX todo: set AGGEN bit if appropriate? */ 2108 txd->txdw2 |= htole32(R92S_TXDW2_BK); 2109 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 2110 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 2111 /* 2112 * Firmware will use and increment the sequence number for the 2113 * specified priority. 2114 */ 2115 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio)); 2116 2117 if (ieee80211_radiotap_active_vap(vap)) { 2118 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 2119 2120 tap->wt_flags = 0; 2121 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2122 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2123 ieee80211_radiotap_tx(vap, m0); 2124 } 2125 2126 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 2127 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 2128 2129 data->buflen = xferlen; 2130 data->ni = ni; 2131 data->m = m0; 2132 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2133 2134 /* start transfer, if any */ 2135 usbd_transfer_start(sc->sc_xfer[which]); 2136 return (0); 2137 } 2138 2139 static int 2140 rsu_transmit(struct ieee80211com *ic, struct mbuf *m) 2141 { 2142 struct rsu_softc *sc = ic->ic_softc; 2143 int error; 2144 2145 RSU_LOCK(sc); 2146 if (!sc->sc_running) { 2147 RSU_UNLOCK(sc); 2148 return (ENXIO); 2149 } 2150 error = mbufq_enqueue(&sc->sc_snd, m); 2151 if (error) { 2152 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2153 "%s: mbufq_enable: failed (%d)\n", 2154 __func__, 2155 error); 2156 RSU_UNLOCK(sc); 2157 return (error); 2158 } 2159 RSU_UNLOCK(sc); 2160 2161 /* This kicks the TX taskqueue */ 2162 rsu_start(sc); 2163 2164 return (0); 2165 } 2166 2167 static void 2168 rsu_drain_mbufq(struct rsu_softc *sc) 2169 { 2170 struct mbuf *m; 2171 struct ieee80211_node *ni; 2172 2173 RSU_ASSERT_LOCKED(sc); 2174 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2175 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2176 m->m_pkthdr.rcvif = NULL; 2177 ieee80211_free_node(ni); 2178 m_freem(m); 2179 } 2180 } 2181 2182 static void 2183 _rsu_start(struct rsu_softc *sc) 2184 { 2185 struct ieee80211_node *ni; 2186 struct rsu_data *bf; 2187 struct mbuf *m; 2188 2189 RSU_ASSERT_LOCKED(sc); 2190 2191 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2192 bf = rsu_getbuf(sc); 2193 if (bf == NULL) { 2194 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2195 "%s: failed to get buffer\n", __func__); 2196 mbufq_prepend(&sc->sc_snd, m); 2197 break; 2198 } 2199 2200 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2201 m->m_pkthdr.rcvif = NULL; 2202 2203 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2204 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2205 "%s: failed to transmit\n", __func__); 2206 if_inc_counter(ni->ni_vap->iv_ifp, 2207 IFCOUNTER_OERRORS, 1); 2208 rsu_freebuf(sc, bf); 2209 ieee80211_free_node(ni); 2210 break; 2211 } 2212 } 2213 } 2214 2215 static void 2216 rsu_start(struct rsu_softc *sc) 2217 { 2218 2219 taskqueue_enqueue(taskqueue_thread, &sc->tx_task); 2220 } 2221 2222 static void 2223 rsu_parent(struct ieee80211com *ic) 2224 { 2225 struct rsu_softc *sc = ic->ic_softc; 2226 int startall = 0; 2227 2228 RSU_LOCK(sc); 2229 if (ic->ic_nrunning > 0) { 2230 if (!sc->sc_running) { 2231 rsu_init(sc); 2232 startall = 1; 2233 } 2234 } else if (sc->sc_running) 2235 rsu_stop(sc); 2236 RSU_UNLOCK(sc); 2237 2238 if (startall) 2239 ieee80211_start_all(ic); 2240 } 2241 2242 /* 2243 * Power on sequence for A-cut adapters. 2244 */ 2245 static void 2246 rsu_power_on_acut(struct rsu_softc *sc) 2247 { 2248 uint32_t reg; 2249 2250 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2251 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2252 2253 /* Enable AFE macro block's bandgap and Mbias. */ 2254 rsu_write_1(sc, R92S_AFE_MISC, 2255 rsu_read_1(sc, R92S_AFE_MISC) | 2256 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 2257 /* Enable LDOA15 block. */ 2258 rsu_write_1(sc, R92S_LDOA15_CTRL, 2259 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2260 2261 rsu_write_1(sc, R92S_SPS1_CTRL, 2262 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 2263 rsu_ms_delay(sc, 2000); 2264 /* Enable switch regulator block. */ 2265 rsu_write_1(sc, R92S_SPS1_CTRL, 2266 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 2267 2268 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 2269 2270 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2271 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2272 2273 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2274 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2275 2276 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2277 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 2278 2279 /* Enable AFE clock. */ 2280 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2281 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2282 /* Enable AFE PLL macro block. */ 2283 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 2284 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 2285 /* Attach AFE PLL to MACTOP/BB. */ 2286 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2287 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2288 2289 /* Switch to 40MHz clock instead of 80MHz. */ 2290 rsu_write_2(sc, R92S_SYS_CLKR, 2291 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 2292 2293 /* Enable MAC clock. */ 2294 rsu_write_2(sc, R92S_SYS_CLKR, 2295 rsu_read_2(sc, R92S_SYS_CLKR) | 2296 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2297 2298 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2299 2300 /* Enable digital core and IOREG R/W. */ 2301 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2302 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2303 2304 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2305 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2306 2307 /* Switch the control path to firmware. */ 2308 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2309 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2310 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2311 2312 rsu_write_2(sc, R92S_CR, 0x37fc); 2313 2314 /* Fix USB RX FIFO issue. */ 2315 rsu_write_1(sc, 0xfe5c, 2316 rsu_read_1(sc, 0xfe5c) | 0x80); 2317 rsu_write_1(sc, 0x00ab, 2318 rsu_read_1(sc, 0x00ab) | 0xc0); 2319 2320 rsu_write_1(sc, R92S_SYS_CLKR, 2321 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2322 } 2323 2324 /* 2325 * Power on sequence for B-cut and C-cut adapters. 2326 */ 2327 static void 2328 rsu_power_on_bcut(struct rsu_softc *sc) 2329 { 2330 uint32_t reg; 2331 int ntries; 2332 2333 /* Prevent eFuse leakage. */ 2334 rsu_write_1(sc, 0x37, 0xb0); 2335 rsu_ms_delay(sc, 10); 2336 rsu_write_1(sc, 0x37, 0x30); 2337 2338 /* Switch the control path to hardware. */ 2339 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2340 if (reg & R92S_FWHW_SEL) { 2341 rsu_write_2(sc, R92S_SYS_CLKR, 2342 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 2343 } 2344 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2345 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 2346 rsu_ms_delay(sc, 1); 2347 2348 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2349 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2350 2351 reg = rsu_read_1(sc, R92S_AFE_MISC); 2352 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 2353 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 2354 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 2355 2356 /* Enable PLL. */ 2357 rsu_write_1(sc, R92S_LDOA15_CTRL, 2358 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2359 2360 rsu_write_1(sc, R92S_LDOV12D_CTRL, 2361 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 2362 2363 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2364 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2365 2366 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2367 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2368 2369 /* Support 64KB IMEM. */ 2370 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2371 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 2372 2373 /* Enable AFE clock. */ 2374 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2375 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2376 /* Enable AFE PLL macro block. */ 2377 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 2378 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2379 rsu_ms_delay(sc, 1); 2380 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 2381 rsu_ms_delay(sc, 1); 2382 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2383 rsu_ms_delay(sc, 1); 2384 2385 /* Attach AFE PLL to MACTOP/BB. */ 2386 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2387 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2388 2389 /* Switch to 40MHz clock. */ 2390 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2391 /* Disable CPU clock and 80MHz SSC. */ 2392 rsu_write_1(sc, R92S_SYS_CLKR, 2393 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2394 /* Enable MAC clock. */ 2395 rsu_write_2(sc, R92S_SYS_CLKR, 2396 rsu_read_2(sc, R92S_SYS_CLKR) | 2397 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2398 2399 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2400 2401 /* Enable digital core and IOREG R/W. */ 2402 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2403 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2404 2405 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2406 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2407 2408 /* Switch the control path to firmware. */ 2409 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2410 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2411 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2412 2413 rsu_write_2(sc, R92S_CR, 0x37fc); 2414 2415 /* Fix USB RX FIFO issue. */ 2416 rsu_write_1(sc, 0xfe5c, 2417 rsu_read_1(sc, 0xfe5c) | 0x80); 2418 2419 rsu_write_1(sc, R92S_SYS_CLKR, 2420 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2421 2422 rsu_write_1(sc, 0xfe1c, 0x80); 2423 2424 /* Make sure TxDMA is ready to download firmware. */ 2425 for (ntries = 0; ntries < 20; ntries++) { 2426 reg = rsu_read_1(sc, R92S_TCR); 2427 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2428 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2429 break; 2430 rsu_ms_delay(sc, 1); 2431 } 2432 if (ntries == 20) { 2433 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX, 2434 "%s: TxDMA is not ready\n", 2435 __func__); 2436 /* Reset TxDMA. */ 2437 reg = rsu_read_1(sc, R92S_CR); 2438 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2439 rsu_ms_delay(sc, 1); 2440 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2441 } 2442 } 2443 2444 static void 2445 rsu_power_off(struct rsu_softc *sc) 2446 { 2447 /* Turn RF off. */ 2448 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2449 rsu_ms_delay(sc, 5); 2450 2451 /* Turn MAC off. */ 2452 /* Switch control path. */ 2453 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2454 /* Reset MACTOP. */ 2455 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2456 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2457 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2458 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2459 2460 /* Disable AFE PLL. */ 2461 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2462 /* Disable A15V. */ 2463 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2464 /* Disable eFuse 1.2V. */ 2465 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2466 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2467 /* Enable AFE macro block's bandgap and Mbias. */ 2468 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2469 /* Disable 1.6V LDO. */ 2470 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2471 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2472 2473 /* Firmware - tell it to switch things off */ 2474 (void) rsu_set_fw_power_state(sc, RSU_PWR_OFF); 2475 } 2476 2477 static int 2478 rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2479 { 2480 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2481 struct rsu_data *data; 2482 struct r92s_tx_desc *txd; 2483 int mlen; 2484 2485 while (len > 0) { 2486 data = rsu_getbuf(sc); 2487 if (data == NULL) 2488 return (ENOMEM); 2489 txd = (struct r92s_tx_desc *)data->buf; 2490 memset(txd, 0, sizeof(*txd)); 2491 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2492 /* Last chunk. */ 2493 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2494 mlen = len; 2495 } else 2496 mlen = RSU_TXBUFSZ - sizeof(*txd); 2497 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2498 memcpy(&txd[1], buf, mlen); 2499 data->buflen = sizeof(*txd) + mlen; 2500 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET, 2501 "%s: starting transfer %p\n", 2502 __func__, data); 2503 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2504 buf += mlen; 2505 len -= mlen; 2506 } 2507 usbd_transfer_start(sc->sc_xfer[which]); 2508 return (0); 2509 } 2510 2511 static int 2512 rsu_load_firmware(struct rsu_softc *sc) 2513 { 2514 const struct r92s_fw_hdr *hdr; 2515 struct r92s_fw_priv *dmem; 2516 struct ieee80211com *ic = &sc->sc_ic; 2517 const uint8_t *imem, *emem; 2518 int imemsz, ememsz; 2519 const struct firmware *fw; 2520 size_t size; 2521 uint32_t reg; 2522 int ntries, error; 2523 2524 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2525 RSU_DPRINTF(sc, RSU_DEBUG_ANY, 2526 "%s: Firmware already loaded\n", 2527 __func__); 2528 return (0); 2529 } 2530 2531 RSU_UNLOCK(sc); 2532 /* Read firmware image from the filesystem. */ 2533 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2534 device_printf(sc->sc_dev, 2535 "%s: failed load firmware of file rsu-rtl8712fw\n", 2536 __func__); 2537 RSU_LOCK(sc); 2538 return (ENXIO); 2539 } 2540 RSU_LOCK(sc); 2541 size = fw->datasize; 2542 if (size < sizeof(*hdr)) { 2543 device_printf(sc->sc_dev, "firmware too short\n"); 2544 error = EINVAL; 2545 goto fail; 2546 } 2547 hdr = (const struct r92s_fw_hdr *)fw->data; 2548 if (hdr->signature != htole16(0x8712) && 2549 hdr->signature != htole16(0x8192)) { 2550 device_printf(sc->sc_dev, 2551 "invalid firmware signature 0x%x\n", 2552 le16toh(hdr->signature)); 2553 error = EINVAL; 2554 goto fail; 2555 } 2556 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2557 hdr->month, hdr->day, hdr->hour, hdr->minute); 2558 2559 /* Make sure that driver and firmware are in sync. */ 2560 if (hdr->privsz != htole32(sizeof(*dmem))) { 2561 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2562 error = EINVAL; 2563 goto fail; 2564 } 2565 /* Get FW sections sizes. */ 2566 imemsz = le32toh(hdr->imemsz); 2567 ememsz = le32toh(hdr->sramsz); 2568 /* Check that all FW sections fit in image. */ 2569 if (size < sizeof(*hdr) + imemsz + ememsz) { 2570 device_printf(sc->sc_dev, "firmware too short\n"); 2571 error = EINVAL; 2572 goto fail; 2573 } 2574 imem = (const uint8_t *)&hdr[1]; 2575 emem = imem + imemsz; 2576 2577 /* Load IMEM section. */ 2578 error = rsu_fw_loadsection(sc, imem, imemsz); 2579 if (error != 0) { 2580 device_printf(sc->sc_dev, 2581 "could not load firmware section %s\n", "IMEM"); 2582 goto fail; 2583 } 2584 /* Wait for load to complete. */ 2585 for (ntries = 0; ntries != 50; ntries++) { 2586 rsu_ms_delay(sc, 10); 2587 reg = rsu_read_1(sc, R92S_TCR); 2588 if (reg & R92S_TCR_IMEM_CODE_DONE) 2589 break; 2590 } 2591 if (ntries == 50) { 2592 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2593 error = ETIMEDOUT; 2594 goto fail; 2595 } 2596 /* Load EMEM section. */ 2597 error = rsu_fw_loadsection(sc, emem, ememsz); 2598 if (error != 0) { 2599 device_printf(sc->sc_dev, 2600 "could not load firmware section %s\n", "EMEM"); 2601 goto fail; 2602 } 2603 /* Wait for load to complete. */ 2604 for (ntries = 0; ntries != 50; ntries++) { 2605 rsu_ms_delay(sc, 10); 2606 reg = rsu_read_2(sc, R92S_TCR); 2607 if (reg & R92S_TCR_EMEM_CODE_DONE) 2608 break; 2609 } 2610 if (ntries == 50) { 2611 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2612 error = ETIMEDOUT; 2613 goto fail; 2614 } 2615 /* Enable CPU. */ 2616 rsu_write_1(sc, R92S_SYS_CLKR, 2617 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2618 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2619 device_printf(sc->sc_dev, "could not enable system clock\n"); 2620 error = EIO; 2621 goto fail; 2622 } 2623 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2624 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2625 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2626 device_printf(sc->sc_dev, 2627 "could not enable microcontroller\n"); 2628 error = EIO; 2629 goto fail; 2630 } 2631 /* Wait for CPU to initialize. */ 2632 for (ntries = 0; ntries < 100; ntries++) { 2633 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2634 break; 2635 rsu_ms_delay(sc, 1); 2636 } 2637 if (ntries == 100) { 2638 device_printf(sc->sc_dev, 2639 "timeout waiting for microcontroller\n"); 2640 error = ETIMEDOUT; 2641 goto fail; 2642 } 2643 2644 /* Update DMEM section before loading. */ 2645 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2646 memset(dmem, 0, sizeof(*dmem)); 2647 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2648 dmem->nendpoints = sc->sc_nendpoints; 2649 dmem->chip_version = sc->cut; 2650 /* XXX TODO: rf_config should come from ROM */ 2651 dmem->rf_config = 0x11; /* 1T1R */ 2652 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2653 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2654 dmem->turbo_mode = 0; 2655 dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40); 2656 dmem->amsdu2ampdu_en = !! (sc->sc_ht); 2657 dmem->ampdu_en = !! (sc->sc_ht); 2658 dmem->agg_offload = !! (sc->sc_ht); 2659 dmem->qos_en = 1; 2660 dmem->ps_offload = 1; 2661 dmem->lowpower_mode = 1; /* XXX TODO: configurable? */ 2662 /* Load DMEM section. */ 2663 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2664 if (error != 0) { 2665 device_printf(sc->sc_dev, 2666 "could not load firmware section %s\n", "DMEM"); 2667 goto fail; 2668 } 2669 /* Wait for load to complete. */ 2670 for (ntries = 0; ntries < 100; ntries++) { 2671 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2672 break; 2673 rsu_ms_delay(sc, 1); 2674 } 2675 if (ntries == 100) { 2676 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2677 "DMEM"); 2678 error = ETIMEDOUT; 2679 goto fail; 2680 } 2681 /* Wait for firmware readiness. */ 2682 for (ntries = 0; ntries < 60; ntries++) { 2683 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2684 break; 2685 rsu_ms_delay(sc, 1); 2686 } 2687 if (ntries == 60) { 2688 device_printf(sc->sc_dev, 2689 "timeout waiting for firmware readiness\n"); 2690 error = ETIMEDOUT; 2691 goto fail; 2692 } 2693 fail: 2694 firmware_put(fw, FIRMWARE_UNLOAD); 2695 return (error); 2696 } 2697 2698 2699 static int 2700 rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2701 const struct ieee80211_bpf_params *params) 2702 { 2703 struct ieee80211com *ic = ni->ni_ic; 2704 struct rsu_softc *sc = ic->ic_softc; 2705 struct rsu_data *bf; 2706 2707 /* prevent management frames from being sent if we're not ready */ 2708 if (!sc->sc_running) { 2709 m_freem(m); 2710 ieee80211_free_node(ni); 2711 return (ENETDOWN); 2712 } 2713 RSU_LOCK(sc); 2714 bf = rsu_getbuf(sc); 2715 if (bf == NULL) { 2716 ieee80211_free_node(ni); 2717 m_freem(m); 2718 RSU_UNLOCK(sc); 2719 return (ENOBUFS); 2720 } 2721 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2722 ieee80211_free_node(ni); 2723 rsu_freebuf(sc, bf); 2724 RSU_UNLOCK(sc); 2725 return (EIO); 2726 } 2727 RSU_UNLOCK(sc); 2728 2729 return (0); 2730 } 2731 2732 static void 2733 rsu_init(struct rsu_softc *sc) 2734 { 2735 struct ieee80211com *ic = &sc->sc_ic; 2736 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2737 uint8_t macaddr[IEEE80211_ADDR_LEN]; 2738 int error; 2739 int i; 2740 2741 RSU_ASSERT_LOCKED(sc); 2742 2743 /* Ensure the mbuf queue is drained */ 2744 rsu_drain_mbufq(sc); 2745 2746 /* Init host async commands ring. */ 2747 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2748 2749 /* Reset power management state. */ 2750 rsu_write_1(sc, R92S_USB_HRPWM, 0); 2751 2752 /* Power on adapter. */ 2753 if (sc->cut == 1) 2754 rsu_power_on_acut(sc); 2755 else 2756 rsu_power_on_bcut(sc); 2757 2758 /* Load firmware. */ 2759 error = rsu_load_firmware(sc); 2760 if (error != 0) 2761 goto fail; 2762 2763 /* Enable Rx TCP checksum offload. */ 2764 rsu_write_4(sc, R92S_RCR, 2765 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2766 /* Append PHY status. */ 2767 rsu_write_4(sc, R92S_RCR, 2768 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2769 2770 rsu_write_4(sc, R92S_CR, 2771 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2772 2773 /* Use 128 bytes pages. */ 2774 rsu_write_1(sc, 0x00b5, 2775 rsu_read_1(sc, 0x00b5) | 0x01); 2776 /* Enable USB Rx aggregation. */ 2777 rsu_write_1(sc, 0x00bd, 2778 rsu_read_1(sc, 0x00bd) | 0x80); 2779 /* Set USB Rx aggregation threshold. */ 2780 rsu_write_1(sc, 0x00d9, 0x01); 2781 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2782 rsu_write_1(sc, 0xfe5b, 0x04); 2783 /* Fix USB Rx FIFO issue. */ 2784 rsu_write_1(sc, 0xfe5c, 2785 rsu_read_1(sc, 0xfe5c) | 0x80); 2786 2787 /* Set MAC address. */ 2788 IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 2789 rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN); 2790 2791 /* It really takes 1.5 seconds for the firmware to boot: */ 2792 rsu_ms_delay(sc, 2000); 2793 2794 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n", 2795 __func__, 2796 ether_sprintf(macaddr)); 2797 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr, 2798 IEEE80211_ADDR_LEN); 2799 if (error != 0) { 2800 device_printf(sc->sc_dev, "could not set MAC address\n"); 2801 goto fail; 2802 } 2803 2804 /* Set PS mode fully active */ 2805 error = rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 2806 2807 if (error != 0) { 2808 device_printf(sc->sc_dev, "could not set PS mode\n"); 2809 goto fail; 2810 } 2811 2812 if (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40) { 2813 /* Enable 40MHz mode. */ 2814 error = rsu_fw_iocmd(sc, 2815 SM(R92S_IOCMD_CLASS, 0xf4) | 2816 SM(R92S_IOCMD_INDEX, 0x00) | 2817 SM(R92S_IOCMD_VALUE, 0x0007)); 2818 if (error != 0) { 2819 device_printf(sc->sc_dev, 2820 "could not enable 40MHz mode\n"); 2821 goto fail; 2822 } 2823 } 2824 2825 sc->sc_scan_pass = 0; 2826 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2827 2828 /* We're ready to go. */ 2829 sc->sc_running = 1; 2830 sc->sc_scanning = 0; 2831 return; 2832 fail: 2833 /* Need to stop all failed transfers, if any */ 2834 for (i = 0; i != RSU_N_TRANSFER; i++) 2835 usbd_transfer_stop(sc->sc_xfer[i]); 2836 } 2837 2838 static void 2839 rsu_stop(struct rsu_softc *sc) 2840 { 2841 int i; 2842 2843 RSU_ASSERT_LOCKED(sc); 2844 2845 sc->sc_running = 0; 2846 sc->sc_calibrating = 0; 2847 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2848 taskqueue_cancel(taskqueue_thread, &sc->tx_task, NULL); 2849 2850 /* Power off adapter. */ 2851 rsu_power_off(sc); 2852 2853 for (i = 0; i < RSU_N_TRANSFER; i++) 2854 usbd_transfer_stop(sc->sc_xfer[i]); 2855 2856 /* Ensure the mbuf queue is drained */ 2857 rsu_drain_mbufq(sc); 2858 } 2859 2860 /* 2861 * Note: usb_pause_mtx() actually releases the mutex before calling pause(), 2862 * which breaks any kind of driver serialisation. 2863 */ 2864 static void 2865 rsu_ms_delay(struct rsu_softc *sc, int ms) 2866 { 2867 2868 //usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2869 DELAY(ms * 1000); 2870 } 2871