1 /* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 #include <sys/cdefs.h> 19 __FBSDID("$FreeBSD$"); 20 21 /* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o h/w crypto 26 * o hostap / ibss / mesh 27 * o sensible RSSI levels 28 * o power-save operation 29 */ 30 31 #include "opt_wlan.h" 32 33 #include <sys/param.h> 34 #include <sys/endian.h> 35 #include <sys/sockio.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/conf.h> 41 #include <sys/bus.h> 42 #include <sys/rman.h> 43 #include <sys/firmware.h> 44 #include <sys/module.h> 45 46 #include <machine/bus.h> 47 #include <machine/resource.h> 48 49 #include <net/bpf.h> 50 #include <net/if.h> 51 #include <net/if_var.h> 52 #include <net/if_arp.h> 53 #include <net/if_dl.h> 54 #include <net/if_media.h> 55 #include <net/if_types.h> 56 57 #include <netinet/in.h> 58 #include <netinet/in_systm.h> 59 #include <netinet/in_var.h> 60 #include <netinet/if_ether.h> 61 #include <netinet/ip.h> 62 63 #include <net80211/ieee80211_var.h> 64 #include <net80211/ieee80211_regdomain.h> 65 #include <net80211/ieee80211_radiotap.h> 66 67 #include <dev/usb/usb.h> 68 #include <dev/usb/usbdi.h> 69 #include "usbdevs.h" 70 71 #define USB_DEBUG_VAR rsu_debug 72 #include <dev/usb/usb_debug.h> 73 74 #include <dev/usb/wlan/if_rsureg.h> 75 76 #ifdef USB_DEBUG 77 static int rsu_debug = 0; 78 SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 79 SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 80 "Debug level"); 81 #define RSU_DPRINTF(_sc, _flg, ...) \ 82 do \ 83 if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \ 84 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 85 while (0) 86 #else 87 #define RSU_DPRINTF(_sc, _flg, ...) 88 #endif 89 90 static int rsu_enable_11n = 1; 91 TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n); 92 93 #define RSU_DEBUG_ANY 0xffffffff 94 #define RSU_DEBUG_TX 0x00000001 95 #define RSU_DEBUG_RX 0x00000002 96 #define RSU_DEBUG_RESET 0x00000004 97 #define RSU_DEBUG_CALIB 0x00000008 98 #define RSU_DEBUG_STATE 0x00000010 99 #define RSU_DEBUG_SCAN 0x00000020 100 #define RSU_DEBUG_FWCMD 0x00000040 101 #define RSU_DEBUG_TXDONE 0x00000080 102 #define RSU_DEBUG_FW 0x00000100 103 #define RSU_DEBUG_FWDBG 0x00000200 104 #define RSU_DEBUG_AMPDU 0x00000400 105 106 static const STRUCT_USB_HOST_ID rsu_devs[] = { 107 #define RSU_HT_NOT_SUPPORTED 0 108 #define RSU_HT_SUPPORTED 1 109 #define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 110 RSU_HT_SUPPORTED) } 111 #define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 112 RSU_HT_NOT_SUPPORTED) } 113 RSU_DEV(ASUS, RTL8192SU), 114 RSU_DEV(AZUREWAVE, RTL8192SU_4), 115 RSU_DEV_HT(ACCTON, RTL8192SU), 116 RSU_DEV_HT(ASUS, USBN10), 117 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 118 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 119 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 120 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 121 RSU_DEV_HT(BELKIN, RTL8192SU_1), 122 RSU_DEV_HT(BELKIN, RTL8192SU_2), 123 RSU_DEV_HT(BELKIN, RTL8192SU_3), 124 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 125 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 126 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 127 RSU_DEV_HT(COREGA, RTL8192SU), 128 RSU_DEV_HT(DLINK2, DWA131A1), 129 RSU_DEV_HT(DLINK2, RTL8192SU_1), 130 RSU_DEV_HT(DLINK2, RTL8192SU_2), 131 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 132 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 133 RSU_DEV_HT(EDIMAX, EW7622UMN), 134 RSU_DEV_HT(GUILLEMOT, HWGUN54), 135 RSU_DEV_HT(GUILLEMOT, HWNUM300), 136 RSU_DEV_HT(HAWKING, RTL8192SU_1), 137 RSU_DEV_HT(HAWKING, RTL8192SU_2), 138 RSU_DEV_HT(PLANEX2, GWUSNANO), 139 RSU_DEV_HT(REALTEK, RTL8171), 140 RSU_DEV_HT(REALTEK, RTL8172), 141 RSU_DEV_HT(REALTEK, RTL8173), 142 RSU_DEV_HT(REALTEK, RTL8174), 143 RSU_DEV_HT(REALTEK, RTL8192SU), 144 RSU_DEV_HT(REALTEK, RTL8712), 145 RSU_DEV_HT(REALTEK, RTL8713), 146 RSU_DEV_HT(SENAO, RTL8192SU_1), 147 RSU_DEV_HT(SENAO, RTL8192SU_2), 148 RSU_DEV_HT(SITECOMEU, WL349V1), 149 RSU_DEV_HT(SITECOMEU, WL353), 150 RSU_DEV_HT(SWEEX2, LW154), 151 RSU_DEV_HT(TRENDNET, TEW646UBH), 152 #undef RSU_DEV_HT 153 #undef RSU_DEV 154 }; 155 156 static device_probe_t rsu_match; 157 static device_attach_t rsu_attach; 158 static device_detach_t rsu_detach; 159 static usb_callback_t rsu_bulk_tx_callback_be_bk; 160 static usb_callback_t rsu_bulk_tx_callback_vi_vo; 161 static usb_callback_t rsu_bulk_tx_callback_h2c; 162 static usb_callback_t rsu_bulk_rx_callback; 163 static usb_error_t rsu_do_request(struct rsu_softc *, 164 struct usb_device_request *, void *); 165 static struct ieee80211vap * 166 rsu_vap_create(struct ieee80211com *, const char name[], 167 int, enum ieee80211_opmode, int, const uint8_t bssid[], 168 const uint8_t mac[]); 169 static void rsu_vap_delete(struct ieee80211vap *); 170 static void rsu_scan_start(struct ieee80211com *); 171 static void rsu_scan_end(struct ieee80211com *); 172 static void rsu_set_channel(struct ieee80211com *); 173 static void rsu_update_mcast(struct ieee80211com *); 174 static int rsu_alloc_rx_list(struct rsu_softc *); 175 static void rsu_free_rx_list(struct rsu_softc *); 176 static int rsu_alloc_tx_list(struct rsu_softc *); 177 static void rsu_free_tx_list(struct rsu_softc *); 178 static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 179 static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 180 static struct rsu_data *rsu_getbuf(struct rsu_softc *); 181 static void rsu_freebuf(struct rsu_softc *, struct rsu_data *); 182 static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 183 int); 184 static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 185 static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 186 static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 187 static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 188 int); 189 static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 190 static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 191 static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 192 static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 193 static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 194 static int rsu_read_rom(struct rsu_softc *); 195 static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 196 static void rsu_calib_task(void *, int); 197 static void rsu_tx_task(void *, int); 198 static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 199 #ifdef notyet 200 static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 201 static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 202 #endif 203 static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 204 static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 205 static int rsu_disconnect(struct rsu_softc *); 206 static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 207 static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 208 static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 209 static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 210 static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 211 static struct mbuf * 212 rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *); 213 static struct mbuf * 214 rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *); 215 static struct mbuf * 216 rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *); 217 static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 218 static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 219 const struct ieee80211_bpf_params *); 220 static void rsu_init(struct rsu_softc *); 221 static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 222 struct mbuf *, struct rsu_data *); 223 static int rsu_transmit(struct ieee80211com *, struct mbuf *); 224 static void rsu_start(struct rsu_softc *); 225 static void _rsu_start(struct rsu_softc *); 226 static void rsu_parent(struct ieee80211com *); 227 static void rsu_stop(struct rsu_softc *); 228 static void rsu_ms_delay(struct rsu_softc *, int); 229 230 static device_method_t rsu_methods[] = { 231 DEVMETHOD(device_probe, rsu_match), 232 DEVMETHOD(device_attach, rsu_attach), 233 DEVMETHOD(device_detach, rsu_detach), 234 235 DEVMETHOD_END 236 }; 237 238 static driver_t rsu_driver = { 239 .name = "rsu", 240 .methods = rsu_methods, 241 .size = sizeof(struct rsu_softc) 242 }; 243 244 static devclass_t rsu_devclass; 245 246 DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 247 MODULE_DEPEND(rsu, wlan, 1, 1, 1); 248 MODULE_DEPEND(rsu, usb, 1, 1, 1); 249 MODULE_DEPEND(rsu, firmware, 1, 1, 1); 250 MODULE_VERSION(rsu, 1); 251 252 static uint8_t rsu_wme_ac_xfer_map[4] = { 253 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 254 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 255 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 256 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 257 }; 258 259 /* XXX hard-coded */ 260 #define RSU_H2C_ENDPOINT 3 261 262 static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 263 [RSU_BULK_RX] = { 264 .type = UE_BULK, 265 .endpoint = UE_ADDR_ANY, 266 .direction = UE_DIR_IN, 267 .bufsize = RSU_RXBUFSZ, 268 .flags = { 269 .pipe_bof = 1, 270 .short_xfer_ok = 1 271 }, 272 .callback = rsu_bulk_rx_callback 273 }, 274 [RSU_BULK_TX_BE_BK] = { 275 .type = UE_BULK, 276 .endpoint = 0x06, 277 .direction = UE_DIR_OUT, 278 .bufsize = RSU_TXBUFSZ, 279 .flags = { 280 .ext_buffer = 1, 281 .pipe_bof = 1, 282 .force_short_xfer = 1 283 }, 284 .callback = rsu_bulk_tx_callback_be_bk, 285 .timeout = RSU_TX_TIMEOUT 286 }, 287 [RSU_BULK_TX_VI_VO] = { 288 .type = UE_BULK, 289 .endpoint = 0x04, 290 .direction = UE_DIR_OUT, 291 .bufsize = RSU_TXBUFSZ, 292 .flags = { 293 .ext_buffer = 1, 294 .pipe_bof = 1, 295 .force_short_xfer = 1 296 }, 297 .callback = rsu_bulk_tx_callback_vi_vo, 298 .timeout = RSU_TX_TIMEOUT 299 }, 300 [RSU_BULK_TX_H2C] = { 301 .type = UE_BULK, 302 .endpoint = 0x0d, 303 .direction = UE_DIR_OUT, 304 .bufsize = RSU_TXBUFSZ, 305 .flags = { 306 .ext_buffer = 1, 307 .pipe_bof = 1, 308 .short_xfer_ok = 1 309 }, 310 .callback = rsu_bulk_tx_callback_h2c, 311 .timeout = RSU_TX_TIMEOUT 312 }, 313 }; 314 315 static int 316 rsu_match(device_t self) 317 { 318 struct usb_attach_arg *uaa = device_get_ivars(self); 319 320 if (uaa->usb_mode != USB_MODE_HOST || 321 uaa->info.bIfaceIndex != 0 || 322 uaa->info.bConfigIndex != 0) 323 return (ENXIO); 324 325 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 326 } 327 328 static int 329 rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg) 330 { 331 332 return (ENOTSUP); 333 } 334 335 static void 336 rsu_update_chw(struct ieee80211com *ic) 337 { 338 339 } 340 341 /* 342 * notification from net80211 that it'd like to do A-MPDU on the given TID. 343 * 344 * Note: this actually hangs traffic at the present moment, so don't use it. 345 * The firmware debug does indiciate it's sending and establishing a TX AMPDU 346 * session, but then no traffic flows. 347 */ 348 static int 349 rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 350 { 351 #if 0 352 struct rsu_softc *sc = ni->ni_ic->ic_softc; 353 struct r92s_add_ba_req req; 354 355 /* Don't enable if it's requested or running */ 356 if (IEEE80211_AMPDU_REQUESTED(tap)) 357 return (0); 358 if (IEEE80211_AMPDU_RUNNING(tap)) 359 return (0); 360 361 /* We've decided to send addba; so send it */ 362 req.tid = htole32(tap->txa_tid); 363 364 /* Attempt net80211 state */ 365 if (ieee80211_ampdu_tx_request_ext(ni, tap->txa_tid) != 1) 366 return (0); 367 368 /* Send the firmware command */ 369 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: establishing AMPDU TX for TID %d\n", 370 __func__, 371 tap->txa_tid); 372 373 RSU_LOCK(sc); 374 if (rsu_fw_cmd(sc, R92S_CMD_ADDBA_REQ, &req, sizeof(req)) != 1) { 375 RSU_UNLOCK(sc); 376 /* Mark failure */ 377 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 0); 378 return (0); 379 } 380 RSU_UNLOCK(sc); 381 382 /* Mark success; we don't get any further notifications */ 383 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 1); 384 #endif 385 /* Return 0, we're driving this ourselves */ 386 return (0); 387 } 388 389 static int 390 rsu_wme_update(struct ieee80211com *ic) 391 { 392 393 /* Firmware handles this; not our problem */ 394 return (0); 395 } 396 397 static int 398 rsu_attach(device_t self) 399 { 400 struct usb_attach_arg *uaa = device_get_ivars(self); 401 struct rsu_softc *sc = device_get_softc(self); 402 struct ieee80211com *ic = &sc->sc_ic; 403 int error; 404 uint8_t iface_index, bands; 405 struct usb_interface *iface; 406 const char *rft; 407 408 device_set_usb_desc(self); 409 sc->sc_udev = uaa->device; 410 sc->sc_dev = self; 411 if (rsu_enable_11n) 412 sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED); 413 414 /* Get number of endpoints */ 415 iface = usbd_get_iface(sc->sc_udev, 0); 416 sc->sc_nendpoints = iface->idesc->bNumEndpoints; 417 418 /* Endpoints are hard-coded for now, so enforce 4-endpoint only */ 419 if (sc->sc_nendpoints != 4) { 420 device_printf(sc->sc_dev, 421 "the driver currently only supports 4-endpoint devices\n"); 422 return (ENXIO); 423 } 424 425 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 426 MTX_DEF); 427 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 428 rsu_calib_task, sc); 429 TASK_INIT(&sc->tx_task, 0, rsu_tx_task, sc); 430 mbufq_init(&sc->sc_snd, ifqmaxlen); 431 432 /* Allocate Tx/Rx buffers. */ 433 error = rsu_alloc_rx_list(sc); 434 if (error != 0) { 435 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 436 goto fail_usb; 437 } 438 439 error = rsu_alloc_tx_list(sc); 440 if (error != 0) { 441 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 442 rsu_free_rx_list(sc); 443 goto fail_usb; 444 } 445 446 iface_index = 0; 447 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 448 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 449 if (error) { 450 device_printf(sc->sc_dev, 451 "could not allocate USB transfers, err=%s\n", 452 usbd_errstr(error)); 453 goto fail_usb; 454 } 455 RSU_LOCK(sc); 456 /* Read chip revision. */ 457 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 458 if (sc->cut != 3) 459 sc->cut = (sc->cut >> 1) + 1; 460 error = rsu_read_rom(sc); 461 RSU_UNLOCK(sc); 462 if (error != 0) { 463 device_printf(self, "could not read ROM\n"); 464 goto fail_rom; 465 } 466 467 /* Figure out TX/RX streams */ 468 switch (sc->rom[84]) { 469 case 0x0: 470 sc->sc_rftype = RTL8712_RFCONFIG_1T1R; 471 sc->sc_nrxstream = 1; 472 sc->sc_ntxstream = 1; 473 rft = "1T1R"; 474 break; 475 case 0x1: 476 sc->sc_rftype = RTL8712_RFCONFIG_1T2R; 477 sc->sc_nrxstream = 2; 478 sc->sc_ntxstream = 1; 479 rft = "1T2R"; 480 break; 481 case 0x2: 482 sc->sc_rftype = RTL8712_RFCONFIG_2T2R; 483 sc->sc_nrxstream = 2; 484 sc->sc_ntxstream = 2; 485 rft = "2T2R"; 486 break; 487 default: 488 device_printf(sc->sc_dev, 489 "%s: unknown board type (rfconfig=0x%02x)\n", 490 __func__, 491 sc->rom[84]); 492 goto fail_rom; 493 } 494 495 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]); 496 device_printf(self, "MAC/BB RTL8712 cut %d %s\n", sc->cut, rft); 497 498 ic->ic_softc = sc; 499 ic->ic_name = device_get_nameunit(self); 500 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 501 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 502 503 /* Set device capabilities. */ 504 ic->ic_caps = 505 IEEE80211_C_STA | /* station mode */ 506 #if 0 507 IEEE80211_C_BGSCAN | /* Background scan. */ 508 #endif 509 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 510 IEEE80211_C_WME | /* WME/QoS */ 511 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 512 IEEE80211_C_WPA; /* WPA/RSN. */ 513 514 /* Check if HT support is present. */ 515 if (sc->sc_ht) { 516 device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__); 517 518 /* Enable basic HT */ 519 ic->ic_htcaps = IEEE80211_HTC_HT | 520 IEEE80211_HTC_AMPDU | 521 IEEE80211_HTC_AMSDU | 522 IEEE80211_HTCAP_MAXAMSDU_3839 | 523 IEEE80211_HTCAP_SMPS_OFF; 524 ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 525 526 /* set number of spatial streams */ 527 ic->ic_txstream = sc->sc_ntxstream; 528 ic->ic_rxstream = sc->sc_nrxstream; 529 } 530 531 /* Set supported .11b and .11g rates. */ 532 bands = 0; 533 setbit(&bands, IEEE80211_MODE_11B); 534 setbit(&bands, IEEE80211_MODE_11G); 535 if (sc->sc_ht) 536 setbit(&bands, IEEE80211_MODE_11NG); 537 ieee80211_init_channels(ic, NULL, &bands); 538 539 ieee80211_ifattach(ic); 540 ic->ic_raw_xmit = rsu_raw_xmit; 541 ic->ic_scan_start = rsu_scan_start; 542 ic->ic_scan_end = rsu_scan_end; 543 ic->ic_set_channel = rsu_set_channel; 544 ic->ic_vap_create = rsu_vap_create; 545 ic->ic_vap_delete = rsu_vap_delete; 546 ic->ic_update_mcast = rsu_update_mcast; 547 ic->ic_parent = rsu_parent; 548 ic->ic_transmit = rsu_transmit; 549 ic->ic_send_mgmt = rsu_send_mgmt; 550 ic->ic_update_chw = rsu_update_chw; 551 ic->ic_ampdu_enable = rsu_ampdu_enable; 552 ic->ic_wme.wme_update = rsu_wme_update; 553 554 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 555 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 556 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 557 RSU_RX_RADIOTAP_PRESENT); 558 559 if (bootverbose) 560 ieee80211_announce(ic); 561 562 return (0); 563 564 fail_rom: 565 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 566 fail_usb: 567 mtx_destroy(&sc->sc_mtx); 568 return (ENXIO); 569 } 570 571 static int 572 rsu_detach(device_t self) 573 { 574 struct rsu_softc *sc = device_get_softc(self); 575 struct ieee80211com *ic = &sc->sc_ic; 576 577 RSU_LOCK(sc); 578 rsu_stop(sc); 579 RSU_UNLOCK(sc); 580 581 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 582 583 /* 584 * Free buffers /before/ we detach from net80211, else node 585 * references to destroyed vaps will lead to a panic. 586 */ 587 /* Free Tx/Rx buffers. */ 588 RSU_LOCK(sc); 589 rsu_free_tx_list(sc); 590 rsu_free_rx_list(sc); 591 RSU_UNLOCK(sc); 592 593 /* Frames are freed; detach from net80211 */ 594 ieee80211_ifdetach(ic); 595 596 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 597 taskqueue_drain(taskqueue_thread, &sc->tx_task); 598 599 mtx_destroy(&sc->sc_mtx); 600 601 return (0); 602 } 603 604 static usb_error_t 605 rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 606 void *data) 607 { 608 usb_error_t err; 609 int ntries = 10; 610 611 RSU_ASSERT_LOCKED(sc); 612 613 while (ntries--) { 614 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 615 req, data, 0, NULL, 250 /* ms */); 616 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 617 break; 618 DPRINTFN(1, "Control request failed, %s (retrying)\n", 619 usbd_errstr(err)); 620 rsu_ms_delay(sc, 10); 621 } 622 623 return (err); 624 } 625 626 static struct ieee80211vap * 627 rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 628 enum ieee80211_opmode opmode, int flags, 629 const uint8_t bssid[IEEE80211_ADDR_LEN], 630 const uint8_t mac[IEEE80211_ADDR_LEN]) 631 { 632 struct rsu_vap *uvp; 633 struct ieee80211vap *vap; 634 635 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 636 return (NULL); 637 638 uvp = malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO); 639 vap = &uvp->vap; 640 641 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 642 flags, bssid) != 0) { 643 /* out of memory */ 644 free(uvp, M_80211_VAP); 645 return (NULL); 646 } 647 648 /* override state transition machine */ 649 uvp->newstate = vap->iv_newstate; 650 vap->iv_newstate = rsu_newstate; 651 652 /* Limits from the r92su driver */ 653 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 654 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K; 655 656 /* complete setup */ 657 ieee80211_vap_attach(vap, ieee80211_media_change, 658 ieee80211_media_status, mac); 659 ic->ic_opmode = opmode; 660 661 return (vap); 662 } 663 664 static void 665 rsu_vap_delete(struct ieee80211vap *vap) 666 { 667 struct rsu_vap *uvp = RSU_VAP(vap); 668 669 ieee80211_vap_detach(vap); 670 free(uvp, M_80211_VAP); 671 } 672 673 static void 674 rsu_scan_start(struct ieee80211com *ic) 675 { 676 struct rsu_softc *sc = ic->ic_softc; 677 int error; 678 679 /* Scanning is done by the firmware. */ 680 RSU_LOCK(sc); 681 /* XXX TODO: force awake if in in network-sleep? */ 682 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 683 RSU_UNLOCK(sc); 684 if (error != 0) 685 device_printf(sc->sc_dev, 686 "could not send site survey command\n"); 687 } 688 689 static void 690 rsu_scan_end(struct ieee80211com *ic) 691 { 692 /* Nothing to do here. */ 693 } 694 695 static void 696 rsu_set_channel(struct ieee80211com *ic __unused) 697 { 698 /* We are unable to switch channels, yet. */ 699 } 700 701 static void 702 rsu_update_mcast(struct ieee80211com *ic) 703 { 704 /* XXX do nothing? */ 705 } 706 707 static int 708 rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 709 int ndata, int maxsz) 710 { 711 int i, error; 712 713 for (i = 0; i < ndata; i++) { 714 struct rsu_data *dp = &data[i]; 715 dp->sc = sc; 716 dp->m = NULL; 717 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 718 if (dp->buf == NULL) { 719 device_printf(sc->sc_dev, 720 "could not allocate buffer\n"); 721 error = ENOMEM; 722 goto fail; 723 } 724 dp->ni = NULL; 725 } 726 727 return (0); 728 fail: 729 rsu_free_list(sc, data, ndata); 730 return (error); 731 } 732 733 static int 734 rsu_alloc_rx_list(struct rsu_softc *sc) 735 { 736 int error, i; 737 738 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 739 RSU_RXBUFSZ); 740 if (error != 0) 741 return (error); 742 743 STAILQ_INIT(&sc->sc_rx_active); 744 STAILQ_INIT(&sc->sc_rx_inactive); 745 746 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 747 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 748 749 return (0); 750 } 751 752 static int 753 rsu_alloc_tx_list(struct rsu_softc *sc) 754 { 755 int error, i; 756 757 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 758 RSU_TXBUFSZ); 759 if (error != 0) 760 return (error); 761 762 STAILQ_INIT(&sc->sc_tx_inactive); 763 764 for (i = 0; i != RSU_N_TRANSFER; i++) { 765 STAILQ_INIT(&sc->sc_tx_active[i]); 766 STAILQ_INIT(&sc->sc_tx_pending[i]); 767 } 768 769 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 770 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 771 } 772 773 return (0); 774 } 775 776 static void 777 rsu_free_tx_list(struct rsu_softc *sc) 778 { 779 int i; 780 781 /* prevent further allocations from TX list(s) */ 782 STAILQ_INIT(&sc->sc_tx_inactive); 783 784 for (i = 0; i != RSU_N_TRANSFER; i++) { 785 STAILQ_INIT(&sc->sc_tx_active[i]); 786 STAILQ_INIT(&sc->sc_tx_pending[i]); 787 } 788 789 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 790 } 791 792 static void 793 rsu_free_rx_list(struct rsu_softc *sc) 794 { 795 /* prevent further allocations from RX list(s) */ 796 STAILQ_INIT(&sc->sc_rx_inactive); 797 STAILQ_INIT(&sc->sc_rx_active); 798 799 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 800 } 801 802 static void 803 rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 804 { 805 int i; 806 807 for (i = 0; i < ndata; i++) { 808 struct rsu_data *dp = &data[i]; 809 810 if (dp->buf != NULL) { 811 free(dp->buf, M_USBDEV); 812 dp->buf = NULL; 813 } 814 if (dp->ni != NULL) { 815 ieee80211_free_node(dp->ni); 816 dp->ni = NULL; 817 } 818 } 819 } 820 821 static struct rsu_data * 822 _rsu_getbuf(struct rsu_softc *sc) 823 { 824 struct rsu_data *bf; 825 826 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 827 if (bf != NULL) 828 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 829 else 830 bf = NULL; 831 return (bf); 832 } 833 834 static struct rsu_data * 835 rsu_getbuf(struct rsu_softc *sc) 836 { 837 struct rsu_data *bf; 838 839 RSU_ASSERT_LOCKED(sc); 840 841 bf = _rsu_getbuf(sc); 842 if (bf == NULL) { 843 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: no buffers\n", __func__); 844 } 845 return (bf); 846 } 847 848 static void 849 rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf) 850 { 851 852 RSU_ASSERT_LOCKED(sc); 853 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next); 854 } 855 856 static int 857 rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 858 int len) 859 { 860 usb_device_request_t req; 861 862 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 863 req.bRequest = R92S_REQ_REGS; 864 USETW(req.wValue, addr); 865 USETW(req.wIndex, 0); 866 USETW(req.wLength, len); 867 868 return (rsu_do_request(sc, &req, buf)); 869 } 870 871 static void 872 rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 873 { 874 rsu_write_region_1(sc, addr, &val, 1); 875 } 876 877 static void 878 rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 879 { 880 val = htole16(val); 881 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 882 } 883 884 static void 885 rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 886 { 887 val = htole32(val); 888 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 889 } 890 891 static int 892 rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 893 int len) 894 { 895 usb_device_request_t req; 896 897 req.bmRequestType = UT_READ_VENDOR_DEVICE; 898 req.bRequest = R92S_REQ_REGS; 899 USETW(req.wValue, addr); 900 USETW(req.wIndex, 0); 901 USETW(req.wLength, len); 902 903 return (rsu_do_request(sc, &req, buf)); 904 } 905 906 static uint8_t 907 rsu_read_1(struct rsu_softc *sc, uint16_t addr) 908 { 909 uint8_t val; 910 911 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 912 return (0xff); 913 return (val); 914 } 915 916 static uint16_t 917 rsu_read_2(struct rsu_softc *sc, uint16_t addr) 918 { 919 uint16_t val; 920 921 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 922 return (0xffff); 923 return (le16toh(val)); 924 } 925 926 static uint32_t 927 rsu_read_4(struct rsu_softc *sc, uint16_t addr) 928 { 929 uint32_t val; 930 931 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 932 return (0xffffffff); 933 return (le32toh(val)); 934 } 935 936 static int 937 rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 938 { 939 int ntries; 940 941 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 942 rsu_ms_delay(sc, 1); 943 for (ntries = 0; ntries < 50; ntries++) { 944 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 945 return (0); 946 rsu_ms_delay(sc, 1); 947 } 948 return (ETIMEDOUT); 949 } 950 951 static uint8_t 952 rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 953 { 954 uint32_t reg; 955 int ntries; 956 957 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 958 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 959 reg &= ~R92S_EFUSE_CTRL_VALID; 960 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 961 /* Wait for read operation to complete. */ 962 for (ntries = 0; ntries < 100; ntries++) { 963 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 964 if (reg & R92S_EFUSE_CTRL_VALID) 965 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 966 rsu_ms_delay(sc, 1); 967 } 968 device_printf(sc->sc_dev, 969 "could not read efuse byte at address 0x%x\n", addr); 970 return (0xff); 971 } 972 973 static int 974 rsu_read_rom(struct rsu_softc *sc) 975 { 976 uint8_t *rom = sc->rom; 977 uint16_t addr = 0; 978 uint32_t reg; 979 uint8_t off, msk; 980 int i; 981 982 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 983 reg = rsu_read_1(sc, R92S_EE_9346CR); 984 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 985 return (EIO); 986 987 /* Turn on 2.5V to prevent eFuse leakage. */ 988 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 989 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 990 rsu_ms_delay(sc, 1); 991 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 992 993 /* Read full ROM image. */ 994 memset(&sc->rom, 0xff, sizeof(sc->rom)); 995 while (addr < 512) { 996 reg = rsu_efuse_read_1(sc, addr); 997 if (reg == 0xff) 998 break; 999 addr++; 1000 off = reg >> 4; 1001 msk = reg & 0xf; 1002 for (i = 0; i < 4; i++) { 1003 if (msk & (1 << i)) 1004 continue; 1005 rom[off * 8 + i * 2 + 0] = 1006 rsu_efuse_read_1(sc, addr); 1007 addr++; 1008 rom[off * 8 + i * 2 + 1] = 1009 rsu_efuse_read_1(sc, addr); 1010 addr++; 1011 } 1012 } 1013 #ifdef USB_DEBUG 1014 if (rsu_debug >= 5) { 1015 /* Dump ROM content. */ 1016 printf("\n"); 1017 for (i = 0; i < sizeof(sc->rom); i++) 1018 printf("%02x:", rom[i]); 1019 printf("\n"); 1020 } 1021 #endif 1022 return (0); 1023 } 1024 1025 static int 1026 rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 1027 { 1028 const uint8_t which = RSU_H2C_ENDPOINT; 1029 struct rsu_data *data; 1030 struct r92s_tx_desc *txd; 1031 struct r92s_fw_cmd_hdr *cmd; 1032 int cmdsz; 1033 int xferlen; 1034 1035 RSU_ASSERT_LOCKED(sc); 1036 1037 data = rsu_getbuf(sc); 1038 if (data == NULL) 1039 return (ENOMEM); 1040 1041 /* Blank the entire payload, just to be safe */ 1042 memset(data->buf, '\0', RSU_TXBUFSZ); 1043 1044 /* Round-up command length to a multiple of 8 bytes. */ 1045 /* XXX TODO: is this required? */ 1046 cmdsz = (len + 7) & ~7; 1047 1048 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 1049 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 1050 memset(data->buf, 0, xferlen); 1051 1052 /* Setup Tx descriptor. */ 1053 txd = (struct r92s_tx_desc *)data->buf; 1054 txd->txdw0 = htole32( 1055 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1056 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 1057 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1058 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 1059 1060 /* Setup command header. */ 1061 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 1062 cmd->len = htole16(cmdsz); 1063 cmd->code = code; 1064 cmd->seq = sc->cmd_seq; 1065 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 1066 1067 /* Copy command payload. */ 1068 memcpy(&cmd[1], buf, len); 1069 1070 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD, 1071 "%s: Tx cmd code=0x%x len=0x%x\n", 1072 __func__, code, cmdsz); 1073 data->buflen = xferlen; 1074 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1075 usbd_transfer_start(sc->sc_xfer[which]); 1076 1077 return (0); 1078 } 1079 1080 /* ARGSUSED */ 1081 static void 1082 rsu_calib_task(void *arg, int pending __unused) 1083 { 1084 struct rsu_softc *sc = arg; 1085 uint32_t reg; 1086 1087 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n", 1088 __func__); 1089 1090 RSU_LOCK(sc); 1091 #ifdef notyet 1092 /* Read WPS PBC status. */ 1093 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 1094 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 1095 rsu_write_1(sc, R92S_GPIO_IO_SEL, 1096 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 1097 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 1098 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 1099 DPRINTF(("WPS PBC is pushed\n")); 1100 #endif 1101 /* Read current signal level. */ 1102 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 1103 reg = rsu_read_4(sc, R92S_IOCMD_DATA); 1104 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d%%\n", 1105 __func__, reg >> 4); 1106 } 1107 if (sc->sc_calibrating) 1108 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1109 RSU_UNLOCK(sc); 1110 } 1111 1112 static void 1113 rsu_tx_task(void *arg, int pending __unused) 1114 { 1115 struct rsu_softc *sc = arg; 1116 1117 RSU_LOCK(sc); 1118 _rsu_start(sc); 1119 RSU_UNLOCK(sc); 1120 } 1121 1122 #define RSU_PWR_UNKNOWN 0x0 1123 #define RSU_PWR_ACTIVE 0x1 1124 #define RSU_PWR_OFF 0x2 1125 #define RSU_PWR_SLEEP 0x3 1126 1127 /* 1128 * Set the current power state. 1129 * 1130 * The rtlwifi code doesn't do this so aggressively; it 1131 * waits for an idle period after association with 1132 * no traffic before doing this. 1133 * 1134 * For now - it's on in all states except RUN, and 1135 * in RUN it'll transition to allow sleep. 1136 */ 1137 1138 struct r92s_pwr_cmd { 1139 uint8_t mode; 1140 uint8_t smart_ps; 1141 uint8_t bcn_pass_time; 1142 }; 1143 1144 static int 1145 rsu_set_fw_power_state(struct rsu_softc *sc, int state) 1146 { 1147 struct r92s_set_pwr_mode cmd; 1148 //struct r92s_pwr_cmd cmd; 1149 int error; 1150 1151 RSU_ASSERT_LOCKED(sc); 1152 1153 /* only change state if required */ 1154 if (sc->sc_curpwrstate == state) 1155 return (0); 1156 1157 memset(&cmd, 0, sizeof(cmd)); 1158 1159 switch (state) { 1160 case RSU_PWR_ACTIVE: 1161 /* Force the hardware awake */ 1162 rsu_write_1(sc, R92S_USB_HRPWM, 1163 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 1164 cmd.mode = R92S_PS_MODE_ACTIVE; 1165 break; 1166 case RSU_PWR_SLEEP: 1167 cmd.mode = R92S_PS_MODE_DTIM; /* XXX configurable? */ 1168 cmd.smart_ps = 1; /* XXX 2 if doing p2p */ 1169 cmd.bcn_pass_time = 5; /* in 100mS usb.c, linux/rtlwifi */ 1170 break; 1171 case RSU_PWR_OFF: 1172 cmd.mode = R92S_PS_MODE_RADIOOFF; 1173 break; 1174 default: 1175 device_printf(sc->sc_dev, "%s: unknown ps mode (%d)\n", 1176 __func__, 1177 state); 1178 return (ENXIO); 1179 } 1180 1181 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1182 "%s: setting ps mode to %d (mode %d)\n", 1183 __func__, state, cmd.mode); 1184 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 1185 if (error == 0) 1186 sc->sc_curpwrstate = state; 1187 1188 return (error); 1189 } 1190 1191 static int 1192 rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1193 { 1194 struct rsu_vap *uvp = RSU_VAP(vap); 1195 struct ieee80211com *ic = vap->iv_ic; 1196 struct rsu_softc *sc = ic->ic_softc; 1197 struct ieee80211_node *ni; 1198 struct ieee80211_rateset *rs; 1199 enum ieee80211_state ostate; 1200 int error, startcal = 0; 1201 1202 ostate = vap->iv_state; 1203 RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n", 1204 __func__, 1205 ieee80211_state_name[ostate], 1206 ieee80211_state_name[nstate]); 1207 1208 IEEE80211_UNLOCK(ic); 1209 if (ostate == IEEE80211_S_RUN) { 1210 RSU_LOCK(sc); 1211 /* Stop calibration. */ 1212 sc->sc_calibrating = 0; 1213 RSU_UNLOCK(sc); 1214 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 1215 taskqueue_drain(taskqueue_thread, &sc->tx_task); 1216 /* Disassociate from our current BSS. */ 1217 RSU_LOCK(sc); 1218 rsu_disconnect(sc); 1219 } else 1220 RSU_LOCK(sc); 1221 switch (nstate) { 1222 case IEEE80211_S_INIT: 1223 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1224 break; 1225 case IEEE80211_S_AUTH: 1226 ni = ieee80211_ref_node(vap->iv_bss); 1227 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1228 error = rsu_join_bss(sc, ni); 1229 ieee80211_free_node(ni); 1230 if (error != 0) { 1231 device_printf(sc->sc_dev, 1232 "could not send join command\n"); 1233 } 1234 break; 1235 case IEEE80211_S_RUN: 1236 ni = ieee80211_ref_node(vap->iv_bss); 1237 rs = &ni->ni_rates; 1238 /* Indicate highest supported rate. */ 1239 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1240 (void) rsu_set_fw_power_state(sc, RSU_PWR_SLEEP); 1241 ieee80211_free_node(ni); 1242 startcal = 1; 1243 break; 1244 default: 1245 break; 1246 } 1247 sc->sc_calibrating = 1; 1248 /* Start periodic calibration. */ 1249 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1250 RSU_UNLOCK(sc); 1251 IEEE80211_LOCK(ic); 1252 return (uvp->newstate(vap, nstate, arg)); 1253 } 1254 1255 #ifdef notyet 1256 static void 1257 rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1258 { 1259 struct r92s_fw_cmd_set_key key; 1260 1261 memset(&key, 0, sizeof(key)); 1262 /* Map net80211 cipher to HW crypto algorithm. */ 1263 switch (k->wk_cipher->ic_cipher) { 1264 case IEEE80211_CIPHER_WEP: 1265 if (k->wk_keylen < 8) 1266 key.algo = R92S_KEY_ALGO_WEP40; 1267 else 1268 key.algo = R92S_KEY_ALGO_WEP104; 1269 break; 1270 case IEEE80211_CIPHER_TKIP: 1271 key.algo = R92S_KEY_ALGO_TKIP; 1272 break; 1273 case IEEE80211_CIPHER_AES_CCM: 1274 key.algo = R92S_KEY_ALGO_AES; 1275 break; 1276 default: 1277 return; 1278 } 1279 key.id = k->wk_keyix; 1280 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1281 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1282 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1283 } 1284 1285 static void 1286 rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1287 { 1288 struct r92s_fw_cmd_set_key key; 1289 1290 memset(&key, 0, sizeof(key)); 1291 key.id = k->wk_keyix; 1292 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1293 } 1294 #endif 1295 1296 static int 1297 rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1298 { 1299 struct r92s_fw_cmd_sitesurvey cmd; 1300 struct ieee80211com *ic = &sc->sc_ic; 1301 int r; 1302 1303 RSU_ASSERT_LOCKED(sc); 1304 1305 memset(&cmd, 0, sizeof(cmd)); 1306 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1) 1307 cmd.active = htole32(1); 1308 cmd.limit = htole32(48); 1309 if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) { 1310 /* Do a directed scan for second pass. */ 1311 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1312 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1313 vap->iv_des_ssid[0].len); 1314 1315 } 1316 DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass); 1317 r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd)); 1318 if (r == 0) { 1319 sc->sc_scanning = 1; 1320 } 1321 return (r); 1322 } 1323 1324 static int 1325 rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1326 { 1327 struct ieee80211com *ic = &sc->sc_ic; 1328 struct ieee80211vap *vap = ni->ni_vap; 1329 struct ndis_wlan_bssid_ex *bss; 1330 struct ndis_802_11_fixed_ies *fixed; 1331 struct r92s_fw_cmd_auth auth; 1332 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1333 uint8_t *frm; 1334 uint8_t opmode; 1335 int error; 1336 int cnt; 1337 char *msg = "rsujoin"; 1338 1339 RSU_ASSERT_LOCKED(sc); 1340 1341 /* 1342 * Until net80211 scanning doesn't automatically finish 1343 * before we tell it to, let's just wait until any pending 1344 * scan is done. 1345 * 1346 * XXX TODO: yes, this releases and re-acquires the lock. 1347 * We should re-verify the state whenever we re-attempt this! 1348 */ 1349 cnt = 0; 1350 while (sc->sc_scanning && cnt < 10) { 1351 device_printf(sc->sc_dev, 1352 "%s: still scanning! (attempt %d)\n", 1353 __func__, cnt); 1354 msleep(msg, &sc->sc_mtx, 0, msg, hz / 2); 1355 cnt++; 1356 } 1357 1358 /* Let the FW decide the opmode based on the capinfo field. */ 1359 opmode = NDIS802_11AUTOUNKNOWN; 1360 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1361 "%s: setting operating mode to %d\n", 1362 __func__, opmode); 1363 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1364 if (error != 0) 1365 return (error); 1366 1367 memset(&auth, 0, sizeof(auth)); 1368 if (vap->iv_flags & IEEE80211_F_WPA) { 1369 auth.mode = R92S_AUTHMODE_WPA; 1370 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1371 } else 1372 auth.mode = R92S_AUTHMODE_OPEN; 1373 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1374 "%s: setting auth mode to %d\n", 1375 __func__, auth.mode); 1376 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1377 if (error != 0) 1378 return (error); 1379 1380 memset(buf, 0, sizeof(buf)); 1381 bss = (struct ndis_wlan_bssid_ex *)buf; 1382 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1383 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1384 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1385 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1386 bss->privacy = htole32(1); 1387 bss->rssi = htole32(ni->ni_avgrssi); 1388 if (ic->ic_curmode == IEEE80211_MODE_11B) 1389 bss->networktype = htole32(NDIS802_11DS); 1390 else 1391 bss->networktype = htole32(NDIS802_11OFDM24); 1392 bss->config.len = htole32(sizeof(bss->config)); 1393 bss->config.bintval = htole32(ni->ni_intval); 1394 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1395 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1396 /* XXX verify how this is supposed to look! */ 1397 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1398 ni->ni_rates.rs_nrates); 1399 /* Write the fixed fields of the beacon frame. */ 1400 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1401 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1402 fixed->bintval = htole16(ni->ni_intval); 1403 fixed->capabilities = htole16(ni->ni_capinfo); 1404 /* Write IEs to be included in the association request. */ 1405 frm = (uint8_t *)&fixed[1]; 1406 frm = ieee80211_add_rsn(frm, vap); 1407 frm = ieee80211_add_wpa(frm, vap); 1408 frm = ieee80211_add_qos(frm, ni); 1409 if ((ic->ic_flags & IEEE80211_F_WME) && 1410 (ni->ni_ies.wme_ie != NULL)) 1411 frm = ieee80211_add_wme_info(frm, &ic->ic_wme); 1412 if (ni->ni_flags & IEEE80211_NODE_HT) { 1413 frm = ieee80211_add_htcap(frm, ni); 1414 frm = ieee80211_add_htinfo(frm, ni); 1415 } 1416 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1417 bss->len = htole32(((frm - buf) + 3) & ~3); 1418 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD, 1419 "%s: sending join bss command to %s chan %d\n", 1420 __func__, 1421 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1422 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1423 } 1424 1425 static int 1426 rsu_disconnect(struct rsu_softc *sc) 1427 { 1428 uint32_t zero = 0; /* :-) */ 1429 1430 /* Disassociate from our current BSS. */ 1431 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1432 "%s: sending disconnect command\n", __func__); 1433 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1434 } 1435 1436 static void 1437 rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1438 { 1439 struct ieee80211com *ic = &sc->sc_ic; 1440 struct ieee80211_frame *wh; 1441 struct ndis_wlan_bssid_ex *bss; 1442 struct ieee80211_rx_stats rxs; 1443 struct mbuf *m; 1444 int pktlen; 1445 1446 if (__predict_false(len < sizeof(*bss))) 1447 return; 1448 bss = (struct ndis_wlan_bssid_ex *)buf; 1449 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1450 return; 1451 1452 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1453 "%s: found BSS %s: len=%d chan=%d inframode=%d " 1454 "networktype=%d privacy=%d, RSSI=%d\n", 1455 __func__, 1456 ether_sprintf(bss->macaddr), le32toh(bss->len), 1457 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1458 le32toh(bss->networktype), le32toh(bss->privacy), 1459 le32toh(bss->rssi)); 1460 1461 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1462 /* XXX TODO: just call the new scan API methods! */ 1463 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1464 if (__predict_false(pktlen > MCLBYTES)) 1465 return; 1466 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1467 if (__predict_false(m == NULL)) 1468 return; 1469 wh = mtod(m, struct ieee80211_frame *); 1470 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1471 IEEE80211_FC0_SUBTYPE_BEACON; 1472 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1473 USETW(wh->i_dur, 0); 1474 IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr); 1475 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1476 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1477 *(uint16_t *)wh->i_seq = 0; 1478 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1479 1480 /* Finalize mbuf. */ 1481 m->m_pkthdr.len = m->m_len = pktlen; 1482 1483 /* Set channel flags for input path */ 1484 bzero(&rxs, sizeof(rxs)); 1485 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 1486 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 1487 rxs.c_ieee = le32toh(bss->config.dsconfig); 1488 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 1489 rxs.rssi = le32toh(bss->rssi); 1490 rxs.nf = 0; /* XXX */ 1491 1492 /* XXX avoid a LOR */ 1493 RSU_UNLOCK(sc); 1494 ieee80211_input_mimo_all(ic, m, &rxs); 1495 RSU_LOCK(sc); 1496 } 1497 1498 static void 1499 rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1500 { 1501 struct ieee80211com *ic = &sc->sc_ic; 1502 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1503 struct ieee80211_node *ni = vap->iv_bss; 1504 struct r92s_event_join_bss *rsp; 1505 uint32_t tmp; 1506 int res; 1507 1508 if (__predict_false(len < sizeof(*rsp))) 1509 return; 1510 rsp = (struct r92s_event_join_bss *)buf; 1511 res = (int)le32toh(rsp->join_res); 1512 1513 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1514 "%s: Rx join BSS event len=%d res=%d\n", 1515 __func__, len, res); 1516 1517 /* 1518 * XXX Don't do this; there's likely a better way to tell 1519 * the caller we failed. 1520 */ 1521 if (res <= 0) { 1522 RSU_UNLOCK(sc); 1523 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1524 RSU_LOCK(sc); 1525 return; 1526 } 1527 1528 tmp = le32toh(rsp->associd); 1529 if (tmp >= vap->iv_max_aid) { 1530 DPRINTF("Assoc ID overflow\n"); 1531 tmp = 1; 1532 } 1533 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1534 "%s: associated with %s associd=%d\n", 1535 __func__, ether_sprintf(rsp->bss.macaddr), tmp); 1536 /* XXX is this required? What's the top two bits for again? */ 1537 ni->ni_associd = tmp | 0xc000; 1538 RSU_UNLOCK(sc); 1539 ieee80211_new_state(vap, IEEE80211_S_RUN, 1540 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1541 RSU_LOCK(sc); 1542 } 1543 1544 static void 1545 rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len) 1546 { 1547 struct ieee80211com *ic = &sc->sc_ic; 1548 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1549 struct r92s_add_ba_event *ba = (void *) buf; 1550 struct ieee80211_node *ni; 1551 1552 if (len < sizeof(*ba)) { 1553 device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len); 1554 return; 1555 } 1556 1557 if (vap == NULL) 1558 return; 1559 1560 device_printf(sc->sc_dev, "%s: mac=%s, tid=%d, ssn=%d\n", 1561 __func__, 1562 ether_sprintf(ba->mac_addr), 1563 (int) ba->tid, 1564 (int) le16toh(ba->ssn)); 1565 1566 /* XXX do node lookup; this is STA specific */ 1567 1568 ni = ieee80211_ref_node(vap->iv_bss); 1569 ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32); 1570 ieee80211_free_node(ni); 1571 } 1572 1573 static void 1574 rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1575 { 1576 struct ieee80211com *ic = &sc->sc_ic; 1577 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1578 1579 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1580 "%s: Rx event code=%d len=%d\n", __func__, code, len); 1581 switch (code) { 1582 case R92S_EVT_SURVEY: 1583 rsu_event_survey(sc, buf, len); 1584 break; 1585 case R92S_EVT_SURVEY_DONE: 1586 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1587 "%s: site survey pass %d done, found %d BSS\n", 1588 __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf)); 1589 sc->sc_scanning = 0; 1590 if (vap->iv_state != IEEE80211_S_SCAN) 1591 break; /* Ignore if not scanning. */ 1592 1593 /* 1594 * XXX TODO: This needs to be done without a transition to 1595 * the SCAN state again. Grr. 1596 */ 1597 if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) { 1598 /* Schedule a directed scan for hidden APs. */ 1599 /* XXX bad! */ 1600 sc->sc_scan_pass = 1; 1601 RSU_UNLOCK(sc); 1602 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1603 RSU_LOCK(sc); 1604 break; 1605 } 1606 sc->sc_scan_pass = 0; 1607 break; 1608 case R92S_EVT_JOIN_BSS: 1609 if (vap->iv_state == IEEE80211_S_AUTH) 1610 rsu_event_join_bss(sc, buf, len); 1611 break; 1612 case R92S_EVT_DEL_STA: 1613 RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE, 1614 "%s: disassociated from %s\n", __func__, 1615 ether_sprintf(buf)); 1616 if (vap->iv_state == IEEE80211_S_RUN && 1617 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1618 RSU_UNLOCK(sc); 1619 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1620 RSU_LOCK(sc); 1621 } 1622 break; 1623 case R92S_EVT_WPS_PBC: 1624 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1625 "%s: WPS PBC pushed.\n", __func__); 1626 break; 1627 case R92S_EVT_FWDBG: 1628 buf[60] = '\0'; 1629 RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf); 1630 break; 1631 case R92S_EVT_ADDBA_REQ_REPORT: 1632 rsu_event_addba_req_report(sc, buf, len); 1633 break; 1634 default: 1635 device_printf(sc->sc_dev, "%s: unhandled code (%d)\n", __func__, code); 1636 break; 1637 } 1638 } 1639 1640 static void 1641 rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1642 { 1643 struct r92s_fw_cmd_hdr *cmd; 1644 int cmdsz; 1645 1646 RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len); 1647 1648 /* Skip Rx status. */ 1649 buf += sizeof(struct r92s_rx_stat); 1650 len -= sizeof(struct r92s_rx_stat); 1651 1652 /* Process all events. */ 1653 for (;;) { 1654 /* Check that command header fits. */ 1655 if (__predict_false(len < sizeof(*cmd))) 1656 break; 1657 cmd = (struct r92s_fw_cmd_hdr *)buf; 1658 /* Check that command payload fits. */ 1659 cmdsz = le16toh(cmd->len); 1660 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1661 break; 1662 1663 /* Process firmware event. */ 1664 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1665 1666 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1667 break; 1668 buf += sizeof(*cmd) + cmdsz; 1669 len -= sizeof(*cmd) + cmdsz; 1670 } 1671 } 1672 1673 static int8_t 1674 rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1675 { 1676 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1677 struct r92s_rx_phystat *phy; 1678 struct r92s_rx_cck *cck; 1679 uint8_t rpt; 1680 int8_t rssi; 1681 1682 if (rate <= 3) { 1683 cck = (struct r92s_rx_cck *)physt; 1684 rpt = (cck->agc_rpt >> 6) & 0x3; 1685 rssi = cck->agc_rpt & 0x3e; 1686 rssi = cckoff[rpt] - rssi; 1687 } else { /* OFDM/HT. */ 1688 phy = (struct r92s_rx_phystat *)physt; 1689 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1690 } 1691 return (rssi); 1692 } 1693 1694 static struct mbuf * 1695 rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi) 1696 { 1697 struct ieee80211com *ic = &sc->sc_ic; 1698 struct ieee80211_frame *wh; 1699 struct r92s_rx_stat *stat; 1700 uint32_t rxdw0, rxdw3; 1701 struct mbuf *m; 1702 uint8_t rate; 1703 int infosz; 1704 1705 stat = (struct r92s_rx_stat *)buf; 1706 rxdw0 = le32toh(stat->rxdw0); 1707 rxdw3 = le32toh(stat->rxdw3); 1708 1709 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1710 counter_u64_add(ic->ic_ierrors, 1); 1711 return NULL; 1712 } 1713 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1714 counter_u64_add(ic->ic_ierrors, 1); 1715 return NULL; 1716 } 1717 1718 rate = MS(rxdw3, R92S_RXDW3_RATE); 1719 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1720 1721 /* Get RSSI from PHY status descriptor if present. */ 1722 if (infosz != 0) 1723 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1724 else 1725 *rssi = 0; 1726 1727 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1728 "%s: Rx frame len=%d rate=%d infosz=%d rssi=%d\n", 1729 __func__, 1730 pktlen, rate, infosz, *rssi); 1731 1732 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1733 if (__predict_false(m == NULL)) { 1734 counter_u64_add(ic->ic_ierrors, 1); 1735 return NULL; 1736 } 1737 /* Hardware does Rx TCP checksum offload. */ 1738 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1739 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1740 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1741 } 1742 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1743 memcpy(mtod(m, uint8_t *), wh, pktlen); 1744 m->m_pkthdr.len = m->m_len = pktlen; 1745 1746 if (ieee80211_radiotap_active(ic)) { 1747 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1748 1749 /* Map HW rate index to 802.11 rate. */ 1750 tap->wr_flags = 2; 1751 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1752 switch (rate) { 1753 /* CCK. */ 1754 case 0: tap->wr_rate = 2; break; 1755 case 1: tap->wr_rate = 4; break; 1756 case 2: tap->wr_rate = 11; break; 1757 case 3: tap->wr_rate = 22; break; 1758 /* OFDM. */ 1759 case 4: tap->wr_rate = 12; break; 1760 case 5: tap->wr_rate = 18; break; 1761 case 6: tap->wr_rate = 24; break; 1762 case 7: tap->wr_rate = 36; break; 1763 case 8: tap->wr_rate = 48; break; 1764 case 9: tap->wr_rate = 72; break; 1765 case 10: tap->wr_rate = 96; break; 1766 case 11: tap->wr_rate = 108; break; 1767 } 1768 } else if (rate >= 12) { /* MCS0~15. */ 1769 /* Bit 7 set means HT MCS instead of rate. */ 1770 tap->wr_rate = 0x80 | (rate - 12); 1771 } 1772 tap->wr_dbm_antsignal = *rssi; 1773 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1774 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1775 } 1776 1777 return (m); 1778 } 1779 1780 static struct mbuf * 1781 rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi) 1782 { 1783 struct r92s_rx_stat *stat; 1784 uint32_t rxdw0; 1785 int totlen, pktlen, infosz, npkts; 1786 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1787 1788 /* Get the number of encapsulated frames. */ 1789 stat = (struct r92s_rx_stat *)buf; 1790 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1791 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1792 "%s: Rx %d frames in one chunk\n", __func__, npkts); 1793 1794 /* Process all of them. */ 1795 while (npkts-- > 0) { 1796 if (__predict_false(len < sizeof(*stat))) 1797 break; 1798 stat = (struct r92s_rx_stat *)buf; 1799 rxdw0 = le32toh(stat->rxdw0); 1800 1801 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1802 if (__predict_false(pktlen == 0)) 1803 break; 1804 1805 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1806 1807 /* Make sure everything fits in xfer. */ 1808 totlen = sizeof(*stat) + infosz + pktlen; 1809 if (__predict_false(totlen > len)) 1810 break; 1811 1812 /* Process 802.11 frame. */ 1813 m = rsu_rx_frame(sc, buf, pktlen, rssi); 1814 if (m0 == NULL) 1815 m0 = m; 1816 if (prevm == NULL) 1817 prevm = m; 1818 else { 1819 prevm->m_next = m; 1820 prevm = m; 1821 } 1822 /* Next chunk is 128-byte aligned. */ 1823 totlen = (totlen + 127) & ~127; 1824 buf += totlen; 1825 len -= totlen; 1826 } 1827 1828 return (m0); 1829 } 1830 1831 static struct mbuf * 1832 rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi) 1833 { 1834 struct rsu_softc *sc = data->sc; 1835 struct ieee80211com *ic = &sc->sc_ic; 1836 struct r92s_rx_stat *stat; 1837 int len; 1838 1839 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1840 1841 if (__predict_false(len < sizeof(*stat))) { 1842 DPRINTF("xfer too short %d\n", len); 1843 counter_u64_add(ic->ic_ierrors, 1); 1844 return (NULL); 1845 } 1846 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1847 stat = (struct r92s_rx_stat *)data->buf; 1848 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1849 rsu_rx_multi_event(sc, data->buf, len); 1850 /* No packets to process. */ 1851 return (NULL); 1852 } else 1853 return (rsu_rx_multi_frame(sc, data->buf, len, rssi)); 1854 } 1855 1856 static void 1857 rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1858 { 1859 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1860 struct ieee80211com *ic = &sc->sc_ic; 1861 struct ieee80211_frame *wh; 1862 struct ieee80211_node *ni; 1863 struct mbuf *m = NULL, *next; 1864 struct rsu_data *data; 1865 int rssi = 1; 1866 1867 RSU_ASSERT_LOCKED(sc); 1868 1869 switch (USB_GET_STATE(xfer)) { 1870 case USB_ST_TRANSFERRED: 1871 data = STAILQ_FIRST(&sc->sc_rx_active); 1872 if (data == NULL) 1873 goto tr_setup; 1874 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1875 m = rsu_rxeof(xfer, data, &rssi); 1876 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1877 /* FALLTHROUGH */ 1878 case USB_ST_SETUP: 1879 tr_setup: 1880 /* 1881 * XXX TODO: if we have an mbuf list, but then 1882 * we hit data == NULL, what now? 1883 */ 1884 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1885 if (data == NULL) { 1886 KASSERT(m == NULL, ("mbuf isn't NULL")); 1887 return; 1888 } 1889 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1890 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1891 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1892 usbd_xfer_max_len(xfer)); 1893 usbd_transfer_submit(xfer); 1894 /* 1895 * To avoid LOR we should unlock our private mutex here to call 1896 * ieee80211_input() because here is at the end of a USB 1897 * callback and safe to unlock. 1898 */ 1899 RSU_UNLOCK(sc); 1900 while (m != NULL) { 1901 next = m->m_next; 1902 m->m_next = NULL; 1903 wh = mtod(m, struct ieee80211_frame *); 1904 ni = ieee80211_find_rxnode(ic, 1905 (struct ieee80211_frame_min *)wh); 1906 if (ni != NULL) { 1907 if (ni->ni_flags & IEEE80211_NODE_HT) 1908 m->m_flags |= M_AMPDU; 1909 (void)ieee80211_input(ni, m, rssi, 0); 1910 ieee80211_free_node(ni); 1911 } else 1912 (void)ieee80211_input_all(ic, m, rssi, 0); 1913 m = next; 1914 } 1915 RSU_LOCK(sc); 1916 break; 1917 default: 1918 /* needs it to the inactive queue due to a error. */ 1919 data = STAILQ_FIRST(&sc->sc_rx_active); 1920 if (data != NULL) { 1921 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1922 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1923 } 1924 if (error != USB_ERR_CANCELLED) { 1925 usbd_xfer_set_stall(xfer); 1926 counter_u64_add(ic->ic_ierrors, 1); 1927 goto tr_setup; 1928 } 1929 break; 1930 } 1931 1932 } 1933 1934 static void 1935 rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1936 { 1937 #ifdef USB_DEBUG 1938 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1939 #endif 1940 1941 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n", 1942 __func__, 1943 data); 1944 1945 if (data->m) { 1946 /* XXX status? */ 1947 ieee80211_tx_complete(data->ni, data->m, 0); 1948 data->m = NULL; 1949 data->ni = NULL; 1950 } 1951 } 1952 1953 static void 1954 rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 1955 uint8_t which) 1956 { 1957 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1958 struct ieee80211com *ic = &sc->sc_ic; 1959 struct rsu_data *data; 1960 1961 RSU_ASSERT_LOCKED(sc); 1962 1963 switch (USB_GET_STATE(xfer)) { 1964 case USB_ST_TRANSFERRED: 1965 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1966 if (data == NULL) 1967 goto tr_setup; 1968 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n", 1969 __func__, data); 1970 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1971 rsu_txeof(xfer, data); 1972 rsu_freebuf(sc, data); 1973 /* FALLTHROUGH */ 1974 case USB_ST_SETUP: 1975 tr_setup: 1976 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 1977 if (data == NULL) { 1978 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1979 "%s: empty pending queue sc %p\n", __func__, sc); 1980 return; 1981 } 1982 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 1983 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 1984 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1985 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1986 "%s: submitting transfer %p\n", 1987 __func__, 1988 data); 1989 usbd_transfer_submit(xfer); 1990 break; 1991 default: 1992 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1993 if (data != NULL) { 1994 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1995 rsu_txeof(xfer, data); 1996 rsu_freebuf(sc, data); 1997 } 1998 counter_u64_add(ic->ic_oerrors, 1); 1999 2000 if (error != USB_ERR_CANCELLED) { 2001 usbd_xfer_set_stall(xfer); 2002 goto tr_setup; 2003 } 2004 break; 2005 } 2006 } 2007 2008 static void 2009 rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 2010 { 2011 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2012 2013 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 2014 2015 /* This kicks the TX taskqueue */ 2016 rsu_start(sc); 2017 } 2018 2019 static void 2020 rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 2021 { 2022 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2023 2024 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 2025 2026 /* This kicks the TX taskqueue */ 2027 rsu_start(sc); 2028 } 2029 2030 static void 2031 rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error) 2032 { 2033 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2034 2035 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C); 2036 2037 /* This kicks the TX taskqueue */ 2038 rsu_start(sc); 2039 } 2040 2041 /* 2042 * Transmit the given frame. 2043 * 2044 * This doesn't free the node or mbuf upon failure. 2045 */ 2046 static int 2047 rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 2048 struct mbuf *m0, struct rsu_data *data) 2049 { 2050 struct ieee80211com *ic = &sc->sc_ic; 2051 struct ieee80211vap *vap = ni->ni_vap; 2052 struct ieee80211_frame *wh; 2053 struct ieee80211_key *k = NULL; 2054 struct r92s_tx_desc *txd; 2055 uint8_t type; 2056 int prio = 0; 2057 uint8_t which; 2058 int hasqos; 2059 int xferlen; 2060 int qid; 2061 2062 RSU_ASSERT_LOCKED(sc); 2063 2064 wh = mtod(m0, struct ieee80211_frame *); 2065 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2066 2067 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n", 2068 __func__, data, m0); 2069 2070 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2071 k = ieee80211_crypto_encap(ni, m0); 2072 if (k == NULL) { 2073 device_printf(sc->sc_dev, 2074 "ieee80211_crypto_encap returns NULL.\n"); 2075 /* XXX we don't expect the fragmented frames */ 2076 return (ENOBUFS); 2077 } 2078 wh = mtod(m0, struct ieee80211_frame *); 2079 } 2080 /* If we have QoS then use it */ 2081 /* XXX TODO: mbuf WME/PRI versus TID? */ 2082 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2083 /* Has QoS */ 2084 prio = M_WME_GETAC(m0); 2085 which = rsu_wme_ac_xfer_map[prio]; 2086 hasqos = 1; 2087 } else { 2088 /* Non-QoS TID */ 2089 /* XXX TODO: tid=0 for non-qos TID? */ 2090 which = rsu_wme_ac_xfer_map[WME_AC_BE]; 2091 hasqos = 0; 2092 prio = 0; 2093 } 2094 2095 qid = rsu_ac2qid[prio]; 2096 #if 0 2097 switch (type) { 2098 case IEEE80211_FC0_TYPE_CTL: 2099 case IEEE80211_FC0_TYPE_MGT: 2100 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2101 break; 2102 default: 2103 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 2104 break; 2105 } 2106 hasqos = 0; 2107 #endif 2108 2109 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n", 2110 __func__, 2111 prio, 2112 which, 2113 hasqos); 2114 2115 /* Fill Tx descriptor. */ 2116 txd = (struct r92s_tx_desc *)data->buf; 2117 memset(txd, 0, sizeof(*txd)); 2118 2119 txd->txdw0 |= htole32( 2120 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 2121 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 2122 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 2123 2124 txd->txdw1 |= htole32( 2125 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid)); 2126 if (!hasqos) 2127 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 2128 #ifdef notyet 2129 if (k != NULL) { 2130 switch (k->wk_cipher->ic_cipher) { 2131 case IEEE80211_CIPHER_WEP: 2132 cipher = R92S_TXDW1_CIPHER_WEP; 2133 break; 2134 case IEEE80211_CIPHER_TKIP: 2135 cipher = R92S_TXDW1_CIPHER_TKIP; 2136 break; 2137 case IEEE80211_CIPHER_AES_CCM: 2138 cipher = R92S_TXDW1_CIPHER_AES; 2139 break; 2140 default: 2141 cipher = R92S_TXDW1_CIPHER_NONE; 2142 } 2143 txd->txdw1 |= htole32( 2144 SM(R92S_TXDW1_CIPHER, cipher) | 2145 SM(R92S_TXDW1_KEYIDX, k->k_id)); 2146 } 2147 #endif 2148 /* XXX todo: set AGGEN bit if appropriate? */ 2149 txd->txdw2 |= htole32(R92S_TXDW2_BK); 2150 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 2151 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 2152 /* 2153 * Firmware will use and increment the sequence number for the 2154 * specified priority. 2155 */ 2156 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio)); 2157 2158 if (ieee80211_radiotap_active_vap(vap)) { 2159 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 2160 2161 tap->wt_flags = 0; 2162 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2163 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2164 ieee80211_radiotap_tx(vap, m0); 2165 } 2166 2167 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 2168 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 2169 2170 data->buflen = xferlen; 2171 data->ni = ni; 2172 data->m = m0; 2173 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2174 2175 /* start transfer, if any */ 2176 usbd_transfer_start(sc->sc_xfer[which]); 2177 return (0); 2178 } 2179 2180 static int 2181 rsu_transmit(struct ieee80211com *ic, struct mbuf *m) 2182 { 2183 struct rsu_softc *sc = ic->ic_softc; 2184 int error; 2185 2186 RSU_LOCK(sc); 2187 if (!sc->sc_running) { 2188 RSU_UNLOCK(sc); 2189 return (ENXIO); 2190 } 2191 2192 /* 2193 * XXX TODO: ensure that we treat 'm' as a list of frames 2194 * to transmit! 2195 */ 2196 error = mbufq_enqueue(&sc->sc_snd, m); 2197 if (error) { 2198 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2199 "%s: mbufq_enable: failed (%d)\n", 2200 __func__, 2201 error); 2202 RSU_UNLOCK(sc); 2203 return (error); 2204 } 2205 RSU_UNLOCK(sc); 2206 2207 /* This kicks the TX taskqueue */ 2208 rsu_start(sc); 2209 2210 return (0); 2211 } 2212 2213 static void 2214 rsu_drain_mbufq(struct rsu_softc *sc) 2215 { 2216 struct mbuf *m; 2217 struct ieee80211_node *ni; 2218 2219 RSU_ASSERT_LOCKED(sc); 2220 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2221 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2222 m->m_pkthdr.rcvif = NULL; 2223 ieee80211_free_node(ni); 2224 m_freem(m); 2225 } 2226 } 2227 2228 static void 2229 _rsu_start(struct rsu_softc *sc) 2230 { 2231 struct ieee80211_node *ni; 2232 struct rsu_data *bf; 2233 struct mbuf *m; 2234 2235 RSU_ASSERT_LOCKED(sc); 2236 2237 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2238 bf = rsu_getbuf(sc); 2239 if (bf == NULL) { 2240 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2241 "%s: failed to get buffer\n", __func__); 2242 mbufq_prepend(&sc->sc_snd, m); 2243 break; 2244 } 2245 2246 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2247 m->m_pkthdr.rcvif = NULL; 2248 2249 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2250 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2251 "%s: failed to transmit\n", __func__); 2252 if_inc_counter(ni->ni_vap->iv_ifp, 2253 IFCOUNTER_OERRORS, 1); 2254 rsu_freebuf(sc, bf); 2255 ieee80211_free_node(ni); 2256 m_freem(m); 2257 break; 2258 } 2259 } 2260 } 2261 2262 static void 2263 rsu_start(struct rsu_softc *sc) 2264 { 2265 2266 taskqueue_enqueue(taskqueue_thread, &sc->tx_task); 2267 } 2268 2269 static void 2270 rsu_parent(struct ieee80211com *ic) 2271 { 2272 struct rsu_softc *sc = ic->ic_softc; 2273 int startall = 0; 2274 2275 RSU_LOCK(sc); 2276 if (ic->ic_nrunning > 0) { 2277 if (!sc->sc_running) { 2278 rsu_init(sc); 2279 startall = 1; 2280 } 2281 } else if (sc->sc_running) 2282 rsu_stop(sc); 2283 RSU_UNLOCK(sc); 2284 2285 if (startall) 2286 ieee80211_start_all(ic); 2287 } 2288 2289 /* 2290 * Power on sequence for A-cut adapters. 2291 */ 2292 static void 2293 rsu_power_on_acut(struct rsu_softc *sc) 2294 { 2295 uint32_t reg; 2296 2297 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2298 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2299 2300 /* Enable AFE macro block's bandgap and Mbias. */ 2301 rsu_write_1(sc, R92S_AFE_MISC, 2302 rsu_read_1(sc, R92S_AFE_MISC) | 2303 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 2304 /* Enable LDOA15 block. */ 2305 rsu_write_1(sc, R92S_LDOA15_CTRL, 2306 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2307 2308 rsu_write_1(sc, R92S_SPS1_CTRL, 2309 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 2310 rsu_ms_delay(sc, 2000); 2311 /* Enable switch regulator block. */ 2312 rsu_write_1(sc, R92S_SPS1_CTRL, 2313 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 2314 2315 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 2316 2317 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2318 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2319 2320 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2321 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2322 2323 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2324 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 2325 2326 /* Enable AFE clock. */ 2327 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2328 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2329 /* Enable AFE PLL macro block. */ 2330 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 2331 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 2332 /* Attach AFE PLL to MACTOP/BB. */ 2333 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2334 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2335 2336 /* Switch to 40MHz clock instead of 80MHz. */ 2337 rsu_write_2(sc, R92S_SYS_CLKR, 2338 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 2339 2340 /* Enable MAC clock. */ 2341 rsu_write_2(sc, R92S_SYS_CLKR, 2342 rsu_read_2(sc, R92S_SYS_CLKR) | 2343 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2344 2345 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2346 2347 /* Enable digital core and IOREG R/W. */ 2348 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2349 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2350 2351 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2352 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2353 2354 /* Switch the control path to firmware. */ 2355 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2356 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2357 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2358 2359 rsu_write_2(sc, R92S_CR, 0x37fc); 2360 2361 /* Fix USB RX FIFO issue. */ 2362 rsu_write_1(sc, 0xfe5c, 2363 rsu_read_1(sc, 0xfe5c) | 0x80); 2364 rsu_write_1(sc, 0x00ab, 2365 rsu_read_1(sc, 0x00ab) | 0xc0); 2366 2367 rsu_write_1(sc, R92S_SYS_CLKR, 2368 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2369 } 2370 2371 /* 2372 * Power on sequence for B-cut and C-cut adapters. 2373 */ 2374 static void 2375 rsu_power_on_bcut(struct rsu_softc *sc) 2376 { 2377 uint32_t reg; 2378 int ntries; 2379 2380 /* Prevent eFuse leakage. */ 2381 rsu_write_1(sc, 0x37, 0xb0); 2382 rsu_ms_delay(sc, 10); 2383 rsu_write_1(sc, 0x37, 0x30); 2384 2385 /* Switch the control path to hardware. */ 2386 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2387 if (reg & R92S_FWHW_SEL) { 2388 rsu_write_2(sc, R92S_SYS_CLKR, 2389 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 2390 } 2391 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2392 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 2393 rsu_ms_delay(sc, 1); 2394 2395 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2396 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2397 2398 reg = rsu_read_1(sc, R92S_AFE_MISC); 2399 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 2400 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 2401 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 2402 2403 /* Enable PLL. */ 2404 rsu_write_1(sc, R92S_LDOA15_CTRL, 2405 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2406 2407 rsu_write_1(sc, R92S_LDOV12D_CTRL, 2408 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 2409 2410 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2411 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2412 2413 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2414 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2415 2416 /* Support 64KB IMEM. */ 2417 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2418 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 2419 2420 /* Enable AFE clock. */ 2421 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2422 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2423 /* Enable AFE PLL macro block. */ 2424 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 2425 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2426 rsu_ms_delay(sc, 1); 2427 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 2428 rsu_ms_delay(sc, 1); 2429 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2430 rsu_ms_delay(sc, 1); 2431 2432 /* Attach AFE PLL to MACTOP/BB. */ 2433 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2434 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2435 2436 /* Switch to 40MHz clock. */ 2437 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2438 /* Disable CPU clock and 80MHz SSC. */ 2439 rsu_write_1(sc, R92S_SYS_CLKR, 2440 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2441 /* Enable MAC clock. */ 2442 rsu_write_2(sc, R92S_SYS_CLKR, 2443 rsu_read_2(sc, R92S_SYS_CLKR) | 2444 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2445 2446 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2447 2448 /* Enable digital core and IOREG R/W. */ 2449 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2450 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2451 2452 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2453 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2454 2455 /* Switch the control path to firmware. */ 2456 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2457 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2458 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2459 2460 rsu_write_2(sc, R92S_CR, 0x37fc); 2461 2462 /* Fix USB RX FIFO issue. */ 2463 rsu_write_1(sc, 0xfe5c, 2464 rsu_read_1(sc, 0xfe5c) | 0x80); 2465 2466 rsu_write_1(sc, R92S_SYS_CLKR, 2467 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2468 2469 rsu_write_1(sc, 0xfe1c, 0x80); 2470 2471 /* Make sure TxDMA is ready to download firmware. */ 2472 for (ntries = 0; ntries < 20; ntries++) { 2473 reg = rsu_read_1(sc, R92S_TCR); 2474 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2475 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2476 break; 2477 rsu_ms_delay(sc, 1); 2478 } 2479 if (ntries == 20) { 2480 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX, 2481 "%s: TxDMA is not ready\n", 2482 __func__); 2483 /* Reset TxDMA. */ 2484 reg = rsu_read_1(sc, R92S_CR); 2485 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2486 rsu_ms_delay(sc, 1); 2487 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2488 } 2489 } 2490 2491 static void 2492 rsu_power_off(struct rsu_softc *sc) 2493 { 2494 /* Turn RF off. */ 2495 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2496 rsu_ms_delay(sc, 5); 2497 2498 /* Turn MAC off. */ 2499 /* Switch control path. */ 2500 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2501 /* Reset MACTOP. */ 2502 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2503 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2504 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2505 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2506 2507 /* Disable AFE PLL. */ 2508 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2509 /* Disable A15V. */ 2510 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2511 /* Disable eFuse 1.2V. */ 2512 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2513 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2514 /* Enable AFE macro block's bandgap and Mbias. */ 2515 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2516 /* Disable 1.6V LDO. */ 2517 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2518 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2519 2520 /* Firmware - tell it to switch things off */ 2521 (void) rsu_set_fw_power_state(sc, RSU_PWR_OFF); 2522 } 2523 2524 static int 2525 rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2526 { 2527 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2528 struct rsu_data *data; 2529 struct r92s_tx_desc *txd; 2530 int mlen; 2531 2532 while (len > 0) { 2533 data = rsu_getbuf(sc); 2534 if (data == NULL) 2535 return (ENOMEM); 2536 txd = (struct r92s_tx_desc *)data->buf; 2537 memset(txd, 0, sizeof(*txd)); 2538 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2539 /* Last chunk. */ 2540 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2541 mlen = len; 2542 } else 2543 mlen = RSU_TXBUFSZ - sizeof(*txd); 2544 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2545 memcpy(&txd[1], buf, mlen); 2546 data->buflen = sizeof(*txd) + mlen; 2547 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET, 2548 "%s: starting transfer %p\n", 2549 __func__, data); 2550 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2551 buf += mlen; 2552 len -= mlen; 2553 } 2554 usbd_transfer_start(sc->sc_xfer[which]); 2555 return (0); 2556 } 2557 2558 static int 2559 rsu_load_firmware(struct rsu_softc *sc) 2560 { 2561 const struct r92s_fw_hdr *hdr; 2562 struct r92s_fw_priv *dmem; 2563 struct ieee80211com *ic = &sc->sc_ic; 2564 const uint8_t *imem, *emem; 2565 int imemsz, ememsz; 2566 const struct firmware *fw; 2567 size_t size; 2568 uint32_t reg; 2569 int ntries, error; 2570 2571 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2572 RSU_DPRINTF(sc, RSU_DEBUG_ANY, 2573 "%s: Firmware already loaded\n", 2574 __func__); 2575 return (0); 2576 } 2577 2578 RSU_UNLOCK(sc); 2579 /* Read firmware image from the filesystem. */ 2580 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2581 device_printf(sc->sc_dev, 2582 "%s: failed load firmware of file rsu-rtl8712fw\n", 2583 __func__); 2584 RSU_LOCK(sc); 2585 return (ENXIO); 2586 } 2587 RSU_LOCK(sc); 2588 size = fw->datasize; 2589 if (size < sizeof(*hdr)) { 2590 device_printf(sc->sc_dev, "firmware too short\n"); 2591 error = EINVAL; 2592 goto fail; 2593 } 2594 hdr = (const struct r92s_fw_hdr *)fw->data; 2595 if (hdr->signature != htole16(0x8712) && 2596 hdr->signature != htole16(0x8192)) { 2597 device_printf(sc->sc_dev, 2598 "invalid firmware signature 0x%x\n", 2599 le16toh(hdr->signature)); 2600 error = EINVAL; 2601 goto fail; 2602 } 2603 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2604 hdr->month, hdr->day, hdr->hour, hdr->minute); 2605 2606 /* Make sure that driver and firmware are in sync. */ 2607 if (hdr->privsz != htole32(sizeof(*dmem))) { 2608 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2609 error = EINVAL; 2610 goto fail; 2611 } 2612 /* Get FW sections sizes. */ 2613 imemsz = le32toh(hdr->imemsz); 2614 ememsz = le32toh(hdr->sramsz); 2615 /* Check that all FW sections fit in image. */ 2616 if (size < sizeof(*hdr) + imemsz + ememsz) { 2617 device_printf(sc->sc_dev, "firmware too short\n"); 2618 error = EINVAL; 2619 goto fail; 2620 } 2621 imem = (const uint8_t *)&hdr[1]; 2622 emem = imem + imemsz; 2623 2624 /* Load IMEM section. */ 2625 error = rsu_fw_loadsection(sc, imem, imemsz); 2626 if (error != 0) { 2627 device_printf(sc->sc_dev, 2628 "could not load firmware section %s\n", "IMEM"); 2629 goto fail; 2630 } 2631 /* Wait for load to complete. */ 2632 for (ntries = 0; ntries != 50; ntries++) { 2633 rsu_ms_delay(sc, 10); 2634 reg = rsu_read_1(sc, R92S_TCR); 2635 if (reg & R92S_TCR_IMEM_CODE_DONE) 2636 break; 2637 } 2638 if (ntries == 50) { 2639 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2640 error = ETIMEDOUT; 2641 goto fail; 2642 } 2643 /* Load EMEM section. */ 2644 error = rsu_fw_loadsection(sc, emem, ememsz); 2645 if (error != 0) { 2646 device_printf(sc->sc_dev, 2647 "could not load firmware section %s\n", "EMEM"); 2648 goto fail; 2649 } 2650 /* Wait for load to complete. */ 2651 for (ntries = 0; ntries != 50; ntries++) { 2652 rsu_ms_delay(sc, 10); 2653 reg = rsu_read_2(sc, R92S_TCR); 2654 if (reg & R92S_TCR_EMEM_CODE_DONE) 2655 break; 2656 } 2657 if (ntries == 50) { 2658 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2659 error = ETIMEDOUT; 2660 goto fail; 2661 } 2662 /* Enable CPU. */ 2663 rsu_write_1(sc, R92S_SYS_CLKR, 2664 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2665 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2666 device_printf(sc->sc_dev, "could not enable system clock\n"); 2667 error = EIO; 2668 goto fail; 2669 } 2670 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2671 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2672 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2673 device_printf(sc->sc_dev, 2674 "could not enable microcontroller\n"); 2675 error = EIO; 2676 goto fail; 2677 } 2678 /* Wait for CPU to initialize. */ 2679 for (ntries = 0; ntries < 100; ntries++) { 2680 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2681 break; 2682 rsu_ms_delay(sc, 1); 2683 } 2684 if (ntries == 100) { 2685 device_printf(sc->sc_dev, 2686 "timeout waiting for microcontroller\n"); 2687 error = ETIMEDOUT; 2688 goto fail; 2689 } 2690 2691 /* Update DMEM section before loading. */ 2692 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2693 memset(dmem, 0, sizeof(*dmem)); 2694 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2695 dmem->nendpoints = sc->sc_nendpoints; 2696 dmem->chip_version = sc->cut; 2697 dmem->rf_config = sc->sc_rftype; 2698 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2699 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2700 dmem->turbo_mode = 0; 2701 dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40); 2702 dmem->amsdu2ampdu_en = !! (sc->sc_ht); 2703 dmem->ampdu_en = !! (sc->sc_ht); 2704 dmem->agg_offload = !! (sc->sc_ht); 2705 dmem->qos_en = 1; 2706 dmem->ps_offload = 1; 2707 dmem->lowpower_mode = 1; /* XXX TODO: configurable? */ 2708 /* Load DMEM section. */ 2709 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2710 if (error != 0) { 2711 device_printf(sc->sc_dev, 2712 "could not load firmware section %s\n", "DMEM"); 2713 goto fail; 2714 } 2715 /* Wait for load to complete. */ 2716 for (ntries = 0; ntries < 100; ntries++) { 2717 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2718 break; 2719 rsu_ms_delay(sc, 1); 2720 } 2721 if (ntries == 100) { 2722 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2723 "DMEM"); 2724 error = ETIMEDOUT; 2725 goto fail; 2726 } 2727 /* Wait for firmware readiness. */ 2728 for (ntries = 0; ntries < 60; ntries++) { 2729 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2730 break; 2731 rsu_ms_delay(sc, 1); 2732 } 2733 if (ntries == 60) { 2734 device_printf(sc->sc_dev, 2735 "timeout waiting for firmware readiness\n"); 2736 error = ETIMEDOUT; 2737 goto fail; 2738 } 2739 fail: 2740 firmware_put(fw, FIRMWARE_UNLOAD); 2741 return (error); 2742 } 2743 2744 2745 static int 2746 rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2747 const struct ieee80211_bpf_params *params) 2748 { 2749 struct ieee80211com *ic = ni->ni_ic; 2750 struct rsu_softc *sc = ic->ic_softc; 2751 struct rsu_data *bf; 2752 2753 /* prevent management frames from being sent if we're not ready */ 2754 if (!sc->sc_running) { 2755 m_freem(m); 2756 ieee80211_free_node(ni); 2757 return (ENETDOWN); 2758 } 2759 RSU_LOCK(sc); 2760 bf = rsu_getbuf(sc); 2761 if (bf == NULL) { 2762 ieee80211_free_node(ni); 2763 m_freem(m); 2764 RSU_UNLOCK(sc); 2765 return (ENOBUFS); 2766 } 2767 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2768 ieee80211_free_node(ni); 2769 m_freem(m); 2770 rsu_freebuf(sc, bf); 2771 RSU_UNLOCK(sc); 2772 return (EIO); 2773 } 2774 RSU_UNLOCK(sc); 2775 2776 return (0); 2777 } 2778 2779 static void 2780 rsu_init(struct rsu_softc *sc) 2781 { 2782 struct ieee80211com *ic = &sc->sc_ic; 2783 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2784 uint8_t macaddr[IEEE80211_ADDR_LEN]; 2785 int error; 2786 int i; 2787 2788 RSU_ASSERT_LOCKED(sc); 2789 2790 /* Ensure the mbuf queue is drained */ 2791 rsu_drain_mbufq(sc); 2792 2793 /* Init host async commands ring. */ 2794 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2795 2796 /* Reset power management state. */ 2797 rsu_write_1(sc, R92S_USB_HRPWM, 0); 2798 2799 /* Power on adapter. */ 2800 if (sc->cut == 1) 2801 rsu_power_on_acut(sc); 2802 else 2803 rsu_power_on_bcut(sc); 2804 2805 /* Load firmware. */ 2806 error = rsu_load_firmware(sc); 2807 if (error != 0) 2808 goto fail; 2809 2810 /* Enable Rx TCP checksum offload. */ 2811 rsu_write_4(sc, R92S_RCR, 2812 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2813 /* Append PHY status. */ 2814 rsu_write_4(sc, R92S_RCR, 2815 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2816 2817 rsu_write_4(sc, R92S_CR, 2818 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2819 2820 /* Use 128 bytes pages. */ 2821 rsu_write_1(sc, 0x00b5, 2822 rsu_read_1(sc, 0x00b5) | 0x01); 2823 /* Enable USB Rx aggregation. */ 2824 rsu_write_1(sc, 0x00bd, 2825 rsu_read_1(sc, 0x00bd) | 0x80); 2826 /* Set USB Rx aggregation threshold. */ 2827 rsu_write_1(sc, 0x00d9, 0x01); 2828 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2829 rsu_write_1(sc, 0xfe5b, 0x04); 2830 /* Fix USB Rx FIFO issue. */ 2831 rsu_write_1(sc, 0xfe5c, 2832 rsu_read_1(sc, 0xfe5c) | 0x80); 2833 2834 /* Set MAC address. */ 2835 IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 2836 rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN); 2837 2838 /* It really takes 1.5 seconds for the firmware to boot: */ 2839 rsu_ms_delay(sc, 2000); 2840 2841 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n", 2842 __func__, 2843 ether_sprintf(macaddr)); 2844 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr, 2845 IEEE80211_ADDR_LEN); 2846 if (error != 0) { 2847 device_printf(sc->sc_dev, "could not set MAC address\n"); 2848 goto fail; 2849 } 2850 2851 /* Set PS mode fully active */ 2852 error = rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 2853 2854 if (error != 0) { 2855 device_printf(sc->sc_dev, "could not set PS mode\n"); 2856 goto fail; 2857 } 2858 2859 sc->sc_scan_pass = 0; 2860 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2861 2862 /* We're ready to go. */ 2863 sc->sc_running = 1; 2864 sc->sc_scanning = 0; 2865 return; 2866 fail: 2867 /* Need to stop all failed transfers, if any */ 2868 for (i = 0; i != RSU_N_TRANSFER; i++) 2869 usbd_transfer_stop(sc->sc_xfer[i]); 2870 } 2871 2872 static void 2873 rsu_stop(struct rsu_softc *sc) 2874 { 2875 int i; 2876 2877 RSU_ASSERT_LOCKED(sc); 2878 2879 sc->sc_running = 0; 2880 sc->sc_calibrating = 0; 2881 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2882 taskqueue_cancel(taskqueue_thread, &sc->tx_task, NULL); 2883 2884 /* Power off adapter. */ 2885 rsu_power_off(sc); 2886 2887 for (i = 0; i < RSU_N_TRANSFER; i++) 2888 usbd_transfer_stop(sc->sc_xfer[i]); 2889 2890 /* Ensure the mbuf queue is drained */ 2891 rsu_drain_mbufq(sc); 2892 } 2893 2894 /* 2895 * Note: usb_pause_mtx() actually releases the mutex before calling pause(), 2896 * which breaks any kind of driver serialisation. 2897 */ 2898 static void 2899 rsu_ms_delay(struct rsu_softc *sc, int ms) 2900 { 2901 2902 //usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2903 DELAY(ms * 1000); 2904 } 2905