1 /* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 #include <sys/cdefs.h> 19 __FBSDID("$FreeBSD$"); 20 21 /* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o 11n support 26 * o h/w crypto 27 * o hostap / ibss / mesh 28 */ 29 #include <sys/param.h> 30 #include <sys/endian.h> 31 #include <sys/sockio.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/conf.h> 37 #include <sys/bus.h> 38 #include <sys/rman.h> 39 #include <sys/firmware.h> 40 #include <sys/module.h> 41 42 #include <machine/bus.h> 43 #include <machine/resource.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_var.h> 48 #include <net/if_arp.h> 49 #include <net/if_dl.h> 50 #include <net/if_media.h> 51 #include <net/if_types.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/if_ether.h> 57 #include <netinet/ip.h> 58 59 #include <net80211/ieee80211_var.h> 60 #include <net80211/ieee80211_regdomain.h> 61 #include <net80211/ieee80211_radiotap.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include "usbdevs.h" 66 67 #define USB_DEBUG_VAR rsu_debug 68 #include <dev/usb/usb_debug.h> 69 70 #include <dev/usb/wlan/if_rsureg.h> 71 72 #ifdef USB_DEBUG 73 static int rsu_debug = 0; 74 SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 75 SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RW, &rsu_debug, 0, 76 "Debug level"); 77 #endif 78 79 static const STRUCT_USB_HOST_ID rsu_devs[] = { 80 #define RSU_HT_NOT_SUPPORTED 0 81 #define RSU_HT_SUPPORTED 1 82 #define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 83 RSU_HT_SUPPORTED) } 84 #define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 85 RSU_HT_NOT_SUPPORTED) } 86 RSU_DEV(ASUS, RTL8192SU), 87 RSU_DEV(AZUREWAVE, RTL8192SU_4), 88 RSU_DEV_HT(ACCTON, RTL8192SU), 89 RSU_DEV_HT(ASUS, USBN10), 90 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 91 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 92 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 93 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 94 RSU_DEV_HT(BELKIN, RTL8192SU_1), 95 RSU_DEV_HT(BELKIN, RTL8192SU_2), 96 RSU_DEV_HT(BELKIN, RTL8192SU_3), 97 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 98 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 99 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 100 RSU_DEV_HT(COREGA, RTL8192SU), 101 RSU_DEV_HT(DLINK2, DWA131A1), 102 RSU_DEV_HT(DLINK2, RTL8192SU_1), 103 RSU_DEV_HT(DLINK2, RTL8192SU_2), 104 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 105 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 106 RSU_DEV_HT(EDIMAX, EW7622UMN), 107 RSU_DEV_HT(GUILLEMOT, HWGUN54), 108 RSU_DEV_HT(GUILLEMOT, HWNUM300), 109 RSU_DEV_HT(HAWKING, RTL8192SU_1), 110 RSU_DEV_HT(HAWKING, RTL8192SU_2), 111 RSU_DEV_HT(PLANEX2, GWUSNANO), 112 RSU_DEV_HT(REALTEK, RTL8171), 113 RSU_DEV_HT(REALTEK, RTL8172), 114 RSU_DEV_HT(REALTEK, RTL8173), 115 RSU_DEV_HT(REALTEK, RTL8174), 116 RSU_DEV_HT(REALTEK, RTL8192SU), 117 RSU_DEV_HT(REALTEK, RTL8712), 118 RSU_DEV_HT(REALTEK, RTL8713), 119 RSU_DEV_HT(SENAO, RTL8192SU_1), 120 RSU_DEV_HT(SENAO, RTL8192SU_2), 121 RSU_DEV_HT(SITECOMEU, WL349V1), 122 RSU_DEV_HT(SITECOMEU, WL353), 123 RSU_DEV_HT(SWEEX2, LW154), 124 #undef RSU_DEV_HT 125 #undef RSU_DEV 126 }; 127 128 static device_probe_t rsu_match; 129 static device_attach_t rsu_attach; 130 static device_detach_t rsu_detach; 131 static usb_callback_t rsu_bulk_tx_callback; 132 static usb_callback_t rsu_bulk_rx_callback; 133 static usb_error_t rsu_do_request(struct rsu_softc *, 134 struct usb_device_request *, void *); 135 static struct ieee80211vap * 136 rsu_vap_create(struct ieee80211com *, const char name[], 137 int, enum ieee80211_opmode, int, const uint8_t bssid[], 138 const uint8_t mac[]); 139 static void rsu_vap_delete(struct ieee80211vap *); 140 static void rsu_scan_start(struct ieee80211com *); 141 static void rsu_scan_end(struct ieee80211com *); 142 static void rsu_set_channel(struct ieee80211com *); 143 static void rsu_update_mcast(struct ifnet *); 144 static int rsu_alloc_rx_list(struct rsu_softc *); 145 static void rsu_free_rx_list(struct rsu_softc *); 146 static int rsu_alloc_tx_list(struct rsu_softc *); 147 static void rsu_free_tx_list(struct rsu_softc *); 148 static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 149 static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 150 static struct rsu_data *rsu_getbuf(struct rsu_softc *); 151 static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 152 int); 153 static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 154 static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 155 static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 156 static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 157 int); 158 static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 159 static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 160 static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 161 static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 162 static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 163 static int rsu_read_rom(struct rsu_softc *); 164 static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 165 static void rsu_calib_task(void *, int); 166 static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 167 #ifdef notyet 168 static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 169 static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 170 #endif 171 static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 172 static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 173 static int rsu_disconnect(struct rsu_softc *); 174 static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 175 static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 176 static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 177 static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 178 static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 179 static struct mbuf * 180 rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *); 181 static struct mbuf * 182 rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *); 183 static struct mbuf * 184 rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *); 185 static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 186 static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 187 const struct ieee80211_bpf_params *); 188 static void rsu_init(void *); 189 static void rsu_init_locked(struct rsu_softc *); 190 static void rsu_watchdog(void *); 191 static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 192 struct mbuf *, struct rsu_data *); 193 static void rsu_start(struct ifnet *); 194 static void rsu_start_locked(struct ifnet *); 195 static int rsu_ioctl(struct ifnet *, u_long, caddr_t); 196 static void rsu_stop(struct ifnet *, int); 197 static void rsu_stop_locked(struct ifnet *, int); 198 static void rsu_ms_delay(struct rsu_softc *); 199 200 static device_method_t rsu_methods[] = { 201 DEVMETHOD(device_probe, rsu_match), 202 DEVMETHOD(device_attach, rsu_attach), 203 DEVMETHOD(device_detach, rsu_detach), 204 205 DEVMETHOD_END 206 }; 207 208 static driver_t rsu_driver = { 209 .name = "rsu", 210 .methods = rsu_methods, 211 .size = sizeof(struct rsu_softc) 212 }; 213 214 static devclass_t rsu_devclass; 215 216 DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 217 MODULE_DEPEND(rsu, wlan, 1, 1, 1); 218 MODULE_DEPEND(rsu, usb, 1, 1, 1); 219 MODULE_DEPEND(rsu, firmware, 1, 1, 1); 220 MODULE_VERSION(rsu, 1); 221 222 static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 223 [RSU_BULK_RX] = { 224 .type = UE_BULK, 225 .endpoint = UE_ADDR_ANY, 226 .direction = UE_DIR_IN, 227 .bufsize = RSU_RXBUFSZ, 228 .flags = { 229 .pipe_bof = 1, 230 .short_xfer_ok = 1 231 }, 232 .callback = rsu_bulk_rx_callback 233 }, 234 [RSU_BULK_TX_BE] = { 235 .type = UE_BULK, 236 .endpoint = 0x06, 237 .direction = UE_DIR_OUT, 238 .bufsize = RSU_TXBUFSZ, 239 .flags = { 240 .ext_buffer = 1, 241 .pipe_bof = 1, 242 .force_short_xfer = 1 243 }, 244 .callback = rsu_bulk_tx_callback, 245 .timeout = RSU_TX_TIMEOUT 246 }, 247 [RSU_BULK_TX_BK] = { 248 .type = UE_BULK, 249 .endpoint = 0x06, 250 .direction = UE_DIR_OUT, 251 .bufsize = RSU_TXBUFSZ, 252 .flags = { 253 .ext_buffer = 1, 254 .pipe_bof = 1, 255 .force_short_xfer = 1 256 }, 257 .callback = rsu_bulk_tx_callback, 258 .timeout = RSU_TX_TIMEOUT 259 }, 260 [RSU_BULK_TX_VI] = { 261 .type = UE_BULK, 262 .endpoint = 0x04, 263 .direction = UE_DIR_OUT, 264 .bufsize = RSU_TXBUFSZ, 265 .flags = { 266 .ext_buffer = 1, 267 .pipe_bof = 1, 268 .force_short_xfer = 1 269 }, 270 .callback = rsu_bulk_tx_callback, 271 .timeout = RSU_TX_TIMEOUT 272 }, 273 [RSU_BULK_TX_VO] = { 274 .type = UE_BULK, 275 .endpoint = 0x04, 276 .direction = UE_DIR_OUT, 277 .bufsize = RSU_TXBUFSZ, 278 .flags = { 279 .ext_buffer = 1, 280 .pipe_bof = 1, 281 .force_short_xfer = 1 282 }, 283 .callback = rsu_bulk_tx_callback, 284 .timeout = RSU_TX_TIMEOUT 285 }, 286 }; 287 288 static int 289 rsu_match(device_t self) 290 { 291 struct usb_attach_arg *uaa = device_get_ivars(self); 292 293 if (uaa->usb_mode != USB_MODE_HOST || 294 uaa->info.bIfaceIndex != 0 || 295 uaa->info.bConfigIndex != 0) 296 return (ENXIO); 297 298 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 299 } 300 301 static int 302 rsu_attach(device_t self) 303 { 304 struct usb_attach_arg *uaa = device_get_ivars(self); 305 struct rsu_softc *sc = device_get_softc(self); 306 struct ifnet *ifp; 307 struct ieee80211com *ic; 308 int error; 309 uint8_t iface_index, bands; 310 311 device_set_usb_desc(self); 312 sc->sc_udev = uaa->device; 313 sc->sc_dev = self; 314 315 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 316 MTX_DEF); 317 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 318 rsu_calib_task, sc); 319 callout_init(&sc->sc_watchdog_ch, 0); 320 321 iface_index = 0; 322 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 323 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 324 if (error) { 325 device_printf(sc->sc_dev, 326 "could not allocate USB transfers, err=%s\n", 327 usbd_errstr(error)); 328 goto fail_usb; 329 } 330 RSU_LOCK(sc); 331 /* Read chip revision. */ 332 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 333 if (sc->cut != 3) 334 sc->cut = (sc->cut >> 1) + 1; 335 error = rsu_read_rom(sc); 336 if (error != 0) { 337 device_printf(self, "could not read ROM\n"); 338 goto fail_rom; 339 } 340 RSU_UNLOCK(sc); 341 IEEE80211_ADDR_COPY(sc->sc_bssid, &sc->rom[0x12]); 342 device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut); 343 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 344 if (ifp == NULL) { 345 device_printf(self, "cannot allocate interface\n"); 346 goto fail_ifalloc; 347 } 348 ic = ifp->if_l2com; 349 ifp->if_softc = sc; 350 if_initname(ifp, "rsu", device_get_unit(self)); 351 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 352 ifp->if_init = rsu_init; 353 ifp->if_ioctl = rsu_ioctl; 354 ifp->if_start = rsu_start; 355 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 356 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 357 IFQ_SET_READY(&ifp->if_snd); 358 ifp->if_capabilities |= IFCAP_RXCSUM; 359 ifp->if_capenable |= IFCAP_RXCSUM; 360 ifp->if_hwassist = CSUM_TCP; 361 362 ic->ic_ifp = ifp; 363 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 364 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 365 366 /* Set device capabilities. */ 367 ic->ic_caps = 368 IEEE80211_C_STA | /* station mode */ 369 IEEE80211_C_BGSCAN | /* Background scan. */ 370 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 371 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 372 IEEE80211_C_WPA; /* WPA/RSN. */ 373 374 #if 0 375 /* Check if HT support is present. */ 376 if (usb_lookup(rsu_devs_noht, uaa->vendor, uaa->product) == NULL) { 377 /* Set HT capabilities. */ 378 ic->ic_htcaps = 379 IEEE80211_HTCAP_CBW20_40 | 380 IEEE80211_HTCAP_DSSSCCK40; 381 /* Set supported HT rates. */ 382 for (i = 0; i < 2; i++) 383 ic->ic_sup_mcs[i] = 0xff; 384 } 385 #endif 386 387 /* Set supported .11b and .11g rates. */ 388 bands = 0; 389 setbit(&bands, IEEE80211_MODE_11B); 390 setbit(&bands, IEEE80211_MODE_11G); 391 ieee80211_init_channels(ic, NULL, &bands); 392 393 ieee80211_ifattach(ic, sc->sc_bssid); 394 ic->ic_raw_xmit = rsu_raw_xmit; 395 ic->ic_scan_start = rsu_scan_start; 396 ic->ic_scan_end = rsu_scan_end; 397 ic->ic_set_channel = rsu_set_channel; 398 ic->ic_vap_create = rsu_vap_create; 399 ic->ic_vap_delete = rsu_vap_delete; 400 ic->ic_update_mcast = rsu_update_mcast; 401 402 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 403 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 404 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 405 RSU_RX_RADIOTAP_PRESENT); 406 407 if (bootverbose) 408 ieee80211_announce(ic); 409 410 return (0); 411 412 fail_ifalloc: 413 fail_rom: 414 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 415 fail_usb: 416 mtx_destroy(&sc->sc_mtx); 417 return (ENXIO); 418 } 419 420 static int 421 rsu_detach(device_t self) 422 { 423 struct rsu_softc *sc = device_get_softc(self); 424 struct ifnet *ifp = sc->sc_ifp; 425 struct ieee80211com *ic = ifp->if_l2com; 426 427 rsu_stop(ifp, 1); 428 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 429 ieee80211_ifdetach(ic); 430 431 callout_drain(&sc->sc_watchdog_ch); 432 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 433 434 /* Free Tx/Rx buffers. */ 435 rsu_free_tx_list(sc); 436 rsu_free_rx_list(sc); 437 438 if_free(ifp); 439 mtx_destroy(&sc->sc_mtx); 440 441 return (0); 442 } 443 444 static usb_error_t 445 rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 446 void *data) 447 { 448 usb_error_t err; 449 int ntries = 10; 450 451 RSU_ASSERT_LOCKED(sc); 452 453 while (ntries--) { 454 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 455 req, data, 0, NULL, 250 /* ms */); 456 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 457 break; 458 DPRINTFN(1, "Control request failed, %s (retrying)\n", 459 usbd_errstr(err)); 460 usb_pause_mtx(&sc->sc_mtx, hz / 100); 461 } 462 463 return (err); 464 } 465 466 static struct ieee80211vap * 467 rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 468 enum ieee80211_opmode opmode, int flags, 469 const uint8_t bssid[IEEE80211_ADDR_LEN], 470 const uint8_t mac[IEEE80211_ADDR_LEN]) 471 { 472 struct rsu_vap *uvp; 473 struct ieee80211vap *vap; 474 475 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 476 return (NULL); 477 478 uvp = (struct rsu_vap *) malloc(sizeof(struct rsu_vap), 479 M_80211_VAP, M_NOWAIT | M_ZERO); 480 if (uvp == NULL) 481 return (NULL); 482 vap = &uvp->vap; 483 484 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 485 flags, bssid, mac) != 0) { 486 /* out of memory */ 487 free(uvp, M_80211_VAP); 488 return (NULL); 489 } 490 491 /* override state transition machine */ 492 uvp->newstate = vap->iv_newstate; 493 vap->iv_newstate = rsu_newstate; 494 495 /* complete setup */ 496 ieee80211_vap_attach(vap, ieee80211_media_change, 497 ieee80211_media_status); 498 ic->ic_opmode = opmode; 499 500 return (vap); 501 } 502 503 static void 504 rsu_vap_delete(struct ieee80211vap *vap) 505 { 506 struct rsu_vap *uvp = RSU_VAP(vap); 507 508 ieee80211_vap_detach(vap); 509 free(uvp, M_80211_VAP); 510 } 511 512 static void 513 rsu_scan_start(struct ieee80211com *ic) 514 { 515 int error; 516 struct ifnet *ifp = ic->ic_ifp; 517 struct rsu_softc *sc = ifp->if_softc; 518 519 /* Scanning is done by the firmware. */ 520 RSU_LOCK(sc); 521 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 522 RSU_UNLOCK(sc); 523 if (error != 0) 524 device_printf(sc->sc_dev, 525 "could not send site survey command\n"); 526 } 527 528 static void 529 rsu_scan_end(struct ieee80211com *ic) 530 { 531 /* Nothing to do here. */ 532 } 533 534 static void 535 rsu_set_channel(struct ieee80211com *ic __unused) 536 { 537 /* We are unable to switch channels, yet. */ 538 } 539 540 static void 541 rsu_update_mcast(struct ifnet *ifp) 542 { 543 /* XXX do nothing? */ 544 } 545 546 static int 547 rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 548 int ndata, int maxsz) 549 { 550 int i, error; 551 552 for (i = 0; i < ndata; i++) { 553 struct rsu_data *dp = &data[i]; 554 dp->sc = sc; 555 dp->m = NULL; 556 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 557 if (dp->buf == NULL) { 558 device_printf(sc->sc_dev, 559 "could not allocate buffer\n"); 560 error = ENOMEM; 561 goto fail; 562 } 563 dp->ni = NULL; 564 } 565 566 return (0); 567 fail: 568 rsu_free_list(sc, data, ndata); 569 return (error); 570 } 571 572 static int 573 rsu_alloc_rx_list(struct rsu_softc *sc) 574 { 575 int error, i; 576 577 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 578 RSU_RXBUFSZ); 579 if (error != 0) 580 return (error); 581 582 STAILQ_INIT(&sc->sc_rx_active); 583 STAILQ_INIT(&sc->sc_rx_inactive); 584 585 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 586 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 587 588 return (0); 589 } 590 591 static int 592 rsu_alloc_tx_list(struct rsu_softc *sc) 593 { 594 int error, i; 595 596 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 597 RSU_TXBUFSZ); 598 if (error != 0) 599 return (error); 600 601 STAILQ_INIT(&sc->sc_tx_active); 602 STAILQ_INIT(&sc->sc_tx_inactive); 603 STAILQ_INIT(&sc->sc_tx_pending); 604 605 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 606 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 607 } 608 609 return (0); 610 } 611 612 static void 613 rsu_free_tx_list(struct rsu_softc *sc) 614 { 615 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 616 } 617 618 static void 619 rsu_free_rx_list(struct rsu_softc *sc) 620 { 621 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 622 } 623 624 static void 625 rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 626 { 627 int i; 628 629 for (i = 0; i < ndata; i++) { 630 struct rsu_data *dp = &data[i]; 631 632 if (dp->buf != NULL) { 633 free(dp->buf, M_USBDEV); 634 dp->buf = NULL; 635 } 636 if (dp->ni != NULL) { 637 ieee80211_free_node(dp->ni); 638 dp->ni = NULL; 639 } 640 } 641 } 642 643 static struct rsu_data * 644 _rsu_getbuf(struct rsu_softc *sc) 645 { 646 struct rsu_data *bf; 647 648 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 649 if (bf != NULL) 650 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 651 else 652 bf = NULL; 653 if (bf == NULL) 654 DPRINTF("out of xmit buffers\n"); 655 return (bf); 656 } 657 658 static struct rsu_data * 659 rsu_getbuf(struct rsu_softc *sc) 660 { 661 struct rsu_data *bf; 662 663 RSU_ASSERT_LOCKED(sc); 664 665 bf = _rsu_getbuf(sc); 666 if (bf == NULL) { 667 struct ifnet *ifp = sc->sc_ifp; 668 DPRINTF("stop queue\n"); 669 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 670 } 671 return (bf); 672 } 673 674 static int 675 rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 676 int len) 677 { 678 usb_device_request_t req; 679 680 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 681 req.bRequest = R92S_REQ_REGS; 682 USETW(req.wValue, addr); 683 USETW(req.wIndex, 0); 684 USETW(req.wLength, len); 685 686 return (rsu_do_request(sc, &req, buf)); 687 } 688 689 static void 690 rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 691 { 692 rsu_write_region_1(sc, addr, &val, 1); 693 } 694 695 static void 696 rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 697 { 698 val = htole16(val); 699 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 700 } 701 702 static void 703 rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 704 { 705 val = htole32(val); 706 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 707 } 708 709 static int 710 rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 711 int len) 712 { 713 usb_device_request_t req; 714 715 req.bmRequestType = UT_READ_VENDOR_DEVICE; 716 req.bRequest = R92S_REQ_REGS; 717 USETW(req.wValue, addr); 718 USETW(req.wIndex, 0); 719 USETW(req.wLength, len); 720 721 return (rsu_do_request(sc, &req, buf)); 722 } 723 724 static uint8_t 725 rsu_read_1(struct rsu_softc *sc, uint16_t addr) 726 { 727 uint8_t val; 728 729 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 730 return (0xff); 731 return (val); 732 } 733 734 static uint16_t 735 rsu_read_2(struct rsu_softc *sc, uint16_t addr) 736 { 737 uint16_t val; 738 739 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 740 return (0xffff); 741 return (le16toh(val)); 742 } 743 744 static uint32_t 745 rsu_read_4(struct rsu_softc *sc, uint16_t addr) 746 { 747 uint32_t val; 748 749 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 750 return (0xffffffff); 751 return (le32toh(val)); 752 } 753 754 static int 755 rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 756 { 757 int ntries; 758 759 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 760 rsu_ms_delay(sc); 761 for (ntries = 0; ntries < 50; ntries++) { 762 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 763 return (0); 764 rsu_ms_delay(sc); 765 } 766 return (ETIMEDOUT); 767 } 768 769 static uint8_t 770 rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 771 { 772 uint32_t reg; 773 int ntries; 774 775 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 776 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 777 reg &= ~R92S_EFUSE_CTRL_VALID; 778 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 779 /* Wait for read operation to complete. */ 780 for (ntries = 0; ntries < 100; ntries++) { 781 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 782 if (reg & R92S_EFUSE_CTRL_VALID) 783 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 784 rsu_ms_delay(sc); 785 } 786 device_printf(sc->sc_dev, 787 "could not read efuse byte at address 0x%x\n", addr); 788 return (0xff); 789 } 790 791 static int 792 rsu_read_rom(struct rsu_softc *sc) 793 { 794 uint8_t *rom = sc->rom; 795 uint16_t addr = 0; 796 uint32_t reg; 797 uint8_t off, msk; 798 int i; 799 800 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 801 reg = rsu_read_1(sc, R92S_EE_9346CR); 802 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 803 return (EIO); 804 805 /* Turn on 2.5V to prevent eFuse leakage. */ 806 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 807 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 808 rsu_ms_delay(sc); 809 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 810 811 /* Read full ROM image. */ 812 memset(&sc->rom, 0xff, sizeof(sc->rom)); 813 while (addr < 512) { 814 reg = rsu_efuse_read_1(sc, addr); 815 if (reg == 0xff) 816 break; 817 addr++; 818 off = reg >> 4; 819 msk = reg & 0xf; 820 for (i = 0; i < 4; i++) { 821 if (msk & (1 << i)) 822 continue; 823 rom[off * 8 + i * 2 + 0] = 824 rsu_efuse_read_1(sc, addr); 825 addr++; 826 rom[off * 8 + i * 2 + 1] = 827 rsu_efuse_read_1(sc, addr); 828 addr++; 829 } 830 } 831 #ifdef USB_DEBUG 832 if (rsu_debug >= 5) { 833 /* Dump ROM content. */ 834 printf("\n"); 835 for (i = 0; i < sizeof(sc->rom); i++) 836 printf("%02x:", rom[i]); 837 printf("\n"); 838 } 839 #endif 840 return (0); 841 } 842 843 static int 844 rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 845 { 846 struct rsu_data *data; 847 struct r92s_tx_desc *txd; 848 struct r92s_fw_cmd_hdr *cmd; 849 int cmdsz, xferlen; 850 851 data = rsu_getbuf(sc); 852 if (data == NULL) 853 return (ENOMEM); 854 855 /* Round-up command length to a multiple of 8 bytes. */ 856 cmdsz = (len + 7) & ~7; 857 858 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 859 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 860 memset(data->buf, 0, xferlen); 861 862 /* Setup Tx descriptor. */ 863 txd = (struct r92s_tx_desc *)data->buf; 864 txd->txdw0 = htole32( 865 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 866 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 867 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 868 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 869 870 /* Setup command header. */ 871 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 872 cmd->len = htole16(cmdsz); 873 cmd->code = code; 874 cmd->seq = sc->cmd_seq; 875 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 876 877 /* Copy command payload. */ 878 memcpy(&cmd[1], buf, len); 879 880 DPRINTFN(2, "Tx cmd code=0x%x len=0x%x\n", code, cmdsz); 881 data->buflen = xferlen; 882 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 883 usbd_transfer_start(sc->sc_xfer[RSU_BULK_TX_VO]); 884 885 return (0); 886 } 887 888 /* ARGSUSED */ 889 static void 890 rsu_calib_task(void *arg, int pending __unused) 891 { 892 struct rsu_softc *sc = arg; 893 uint32_t reg; 894 895 DPRINTFN(6, "running calibration task\n"); 896 RSU_LOCK(sc); 897 #ifdef notyet 898 /* Read WPS PBC status. */ 899 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 900 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 901 rsu_write_1(sc, R92S_GPIO_IO_SEL, 902 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 903 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 904 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 905 DPRINTF(("WPS PBC is pushed\n")); 906 #endif 907 /* Read current signal level. */ 908 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 909 reg = rsu_read_4(sc, R92S_IOCMD_DATA); 910 DPRINTFN(8, "RSSI=%d%%\n", reg >> 4); 911 } 912 if (sc->sc_calibrating) { 913 RSU_UNLOCK(sc); 914 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, 915 hz * 2); 916 } else 917 RSU_UNLOCK(sc); 918 } 919 920 static int 921 rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 922 { 923 struct rsu_vap *uvp = RSU_VAP(vap); 924 struct ieee80211com *ic = vap->iv_ic; 925 struct rsu_softc *sc = ic->ic_ifp->if_softc; 926 struct ieee80211_node *ni; 927 struct ieee80211_rateset *rs; 928 enum ieee80211_state ostate; 929 int error, startcal = 0; 930 931 ostate = vap->iv_state; 932 DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 933 ieee80211_state_name[nstate]); 934 935 IEEE80211_UNLOCK(ic); 936 if (ostate == IEEE80211_S_RUN) { 937 RSU_LOCK(sc); 938 /* Stop calibration. */ 939 sc->sc_calibrating = 0; 940 RSU_UNLOCK(sc); 941 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 942 /* Disassociate from our current BSS. */ 943 RSU_LOCK(sc); 944 rsu_disconnect(sc); 945 } else 946 RSU_LOCK(sc); 947 switch (nstate) { 948 case IEEE80211_S_INIT: 949 break; 950 case IEEE80211_S_AUTH: 951 ni = ieee80211_ref_node(vap->iv_bss); 952 error = rsu_join_bss(sc, ni); 953 ieee80211_free_node(ni); 954 if (error != 0) { 955 device_printf(sc->sc_dev, 956 "could not send join command\n"); 957 } 958 break; 959 case IEEE80211_S_RUN: 960 ni = ieee80211_ref_node(vap->iv_bss); 961 rs = &ni->ni_rates; 962 /* Indicate highest supported rate. */ 963 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 964 ieee80211_free_node(ni); 965 startcal = 1; 966 break; 967 default: 968 break; 969 } 970 sc->sc_calibrating = 1; 971 RSU_UNLOCK(sc); 972 IEEE80211_LOCK(ic); 973 /* Start periodic calibration. */ 974 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz * 2); 975 976 return (uvp->newstate(vap, nstate, arg)); 977 } 978 979 #ifdef notyet 980 static void 981 rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 982 { 983 struct r92s_fw_cmd_set_key key; 984 985 memset(&key, 0, sizeof(key)); 986 /* Map net80211 cipher to HW crypto algorithm. */ 987 switch (k->wk_cipher->ic_cipher) { 988 case IEEE80211_CIPHER_WEP: 989 if (k->wk_keylen < 8) 990 key.algo = R92S_KEY_ALGO_WEP40; 991 else 992 key.algo = R92S_KEY_ALGO_WEP104; 993 break; 994 case IEEE80211_CIPHER_TKIP: 995 key.algo = R92S_KEY_ALGO_TKIP; 996 break; 997 case IEEE80211_CIPHER_AES_CCM: 998 key.algo = R92S_KEY_ALGO_AES; 999 break; 1000 default: 1001 return; 1002 } 1003 key.id = k->wk_keyix; 1004 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1005 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1006 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1007 } 1008 1009 static void 1010 rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1011 { 1012 struct r92s_fw_cmd_set_key key; 1013 1014 memset(&key, 0, sizeof(key)); 1015 key.id = k->wk_keyix; 1016 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1017 } 1018 #endif 1019 1020 static int 1021 rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1022 { 1023 struct r92s_fw_cmd_sitesurvey cmd; 1024 struct ifnet *ifp = sc->sc_ifp; 1025 struct ieee80211com *ic = ifp->if_l2com; 1026 1027 memset(&cmd, 0, sizeof(cmd)); 1028 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->scan_pass == 1) 1029 cmd.active = htole32(1); 1030 cmd.limit = htole32(48); 1031 if (sc->scan_pass == 1 && vap->iv_des_nssid > 0) { 1032 /* Do a directed scan for second pass. */ 1033 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1034 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1035 vap->iv_des_ssid[0].len); 1036 1037 } 1038 DPRINTF("sending site survey command, pass=%d\n", sc->scan_pass); 1039 return (rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd))); 1040 } 1041 1042 static int 1043 rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1044 { 1045 struct ifnet *ifp = sc->sc_ifp; 1046 struct ieee80211com *ic = ifp->if_l2com; 1047 struct ieee80211vap *vap = ni->ni_vap; 1048 struct ndis_wlan_bssid_ex *bss; 1049 struct ndis_802_11_fixed_ies *fixed; 1050 struct r92s_fw_cmd_auth auth; 1051 uint8_t buf[sizeof(*bss) + 128], *frm; 1052 uint8_t opmode; 1053 int error; 1054 1055 /* Let the FW decide the opmode based on the capinfo field. */ 1056 opmode = NDIS802_11AUTOUNKNOWN; 1057 DPRINTF("setting operating mode to %d\n", opmode); 1058 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1059 if (error != 0) 1060 return (error); 1061 1062 memset(&auth, 0, sizeof(auth)); 1063 if (vap->iv_flags & IEEE80211_F_WPA) { 1064 auth.mode = R92S_AUTHMODE_WPA; 1065 auth.dot1x = ni->ni_authmode == IEEE80211_AUTH_8021X; 1066 } else 1067 auth.mode = R92S_AUTHMODE_OPEN; 1068 DPRINTF("setting auth mode to %d\n", auth.mode); 1069 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1070 if (error != 0) 1071 return (error); 1072 1073 memset(buf, 0, sizeof(buf)); 1074 bss = (struct ndis_wlan_bssid_ex *)buf; 1075 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1076 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1077 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1078 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1079 bss->privacy = htole32(1); 1080 bss->rssi = htole32(ni->ni_avgrssi); 1081 if (ic->ic_curmode == IEEE80211_MODE_11B) 1082 bss->networktype = htole32(NDIS802_11DS); 1083 else 1084 bss->networktype = htole32(NDIS802_11OFDM24); 1085 bss->config.len = htole32(sizeof(bss->config)); 1086 bss->config.bintval = htole32(ni->ni_intval); 1087 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1088 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1089 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1090 ni->ni_rates.rs_nrates); 1091 /* Write the fixed fields of the beacon frame. */ 1092 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1093 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1094 fixed->bintval = htole16(ni->ni_intval); 1095 fixed->capabilities = htole16(ni->ni_capinfo); 1096 /* Write IEs to be included in the association request. */ 1097 frm = (uint8_t *)&fixed[1]; 1098 frm = ieee80211_add_rsn(frm, vap); 1099 frm = ieee80211_add_wpa(frm, vap); 1100 frm = ieee80211_add_qos(frm, ni); 1101 if (ni->ni_flags & IEEE80211_NODE_HT) 1102 frm = ieee80211_add_htcap(frm, ni); 1103 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1104 bss->len = htole32(((frm - buf) + 3) & ~3); 1105 DPRINTF("sending join bss command to %s chan %d\n", 1106 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1107 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1108 } 1109 1110 static int 1111 rsu_disconnect(struct rsu_softc *sc) 1112 { 1113 uint32_t zero = 0; /* :-) */ 1114 1115 /* Disassociate from our current BSS. */ 1116 DPRINTF("sending disconnect command\n"); 1117 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1118 } 1119 1120 static void 1121 rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1122 { 1123 struct ifnet *ifp = sc->sc_ifp; 1124 struct ieee80211com *ic = ifp->if_l2com; 1125 struct ieee80211_frame *wh; 1126 struct ieee80211_channel *c; 1127 struct ndis_wlan_bssid_ex *bss; 1128 struct mbuf *m; 1129 int pktlen; 1130 1131 if (__predict_false(len < sizeof(*bss))) 1132 return; 1133 bss = (struct ndis_wlan_bssid_ex *)buf; 1134 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1135 return; 1136 1137 DPRINTFN(2, "found BSS %s: len=%d chan=%d inframode=%d " 1138 "networktype=%d privacy=%d\n", 1139 ether_sprintf(bss->macaddr), le32toh(bss->len), 1140 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1141 le32toh(bss->networktype), le32toh(bss->privacy)); 1142 1143 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1144 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1145 if (__predict_false(pktlen > MCLBYTES)) 1146 return; 1147 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1148 if (__predict_false(m == NULL)) 1149 return; 1150 wh = mtod(m, struct ieee80211_frame *); 1151 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1152 IEEE80211_FC0_SUBTYPE_BEACON; 1153 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1154 USETW(wh->i_dur, 0); 1155 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr); 1156 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1157 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1158 *(uint16_t *)wh->i_seq = 0; 1159 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1160 1161 /* Finalize mbuf. */ 1162 m->m_pkthdr.len = m->m_len = pktlen; 1163 m->m_pkthdr.rcvif = ifp; 1164 /* Fix the channel. */ 1165 c = ieee80211_find_channel_byieee(ic, 1166 le32toh(bss->config.dsconfig), 1167 IEEE80211_CHAN_G); 1168 if (c) { 1169 ic->ic_curchan = c; 1170 ieee80211_radiotap_chan_change(ic); 1171 } 1172 /* XXX avoid a LOR */ 1173 RSU_UNLOCK(sc); 1174 ieee80211_input_all(ic, m, le32toh(bss->rssi), 0); 1175 RSU_LOCK(sc); 1176 } 1177 1178 static void 1179 rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1180 { 1181 struct ifnet *ifp = sc->sc_ifp; 1182 struct ieee80211com *ic = ifp->if_l2com; 1183 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1184 struct ieee80211_node *ni = vap->iv_bss; 1185 struct r92s_event_join_bss *rsp; 1186 int res; 1187 1188 if (__predict_false(len < sizeof(*rsp))) 1189 return; 1190 rsp = (struct r92s_event_join_bss *)buf; 1191 res = (int)le32toh(rsp->join_res); 1192 1193 DPRINTF("Rx join BSS event len=%d res=%d\n", len, res); 1194 if (res <= 0) { 1195 RSU_UNLOCK(sc); 1196 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1197 RSU_LOCK(sc); 1198 return; 1199 } 1200 DPRINTF("associated with %s associd=%d\n", 1201 ether_sprintf(rsp->bss.macaddr), le32toh(rsp->associd)); 1202 ni->ni_associd = le32toh(rsp->associd) | 0xc000; 1203 RSU_UNLOCK(sc); 1204 ieee80211_new_state(vap, IEEE80211_S_RUN, 1205 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1206 RSU_LOCK(sc); 1207 } 1208 1209 static void 1210 rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1211 { 1212 struct ifnet *ifp = sc->sc_ifp; 1213 struct ieee80211com *ic = ifp->if_l2com; 1214 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1215 1216 DPRINTFN(4, "Rx event code=%d len=%d\n", code, len); 1217 switch (code) { 1218 case R92S_EVT_SURVEY: 1219 if (vap->iv_state == IEEE80211_S_SCAN) 1220 rsu_event_survey(sc, buf, len); 1221 break; 1222 case R92S_EVT_SURVEY_DONE: 1223 DPRINTF("site survey pass %d done, found %d BSS\n", 1224 sc->scan_pass, le32toh(*(uint32_t *)buf)); 1225 if (vap->iv_state != IEEE80211_S_SCAN) 1226 break; /* Ignore if not scanning. */ 1227 if (sc->scan_pass == 0 && vap->iv_des_nssid != 0) { 1228 /* Schedule a directed scan for hidden APs. */ 1229 sc->scan_pass = 1; 1230 RSU_UNLOCK(sc); 1231 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1232 RSU_LOCK(sc); 1233 break; 1234 } 1235 sc->scan_pass = 0; 1236 break; 1237 case R92S_EVT_JOIN_BSS: 1238 if (vap->iv_state == IEEE80211_S_AUTH) 1239 rsu_event_join_bss(sc, buf, len); 1240 break; 1241 case R92S_EVT_DEL_STA: 1242 DPRINTF("disassociated from %s\n", ether_sprintf(buf)); 1243 if (vap->iv_state == IEEE80211_S_RUN && 1244 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1245 RSU_UNLOCK(sc); 1246 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1247 RSU_LOCK(sc); 1248 } 1249 break; 1250 case R92S_EVT_WPS_PBC: 1251 DPRINTF("WPS PBC pushed.\n"); 1252 break; 1253 case R92S_EVT_FWDBG: 1254 if (ifp->if_flags & IFF_DEBUG) { 1255 buf[60] = '\0'; 1256 printf("FWDBG: %s\n", (char *)buf); 1257 } 1258 break; 1259 } 1260 } 1261 1262 static void 1263 rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1264 { 1265 struct r92s_fw_cmd_hdr *cmd; 1266 int cmdsz; 1267 1268 DPRINTFN(6, "Rx events len=%d\n", len); 1269 1270 /* Skip Rx status. */ 1271 buf += sizeof(struct r92s_rx_stat); 1272 len -= sizeof(struct r92s_rx_stat); 1273 1274 /* Process all events. */ 1275 for (;;) { 1276 /* Check that command header fits. */ 1277 if (__predict_false(len < sizeof(*cmd))) 1278 break; 1279 cmd = (struct r92s_fw_cmd_hdr *)buf; 1280 /* Check that command payload fits. */ 1281 cmdsz = le16toh(cmd->len); 1282 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1283 break; 1284 1285 /* Process firmware event. */ 1286 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1287 1288 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1289 break; 1290 buf += sizeof(*cmd) + cmdsz; 1291 len -= sizeof(*cmd) + cmdsz; 1292 } 1293 } 1294 1295 static int8_t 1296 rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1297 { 1298 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1299 struct r92s_rx_phystat *phy; 1300 struct r92s_rx_cck *cck; 1301 uint8_t rpt; 1302 int8_t rssi; 1303 1304 if (rate <= 3) { 1305 cck = (struct r92s_rx_cck *)physt; 1306 rpt = (cck->agc_rpt >> 6) & 0x3; 1307 rssi = cck->agc_rpt & 0x3e; 1308 rssi = cckoff[rpt] - rssi; 1309 } else { /* OFDM/HT. */ 1310 phy = (struct r92s_rx_phystat *)physt; 1311 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1312 } 1313 return (rssi); 1314 } 1315 1316 static struct mbuf * 1317 rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi) 1318 { 1319 struct ifnet *ifp = sc->sc_ifp; 1320 struct ieee80211com *ic = ifp->if_l2com; 1321 struct ieee80211_frame *wh; 1322 struct r92s_rx_stat *stat; 1323 uint32_t rxdw0, rxdw3; 1324 struct mbuf *m; 1325 uint8_t rate; 1326 int infosz; 1327 1328 stat = (struct r92s_rx_stat *)buf; 1329 rxdw0 = le32toh(stat->rxdw0); 1330 rxdw3 = le32toh(stat->rxdw3); 1331 1332 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1333 ifp->if_ierrors++; 1334 return NULL; 1335 } 1336 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1337 ifp->if_ierrors++; 1338 return NULL; 1339 } 1340 1341 rate = MS(rxdw3, R92S_RXDW3_RATE); 1342 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1343 1344 /* Get RSSI from PHY status descriptor if present. */ 1345 if (infosz != 0) 1346 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1347 else 1348 *rssi = 0; 1349 1350 DPRINTFN(5, "Rx frame len=%d rate=%d infosz=%d rssi=%d\n", 1351 pktlen, rate, infosz, *rssi); 1352 1353 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1354 if (__predict_false(m == NULL)) { 1355 ifp->if_ierrors++; 1356 return NULL; 1357 } 1358 /* Finalize mbuf. */ 1359 m->m_pkthdr.rcvif = ifp; 1360 /* Hardware does Rx TCP checksum offload. */ 1361 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1362 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1363 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1364 } 1365 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1366 memcpy(mtod(m, uint8_t *), wh, pktlen); 1367 m->m_pkthdr.len = m->m_len = pktlen; 1368 1369 if (ieee80211_radiotap_active(ic)) { 1370 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1371 1372 /* Map HW rate index to 802.11 rate. */ 1373 tap->wr_flags = 2; 1374 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1375 switch (rate) { 1376 /* CCK. */ 1377 case 0: tap->wr_rate = 2; break; 1378 case 1: tap->wr_rate = 4; break; 1379 case 2: tap->wr_rate = 11; break; 1380 case 3: tap->wr_rate = 22; break; 1381 /* OFDM. */ 1382 case 4: tap->wr_rate = 12; break; 1383 case 5: tap->wr_rate = 18; break; 1384 case 6: tap->wr_rate = 24; break; 1385 case 7: tap->wr_rate = 36; break; 1386 case 8: tap->wr_rate = 48; break; 1387 case 9: tap->wr_rate = 72; break; 1388 case 10: tap->wr_rate = 96; break; 1389 case 11: tap->wr_rate = 108; break; 1390 } 1391 } else if (rate >= 12) { /* MCS0~15. */ 1392 /* Bit 7 set means HT MCS instead of rate. */ 1393 tap->wr_rate = 0x80 | (rate - 12); 1394 } 1395 tap->wr_dbm_antsignal = *rssi; 1396 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1397 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1398 } 1399 1400 return (m); 1401 } 1402 1403 static struct mbuf * 1404 rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi) 1405 { 1406 struct r92s_rx_stat *stat; 1407 uint32_t rxdw0; 1408 int totlen, pktlen, infosz, npkts; 1409 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1410 1411 /* Get the number of encapsulated frames. */ 1412 stat = (struct r92s_rx_stat *)buf; 1413 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1414 DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 1415 1416 /* Process all of them. */ 1417 while (npkts-- > 0) { 1418 if (__predict_false(len < sizeof(*stat))) 1419 break; 1420 stat = (struct r92s_rx_stat *)buf; 1421 rxdw0 = le32toh(stat->rxdw0); 1422 1423 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1424 if (__predict_false(pktlen == 0)) 1425 break; 1426 1427 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1428 1429 /* Make sure everything fits in xfer. */ 1430 totlen = sizeof(*stat) + infosz + pktlen; 1431 if (__predict_false(totlen > len)) 1432 break; 1433 1434 /* Process 802.11 frame. */ 1435 m = rsu_rx_frame(sc, buf, pktlen, rssi); 1436 if (m0 == NULL) 1437 m0 = m; 1438 if (prevm == NULL) 1439 prevm = m; 1440 else { 1441 prevm->m_next = m; 1442 prevm = m; 1443 } 1444 /* Next chunk is 128-byte aligned. */ 1445 totlen = (totlen + 127) & ~127; 1446 buf += totlen; 1447 len -= totlen; 1448 } 1449 1450 return (m0); 1451 } 1452 1453 static struct mbuf * 1454 rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi) 1455 { 1456 struct rsu_softc *sc = data->sc; 1457 struct r92s_rx_stat *stat; 1458 int len; 1459 1460 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1461 1462 if (__predict_false(len < sizeof(*stat))) { 1463 DPRINTF("xfer too short %d\n", len); 1464 sc->sc_ifp->if_ierrors++; 1465 return (NULL); 1466 } 1467 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1468 stat = (struct r92s_rx_stat *)data->buf; 1469 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1470 rsu_rx_multi_event(sc, data->buf, len); 1471 /* No packets to process. */ 1472 return (NULL); 1473 } else 1474 return (rsu_rx_multi_frame(sc, data->buf, len, rssi)); 1475 } 1476 1477 static void 1478 rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1479 { 1480 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1481 struct ifnet *ifp = sc->sc_ifp; 1482 struct ieee80211com *ic = ifp->if_l2com; 1483 struct ieee80211_frame *wh; 1484 struct ieee80211_node *ni; 1485 struct mbuf *m = NULL, *next; 1486 struct rsu_data *data; 1487 int rssi = 1; 1488 1489 RSU_ASSERT_LOCKED(sc); 1490 1491 switch (USB_GET_STATE(xfer)) { 1492 case USB_ST_TRANSFERRED: 1493 data = STAILQ_FIRST(&sc->sc_rx_active); 1494 if (data == NULL) 1495 goto tr_setup; 1496 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1497 m = rsu_rxeof(xfer, data, &rssi); 1498 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1499 /* FALLTHROUGH */ 1500 case USB_ST_SETUP: 1501 tr_setup: 1502 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1503 if (data == NULL) { 1504 KASSERT(m == NULL, ("mbuf isn't NULL")); 1505 return; 1506 } 1507 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1508 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1509 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1510 usbd_xfer_max_len(xfer)); 1511 usbd_transfer_submit(xfer); 1512 /* 1513 * To avoid LOR we should unlock our private mutex here to call 1514 * ieee80211_input() because here is at the end of a USB 1515 * callback and safe to unlock. 1516 */ 1517 RSU_UNLOCK(sc); 1518 while (m != NULL) { 1519 next = m->m_next; 1520 m->m_next = NULL; 1521 wh = mtod(m, struct ieee80211_frame *); 1522 ni = ieee80211_find_rxnode(ic, 1523 (struct ieee80211_frame_min *)wh); 1524 if (ni != NULL) { 1525 (void)ieee80211_input(ni, m, rssi, 0); 1526 ieee80211_free_node(ni); 1527 } else 1528 (void)ieee80211_input_all(ic, m, rssi, 0); 1529 m = next; 1530 } 1531 RSU_LOCK(sc); 1532 break; 1533 default: 1534 /* needs it to the inactive queue due to a error. */ 1535 data = STAILQ_FIRST(&sc->sc_rx_active); 1536 if (data != NULL) { 1537 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1538 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1539 } 1540 if (error != USB_ERR_CANCELLED) { 1541 usbd_xfer_set_stall(xfer); 1542 ifp->if_ierrors++; 1543 goto tr_setup; 1544 } 1545 break; 1546 } 1547 1548 } 1549 1550 1551 static void 1552 rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1553 { 1554 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1555 struct ifnet *ifp = sc->sc_ifp; 1556 struct mbuf *m; 1557 1558 RSU_ASSERT_LOCKED(sc); 1559 1560 /* 1561 * Do any tx complete callback. Note this must be done before releasing 1562 * the node reference. 1563 */ 1564 if (data->m) { 1565 m = data->m; 1566 if (m->m_flags & M_TXCB) { 1567 /* XXX status? */ 1568 ieee80211_process_callback(data->ni, m, 0); 1569 } 1570 m_freem(m); 1571 data->m = NULL; 1572 } 1573 if (data->ni) { 1574 ieee80211_free_node(data->ni); 1575 data->ni = NULL; 1576 } 1577 sc->sc_tx_timer = 0; 1578 ifp->if_opackets++; 1579 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1580 } 1581 1582 static void 1583 rsu_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1584 { 1585 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1586 struct ifnet *ifp = sc->sc_ifp; 1587 struct rsu_data *data; 1588 1589 RSU_ASSERT_LOCKED(sc); 1590 1591 switch (USB_GET_STATE(xfer)) { 1592 case USB_ST_TRANSFERRED: 1593 data = STAILQ_FIRST(&sc->sc_tx_active); 1594 if (data == NULL) 1595 goto tr_setup; 1596 DPRINTF("transfer done %p\n", data); 1597 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1598 rsu_txeof(xfer, data); 1599 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1600 /* FALLTHROUGH */ 1601 case USB_ST_SETUP: 1602 tr_setup: 1603 data = STAILQ_FIRST(&sc->sc_tx_pending); 1604 if (data == NULL) { 1605 DPRINTF("empty pending queue sc %p\n", sc); 1606 return; 1607 } 1608 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1609 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1610 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1611 DPRINTF("submitting transfer %p\n", data); 1612 usbd_transfer_submit(xfer); 1613 rsu_start_locked(ifp); 1614 break; 1615 default: 1616 data = STAILQ_FIRST(&sc->sc_tx_active); 1617 if (data == NULL) 1618 goto tr_setup; 1619 if (data->ni != NULL) { 1620 ieee80211_free_node(data->ni); 1621 data->ni = NULL; 1622 ifp->if_oerrors++; 1623 } 1624 if (error != USB_ERR_CANCELLED) { 1625 usbd_xfer_set_stall(xfer); 1626 goto tr_setup; 1627 } 1628 break; 1629 } 1630 } 1631 1632 static int 1633 rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 1634 struct mbuf *m0, struct rsu_data *data) 1635 { 1636 struct ifnet *ifp = sc->sc_ifp; 1637 struct ieee80211com *ic = ifp->if_l2com; 1638 struct ieee80211vap *vap = ni->ni_vap; 1639 struct ieee80211_frame *wh; 1640 struct ieee80211_key *k = NULL; 1641 struct r92s_tx_desc *txd; 1642 struct usb_xfer *xfer; 1643 uint8_t type, tid = 0; 1644 int hasqos, xferlen; 1645 struct usb_xfer *rsu_pipes[4] = { 1646 sc->sc_xfer[RSU_BULK_TX_BE], 1647 sc->sc_xfer[RSU_BULK_TX_BK], 1648 sc->sc_xfer[RSU_BULK_TX_VI], 1649 sc->sc_xfer[RSU_BULK_TX_VO] 1650 }; 1651 1652 RSU_ASSERT_LOCKED(sc); 1653 1654 wh = mtod(m0, struct ieee80211_frame *); 1655 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1656 1657 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1658 k = ieee80211_crypto_encap(ni, m0); 1659 if (k == NULL) { 1660 device_printf(sc->sc_dev, 1661 "ieee80211_crypto_encap returns NULL.\n"); 1662 /* XXX we don't expect the fragmented frames */ 1663 m_freem(m0); 1664 return (ENOBUFS); 1665 } 1666 wh = mtod(m0, struct ieee80211_frame *); 1667 } 1668 switch (type) { 1669 case IEEE80211_FC0_TYPE_CTL: 1670 case IEEE80211_FC0_TYPE_MGT: 1671 xfer = sc->sc_xfer[RSU_BULK_TX_VO]; 1672 break; 1673 default: 1674 KASSERT(M_WME_GETAC(m0) < 4, 1675 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1676 xfer = rsu_pipes[M_WME_GETAC(m0)]; 1677 break; 1678 } 1679 hasqos = 0; 1680 1681 /* Fill Tx descriptor. */ 1682 txd = (struct r92s_tx_desc *)data->buf; 1683 memset(txd, 0, sizeof(*txd)); 1684 1685 txd->txdw0 |= htole32( 1686 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 1687 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1688 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1689 1690 txd->txdw1 |= htole32( 1691 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | 1692 SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_BE)); 1693 if (!hasqos) 1694 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 1695 #ifdef notyet 1696 if (k != NULL) { 1697 switch (k->wk_cipher->ic_cipher) { 1698 case IEEE80211_CIPHER_WEP: 1699 cipher = R92S_TXDW1_CIPHER_WEP; 1700 break; 1701 case IEEE80211_CIPHER_TKIP: 1702 cipher = R92S_TXDW1_CIPHER_TKIP; 1703 break; 1704 case IEEE80211_CIPHER_AES_CCM: 1705 cipher = R92S_TXDW1_CIPHER_AES; 1706 break; 1707 default: 1708 cipher = R92S_TXDW1_CIPHER_NONE; 1709 } 1710 txd->txdw1 |= htole32( 1711 SM(R92S_TXDW1_CIPHER, cipher) | 1712 SM(R92S_TXDW1_KEYIDX, k->k_id)); 1713 } 1714 #endif 1715 txd->txdw2 |= htole32(R92S_TXDW2_BK); 1716 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1717 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 1718 /* 1719 * Firmware will use and increment the sequence number for the 1720 * specified TID. 1721 */ 1722 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, tid)); 1723 1724 if (ieee80211_radiotap_active_vap(vap)) { 1725 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 1726 1727 tap->wt_flags = 0; 1728 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1729 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1730 ieee80211_radiotap_tx(vap, m0); 1731 } 1732 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 1733 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 1734 1735 data->buflen = xferlen; 1736 data->ni = ni; 1737 data->m = m0; 1738 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1739 usbd_transfer_start(xfer); 1740 1741 return (0); 1742 } 1743 1744 static void 1745 rsu_start(struct ifnet *ifp) 1746 { 1747 struct rsu_softc *sc = ifp->if_softc; 1748 1749 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1750 return; 1751 1752 RSU_LOCK(sc); 1753 rsu_start_locked(ifp); 1754 RSU_UNLOCK(sc); 1755 } 1756 1757 static void 1758 rsu_start_locked(struct ifnet *ifp) 1759 { 1760 struct rsu_softc *sc = ifp->if_softc; 1761 struct ieee80211_node *ni; 1762 struct mbuf *m; 1763 struct rsu_data *bf; 1764 1765 RSU_ASSERT_LOCKED(sc); 1766 1767 for (;;) { 1768 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1769 if (m == NULL) 1770 break; 1771 bf = rsu_getbuf(sc); 1772 if (bf == NULL) { 1773 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1774 break; 1775 } 1776 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1777 m->m_pkthdr.rcvif = NULL; 1778 1779 if (rsu_tx_start(sc, ni, m, bf) != 0) { 1780 ifp->if_oerrors++; 1781 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1782 ieee80211_free_node(ni); 1783 break; 1784 } 1785 sc->sc_tx_timer = 5; 1786 callout_reset(&sc->sc_watchdog_ch, hz, rsu_watchdog, sc); 1787 } 1788 } 1789 1790 static void 1791 rsu_watchdog(void *arg) 1792 { 1793 struct rsu_softc *sc = arg; 1794 struct ifnet *ifp = sc->sc_ifp; 1795 1796 if (sc->sc_tx_timer > 0) { 1797 if (--sc->sc_tx_timer == 0) { 1798 device_printf(sc->sc_dev, "device timeout\n"); 1799 /* rsu_init(ifp); XXX needs a process context! */ 1800 ifp->if_oerrors++; 1801 return; 1802 } 1803 callout_reset(&sc->sc_watchdog_ch, hz, rsu_watchdog, sc); 1804 } 1805 } 1806 1807 static int 1808 rsu_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1809 { 1810 struct ieee80211com *ic = ifp->if_l2com; 1811 struct ifreq *ifr = (struct ifreq *) data; 1812 int error = 0, startall = 0; 1813 1814 switch (cmd) { 1815 case SIOCSIFFLAGS: 1816 if (ifp->if_flags & IFF_UP) { 1817 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1818 rsu_init(ifp->if_softc); 1819 startall = 1; 1820 } 1821 } else { 1822 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1823 rsu_stop(ifp, 1); 1824 } 1825 if (startall) 1826 ieee80211_start_all(ic); 1827 break; 1828 case SIOCGIFMEDIA: 1829 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1830 break; 1831 case SIOCGIFADDR: 1832 error = ether_ioctl(ifp, cmd, data); 1833 break; 1834 default: 1835 error = EINVAL; 1836 break; 1837 } 1838 1839 return (error); 1840 } 1841 1842 /* 1843 * Power on sequence for A-cut adapters. 1844 */ 1845 static void 1846 rsu_power_on_acut(struct rsu_softc *sc) 1847 { 1848 uint32_t reg; 1849 1850 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 1851 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 1852 1853 /* Enable AFE macro block's bandgap and Mbias. */ 1854 rsu_write_1(sc, R92S_AFE_MISC, 1855 rsu_read_1(sc, R92S_AFE_MISC) | 1856 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 1857 /* Enable LDOA15 block. */ 1858 rsu_write_1(sc, R92S_LDOA15_CTRL, 1859 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 1860 1861 rsu_write_1(sc, R92S_SPS1_CTRL, 1862 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 1863 usb_pause_mtx(&sc->sc_mtx, 2 * hz); 1864 /* Enable switch regulator block. */ 1865 rsu_write_1(sc, R92S_SPS1_CTRL, 1866 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 1867 1868 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 1869 1870 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1871 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 1872 1873 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1874 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 1875 1876 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1877 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 1878 1879 /* Enable AFE clock. */ 1880 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 1881 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 1882 /* Enable AFE PLL macro block. */ 1883 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 1884 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 1885 /* Attach AFE PLL to MACTOP/BB. */ 1886 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 1887 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 1888 1889 /* Switch to 40MHz clock instead of 80MHz. */ 1890 rsu_write_2(sc, R92S_SYS_CLKR, 1891 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 1892 1893 /* Enable MAC clock. */ 1894 rsu_write_2(sc, R92S_SYS_CLKR, 1895 rsu_read_2(sc, R92S_SYS_CLKR) | 1896 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 1897 1898 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 1899 1900 /* Enable digital core and IOREG R/W. */ 1901 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1902 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 1903 1904 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1905 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 1906 1907 /* Switch the control path to firmware. */ 1908 reg = rsu_read_2(sc, R92S_SYS_CLKR); 1909 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 1910 rsu_write_2(sc, R92S_SYS_CLKR, reg); 1911 1912 rsu_write_2(sc, R92S_CR, 0x37fc); 1913 1914 /* Fix USB RX FIFO issue. */ 1915 rsu_write_1(sc, 0xfe5c, 1916 rsu_read_1(sc, 0xfe5c) | 0x80); 1917 rsu_write_1(sc, 0x00ab, 1918 rsu_read_1(sc, 0x00ab) | 0xc0); 1919 1920 rsu_write_1(sc, R92S_SYS_CLKR, 1921 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 1922 } 1923 1924 /* 1925 * Power on sequence for B-cut and C-cut adapters. 1926 */ 1927 static void 1928 rsu_power_on_bcut(struct rsu_softc *sc) 1929 { 1930 uint32_t reg; 1931 int ntries; 1932 1933 /* Prevent eFuse leakage. */ 1934 rsu_write_1(sc, 0x37, 0xb0); 1935 usb_pause_mtx(&sc->sc_mtx, 10); 1936 rsu_write_1(sc, 0x37, 0x30); 1937 1938 /* Switch the control path to hardware. */ 1939 reg = rsu_read_2(sc, R92S_SYS_CLKR); 1940 if (reg & R92S_FWHW_SEL) { 1941 rsu_write_2(sc, R92S_SYS_CLKR, 1942 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 1943 } 1944 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1945 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 1946 rsu_ms_delay(sc); 1947 1948 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 1949 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 1950 1951 reg = rsu_read_1(sc, R92S_AFE_MISC); 1952 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 1953 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 1954 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 1955 1956 /* Enable PLL. */ 1957 rsu_write_1(sc, R92S_LDOA15_CTRL, 1958 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 1959 1960 rsu_write_1(sc, R92S_LDOV12D_CTRL, 1961 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 1962 1963 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1964 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 1965 1966 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1967 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 1968 1969 /* Support 64KB IMEM. */ 1970 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1971 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 1972 1973 /* Enable AFE clock. */ 1974 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 1975 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 1976 /* Enable AFE PLL macro block. */ 1977 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 1978 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 1979 rsu_ms_delay(sc); 1980 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 1981 rsu_ms_delay(sc); 1982 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 1983 rsu_ms_delay(sc); 1984 1985 /* Attach AFE PLL to MACTOP/BB. */ 1986 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 1987 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 1988 1989 /* Switch to 40MHz clock. */ 1990 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 1991 /* Disable CPU clock and 80MHz SSC. */ 1992 rsu_write_1(sc, R92S_SYS_CLKR, 1993 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 1994 /* Enable MAC clock. */ 1995 rsu_write_2(sc, R92S_SYS_CLKR, 1996 rsu_read_2(sc, R92S_SYS_CLKR) | 1997 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 1998 1999 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2000 2001 /* Enable digital core and IOREG R/W. */ 2002 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2003 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2004 2005 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2006 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2007 2008 /* Switch the control path to firmware. */ 2009 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2010 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2011 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2012 2013 rsu_write_2(sc, R92S_CR, 0x37fc); 2014 2015 /* Fix USB RX FIFO issue. */ 2016 rsu_write_1(sc, 0xfe5c, 2017 rsu_read_1(sc, 0xfe5c) | 0x80); 2018 2019 rsu_write_1(sc, R92S_SYS_CLKR, 2020 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2021 2022 rsu_write_1(sc, 0xfe1c, 0x80); 2023 2024 /* Make sure TxDMA is ready to download firmware. */ 2025 for (ntries = 0; ntries < 20; ntries++) { 2026 reg = rsu_read_1(sc, R92S_TCR); 2027 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2028 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2029 break; 2030 rsu_ms_delay(sc); 2031 } 2032 if (ntries == 20) { 2033 DPRINTF("TxDMA is not ready\n"); 2034 /* Reset TxDMA. */ 2035 reg = rsu_read_1(sc, R92S_CR); 2036 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2037 rsu_ms_delay(sc); 2038 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2039 } 2040 } 2041 2042 static void 2043 rsu_power_off(struct rsu_softc *sc) 2044 { 2045 /* Turn RF off. */ 2046 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2047 usb_pause_mtx(&sc->sc_mtx, 5); 2048 2049 /* Turn MAC off. */ 2050 /* Switch control path. */ 2051 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2052 /* Reset MACTOP. */ 2053 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2054 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2055 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2056 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2057 2058 /* Disable AFE PLL. */ 2059 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2060 /* Disable A15V. */ 2061 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2062 /* Disable eFuse 1.2V. */ 2063 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2064 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2065 /* Enable AFE macro block's bandgap and Mbias. */ 2066 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2067 /* Disable 1.6V LDO. */ 2068 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2069 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2070 } 2071 2072 static int 2073 rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2074 { 2075 struct rsu_data *data; 2076 struct r92s_tx_desc *txd; 2077 int mlen; 2078 2079 while (len > 0) { 2080 data = rsu_getbuf(sc); 2081 if (data == NULL) 2082 return (ENOMEM); 2083 txd = (struct r92s_tx_desc *)data->buf; 2084 memset(txd, 0, sizeof(*txd)); 2085 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2086 /* Last chunk. */ 2087 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2088 mlen = len; 2089 } else 2090 mlen = RSU_TXBUFSZ - sizeof(*txd); 2091 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2092 memcpy(&txd[1], buf, mlen); 2093 data->buflen = sizeof(*txd) + mlen; 2094 DPRINTF("starting transfer %p\n", data); 2095 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 2096 buf += mlen; 2097 len -= mlen; 2098 } 2099 usbd_transfer_start(sc->sc_xfer[RSU_BULK_TX_VO]); 2100 2101 return (0); 2102 } 2103 2104 static int 2105 rsu_load_firmware(struct rsu_softc *sc) 2106 { 2107 const struct r92s_fw_hdr *hdr; 2108 struct r92s_fw_priv *dmem; 2109 const uint8_t *imem, *emem; 2110 int imemsz, ememsz; 2111 const struct firmware *fw; 2112 size_t size; 2113 uint32_t reg; 2114 int ntries, error; 2115 2116 RSU_UNLOCK(sc); 2117 /* Read firmware image from the filesystem. */ 2118 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2119 device_printf(sc->sc_dev, 2120 "%s: failed load firmware of file rsu-rtl8712fw\n", 2121 __func__); 2122 RSU_LOCK(sc); 2123 return (ENXIO); 2124 } 2125 RSU_LOCK(sc); 2126 size = fw->datasize; 2127 if (size < sizeof(*hdr)) { 2128 device_printf(sc->sc_dev, "firmware too short\n"); 2129 error = EINVAL; 2130 goto fail; 2131 } 2132 hdr = (const struct r92s_fw_hdr *)fw->data; 2133 if (hdr->signature != htole16(0x8712) && 2134 hdr->signature != htole16(0x8192)) { 2135 device_printf(sc->sc_dev, 2136 "invalid firmware signature 0x%x\n", 2137 le16toh(hdr->signature)); 2138 error = EINVAL; 2139 goto fail; 2140 } 2141 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2142 hdr->month, hdr->day, hdr->hour, hdr->minute); 2143 2144 /* Make sure that driver and firmware are in sync. */ 2145 if (hdr->privsz != htole32(sizeof(*dmem))) { 2146 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2147 error = EINVAL; 2148 goto fail; 2149 } 2150 /* Get FW sections sizes. */ 2151 imemsz = le32toh(hdr->imemsz); 2152 ememsz = le32toh(hdr->sramsz); 2153 /* Check that all FW sections fit in image. */ 2154 if (size < sizeof(*hdr) + imemsz + ememsz) { 2155 device_printf(sc->sc_dev, "firmware too short\n"); 2156 error = EINVAL; 2157 goto fail; 2158 } 2159 imem = (const uint8_t *)&hdr[1]; 2160 emem = imem + imemsz; 2161 2162 /* Load IMEM section. */ 2163 error = rsu_fw_loadsection(sc, imem, imemsz); 2164 if (error != 0) { 2165 device_printf(sc->sc_dev, 2166 "could not load firmware section %s\n", "IMEM"); 2167 goto fail; 2168 } 2169 /* Wait for load to complete. */ 2170 for (ntries = 0; ntries < 10; ntries++) { 2171 usb_pause_mtx(&sc->sc_mtx, 10); 2172 reg = rsu_read_2(sc, R92S_TCR); 2173 if (reg & R92S_TCR_IMEM_CODE_DONE) 2174 break; 2175 } 2176 if (ntries == 10 || !(reg & R92S_TCR_IMEM_CHK_RPT)) { 2177 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2178 "IMEM"); 2179 error = ETIMEDOUT; 2180 goto fail; 2181 } 2182 2183 /* Load EMEM section. */ 2184 error = rsu_fw_loadsection(sc, emem, ememsz); 2185 if (error != 0) { 2186 device_printf(sc->sc_dev, 2187 "could not load firmware section %s\n", "EMEM"); 2188 goto fail; 2189 } 2190 /* Wait for load to complete. */ 2191 for (ntries = 0; ntries < 10; ntries++) { 2192 usb_pause_mtx(&sc->sc_mtx, 10); 2193 reg = rsu_read_2(sc, R92S_TCR); 2194 if (reg & R92S_TCR_EMEM_CODE_DONE) 2195 break; 2196 } 2197 if (ntries == 10 || !(reg & R92S_TCR_EMEM_CHK_RPT)) { 2198 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2199 "EMEM"); 2200 error = ETIMEDOUT; 2201 goto fail; 2202 } 2203 2204 /* Enable CPU. */ 2205 rsu_write_1(sc, R92S_SYS_CLKR, 2206 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2207 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2208 device_printf(sc->sc_dev, "could not enable system clock\n"); 2209 error = EIO; 2210 goto fail; 2211 } 2212 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2213 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2214 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2215 device_printf(sc->sc_dev, 2216 "could not enable microcontroller\n"); 2217 error = EIO; 2218 goto fail; 2219 } 2220 /* Wait for CPU to initialize. */ 2221 for (ntries = 0; ntries < 100; ntries++) { 2222 if (rsu_read_2(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2223 break; 2224 rsu_ms_delay(sc); 2225 } 2226 if (ntries == 100) { 2227 device_printf(sc->sc_dev, 2228 "timeout waiting for microcontroller\n"); 2229 error = ETIMEDOUT; 2230 goto fail; 2231 } 2232 2233 /* Update DMEM section before loading. */ 2234 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2235 memset(dmem, 0, sizeof(*dmem)); 2236 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2237 dmem->nendpoints = sc->npipes; 2238 dmem->rf_config = 0x12; /* 1T2R */ 2239 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2240 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2241 #ifdef notyet 2242 dmem->bw40_en = (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_40) != 0; 2243 #endif 2244 dmem->turbo_mode = 1; 2245 /* Load DMEM section. */ 2246 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2247 if (error != 0) { 2248 device_printf(sc->sc_dev, 2249 "could not load firmware section %s\n", "DMEM"); 2250 goto fail; 2251 } 2252 /* Wait for load to complete. */ 2253 for (ntries = 0; ntries < 100; ntries++) { 2254 if (rsu_read_2(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2255 break; 2256 rsu_ms_delay(sc); 2257 } 2258 if (ntries == 100) { 2259 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2260 "DMEM"); 2261 error = ETIMEDOUT; 2262 goto fail; 2263 } 2264 /* Wait for firmware readiness. */ 2265 for (ntries = 0; ntries < 60; ntries++) { 2266 if (!(rsu_read_2(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2267 break; 2268 rsu_ms_delay(sc); 2269 } 2270 if (ntries == 60) { 2271 device_printf(sc->sc_dev, 2272 "timeout waiting for firmware readiness\n"); 2273 error = ETIMEDOUT; 2274 goto fail; 2275 } 2276 fail: 2277 firmware_put(fw, FIRMWARE_UNLOAD); 2278 return (error); 2279 } 2280 2281 2282 static int 2283 rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2284 const struct ieee80211_bpf_params *params) 2285 { 2286 struct ieee80211com *ic = ni->ni_ic; 2287 struct ifnet *ifp = ic->ic_ifp; 2288 struct rsu_softc *sc = ifp->if_softc; 2289 struct rsu_data *bf; 2290 2291 /* prevent management frames from being sent if we're not ready */ 2292 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2293 m_freem(m); 2294 ieee80211_free_node(ni); 2295 return (ENETDOWN); 2296 } 2297 RSU_LOCK(sc); 2298 bf = rsu_getbuf(sc); 2299 if (bf == NULL) { 2300 ieee80211_free_node(ni); 2301 m_freem(m); 2302 RSU_UNLOCK(sc); 2303 return (ENOBUFS); 2304 } 2305 ifp->if_opackets++; 2306 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2307 ieee80211_free_node(ni); 2308 ifp->if_oerrors++; 2309 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2310 RSU_UNLOCK(sc); 2311 return (EIO); 2312 } 2313 RSU_UNLOCK(sc); 2314 sc->sc_tx_timer = 5; 2315 2316 return (0); 2317 } 2318 2319 static void 2320 rsu_init(void *arg) 2321 { 2322 struct rsu_softc *sc = arg; 2323 2324 RSU_LOCK(sc); 2325 rsu_init_locked(arg); 2326 RSU_UNLOCK(sc); 2327 } 2328 2329 static void 2330 rsu_init_locked(struct rsu_softc *sc) 2331 { 2332 struct ifnet *ifp = sc->sc_ifp; 2333 struct r92s_set_pwr_mode cmd; 2334 int error; 2335 2336 /* Init host async commands ring. */ 2337 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2338 2339 /* Allocate Tx/Rx buffers. */ 2340 error = rsu_alloc_rx_list(sc); 2341 if (error != 0) { 2342 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 2343 return; 2344 } 2345 error = rsu_alloc_tx_list(sc); 2346 if (error != 0) { 2347 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 2348 rsu_free_rx_list(sc); 2349 return; 2350 } 2351 /* Power on adapter. */ 2352 if (sc->cut == 1) 2353 rsu_power_on_acut(sc); 2354 else 2355 rsu_power_on_bcut(sc); 2356 /* Load firmware. */ 2357 error = rsu_load_firmware(sc); 2358 if (error != 0) 2359 goto fail; 2360 2361 /* Enable Rx TCP checksum offload. */ 2362 rsu_write_4(sc, R92S_RCR, 2363 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2364 /* Append PHY status. */ 2365 rsu_write_4(sc, R92S_RCR, 2366 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2367 2368 rsu_write_4(sc, R92S_CR, 2369 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2370 2371 /* Use 128 bytes pages. */ 2372 rsu_write_1(sc, 0x00b5, 2373 rsu_read_1(sc, 0x00b5) | 0x01); 2374 /* Enable USB Rx aggregation. */ 2375 rsu_write_1(sc, 0x00bd, 2376 rsu_read_1(sc, 0x00bd) | 0x80); 2377 /* Set USB Rx aggregation threshold. */ 2378 rsu_write_1(sc, 0x00d9, 0x01); 2379 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2380 rsu_write_1(sc, 0xfe5b, 0x04); 2381 /* Fix USB Rx FIFO issue. */ 2382 rsu_write_1(sc, 0xfe5c, 2383 rsu_read_1(sc, 0xfe5c) | 0x80); 2384 2385 /* Set MAC address. */ 2386 rsu_write_region_1(sc, R92S_MACID, IF_LLADDR(ifp), 2387 IEEE80211_ADDR_LEN); 2388 2389 /* It really takes 1.5 seconds for the firmware to boot: */ 2390 usb_pause_mtx(&sc->sc_mtx, (3 * hz) / 2); 2391 2392 DPRINTF("setting MAC address to %s\n", ether_sprintf(IF_LLADDR(ifp))); 2393 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, IF_LLADDR(ifp), 2394 IEEE80211_ADDR_LEN); 2395 if (error != 0) { 2396 device_printf(sc->sc_dev, "could not set MAC address\n"); 2397 goto fail; 2398 } 2399 2400 rsu_write_1(sc, R92S_USB_HRPWM, 2401 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 2402 2403 memset(&cmd, 0, sizeof(cmd)); 2404 cmd.mode = R92S_PS_MODE_ACTIVE; 2405 DPRINTF("setting ps mode to %d\n", cmd.mode); 2406 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 2407 if (error != 0) { 2408 device_printf(sc->sc_dev, "could not set PS mode\n"); 2409 goto fail; 2410 } 2411 2412 #if 0 2413 if (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_40) { 2414 /* Enable 40MHz mode. */ 2415 error = rsu_fw_iocmd(sc, 2416 SM(R92S_IOCMD_CLASS, 0xf4) | 2417 SM(R92S_IOCMD_INDEX, 0x00) | 2418 SM(R92S_IOCMD_VALUE, 0x0007)); 2419 if (error != 0) { 2420 device_printf(sc->sc_dev, 2421 "could not enable 40MHz mode\n"); 2422 goto fail; 2423 } 2424 } 2425 2426 /* Set default channel. */ 2427 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2428 #endif 2429 sc->scan_pass = 0; 2430 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2431 2432 /* We're ready to go. */ 2433 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2434 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2435 2436 callout_reset(&sc->sc_watchdog_ch, hz, rsu_watchdog, sc); 2437 2438 return; 2439 fail: 2440 rsu_free_rx_list(sc); 2441 rsu_free_tx_list(sc); 2442 return; 2443 } 2444 2445 static void 2446 rsu_stop(struct ifnet *ifp, int disable) 2447 { 2448 struct rsu_softc *sc = ifp->if_softc; 2449 2450 RSU_LOCK(sc); 2451 rsu_stop_locked(ifp, disable); 2452 RSU_UNLOCK(sc); 2453 } 2454 2455 static void 2456 rsu_stop_locked(struct ifnet *ifp, int disable __unused) 2457 { 2458 struct rsu_softc *sc = ifp->if_softc; 2459 int i; 2460 2461 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2462 callout_stop(&sc->sc_watchdog_ch); 2463 sc->sc_calibrating = 0; 2464 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2465 2466 /* Power off adapter. */ 2467 rsu_power_off(sc); 2468 2469 for (i = 0; i < RSU_N_TRANSFER; i++) 2470 usbd_transfer_stop(sc->sc_xfer[i]); 2471 } 2472 2473 static void 2474 rsu_ms_delay(struct rsu_softc *sc) 2475 { 2476 usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2477 } 2478