1 /*- 2 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * This driver supports several multiport USB-to-RS232 serial adapters driven 29 * by MosChip mos7820 and mos7840, bridge chips. 30 * The adapters are sold under many different brand names. 31 * 32 * Datasheets are available at MosChip www site at 33 * http://www.moschip.com. The datasheets don't contain full 34 * programming information for the chip. 35 * 36 * It is nornal to have only two enabled ports in devices, based on 37 * quad-port mos7840. 38 * 39 */ 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD$"); 42 43 #include <sys/stdint.h> 44 #include <sys/stddef.h> 45 #include <sys/param.h> 46 #include <sys/queue.h> 47 #include <sys/types.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/bus.h> 51 #include <sys/linker_set.h> 52 #include <sys/module.h> 53 #include <sys/lock.h> 54 #include <sys/mutex.h> 55 #include <sys/condvar.h> 56 #include <sys/sysctl.h> 57 #include <sys/sx.h> 58 #include <sys/unistd.h> 59 #include <sys/callout.h> 60 #include <sys/malloc.h> 61 #include <sys/priv.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdi_util.h> 66 #include <dev/usb/usb_cdc.h> 67 #include "usbdevs.h" 68 69 #define USB_DEBUG_VAR umcs_debug 70 #include <dev/usb/usb_debug.h> 71 #include <dev/usb/usb_process.h> 72 73 #include <dev/usb/serial/usb_serial.h> 74 75 #include <dev/usb/serial/umcs.h> 76 77 #define UMCS7840_MODVER 1 78 79 #ifdef USB_DEBUG 80 static int umcs_debug = 0; 81 82 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter"); 83 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RWTUN, &umcs_debug, 0, "Debug level"); 84 #endif /* USB_DEBUG */ 85 86 87 /* 88 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port) 89 * have ports 0 and 2, with ports 1 and 3 omitted. 90 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2. 91 * This driver trys to use physical numbers as much as possible. 92 */ 93 94 /* 95 * Indexed by PHYSICAL port number. 96 * Pack non-regular registers to array to easier if-less access. 97 */ 98 struct umcs7840_port_registers { 99 uint8_t reg_sp; /* SP register. */ 100 uint8_t reg_control; /* CONTROL register. */ 101 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be 102 * calculated */ 103 }; 104 105 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = { 106 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1}, 107 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2}, 108 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3}, 109 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4}, 110 }; 111 112 enum { 113 UMCS7840_BULK_RD_EP, 114 UMCS7840_BULK_WR_EP, 115 UMCS7840_N_TRANSFERS 116 }; 117 118 struct umcs7840_softc_oneport { 119 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures 120 * for two transfers */ 121 122 uint8_t sc_lcr; /* local line control register */ 123 uint8_t sc_mcr; /* local modem control register */ 124 }; 125 126 struct umcs7840_softc { 127 struct ucom_super_softc sc_super_ucom; 128 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous 129 * array, so indexed by 130 * LOGICAL port 131 * (subunit) number */ 132 133 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */ 134 135 device_t sc_dev; /* Device for error prints */ 136 struct usb_device *sc_udev; /* USB Device for all operations */ 137 struct mtx sc_mtx; /* ucom requires this */ 138 139 uint8_t sc_driver_done; /* Flag when enumeration is finished */ 140 141 uint8_t sc_numports; /* Number of ports (subunits) */ 142 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL 143 * port number. */ 144 }; 145 146 /* prototypes */ 147 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *); 148 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t); 149 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *); 150 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t); 151 152 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t); 153 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *); 154 155 static void umcs7840_free(struct ucom_softc *); 156 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *); 157 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t); 158 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t); 159 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t); 160 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *); 161 static void umcs7840_cfg_open(struct ucom_softc *); 162 static void umcs7840_cfg_close(struct ucom_softc *); 163 164 static int umcs7840_pre_param(struct ucom_softc *, struct termios *); 165 166 static void umcs7840_start_read(struct ucom_softc *); 167 static void umcs7840_stop_read(struct ucom_softc *); 168 169 static void umcs7840_start_write(struct ucom_softc *); 170 static void umcs7840_stop_write(struct ucom_softc *); 171 172 static void umcs7840_poll(struct ucom_softc *ucom); 173 174 static device_probe_t umcs7840_probe; 175 static device_attach_t umcs7840_attach; 176 static device_detach_t umcs7840_detach; 177 static void umcs7840_free_softc(struct umcs7840_softc *); 178 179 static usb_callback_t umcs7840_intr_callback; 180 static usb_callback_t umcs7840_read_callback1; 181 static usb_callback_t umcs7840_read_callback2; 182 static usb_callback_t umcs7840_read_callback3; 183 static usb_callback_t umcs7840_read_callback4; 184 static usb_callback_t umcs7840_write_callback1; 185 static usb_callback_t umcs7840_write_callback2; 186 static usb_callback_t umcs7840_write_callback3; 187 static usb_callback_t umcs7840_write_callback4; 188 189 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 190 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 191 192 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */ 193 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = { 194 {&umcs7840_read_callback1, &umcs7840_write_callback1}, 195 {&umcs7840_read_callback2, &umcs7840_write_callback2}, 196 {&umcs7840_read_callback3, &umcs7840_write_callback3}, 197 {&umcs7840_read_callback4, &umcs7840_write_callback4}, 198 }; 199 200 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = { 201 [UMCS7840_BULK_RD_EP] = { 202 .type = UE_BULK, 203 .endpoint = 0x01, 204 .direction = UE_DIR_IN, 205 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 206 .bufsize = 0, /* use wMaxPacketSize */ 207 .callback = &umcs7840_read_callback1, 208 .if_index = 0, 209 }, 210 211 [UMCS7840_BULK_WR_EP] = { 212 .type = UE_BULK, 213 .endpoint = 0x02, 214 .direction = UE_DIR_OUT, 215 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 216 .bufsize = 0, /* use wMaxPacketSize */ 217 .callback = &umcs7840_write_callback1, 218 .if_index = 0, 219 }, 220 }; 221 222 static const struct usb_config umcs7840_intr_config_data[1] = { 223 [0] = { 224 .type = UE_INTERRUPT, 225 .endpoint = 0x09, 226 .direction = UE_DIR_IN, 227 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 228 .bufsize = 0, /* use wMaxPacketSize */ 229 .callback = &umcs7840_intr_callback, 230 .if_index = 0, 231 }, 232 }; 233 234 static struct ucom_callback umcs7840_callback = { 235 .ucom_cfg_get_status = &umcs7840_cfg_get_status, 236 237 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr, 238 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts, 239 .ucom_cfg_set_break = &umcs7840_cfg_set_break, 240 241 .ucom_cfg_param = &umcs7840_cfg_param, 242 .ucom_cfg_open = &umcs7840_cfg_open, 243 .ucom_cfg_close = &umcs7840_cfg_close, 244 245 .ucom_pre_param = &umcs7840_pre_param, 246 247 .ucom_start_read = &umcs7840_start_read, 248 .ucom_stop_read = &umcs7840_stop_read, 249 250 .ucom_start_write = &umcs7840_start_write, 251 .ucom_stop_write = &umcs7840_stop_write, 252 253 .ucom_poll = &umcs7840_poll, 254 .ucom_free = &umcs7840_free, 255 }; 256 257 static const STRUCT_USB_HOST_ID umcs7840_devs[] = { 258 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)}, 259 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)}, 260 }; 261 262 static device_method_t umcs7840_methods[] = { 263 DEVMETHOD(device_probe, umcs7840_probe), 264 DEVMETHOD(device_attach, umcs7840_attach), 265 DEVMETHOD(device_detach, umcs7840_detach), 266 DEVMETHOD_END 267 }; 268 269 static devclass_t umcs7840_devclass; 270 271 static driver_t umcs7840_driver = { 272 .name = "umcs7840", 273 .methods = umcs7840_methods, 274 .size = sizeof(struct umcs7840_softc), 275 }; 276 277 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0); 278 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1); 279 MODULE_DEPEND(umcs7840, usb, 1, 1, 1); 280 MODULE_VERSION(umcs7840, UMCS7840_MODVER); 281 282 static int 283 umcs7840_probe(device_t dev) 284 { 285 struct usb_attach_arg *uaa = device_get_ivars(dev); 286 287 if (uaa->usb_mode != USB_MODE_HOST) 288 return (ENXIO); 289 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX) 290 return (ENXIO); 291 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX) 292 return (ENXIO); 293 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa)); 294 } 295 296 static int 297 umcs7840_attach(device_t dev) 298 { 299 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS]; 300 struct usb_attach_arg *uaa = device_get_ivars(dev); 301 struct umcs7840_softc *sc = device_get_softc(dev); 302 303 uint8_t iface_index = MCS7840_IFACE_INDEX; 304 int error; 305 int subunit; 306 int n; 307 uint8_t data; 308 309 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) 310 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n]; 311 312 device_set_usb_desc(dev); 313 mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF); 314 ucom_ref(&sc->sc_super_ucom); 315 316 sc->sc_dev = dev; 317 sc->sc_udev = uaa->device; 318 319 /* 320 * Get number of ports 321 * Documentation (full datasheet) says, that number of ports is 322 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only 323 * register. But vendor driver uses these undocumented 324 * register & bit. 325 * 326 * Experiments show, that MODE register can have `0' 327 * (4 ports) bit on 2-port device, so use vendor driver's way. 328 * 329 * Also, see notes in header file for these constants. 330 */ 331 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data); 332 if (data & MCS7840_DEV_GPIO_4PORTS) { 333 sc->sc_numports = 4; 334 /* Store physical port numbers in sc_portno */ 335 sc->sc_ucom[0].sc_portno = 0; 336 sc->sc_ucom[1].sc_portno = 1; 337 sc->sc_ucom[2].sc_portno = 2; 338 sc->sc_ucom[3].sc_portno = 3; 339 } else { 340 sc->sc_numports = 2; 341 /* Store physical port numbers in sc_portno */ 342 sc->sc_ucom[0].sc_portno = 0; 343 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */ 344 } 345 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports); 346 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) { 347 device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n", 348 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high", 349 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no", 350 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail", 351 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail", 352 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4", 353 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled", 354 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not "); 355 } 356 /* Setup all transfers */ 357 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 358 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) { 359 /* Set endpoint address */ 360 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno; 361 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n]; 362 } 363 error = usbd_transfer_setup(uaa->device, 364 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp, 365 UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx); 366 if (error) { 367 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n", 368 subunit + 1, sc->sc_numports); 369 goto detach; 370 } 371 } 372 error = usbd_transfer_setup(uaa->device, 373 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data, 374 1, sc, &sc->sc_mtx); 375 if (error) { 376 device_printf(dev, "allocating USB transfers failed for interrupt\n"); 377 goto detach; 378 } 379 /* clear stall at first run */ 380 mtx_lock(&sc->sc_mtx); 381 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 382 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]); 383 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]); 384 } 385 mtx_unlock(&sc->sc_mtx); 386 387 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc, 388 &umcs7840_callback, &sc->sc_mtx); 389 if (error) 390 goto detach; 391 392 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev); 393 394 return (0); 395 396 detach: 397 umcs7840_detach(dev); 398 return (ENXIO); 399 } 400 401 static int 402 umcs7840_detach(device_t dev) 403 { 404 struct umcs7840_softc *sc = device_get_softc(dev); 405 int subunit; 406 407 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom); 408 409 for (subunit = 0; subunit < sc->sc_numports; ++subunit) 410 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 411 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1); 412 413 device_claim_softc(dev); 414 415 umcs7840_free_softc(sc); 416 417 return (0); 418 } 419 420 UCOM_UNLOAD_DRAIN(umcs7840); 421 422 static void 423 umcs7840_free_softc(struct umcs7840_softc *sc) 424 { 425 if (ucom_unref(&sc->sc_super_ucom)) { 426 mtx_destroy(&sc->sc_mtx); 427 device_free_softc(sc); 428 } 429 } 430 431 static void 432 umcs7840_free(struct ucom_softc *ucom) 433 { 434 umcs7840_free_softc(ucom->sc_parent); 435 } 436 437 static void 438 umcs7840_cfg_open(struct ucom_softc *ucom) 439 { 440 struct umcs7840_softc *sc = ucom->sc_parent; 441 uint16_t pn = ucom->sc_portno; 442 uint8_t data; 443 444 /* If it very first open, finish global configuration */ 445 if (!sc->sc_driver_done) { 446 /* 447 * USB enumeration is finished, pass internal memory to FIFOs 448 * If it is done in the end of "attach", kernel panics. 449 */ 450 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data)) 451 return; 452 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE; 453 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data)) 454 return; 455 sc->sc_driver_done = 1; 456 } 457 /* Toggle reset bit on-off */ 458 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 459 return; 460 data |= MCS7840_DEV_SPx_UART_RESET; 461 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 462 return; 463 data &= ~MCS7840_DEV_SPx_UART_RESET; 464 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 465 return; 466 467 /* Set RS-232 mode */ 468 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232)) 469 return; 470 471 /* Disable RX on time of initialization */ 472 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 473 return; 474 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 475 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 476 return; 477 478 /* Disable all interrupts */ 479 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0)) 480 return; 481 482 /* Reset FIFO -- documented */ 483 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0)) 484 return; 485 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 486 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR | 487 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14)) 488 return; 489 490 /* Set 8 bit, no parity, 1 stop bit -- documented */ 491 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1; 492 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr)) 493 return; 494 495 /* 496 * Enable DTR/RTS on modem control, enable modem interrupts -- 497 * documented 498 */ 499 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS | MCS7840_UART_MCR_IE; 500 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr)) 501 return; 502 503 /* Clearing Bulkin and Bulkout FIFO */ 504 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 505 return; 506 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO; 507 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 508 return; 509 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO); 510 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 511 return; 512 513 /* Set speed 9600 */ 514 if (umcs7840_set_baudrate(sc, pn, 9600)) 515 return; 516 517 518 /* Finally enable all interrupts -- documented */ 519 /* 520 * Copied from vendor driver, I don't know why we should read LCR 521 * here 522 */ 523 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr)) 524 return; 525 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 526 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM)) 527 return; 528 529 /* Enable RX */ 530 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 531 return; 532 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE; 533 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 534 return; 535 536 DPRINTF("Port %d has been opened\n", pn); 537 } 538 539 static void 540 umcs7840_cfg_close(struct ucom_softc *ucom) 541 { 542 struct umcs7840_softc *sc = ucom->sc_parent; 543 uint16_t pn = ucom->sc_portno; 544 uint8_t data; 545 546 umcs7840_stop_read(ucom); 547 umcs7840_stop_write(ucom); 548 549 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0); 550 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0); 551 552 /* Disable RX */ 553 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 554 return; 555 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 556 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 557 return; 558 DPRINTF("Port %d has been closed\n", pn); 559 } 560 561 static void 562 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 563 { 564 struct umcs7840_softc *sc = ucom->sc_parent; 565 uint8_t pn = ucom->sc_portno; 566 567 if (onoff) 568 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR; 569 else 570 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR; 571 572 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 573 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off"); 574 } 575 576 static void 577 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 578 { 579 struct umcs7840_softc *sc = ucom->sc_parent; 580 uint8_t pn = ucom->sc_portno; 581 582 if (onoff) 583 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS; 584 else 585 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS; 586 587 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 588 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off"); 589 } 590 591 static void 592 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 593 { 594 struct umcs7840_softc *sc = ucom->sc_parent; 595 uint8_t pn = ucom->sc_portno; 596 597 if (onoff) 598 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK; 599 else 600 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK; 601 602 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 603 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off"); 604 } 605 606 607 static void 608 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t) 609 { 610 struct umcs7840_softc *sc = ucom->sc_parent; 611 uint8_t pn = ucom->sc_portno; 612 uint8_t lcr = sc->sc_ports[pn].sc_lcr; 613 uint8_t mcr = sc->sc_ports[pn].sc_mcr; 614 615 DPRINTF("Port %d config:\n", pn); 616 if (t->c_cflag & CSTOPB) { 617 DPRINTF(" 2 stop bits\n"); 618 lcr |= MCS7840_UART_LCR_STOPB2; 619 } else { 620 lcr |= MCS7840_UART_LCR_STOPB1; 621 DPRINTF(" 1 stop bit\n"); 622 } 623 624 lcr &= ~MCS7840_UART_LCR_PARITYMASK; 625 if (t->c_cflag & PARENB) { 626 lcr |= MCS7840_UART_LCR_PARITYON; 627 if (t->c_cflag & PARODD) { 628 lcr = MCS7840_UART_LCR_PARITYODD; 629 DPRINTF(" parity on - odd\n"); 630 } else { 631 lcr = MCS7840_UART_LCR_PARITYEVEN; 632 DPRINTF(" parity on - even\n"); 633 } 634 } else { 635 lcr &= ~MCS7840_UART_LCR_PARITYON; 636 DPRINTF(" parity off\n"); 637 } 638 639 lcr &= ~MCS7840_UART_LCR_DATALENMASK; 640 switch (t->c_cflag & CSIZE) { 641 case CS5: 642 lcr |= MCS7840_UART_LCR_DATALEN5; 643 DPRINTF(" 5 bit\n"); 644 break; 645 case CS6: 646 lcr |= MCS7840_UART_LCR_DATALEN6; 647 DPRINTF(" 6 bit\n"); 648 break; 649 case CS7: 650 lcr |= MCS7840_UART_LCR_DATALEN7; 651 DPRINTF(" 7 bit\n"); 652 break; 653 case CS8: 654 lcr |= MCS7840_UART_LCR_DATALEN8; 655 DPRINTF(" 8 bit\n"); 656 break; 657 } 658 659 if (t->c_cflag & CRTSCTS) { 660 mcr |= MCS7840_UART_MCR_CTSRTS; 661 DPRINTF(" CTS/RTS\n"); 662 } else 663 mcr &= ~MCS7840_UART_MCR_CTSRTS; 664 665 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) { 666 mcr |= MCS7840_UART_MCR_DTRDSR; 667 DPRINTF(" DTR/DSR\n"); 668 } else 669 mcr &= ~MCS7840_UART_MCR_DTRDSR; 670 671 sc->sc_ports[pn].sc_lcr = lcr; 672 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 673 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr); 674 675 sc->sc_ports[pn].sc_mcr = mcr; 676 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 677 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr); 678 679 umcs7840_set_baudrate(sc, pn, t->c_ospeed); 680 } 681 682 683 static int 684 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t) 685 { 686 uint8_t clk; 687 uint16_t divisor; 688 689 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor) 690 return (EINVAL); 691 return (0); 692 } 693 694 static void 695 umcs7840_start_read(struct ucom_softc *ucom) 696 { 697 struct umcs7840_softc *sc = ucom->sc_parent; 698 uint8_t pn = ucom->sc_portno; 699 700 /* Start interrupt transfer */ 701 usbd_transfer_start(sc->sc_intr_xfer); 702 703 /* Start read transfer */ 704 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 705 } 706 707 static void 708 umcs7840_stop_read(struct ucom_softc *ucom) 709 { 710 struct umcs7840_softc *sc = ucom->sc_parent; 711 uint8_t pn = ucom->sc_portno; 712 713 /* Stop read transfer */ 714 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 715 } 716 717 static void 718 umcs7840_start_write(struct ucom_softc *ucom) 719 { 720 struct umcs7840_softc *sc = ucom->sc_parent; 721 uint8_t pn = ucom->sc_portno; 722 723 /* Start interrupt transfer */ 724 usbd_transfer_start(sc->sc_intr_xfer); 725 726 /* Start write transfer */ 727 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 728 } 729 730 static void 731 umcs7840_stop_write(struct ucom_softc *ucom) 732 { 733 struct umcs7840_softc *sc = ucom->sc_parent; 734 uint8_t pn = ucom->sc_portno; 735 736 /* Stop write transfer */ 737 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 738 } 739 740 static void 741 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 742 { 743 struct umcs7840_softc *sc = ucom->sc_parent; 744 uint8_t pn = ucom->sc_portno; 745 uint8_t hw_lsr = 0; /* local line status register */ 746 uint8_t hw_msr = 0; /* local modem status register */ 747 748 /* Read LSR & MSR */ 749 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &hw_lsr); 750 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr); 751 752 *lsr = hw_lsr; 753 *msr = hw_msr; 754 755 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr); 756 } 757 758 static void 759 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error) 760 { 761 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 762 struct usb_page_cache *pc; 763 uint8_t buf[13]; 764 int actlen; 765 int subunit; 766 767 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 768 769 switch (USB_GET_STATE(xfer)) { 770 case USB_ST_TRANSFERRED: 771 if (actlen == 5 || actlen == 13) { 772 pc = usbd_xfer_get_frame(xfer, 0); 773 usbd_copy_out(pc, 0, buf, actlen); 774 /* Check status of all ports */ 775 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 776 uint8_t pn = sc->sc_ucom[subunit].sc_portno; 777 778 if (buf[pn] & MCS7840_UART_ISR_NOPENDING) 779 continue; 780 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK)); 781 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) { 782 case MCS7840_UART_ISR_RXERR: 783 case MCS7840_UART_ISR_RXHASDATA: 784 case MCS7840_UART_ISR_RXTIMEOUT: 785 case MCS7840_UART_ISR_MSCHANGE: 786 ucom_status_change(&sc->sc_ucom[subunit]); 787 break; 788 default: 789 /* Do nothing */ 790 break; 791 } 792 } 793 } else 794 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen); 795 /* FALLTHROUGH */ 796 case USB_ST_SETUP: 797 tr_setup: 798 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 799 usbd_transfer_submit(xfer); 800 return; 801 802 default: /* Error */ 803 if (error != USB_ERR_CANCELLED) { 804 /* try to clear stall first */ 805 usbd_xfer_set_stall(xfer); 806 goto tr_setup; 807 } 808 return; 809 } 810 } 811 812 static void 813 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error) 814 { 815 umcs7840_read_callbackN(xfer, error, 0); 816 } 817 818 static void 819 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error) 820 { 821 umcs7840_read_callbackN(xfer, error, 1); 822 } 823 static void 824 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error) 825 { 826 umcs7840_read_callbackN(xfer, error, 2); 827 } 828 829 static void 830 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error) 831 { 832 umcs7840_read_callbackN(xfer, error, 3); 833 } 834 835 static void 836 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 837 { 838 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 839 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 840 struct usb_page_cache *pc; 841 int actlen; 842 843 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 844 845 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen); 846 847 switch (USB_GET_STATE(xfer)) { 848 case USB_ST_TRANSFERRED: 849 pc = usbd_xfer_get_frame(xfer, 0); 850 ucom_put_data(ucom, pc, 0, actlen); 851 /* FALLTHROUGH */ 852 case USB_ST_SETUP: 853 tr_setup: 854 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 855 usbd_transfer_submit(xfer); 856 return; 857 858 default: /* Error */ 859 if (error != USB_ERR_CANCELLED) { 860 /* try to clear stall first */ 861 usbd_xfer_set_stall(xfer); 862 goto tr_setup; 863 } 864 return; 865 } 866 } 867 868 static void 869 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error) 870 { 871 umcs7840_write_callbackN(xfer, error, 0); 872 } 873 874 static void 875 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error) 876 { 877 umcs7840_write_callbackN(xfer, error, 1); 878 } 879 880 static void 881 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error) 882 { 883 umcs7840_write_callbackN(xfer, error, 2); 884 } 885 886 static void 887 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error) 888 { 889 umcs7840_write_callbackN(xfer, error, 3); 890 } 891 892 static void 893 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 894 { 895 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 896 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 897 struct usb_page_cache *pc; 898 uint32_t actlen; 899 900 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer)); 901 902 switch (USB_GET_STATE(xfer)) { 903 case USB_ST_SETUP: 904 case USB_ST_TRANSFERRED: 905 tr_setup: 906 pc = usbd_xfer_get_frame(xfer, 0); 907 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) { 908 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen); 909 usbd_xfer_set_frame_len(xfer, 0, actlen); 910 usbd_transfer_submit(xfer); 911 } 912 return; 913 914 default: /* Error */ 915 if (error != USB_ERR_CANCELLED) { 916 /* try to clear stall first */ 917 usbd_xfer_set_stall(xfer); 918 goto tr_setup; 919 } 920 return; 921 } 922 } 923 924 static void 925 umcs7840_poll(struct ucom_softc *ucom) 926 { 927 struct umcs7840_softc *sc = ucom->sc_parent; 928 929 DPRINTF("Port %d poll\n", ucom->sc_portno); 930 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 931 usbd_transfer_poll(&sc->sc_intr_xfer, 1); 932 } 933 934 static usb_error_t 935 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data) 936 { 937 struct usb_device_request req; 938 usb_error_t err; 939 uint16_t len; 940 941 req.bmRequestType = UT_READ_VENDOR_DEVICE; 942 req.bRequest = MCS7840_RDREQ; 943 USETW(req.wValue, 0); 944 USETW(req.wIndex, reg); 945 USETW(req.wLength, UMCS7840_READ_LENGTH); 946 947 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 948 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 949 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len); 950 return (USB_ERR_INVAL); 951 } else if (err) 952 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err)); 953 return (err); 954 } 955 956 static usb_error_t 957 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data) 958 { 959 struct usb_device_request req; 960 usb_error_t err; 961 962 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 963 req.bRequest = MCS7840_WRREQ; 964 USETW(req.wValue, data); 965 USETW(req.wIndex, reg); 966 USETW(req.wLength, 0); 967 968 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 969 if (err) 970 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err)); 971 972 return (err); 973 } 974 975 static usb_error_t 976 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data) 977 { 978 struct usb_device_request req; 979 uint16_t wVal; 980 usb_error_t err; 981 uint16_t len; 982 983 /* portno is port number */ 984 wVal = ((uint16_t)(portno + 1)) << 8; 985 986 req.bmRequestType = UT_READ_VENDOR_DEVICE; 987 req.bRequest = MCS7840_RDREQ; 988 USETW(req.wValue, wVal); 989 USETW(req.wIndex, reg); 990 USETW(req.wLength, UMCS7840_READ_LENGTH); 991 992 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 993 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 994 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len); 995 return (USB_ERR_INVAL); 996 } else if (err) 997 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 998 return (err); 999 } 1000 1001 static usb_error_t 1002 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data) 1003 { 1004 struct usb_device_request req; 1005 usb_error_t err; 1006 uint16_t wVal; 1007 1008 /* portno is port number */ 1009 wVal = ((uint16_t)(portno + 1)) << 8 | data; 1010 1011 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1012 req.bRequest = MCS7840_WRREQ; 1013 USETW(req.wValue, wVal); 1014 USETW(req.wIndex, reg); 1015 USETW(req.wLength, 0); 1016 1017 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 1018 if (err) 1019 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 1020 return (err); 1021 } 1022 1023 static usb_error_t 1024 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate) 1025 { 1026 usb_error_t err; 1027 uint16_t divisor; 1028 uint8_t clk; 1029 uint8_t data; 1030 1031 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) { 1032 DPRINTF("Port %d bad speed: %d\n", portno, rate); 1033 return (-1); 1034 } 1035 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) { 1036 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate); 1037 return (-1); 1038 } 1039 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor); 1040 1041 /* Set clock source for standard BAUD frequences */ 1042 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data); 1043 if (err) 1044 return (err); 1045 data &= MCS7840_DEV_SPx_CLOCK_MASK; 1046 data |= clk; 1047 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data); 1048 if (err) 1049 return (err); 1050 1051 /* Set divider */ 1052 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS; 1053 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1054 if (err) 1055 return (err); 1056 1057 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff)); 1058 if (err) 1059 return (err); 1060 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff)); 1061 if (err) 1062 return (err); 1063 1064 /* Turn off access to DLL/DLM registers of UART */ 1065 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS; 1066 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1067 if (err) 1068 return (err); 1069 return (0); 1070 } 1071 1072 /* Maximum speeds for standard frequences, when PLL is not used */ 1073 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,}; 1074 static const uint8_t umcs7840_baudrate_divisors_len = sizeof(umcs7840_baudrate_divisors) / sizeof(umcs7840_baudrate_divisors[0]); 1075 1076 static usb_error_t 1077 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk) 1078 { 1079 uint8_t i = 0; 1080 1081 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1]) 1082 return (-1); 1083 1084 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 && 1085 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i); 1086 if (rate == 0) 1087 *divisor = 1; /* XXX */ 1088 else 1089 *divisor = umcs7840_baudrate_divisors[i + 1] / rate; 1090 /* 0x00 .. 0x70 */ 1091 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT; 1092 return (0); 1093 } 1094