xref: /freebsd/sys/dev/usb/serial/umcs.c (revision f6a3b357e9be4c6423c85eff9a847163a0d307c8)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * This driver supports several multiport USB-to-RS232 serial adapters driven
31  * by MosChip mos7820 and mos7840, bridge chips.
32  * The adapters are sold under many different brand names.
33  *
34  * Datasheets are available at MosChip www site at
35  * http://www.moschip.com.  The datasheets don't contain full
36  * programming information for the chip.
37  *
38  * It is nornal to have only two enabled ports in devices, based on
39  * quad-port mos7840.
40  *
41  */
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD$");
44 
45 #include <sys/stdint.h>
46 #include <sys/stddef.h>
47 #include <sys/param.h>
48 #include <sys/queue.h>
49 #include <sys/types.h>
50 #include <sys/systm.h>
51 #include <sys/kernel.h>
52 #include <sys/bus.h>
53 #include <sys/linker_set.h>
54 #include <sys/module.h>
55 #include <sys/lock.h>
56 #include <sys/mutex.h>
57 #include <sys/condvar.h>
58 #include <sys/sysctl.h>
59 #include <sys/sx.h>
60 #include <sys/unistd.h>
61 #include <sys/callout.h>
62 #include <sys/malloc.h>
63 #include <sys/priv.h>
64 
65 #include <dev/usb/usb.h>
66 #include <dev/usb/usbdi.h>
67 #include <dev/usb/usbdi_util.h>
68 #include <dev/usb/usb_cdc.h>
69 #include "usbdevs.h"
70 
71 #define	USB_DEBUG_VAR umcs_debug
72 #include <dev/usb/usb_debug.h>
73 #include <dev/usb/usb_process.h>
74 
75 #include <dev/usb/serial/usb_serial.h>
76 
77 #include <dev/usb/serial/umcs.h>
78 
79 #define	UMCS7840_MODVER	1
80 
81 #ifdef USB_DEBUG
82 static int umcs_debug = 0;
83 
84 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter");
85 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RWTUN, &umcs_debug, 0, "Debug level");
86 #endif					/* USB_DEBUG */
87 
88 
89 /*
90  * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
91  * have ports 0 and 2, with ports 1 and 3 omitted.
92  * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
93  * This driver trys to use physical numbers as much as possible.
94  */
95 
96 /*
97  * Indexed by PHYSICAL port number.
98  * Pack non-regular registers to array to easier if-less access.
99  */
100 struct umcs7840_port_registers {
101 	uint8_t	reg_sp;			/* SP register. */
102 	uint8_t	reg_control;		/* CONTROL register. */
103 	uint8_t	reg_dcr;		/* DCR0 register. DCR1 & DCR2 can be
104 					 * calculated */
105 };
106 
107 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = {
108 	{.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1},
109 	{.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2},
110 	{.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3},
111 	{.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4},
112 };
113 
114 enum {
115 	UMCS7840_BULK_RD_EP,
116 	UMCS7840_BULK_WR_EP,
117 	UMCS7840_N_TRANSFERS
118 };
119 
120 struct umcs7840_softc_oneport {
121 	struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS];	/* Control structures
122 							 * for two transfers */
123 
124 	uint8_t	sc_lcr;			/* local line control register */
125 	uint8_t	sc_mcr;			/* local modem control register */
126 };
127 
128 struct umcs7840_softc {
129 	struct ucom_super_softc sc_super_ucom;
130 	struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS];	/* Need to be continuous
131 							 * array, so indexed by
132 							 * LOGICAL port
133 							 * (subunit) number */
134 
135 	struct usb_xfer *sc_intr_xfer;	/* Interrupt endpoint */
136 
137 	device_t sc_dev;		/* Device for error prints */
138 	struct usb_device *sc_udev;	/* USB Device for all operations */
139 	struct mtx sc_mtx;		/* ucom requires this */
140 
141 	uint8_t	sc_driver_done;		/* Flag when enumeration is finished */
142 
143 	uint8_t	sc_numports;		/* Number of ports (subunits) */
144 	struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS];	/* Indexed by PHYSICAL
145 									 * port number. */
146 };
147 
148 /* prototypes */
149 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *);
150 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t);
151 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *);
152 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t);
153 
154 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t);
155 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *);
156 
157 static void	umcs7840_free(struct ucom_softc *);
158 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *);
159 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t);
160 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t);
161 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t);
162 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *);
163 static void umcs7840_cfg_open(struct ucom_softc *);
164 static void umcs7840_cfg_close(struct ucom_softc *);
165 
166 static int umcs7840_pre_param(struct ucom_softc *, struct termios *);
167 
168 static void umcs7840_start_read(struct ucom_softc *);
169 static void umcs7840_stop_read(struct ucom_softc *);
170 
171 static void umcs7840_start_write(struct ucom_softc *);
172 static void umcs7840_stop_write(struct ucom_softc *);
173 
174 static void umcs7840_poll(struct ucom_softc *ucom);
175 
176 static device_probe_t umcs7840_probe;
177 static device_attach_t umcs7840_attach;
178 static device_detach_t umcs7840_detach;
179 static void umcs7840_free_softc(struct umcs7840_softc *);
180 
181 static usb_callback_t umcs7840_intr_callback;
182 static usb_callback_t umcs7840_read_callback1;
183 static usb_callback_t umcs7840_read_callback2;
184 static usb_callback_t umcs7840_read_callback3;
185 static usb_callback_t umcs7840_read_callback4;
186 static usb_callback_t umcs7840_write_callback1;
187 static usb_callback_t umcs7840_write_callback2;
188 static usb_callback_t umcs7840_write_callback3;
189 static usb_callback_t umcs7840_write_callback4;
190 
191 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
192 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
193 
194 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */
195 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = {
196 	{&umcs7840_read_callback1, &umcs7840_write_callback1},
197 	{&umcs7840_read_callback2, &umcs7840_write_callback2},
198 	{&umcs7840_read_callback3, &umcs7840_write_callback3},
199 	{&umcs7840_read_callback4, &umcs7840_write_callback4},
200 };
201 
202 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = {
203 	[UMCS7840_BULK_RD_EP] = {
204 		.type = UE_BULK,
205 		.endpoint = 0x01,
206 		.direction = UE_DIR_IN,
207 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
208 		.bufsize = 0,		/* use wMaxPacketSize */
209 		.callback = &umcs7840_read_callback1,
210 		.if_index = 0,
211 	},
212 
213 	[UMCS7840_BULK_WR_EP] = {
214 		.type = UE_BULK,
215 		.endpoint = 0x02,
216 		.direction = UE_DIR_OUT,
217 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
218 		.bufsize = 0,		/* use wMaxPacketSize */
219 		.callback = &umcs7840_write_callback1,
220 		.if_index = 0,
221 	},
222 };
223 
224 static const struct usb_config umcs7840_intr_config_data[1] = {
225 	[0] = {
226 		.type = UE_INTERRUPT,
227 		.endpoint = 0x09,
228 		.direction = UE_DIR_IN,
229 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
230 		.bufsize = 0,		/* use wMaxPacketSize */
231 		.callback = &umcs7840_intr_callback,
232 		.if_index = 0,
233 	},
234 };
235 
236 static struct ucom_callback umcs7840_callback = {
237 	.ucom_cfg_get_status = &umcs7840_cfg_get_status,
238 
239 	.ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr,
240 	.ucom_cfg_set_rts = &umcs7840_cfg_set_rts,
241 	.ucom_cfg_set_break = &umcs7840_cfg_set_break,
242 
243 	.ucom_cfg_param = &umcs7840_cfg_param,
244 	.ucom_cfg_open = &umcs7840_cfg_open,
245 	.ucom_cfg_close = &umcs7840_cfg_close,
246 
247 	.ucom_pre_param = &umcs7840_pre_param,
248 
249 	.ucom_start_read = &umcs7840_start_read,
250 	.ucom_stop_read = &umcs7840_stop_read,
251 
252 	.ucom_start_write = &umcs7840_start_write,
253 	.ucom_stop_write = &umcs7840_stop_write,
254 
255 	.ucom_poll = &umcs7840_poll,
256 	.ucom_free = &umcs7840_free,
257 };
258 
259 static const STRUCT_USB_HOST_ID umcs7840_devs[] = {
260 	{USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)},
261 	{USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)},
262 };
263 
264 static device_method_t umcs7840_methods[] = {
265 	DEVMETHOD(device_probe, umcs7840_probe),
266 	DEVMETHOD(device_attach, umcs7840_attach),
267 	DEVMETHOD(device_detach, umcs7840_detach),
268 	DEVMETHOD_END
269 };
270 
271 static devclass_t umcs7840_devclass;
272 
273 static driver_t umcs7840_driver = {
274 	.name = "umcs7840",
275 	.methods = umcs7840_methods,
276 	.size = sizeof(struct umcs7840_softc),
277 };
278 
279 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0);
280 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1);
281 MODULE_DEPEND(umcs7840, usb, 1, 1, 1);
282 MODULE_VERSION(umcs7840, UMCS7840_MODVER);
283 USB_PNP_HOST_INFO(umcs7840_devs);
284 
285 static int
286 umcs7840_probe(device_t dev)
287 {
288 	struct usb_attach_arg *uaa = device_get_ivars(dev);
289 
290 	if (uaa->usb_mode != USB_MODE_HOST)
291 		return (ENXIO);
292 	if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX)
293 		return (ENXIO);
294 	if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX)
295 		return (ENXIO);
296 	return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa));
297 }
298 
299 static int
300 umcs7840_attach(device_t dev)
301 {
302 	struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS];
303 	struct usb_attach_arg *uaa = device_get_ivars(dev);
304 	struct umcs7840_softc *sc = device_get_softc(dev);
305 
306 	uint8_t iface_index = MCS7840_IFACE_INDEX;
307 	int error;
308 	int subunit;
309 	int n;
310 	uint8_t data;
311 
312 	for (n = 0; n < UMCS7840_N_TRANSFERS; ++n)
313 		umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n];
314 
315 	device_set_usb_desc(dev);
316 	mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF);
317 	ucom_ref(&sc->sc_super_ucom);
318 
319 	sc->sc_dev = dev;
320 	sc->sc_udev = uaa->device;
321 
322 	/*
323 	 * Get number of ports
324 	 * Documentation (full datasheet) says, that number of ports is
325 	 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only
326 	 * register. But vendor driver uses these undocumented
327 	 * register & bit.
328 	 *
329 	 * Experiments show, that MODE register can have `0'
330 	 * (4 ports) bit on 2-port device, so use vendor driver's way.
331 	 *
332 	 * Also, see notes in header file for these constants.
333 	 */
334 	umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data);
335 	if (data & MCS7840_DEV_GPIO_4PORTS) {
336 		sc->sc_numports = 4;
337 		/* Store physical port numbers in sc_portno */
338 		sc->sc_ucom[0].sc_portno = 0;
339 		sc->sc_ucom[1].sc_portno = 1;
340 		sc->sc_ucom[2].sc_portno = 2;
341 		sc->sc_ucom[3].sc_portno = 3;
342 	} else {
343 		sc->sc_numports = 2;
344 		/* Store physical port numbers in sc_portno */
345 		sc->sc_ucom[0].sc_portno = 0;
346 		sc->sc_ucom[1].sc_portno = 2;	/* '1' is skipped */
347 	}
348 	device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports);
349 	if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) {
350 		device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n",
351 		    (data & MCS7840_DEV_MODE_RESET) ? "low" : "high",
352 		    (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no",
353 		    (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail",
354 		    (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail",
355 		    (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4",
356 		    (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled",
357 		    (data & MCS7840_DEV_MODE_IRDA) ? "" : "not ");
358 	}
359 	/* Setup all transfers */
360 	for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
361 		for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) {
362 			/* Set endpoint address */
363 			umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno;
364 			umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n];
365 		}
366 		error = usbd_transfer_setup(uaa->device,
367 		    &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp,
368 		    UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx);
369 		if (error) {
370 			device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n",
371 			    subunit + 1, sc->sc_numports);
372 			goto detach;
373 		}
374 	}
375 	error = usbd_transfer_setup(uaa->device,
376 	    &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data,
377 	    1, sc, &sc->sc_mtx);
378 	if (error) {
379 		device_printf(dev, "allocating USB transfers failed for interrupt\n");
380 		goto detach;
381 	}
382 	/* clear stall at first run */
383 	mtx_lock(&sc->sc_mtx);
384 	for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
385 		usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]);
386 		usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]);
387 	}
388 	mtx_unlock(&sc->sc_mtx);
389 
390 	error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc,
391 	    &umcs7840_callback, &sc->sc_mtx);
392 	if (error)
393 		goto detach;
394 
395 	ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
396 
397 	return (0);
398 
399 detach:
400 	umcs7840_detach(dev);
401 	return (ENXIO);
402 }
403 
404 static int
405 umcs7840_detach(device_t dev)
406 {
407 	struct umcs7840_softc *sc = device_get_softc(dev);
408 	int subunit;
409 
410 	ucom_detach(&sc->sc_super_ucom, sc->sc_ucom);
411 
412 	for (subunit = 0; subunit < sc->sc_numports; ++subunit)
413 		usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
414 	usbd_transfer_unsetup(&sc->sc_intr_xfer, 1);
415 
416 	device_claim_softc(dev);
417 
418 	umcs7840_free_softc(sc);
419 
420 	return (0);
421 }
422 
423 UCOM_UNLOAD_DRAIN(umcs7840);
424 
425 static void
426 umcs7840_free_softc(struct umcs7840_softc *sc)
427 {
428 	if (ucom_unref(&sc->sc_super_ucom)) {
429 		mtx_destroy(&sc->sc_mtx);
430 		device_free_softc(sc);
431 	}
432 }
433 
434 static void
435 umcs7840_free(struct ucom_softc *ucom)
436 {
437 	umcs7840_free_softc(ucom->sc_parent);
438 }
439 
440 static void
441 umcs7840_cfg_open(struct ucom_softc *ucom)
442 {
443 	struct umcs7840_softc *sc = ucom->sc_parent;
444 	uint16_t pn = ucom->sc_portno;
445 	uint8_t data;
446 
447 	/* If it very first open, finish global configuration */
448 	if (!sc->sc_driver_done) {
449 		/*
450 		 * USB enumeration is finished, pass internal memory to FIFOs
451 		 * If it is done in the end of "attach", kernel panics.
452 		 */
453 		if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data))
454 			return;
455 		data |= MCS7840_DEV_CONTROL1_DRIVER_DONE;
456 		if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data))
457 			return;
458 		sc->sc_driver_done = 1;
459 	}
460 	/* Toggle reset bit on-off */
461 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
462 		return;
463 	data |= MCS7840_DEV_SPx_UART_RESET;
464 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
465 		return;
466 	data &= ~MCS7840_DEV_SPx_UART_RESET;
467 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
468 		return;
469 
470 	/* Set RS-232 mode */
471 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232))
472 		return;
473 
474 	/* Disable RX on time of initialization */
475 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
476 		return;
477 	data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
478 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
479 		return;
480 
481 	/* Disable all interrupts */
482 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0))
483 		return;
484 
485 	/* Reset FIFO -- documented */
486 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0))
487 		return;
488 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR,
489 	    MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR |
490 	    MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14))
491 		return;
492 
493 	/* Set 8 bit, no parity, 1 stop bit -- documented */
494 	sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1;
495 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr))
496 		return;
497 
498 	/*
499 	 * Enable DTR/RTS on modem control, enable modem interrupts --
500 	 * documented
501 	 */
502 	sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_IE;
503 	if (ucom->sc_tty == NULL || (ucom->sc_tty->t_termios.c_cflag & CNO_RTSDTR) == 0)
504 		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS;
505 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr))
506 		return;
507 
508 	/* Clearing Bulkin and Bulkout FIFO */
509 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
510 		return;
511 	data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO;
512 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
513 		return;
514 	data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO);
515 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
516 		return;
517 
518 	/* Set speed 9600 */
519 	if (umcs7840_set_baudrate(sc, pn, 9600))
520 		return;
521 
522 
523 	/* Finally enable all interrupts -- documented */
524 	/*
525 	 * Copied from vendor driver, I don't know why we should read LCR
526 	 * here
527 	 */
528 	if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr))
529 		return;
530 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER,
531 	    MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM))
532 		return;
533 
534 	/* Enable RX */
535 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
536 		return;
537 	data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE;
538 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
539 		return;
540 
541 	DPRINTF("Port %d has been opened\n", pn);
542 }
543 
544 static void
545 umcs7840_cfg_close(struct ucom_softc *ucom)
546 {
547 	struct umcs7840_softc *sc = ucom->sc_parent;
548 	uint16_t pn = ucom->sc_portno;
549 	uint8_t data;
550 
551 	umcs7840_stop_read(ucom);
552 	umcs7840_stop_write(ucom);
553 
554 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0);
555 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0);
556 
557 	/* Disable RX */
558 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
559 		return;
560 	data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
561 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
562 		return;
563 	DPRINTF("Port %d has been closed\n", pn);
564 }
565 
566 static void
567 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
568 {
569 	struct umcs7840_softc *sc = ucom->sc_parent;
570 	uint8_t pn = ucom->sc_portno;
571 
572 	if (onoff)
573 		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR;
574 	else
575 		sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR;
576 
577 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
578 	DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off");
579 }
580 
581 static void
582 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
583 {
584 	struct umcs7840_softc *sc = ucom->sc_parent;
585 	uint8_t pn = ucom->sc_portno;
586 
587 	if (onoff)
588 		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS;
589 	else
590 		sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS;
591 
592 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
593 	DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off");
594 }
595 
596 static void
597 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
598 {
599 	struct umcs7840_softc *sc = ucom->sc_parent;
600 	uint8_t pn = ucom->sc_portno;
601 
602 	if (onoff)
603 		sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK;
604 	else
605 		sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK;
606 
607 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
608 	DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off");
609 }
610 
611 
612 static void
613 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t)
614 {
615 	struct umcs7840_softc *sc = ucom->sc_parent;
616 	uint8_t pn = ucom->sc_portno;
617 	uint8_t lcr = sc->sc_ports[pn].sc_lcr;
618 	uint8_t mcr = sc->sc_ports[pn].sc_mcr;
619 
620 	DPRINTF("Port %d config:\n", pn);
621 	if (t->c_cflag & CSTOPB) {
622 		DPRINTF("  2 stop bits\n");
623 		lcr |= MCS7840_UART_LCR_STOPB2;
624 	} else {
625 		lcr |= MCS7840_UART_LCR_STOPB1;
626 		DPRINTF("  1 stop bit\n");
627 	}
628 
629 	lcr &= ~MCS7840_UART_LCR_PARITYMASK;
630 	if (t->c_cflag & PARENB) {
631 		lcr |= MCS7840_UART_LCR_PARITYON;
632 		if (t->c_cflag & PARODD) {
633 			lcr = MCS7840_UART_LCR_PARITYODD;
634 			DPRINTF("  parity on - odd\n");
635 		} else {
636 			lcr = MCS7840_UART_LCR_PARITYEVEN;
637 			DPRINTF("  parity on - even\n");
638 		}
639 	} else {
640 		lcr &= ~MCS7840_UART_LCR_PARITYON;
641 		DPRINTF("  parity off\n");
642 	}
643 
644 	lcr &= ~MCS7840_UART_LCR_DATALENMASK;
645 	switch (t->c_cflag & CSIZE) {
646 	case CS5:
647 		lcr |= MCS7840_UART_LCR_DATALEN5;
648 		DPRINTF("  5 bit\n");
649 		break;
650 	case CS6:
651 		lcr |= MCS7840_UART_LCR_DATALEN6;
652 		DPRINTF("  6 bit\n");
653 		break;
654 	case CS7:
655 		lcr |= MCS7840_UART_LCR_DATALEN7;
656 		DPRINTF("  7 bit\n");
657 		break;
658 	case CS8:
659 		lcr |= MCS7840_UART_LCR_DATALEN8;
660 		DPRINTF("  8 bit\n");
661 		break;
662 	}
663 
664 	if (t->c_cflag & CRTSCTS) {
665 		mcr |= MCS7840_UART_MCR_CTSRTS;
666 		DPRINTF("  CTS/RTS\n");
667 	} else
668 		mcr &= ~MCS7840_UART_MCR_CTSRTS;
669 
670 	if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) {
671 		mcr |= MCS7840_UART_MCR_DTRDSR;
672 		DPRINTF("  DTR/DSR\n");
673 	} else
674 		mcr &= ~MCS7840_UART_MCR_DTRDSR;
675 
676 	sc->sc_ports[pn].sc_lcr = lcr;
677 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
678 	DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr);
679 
680 	sc->sc_ports[pn].sc_mcr = mcr;
681 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
682 	DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr);
683 
684 	umcs7840_set_baudrate(sc, pn, t->c_ospeed);
685 }
686 
687 
688 static int
689 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t)
690 {
691 	uint8_t clk;
692 	uint16_t divisor;
693 
694 	if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor)
695 		return (EINVAL);
696 	return (0);
697 }
698 
699 static void
700 umcs7840_start_read(struct ucom_softc *ucom)
701 {
702 	struct umcs7840_softc *sc = ucom->sc_parent;
703 	uint8_t pn = ucom->sc_portno;
704 
705 	/* Start interrupt transfer */
706 	usbd_transfer_start(sc->sc_intr_xfer);
707 
708 	/* Start read transfer */
709 	usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
710 }
711 
712 static void
713 umcs7840_stop_read(struct ucom_softc *ucom)
714 {
715 	struct umcs7840_softc *sc = ucom->sc_parent;
716 	uint8_t pn = ucom->sc_portno;
717 
718 	/* Stop read transfer */
719 	usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
720 }
721 
722 static void
723 umcs7840_start_write(struct ucom_softc *ucom)
724 {
725 	struct umcs7840_softc *sc = ucom->sc_parent;
726 	uint8_t pn = ucom->sc_portno;
727 
728 	/* Start interrupt transfer */
729 	usbd_transfer_start(sc->sc_intr_xfer);
730 
731 	/* Start write transfer */
732 	usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
733 }
734 
735 static void
736 umcs7840_stop_write(struct ucom_softc *ucom)
737 {
738 	struct umcs7840_softc *sc = ucom->sc_parent;
739 	uint8_t pn = ucom->sc_portno;
740 
741 	/* Stop write transfer */
742 	usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
743 }
744 
745 static void
746 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
747 {
748 	struct umcs7840_softc *sc = ucom->sc_parent;
749 	uint8_t pn = ucom->sc_portno;
750 	uint8_t	hw_msr = 0;	/* local modem status register */
751 
752 	/*
753 	 * Read status registers.  MSR bits need translation from ns16550 to
754 	 * SER_* values.  LSR bits are ns16550 in hardware and ucom.
755 	 */
756 	umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, lsr);
757 	umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr);
758 
759 	if (hw_msr & MCS7840_UART_MSR_NEGCTS)
760 		*msr |= SER_CTS;
761 
762 	if (hw_msr & MCS7840_UART_MSR_NEGDCD)
763 		*msr |= SER_DCD;
764 
765 	if (hw_msr & MCS7840_UART_MSR_NEGRI)
766 		*msr |= SER_RI;
767 
768 	if (hw_msr & MCS7840_UART_MSR_NEGDSR)
769 		*msr |= SER_DSR;
770 
771 	DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr);
772 }
773 
774 static void
775 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error)
776 {
777 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
778 	struct usb_page_cache *pc;
779 	uint8_t buf[13];
780 	int actlen;
781 	int subunit;
782 
783 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
784 
785 	switch (USB_GET_STATE(xfer)) {
786 	case USB_ST_TRANSFERRED:
787 		if (actlen == 5 || actlen == 13) {
788 			pc = usbd_xfer_get_frame(xfer, 0);
789 			usbd_copy_out(pc, 0, buf, actlen);
790 			/* Check status of all ports */
791 			for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
792 				uint8_t pn = sc->sc_ucom[subunit].sc_portno;
793 
794 				if (buf[pn] & MCS7840_UART_ISR_NOPENDING)
795 					continue;
796 				DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK));
797 				switch (buf[pn] & MCS7840_UART_ISR_INTMASK) {
798 				case MCS7840_UART_ISR_RXERR:
799 				case MCS7840_UART_ISR_RXHASDATA:
800 				case MCS7840_UART_ISR_RXTIMEOUT:
801 				case MCS7840_UART_ISR_MSCHANGE:
802 					ucom_status_change(&sc->sc_ucom[subunit]);
803 					break;
804 				default:
805 					/* Do nothing */
806 					break;
807 				}
808 			}
809 		} else
810 			device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen);
811 		/* FALLTHROUGH */
812 	case USB_ST_SETUP:
813 tr_setup:
814 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
815 		usbd_transfer_submit(xfer);
816 		return;
817 
818 	default:			/* Error */
819 		if (error != USB_ERR_CANCELLED) {
820 			/* try to clear stall first */
821 			usbd_xfer_set_stall(xfer);
822 			goto tr_setup;
823 		}
824 		return;
825 	}
826 }
827 
828 static void
829 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error)
830 {
831 	umcs7840_read_callbackN(xfer, error, 0);
832 }
833 
834 static void
835 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error)
836 {
837 	umcs7840_read_callbackN(xfer, error, 1);
838 }
839 static void
840 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error)
841 {
842 	umcs7840_read_callbackN(xfer, error, 2);
843 }
844 
845 static void
846 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error)
847 {
848 	umcs7840_read_callbackN(xfer, error, 3);
849 }
850 
851 static void
852 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
853 {
854 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
855 	struct ucom_softc *ucom = &sc->sc_ucom[subunit];
856 	struct usb_page_cache *pc;
857 	int actlen;
858 
859 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
860 
861 	DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen);
862 
863 	switch (USB_GET_STATE(xfer)) {
864 	case USB_ST_TRANSFERRED:
865 		pc = usbd_xfer_get_frame(xfer, 0);
866 		ucom_put_data(ucom, pc, 0, actlen);
867 		/* FALLTHROUGH */
868 	case USB_ST_SETUP:
869 tr_setup:
870 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
871 		usbd_transfer_submit(xfer);
872 		return;
873 
874 	default:			/* Error */
875 		if (error != USB_ERR_CANCELLED) {
876 			/* try to clear stall first */
877 			usbd_xfer_set_stall(xfer);
878 			goto tr_setup;
879 		}
880 		return;
881 	}
882 }
883 
884 static void
885 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error)
886 {
887 	umcs7840_write_callbackN(xfer, error, 0);
888 }
889 
890 static void
891 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error)
892 {
893 	umcs7840_write_callbackN(xfer, error, 1);
894 }
895 
896 static void
897 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error)
898 {
899 	umcs7840_write_callbackN(xfer, error, 2);
900 }
901 
902 static void
903 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error)
904 {
905 	umcs7840_write_callbackN(xfer, error, 3);
906 }
907 
908 static void
909 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
910 {
911 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
912 	struct ucom_softc *ucom = &sc->sc_ucom[subunit];
913 	struct usb_page_cache *pc;
914 	uint32_t actlen;
915 
916 	DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer));
917 
918 	switch (USB_GET_STATE(xfer)) {
919 	case USB_ST_SETUP:
920 	case USB_ST_TRANSFERRED:
921 tr_setup:
922 		pc = usbd_xfer_get_frame(xfer, 0);
923 		if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) {
924 			DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen);
925 			usbd_xfer_set_frame_len(xfer, 0, actlen);
926 			usbd_transfer_submit(xfer);
927 		}
928 		return;
929 
930 	default:			/* Error */
931 		if (error != USB_ERR_CANCELLED) {
932 			/* try to clear stall first */
933 			usbd_xfer_set_stall(xfer);
934 			goto tr_setup;
935 		}
936 		return;
937 	}
938 }
939 
940 static void
941 umcs7840_poll(struct ucom_softc *ucom)
942 {
943 	struct umcs7840_softc *sc = ucom->sc_parent;
944 
945 	DPRINTF("Port %d poll\n", ucom->sc_portno);
946 	usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
947 	usbd_transfer_poll(&sc->sc_intr_xfer, 1);
948 }
949 
950 static usb_error_t
951 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data)
952 {
953 	struct usb_device_request req;
954 	usb_error_t err;
955 	uint16_t len;
956 
957 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
958 	req.bRequest = MCS7840_RDREQ;
959 	USETW(req.wValue, 0);
960 	USETW(req.wIndex, reg);
961 	USETW(req.wLength, UMCS7840_READ_LENGTH);
962 
963 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
964 	if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
965 		device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len);
966 		return (USB_ERR_INVAL);
967 	} else if (err)
968 		device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err));
969 	return (err);
970 }
971 
972 static usb_error_t
973 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data)
974 {
975 	struct usb_device_request req;
976 	usb_error_t err;
977 
978 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
979 	req.bRequest = MCS7840_WRREQ;
980 	USETW(req.wValue, data);
981 	USETW(req.wIndex, reg);
982 	USETW(req.wLength, 0);
983 
984 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
985 	if (err)
986 		device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err));
987 
988 	return (err);
989 }
990 
991 static usb_error_t
992 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data)
993 {
994 	struct usb_device_request req;
995 	uint16_t wVal;
996 	usb_error_t err;
997 	uint16_t len;
998 
999 	/* portno is port number */
1000 	wVal = ((uint16_t)(portno + 1)) << 8;
1001 
1002 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1003 	req.bRequest = MCS7840_RDREQ;
1004 	USETW(req.wValue, wVal);
1005 	USETW(req.wIndex, reg);
1006 	USETW(req.wLength, UMCS7840_READ_LENGTH);
1007 
1008 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
1009 	if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
1010 		device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len);
1011 		return (USB_ERR_INVAL);
1012 	} else if (err)
1013 		device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1014 	return (err);
1015 }
1016 
1017 static usb_error_t
1018 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data)
1019 {
1020 	struct usb_device_request req;
1021 	usb_error_t err;
1022 	uint16_t wVal;
1023 
1024 	/* portno is port number */
1025 	wVal = ((uint16_t)(portno + 1)) << 8 | data;
1026 
1027 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1028 	req.bRequest = MCS7840_WRREQ;
1029 	USETW(req.wValue, wVal);
1030 	USETW(req.wIndex, reg);
1031 	USETW(req.wLength, 0);
1032 
1033 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
1034 	if (err)
1035 		device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1036 	return (err);
1037 }
1038 
1039 static usb_error_t
1040 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate)
1041 {
1042 	usb_error_t err;
1043 	uint16_t divisor;
1044 	uint8_t clk;
1045 	uint8_t data;
1046 
1047 	if (umcs7840_calc_baudrate(rate, &divisor, &clk)) {
1048 		DPRINTF("Port %d bad speed: %d\n", portno, rate);
1049 		return (-1);
1050 	}
1051 	if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) {
1052 		DPRINTF("Port %d bad speed calculation: %d\n", portno, rate);
1053 		return (-1);
1054 	}
1055 	DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor);
1056 
1057 	/* Set clock source for standard BAUD frequences */
1058 	err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data);
1059 	if (err)
1060 		return (err);
1061 	data &= MCS7840_DEV_SPx_CLOCK_MASK;
1062 	data |= clk;
1063 	err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data);
1064 	if (err)
1065 		return (err);
1066 
1067 	/* Set divider */
1068 	sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS;
1069 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1070 	if (err)
1071 		return (err);
1072 
1073 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff));
1074 	if (err)
1075 		return (err);
1076 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff));
1077 	if (err)
1078 		return (err);
1079 
1080 	/* Turn off access to DLL/DLM registers of UART */
1081 	sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS;
1082 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1083 	if (err)
1084 		return (err);
1085 	return (0);
1086 }
1087 
1088 /* Maximum speeds for standard frequences, when PLL is not used */
1089 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,};
1090 static const uint8_t umcs7840_baudrate_divisors_len = nitems(umcs7840_baudrate_divisors);
1091 
1092 static usb_error_t
1093 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk)
1094 {
1095 	uint8_t i = 0;
1096 
1097 	if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1])
1098 		return (-1);
1099 
1100 	for (i = 0; i < umcs7840_baudrate_divisors_len - 1 &&
1101 	    !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i);
1102 	if (rate == 0)
1103 		*divisor = 1;	/* XXX */
1104 	else
1105 		*divisor = umcs7840_baudrate_divisors[i + 1] / rate;
1106 	/* 0x00 .. 0x70 */
1107 	*clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT;
1108 	return (0);
1109 }
1110