xref: /freebsd/sys/dev/usb/serial/umcs.c (revision f5f7c05209ca2c3748fd8b27c5e80ffad49120eb)
1 /*-
2  * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 /*
28  * This driver supports several multiport USB-to-RS232 serial adapters driven
29  * by MosChip mos7820 and mos7840, bridge chips.
30  * The adapters are sold under many different brand names.
31  *
32  * Datasheets are available at MosChip www site at
33  * http://www.moschip.com.  The datasheets don't contain full
34  * programming information for the chip.
35  *
36  * It is nornal to have only two enabled ports in devices, based on
37  * quad-port mos7840.
38  *
39  */
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
42 
43 #include <sys/stdint.h>
44 #include <sys/stddef.h>
45 #include <sys/param.h>
46 #include <sys/queue.h>
47 #include <sys/types.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/bus.h>
51 #include <sys/linker_set.h>
52 #include <sys/module.h>
53 #include <sys/lock.h>
54 #include <sys/mutex.h>
55 #include <sys/condvar.h>
56 #include <sys/sysctl.h>
57 #include <sys/sx.h>
58 #include <sys/unistd.h>
59 #include <sys/callout.h>
60 #include <sys/malloc.h>
61 #include <sys/priv.h>
62 
63 #include <dev/usb/usb.h>
64 #include <dev/usb/usbdi.h>
65 #include <dev/usb/usbdi_util.h>
66 #include <dev/usb/usb_cdc.h>
67 #include "usbdevs.h"
68 
69 #define	USB_DEBUG_VAR umcs_debug
70 #include <dev/usb/usb_debug.h>
71 #include <dev/usb/usb_process.h>
72 
73 #include <dev/usb/serial/usb_serial.h>
74 
75 #include <dev/usb/serial/umcs.h>
76 
77 #define	UMCS7840_MODVER	1
78 
79 #ifdef USB_DEBUG
80 static int umcs_debug = 0;
81 
82 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter");
83 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RW, &umcs_debug, 0, "Debug level");
84 #endif					/* USB_DEBUG */
85 
86 
87 /*
88  * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
89  * have ports 0 and 2, with ports 1 and 3 omitted.
90  * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
91  * This driver trys to use physical numbers as much as possible.
92  */
93 
94 /*
95  * Indexed by PHYSICAL port number.
96  * Pack non-regular registers to array to easier if-less access.
97  */
98 struct umcs7840_port_registers {
99 	uint8_t	reg_sp;			/* SP register. */
100 	uint8_t	reg_control;		/* CONTROL register. */
101 	uint8_t	reg_dcr;		/* DCR0 register. DCR1 & DCR2 can be
102 					 * calculated */
103 };
104 
105 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = {
106 	{.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1},
107 	{.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2},
108 	{.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3},
109 	{.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4},
110 };
111 
112 enum {
113 	UMCS7840_BULK_RD_EP,
114 	UMCS7840_BULK_WR_EP,
115 	UMCS7840_N_TRANSFERS
116 };
117 
118 struct umcs7840_softc_oneport {
119 	struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS];	/* Control structures
120 							 * for two transfers */
121 
122 	uint8_t	sc_lcr;			/* local line control register */
123 	uint8_t	sc_mcr;			/* local modem control register */
124 	uint8_t	sc_lsr;			/* local line status register */
125 	uint8_t	sc_msr;			/* local modem status register */
126 };
127 
128 struct umcs7840_softc {
129 	struct ucom_super_softc sc_super_ucom;
130 	struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS];	/* Need to be continuous
131 							 * array, so indexed by
132 							 * LOGICAL port
133 							 * (subunit) number */
134 
135 	struct usb_xfer *sc_intr_xfer;	/* Interrupt endpoint */
136 
137 	device_t sc_dev;		/* Device for error prints */
138 	struct usb_device *sc_udev;	/* USB Device for all operations */
139 	struct mtx sc_mtx;		/* ucom requires this */
140 
141 	uint8_t	sc_driver_done;		/* Flag when enumeration is finished */
142 
143 	uint8_t	sc_numports;		/* Number of ports (subunits) */
144 	struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS];	/* Indexed by PHYSICAL
145 									 * port number. */
146 };
147 
148 /* prototypes */
149 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *);
150 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t);
151 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *);
152 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t);
153 
154 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t);
155 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *);
156 
157 static void	umcs7840_free(struct ucom_softc *);
158 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *);
159 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t);
160 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t);
161 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t);
162 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *);
163 static void umcs7840_cfg_open(struct ucom_softc *);
164 static void umcs7840_cfg_close(struct ucom_softc *);
165 
166 static int umcs7840_pre_param(struct ucom_softc *, struct termios *);
167 
168 static void umcs7840_start_read(struct ucom_softc *);
169 static void umcs7840_stop_read(struct ucom_softc *);
170 
171 static void umcs7840_start_write(struct ucom_softc *);
172 static void umcs7840_stop_write(struct ucom_softc *);
173 
174 static void umcs7840_poll(struct ucom_softc *ucom);
175 
176 static device_probe_t umcs7840_probe;
177 static device_attach_t umcs7840_attach;
178 static device_detach_t umcs7840_detach;
179 static void umcs7840_free_softc(struct umcs7840_softc *);
180 
181 static usb_callback_t umcs7840_intr_callback;
182 static usb_callback_t umcs7840_read_callback1;
183 static usb_callback_t umcs7840_read_callback2;
184 static usb_callback_t umcs7840_read_callback3;
185 static usb_callback_t umcs7840_read_callback4;
186 static usb_callback_t umcs7840_write_callback1;
187 static usb_callback_t umcs7840_write_callback2;
188 static usb_callback_t umcs7840_write_callback3;
189 static usb_callback_t umcs7840_write_callback4;
190 
191 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
192 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
193 
194 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */
195 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = {
196 	{&umcs7840_read_callback1, &umcs7840_write_callback1},
197 	{&umcs7840_read_callback2, &umcs7840_write_callback2},
198 	{&umcs7840_read_callback3, &umcs7840_write_callback3},
199 	{&umcs7840_read_callback4, &umcs7840_write_callback4},
200 };
201 
202 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = {
203 	[UMCS7840_BULK_RD_EP] = {
204 		.type = UE_BULK,
205 		.endpoint = 0x01,
206 		.direction = UE_DIR_IN,
207 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
208 		.bufsize = 0,		/* use wMaxPacketSize */
209 		.callback = &umcs7840_read_callback1,
210 		.if_index = 0,
211 	},
212 
213 	[UMCS7840_BULK_WR_EP] = {
214 		.type = UE_BULK,
215 		.endpoint = 0x02,
216 		.direction = UE_DIR_OUT,
217 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
218 		.bufsize = 0,		/* use wMaxPacketSize */
219 		.callback = &umcs7840_write_callback1,
220 		.if_index = 0,
221 	},
222 };
223 
224 static const struct usb_config umcs7840_intr_config_data[1] = {
225 	[0] = {
226 		.type = UE_INTERRUPT,
227 		.endpoint = 0x09,
228 		.direction = UE_DIR_IN,
229 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
230 		.bufsize = 0,		/* use wMaxPacketSize */
231 		.callback = &umcs7840_intr_callback,
232 		.if_index = 0,
233 	},
234 };
235 
236 static struct ucom_callback umcs7840_callback = {
237 	.ucom_cfg_get_status = &umcs7840_cfg_get_status,
238 
239 	.ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr,
240 	.ucom_cfg_set_rts = &umcs7840_cfg_set_rts,
241 	.ucom_cfg_set_break = &umcs7840_cfg_set_break,
242 
243 	.ucom_cfg_param = &umcs7840_cfg_param,
244 	.ucom_cfg_open = &umcs7840_cfg_open,
245 	.ucom_cfg_close = &umcs7840_cfg_close,
246 
247 	.ucom_pre_param = &umcs7840_pre_param,
248 
249 	.ucom_start_read = &umcs7840_start_read,
250 	.ucom_stop_read = &umcs7840_stop_read,
251 
252 	.ucom_start_write = &umcs7840_start_write,
253 	.ucom_stop_write = &umcs7840_stop_write,
254 
255 	.ucom_poll = &umcs7840_poll,
256 	.ucom_free = &umcs7840_free,
257 };
258 
259 static const STRUCT_USB_HOST_ID umcs7840_devs[] = {
260 	{USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)},
261 	{USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)},
262 };
263 
264 static device_method_t umcs7840_methods[] = {
265 	DEVMETHOD(device_probe, umcs7840_probe),
266 	DEVMETHOD(device_attach, umcs7840_attach),
267 	DEVMETHOD(device_detach, umcs7840_detach),
268 	DEVMETHOD_END
269 };
270 
271 static devclass_t umcs7840_devclass;
272 
273 static driver_t umcs7840_driver = {
274 	.name = "umcs7840",
275 	.methods = umcs7840_methods,
276 	.size = sizeof(struct umcs7840_softc),
277 };
278 
279 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0);
280 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1);
281 MODULE_DEPEND(umcs7840, usb, 1, 1, 1);
282 MODULE_VERSION(umcs7840, UMCS7840_MODVER);
283 
284 static int
285 umcs7840_probe(device_t dev)
286 {
287 	struct usb_attach_arg *uaa = device_get_ivars(dev);
288 
289 	if (uaa->usb_mode != USB_MODE_HOST)
290 		return (ENXIO);
291 	if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX)
292 		return (ENXIO);
293 	if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX)
294 		return (ENXIO);
295 	return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa));
296 }
297 
298 static int
299 umcs7840_attach(device_t dev)
300 {
301 	struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS];
302 	struct usb_attach_arg *uaa = device_get_ivars(dev);
303 	struct umcs7840_softc *sc = device_get_softc(dev);
304 
305 	uint8_t iface_index = MCS7840_IFACE_INDEX;
306 	int error;
307 	int subunit;
308 	int n;
309 	uint8_t data;
310 
311 	for (n = 0; n < UMCS7840_N_TRANSFERS; ++n)
312 		umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n];
313 
314 	device_set_usb_desc(dev);
315 	mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF);
316 	ucom_ref(&sc->sc_super_ucom);
317 
318 	sc->sc_dev = dev;
319 	sc->sc_udev = uaa->device;
320 
321 	/*
322 	 * Get number of ports
323 	 * Documentation (full datasheet) says, that number of ports is
324 	 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only
325 	 * register. But vendor driver uses these undocumented
326 	 * register & bit.
327 	 *
328 	 * Experiments show, that MODE register can have `0'
329 	 * (4 ports) bit on 2-port device, so use vendor driver's way.
330 	 *
331 	 * Also, see notes in header file for these constants.
332 	 */
333 	umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data);
334 	if (data & MCS7840_DEV_GPIO_4PORTS) {
335 		sc->sc_numports = 4;
336 		/* Store physical port numbers in sc_portno */
337 		sc->sc_ucom[0].sc_portno = 0;
338 		sc->sc_ucom[1].sc_portno = 1;
339 		sc->sc_ucom[2].sc_portno = 2;
340 		sc->sc_ucom[3].sc_portno = 3;
341 	} else {
342 		sc->sc_numports = 2;
343 		/* Store physical port numbers in sc_portno */
344 		sc->sc_ucom[0].sc_portno = 0;
345 		sc->sc_ucom[1].sc_portno = 2;	/* '1' is skipped */
346 	}
347 	device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports);
348 	if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) {
349 		device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n",
350 		    (data & MCS7840_DEV_MODE_RESET) ? "low" : "high",
351 		    (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no",
352 		    (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail",
353 		    (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail",
354 		    (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4",
355 		    (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled",
356 		    (data & MCS7840_DEV_MODE_IRDA) ? "" : "not ");
357 	}
358 	/* Setup all transfers */
359 	for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
360 		for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) {
361 			/* Set endpoint address */
362 			umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno;
363 			umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n];
364 		}
365 		error = usbd_transfer_setup(uaa->device,
366 		    &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp,
367 		    UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx);
368 		if (error) {
369 			device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n",
370 			    subunit + 1, sc->sc_numports);
371 			goto detach;
372 		}
373 	}
374 	error = usbd_transfer_setup(uaa->device,
375 	    &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data,
376 	    1, sc, &sc->sc_mtx);
377 	if (error) {
378 		device_printf(dev, "allocating USB transfers failed for interrupt\n");
379 		goto detach;
380 	}
381 	/* clear stall at first run */
382 	mtx_lock(&sc->sc_mtx);
383 	for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
384 		usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]);
385 		usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]);
386 	}
387 	mtx_unlock(&sc->sc_mtx);
388 
389 	error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc,
390 	    &umcs7840_callback, &sc->sc_mtx);
391 	if (error)
392 		goto detach;
393 
394 	ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
395 
396 	return (0);
397 
398 detach:
399 	umcs7840_detach(dev);
400 	return (ENXIO);
401 }
402 
403 static int
404 umcs7840_detach(device_t dev)
405 {
406 	struct umcs7840_softc *sc = device_get_softc(dev);
407 	int subunit;
408 
409 	ucom_detach(&sc->sc_super_ucom, sc->sc_ucom);
410 
411 	for (subunit = 0; subunit < sc->sc_numports; ++subunit)
412 		usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
413 	usbd_transfer_unsetup(&sc->sc_intr_xfer, 1);
414 
415 	device_claim_softc(dev);
416 
417 	umcs7840_free_softc(sc);
418 
419 	return (0);
420 }
421 
422 UCOM_UNLOAD_DRAIN(umcs7840);
423 
424 static void
425 umcs7840_free_softc(struct umcs7840_softc *sc)
426 {
427 	if (ucom_unref(&sc->sc_super_ucom)) {
428 		mtx_destroy(&sc->sc_mtx);
429 		device_free_softc(sc);
430 	}
431 }
432 
433 static void
434 umcs7840_free(struct ucom_softc *ucom)
435 {
436 	umcs7840_free_softc(ucom->sc_parent);
437 }
438 
439 static void
440 umcs7840_cfg_open(struct ucom_softc *ucom)
441 {
442 	struct umcs7840_softc *sc = ucom->sc_parent;
443 	uint16_t pn = ucom->sc_portno;
444 	uint8_t data;
445 
446 	/* If it very first open, finish global configuration */
447 	if (!sc->sc_driver_done) {
448 		/*
449 		 * USB enumeration is finished, pass internal memory to FIFOs
450 		 * If it is done in the end of "attach", kernel panics.
451 		 */
452 		if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data))
453 			return;
454 		data |= MCS7840_DEV_CONTROL1_DRIVER_DONE;
455 		if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data))
456 			return;
457 		sc->sc_driver_done = 1;
458 	}
459 	/* Toggle reset bit on-off */
460 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
461 		return;
462 	data |= MCS7840_DEV_SPx_UART_RESET;
463 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
464 		return;
465 	data &= ~MCS7840_DEV_SPx_UART_RESET;
466 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
467 		return;
468 
469 	/* Set RS-232 mode */
470 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232))
471 		return;
472 
473 	/* Disable RX on time of initialization */
474 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
475 		return;
476 	data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
477 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
478 		return;
479 
480 	/* Disable all interrupts */
481 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0))
482 		return;
483 
484 	/* Reset FIFO -- documented */
485 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0))
486 		return;
487 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR,
488 	    MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR |
489 	    MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14))
490 		return;
491 
492 	/* Set 8 bit, no parity, 1 stop bit -- documented */
493 	sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1;
494 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr))
495 		return;
496 
497 	/*
498 	 * Enable DTR/RTS on modem control, enable modem interrupts --
499 	 * documented
500 	 */
501 	sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS | MCS7840_UART_MCR_IE;
502 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr))
503 		return;
504 
505 	/* Clearing Bulkin and Bulkout FIFO */
506 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
507 		return;
508 	data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO;
509 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
510 		return;
511 	data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO);
512 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
513 		return;
514 
515 	/* Set speed 9600 */
516 	if (umcs7840_set_baudrate(sc, pn, 9600))
517 		return;
518 
519 
520 	/* Finally enable all interrupts -- documented */
521 	/*
522 	 * Copied from vendor driver, I don't know why we should read LCR
523 	 * here
524 	 */
525 	if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr))
526 		return;
527 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER,
528 	    MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM))
529 		return;
530 
531 	/* Enable RX */
532 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
533 		return;
534 	data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE;
535 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
536 		return;
537 
538 	/* Read LSR & MSR */
539 	if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &sc->sc_ports[pn].sc_lsr))
540 		return;
541 	if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &sc->sc_ports[pn].sc_msr))
542 		return;
543 	DPRINTF("Port %d has been opened, LSR=%02x MSR=%02x\n", pn, sc->sc_ports[pn].sc_lsr, sc->sc_ports[pn].sc_msr);
544 }
545 
546 static void
547 umcs7840_cfg_close(struct ucom_softc *ucom)
548 {
549 	struct umcs7840_softc *sc = ucom->sc_parent;
550 	uint16_t pn = ucom->sc_portno;
551 	uint8_t data;
552 
553 	umcs7840_stop_read(ucom);
554 	umcs7840_stop_write(ucom);
555 
556 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0);
557 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0);
558 
559 	/* Disable RX */
560 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
561 		return;
562 	data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
563 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
564 		return;
565 	DPRINTF("Port %d has been closed\n", pn);
566 }
567 
568 static void
569 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
570 {
571 	struct umcs7840_softc *sc = ucom->sc_parent;
572 	uint8_t pn = ucom->sc_portno;
573 
574 	if (onoff)
575 		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR;
576 	else
577 		sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR;
578 
579 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
580 	DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off");
581 }
582 
583 static void
584 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
585 {
586 	struct umcs7840_softc *sc = ucom->sc_parent;
587 	uint8_t pn = ucom->sc_portno;
588 
589 	if (onoff)
590 		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS;
591 	else
592 		sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS;
593 
594 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
595 	DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off");
596 }
597 
598 static void
599 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
600 {
601 	struct umcs7840_softc *sc = ucom->sc_parent;
602 	uint8_t pn = ucom->sc_portno;
603 
604 	if (onoff)
605 		sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK;
606 	else
607 		sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK;
608 
609 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
610 	DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off");
611 }
612 
613 
614 static void
615 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t)
616 {
617 	struct umcs7840_softc *sc = ucom->sc_parent;
618 	uint8_t pn = ucom->sc_portno;
619 	uint8_t lcr = sc->sc_ports[pn].sc_lcr;
620 	uint8_t mcr = sc->sc_ports[pn].sc_mcr;
621 
622 	DPRINTF("Port %d config:\n", pn);
623 	if (t->c_cflag & CSTOPB) {
624 		DPRINTF("  2 stop bits\n");
625 		lcr |= MCS7840_UART_LCR_STOPB2;
626 	} else {
627 		lcr |= MCS7840_UART_LCR_STOPB1;
628 		DPRINTF("  1 stop bit\n");
629 	}
630 
631 	lcr &= ~MCS7840_UART_LCR_PARITYMASK;
632 	if (t->c_cflag & PARENB) {
633 		lcr |= MCS7840_UART_LCR_PARITYON;
634 		if (t->c_cflag & PARODD) {
635 			lcr = MCS7840_UART_LCR_PARITYODD;
636 			DPRINTF("  parity on - odd\n");
637 		} else {
638 			lcr = MCS7840_UART_LCR_PARITYEVEN;
639 			DPRINTF("  parity on - even\n");
640 		}
641 	} else {
642 		lcr &= ~MCS7840_UART_LCR_PARITYON;
643 		DPRINTF("  parity off\n");
644 	}
645 
646 	lcr &= ~MCS7840_UART_LCR_DATALENMASK;
647 	switch (t->c_cflag & CSIZE) {
648 	case CS5:
649 		lcr |= MCS7840_UART_LCR_DATALEN5;
650 		DPRINTF("  5 bit\n");
651 		break;
652 	case CS6:
653 		lcr |= MCS7840_UART_LCR_DATALEN6;
654 		DPRINTF("  6 bit\n");
655 		break;
656 	case CS7:
657 		lcr |= MCS7840_UART_LCR_DATALEN7;
658 		DPRINTF("  7 bit\n");
659 		break;
660 	case CS8:
661 		lcr |= MCS7840_UART_LCR_DATALEN8;
662 		DPRINTF("  8 bit\n");
663 		break;
664 	}
665 
666 	if (t->c_cflag & CRTSCTS) {
667 		mcr |= MCS7840_UART_MCR_CTSRTS;
668 		DPRINTF("  CTS/RTS\n");
669 	} else
670 		mcr &= ~MCS7840_UART_MCR_CTSRTS;
671 
672 	if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) {
673 		mcr |= MCS7840_UART_MCR_DTRDSR;
674 		DPRINTF("  DTR/DSR\n");
675 	} else
676 		mcr &= ~MCS7840_UART_MCR_DTRDSR;
677 
678 	sc->sc_ports[pn].sc_lcr = lcr;
679 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
680 	DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr);
681 
682 	sc->sc_ports[pn].sc_mcr = mcr;
683 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
684 	DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr);
685 
686 	umcs7840_set_baudrate(sc, pn, t->c_ospeed);
687 }
688 
689 
690 static int
691 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t)
692 {
693 	uint8_t clk;
694 	uint16_t divisor;
695 
696 	if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor)
697 		return (EINVAL);
698 	return (0);
699 }
700 
701 static void
702 umcs7840_start_read(struct ucom_softc *ucom)
703 {
704 	struct umcs7840_softc *sc = ucom->sc_parent;
705 	uint8_t pn = ucom->sc_portno;
706 
707 	/* Start interrupt transfer */
708 	usbd_transfer_start(sc->sc_intr_xfer);
709 
710 	/* Start read transfer */
711 	usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
712 }
713 
714 static void
715 umcs7840_stop_read(struct ucom_softc *ucom)
716 {
717 	struct umcs7840_softc *sc = ucom->sc_parent;
718 	uint8_t pn = ucom->sc_portno;
719 
720 	/* Stop read transfer */
721 	usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
722 }
723 
724 static void
725 umcs7840_start_write(struct ucom_softc *ucom)
726 {
727 	struct umcs7840_softc *sc = ucom->sc_parent;
728 	uint8_t pn = ucom->sc_portno;
729 
730 	/* Start interrupt transfer */
731 	usbd_transfer_start(sc->sc_intr_xfer);
732 
733 	/* Start write transfer */
734 	usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
735 }
736 
737 static void
738 umcs7840_stop_write(struct ucom_softc *ucom)
739 {
740 	struct umcs7840_softc *sc = ucom->sc_parent;
741 	uint8_t pn = ucom->sc_portno;
742 
743 	/* Stop write transfer */
744 	usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
745 }
746 
747 static void
748 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
749 {
750 	struct umcs7840_softc *sc = ucom->sc_parent;
751 
752 	*lsr = sc->sc_ports[ucom->sc_portno].sc_lsr;
753 	*msr = sc->sc_ports[ucom->sc_portno].sc_msr;
754 	DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr);
755 }
756 
757 static void
758 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error)
759 {
760 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
761 	struct usb_page_cache *pc;
762 	uint8_t buf[13];
763 	int actlen;
764 	int subunit;
765 
766 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
767 
768 	switch (USB_GET_STATE(xfer)) {
769 	case USB_ST_TRANSFERRED:
770 		if (actlen == 5 || actlen == 13) {
771 			pc = usbd_xfer_get_frame(xfer, 0);
772 			usbd_copy_out(pc, 0, buf, actlen);
773 			/* Check status of all ports */
774 			for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
775 				uint8_t pn = sc->sc_ucom[subunit].sc_portno;
776 
777 				if (buf[pn] & MCS7840_UART_ISR_NOPENDING)
778 					continue;
779 				DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK));
780 				switch (buf[pn] & MCS7840_UART_ISR_INTMASK) {
781 				case MCS7840_UART_ISR_RXERR:
782 				case MCS7840_UART_ISR_RXHASDATA:
783 				case MCS7840_UART_ISR_RXTIMEOUT:
784 					/* Read new LSR */
785 					if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &sc->sc_ports[pn].sc_lsr))
786 						break;	/* Inner switch */
787 					ucom_status_change(&sc->sc_ucom[subunit]);
788 					/* Inner switch */
789 					break;
790 				case MCS7840_UART_ISR_TXEMPTY:
791 					/* Do nothing */
792 					break;	/* Inner switch */
793 				case MCS7840_UART_ISR_MSCHANGE:
794 					/* Read new MSR */
795 					if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &sc->sc_ports[pn].sc_msr))
796 						break;	/* Inner switch */
797 					DPRINTF("Port %d: new MSR %02x\n", pn, sc->sc_ports[pn].sc_msr);
798 					ucom_status_change(&sc->sc_ucom[subunit]);
799 					break;
800 				}
801 			}
802 		} else
803 			device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen);
804 		/* FALLTHROUGH */
805 	case USB_ST_SETUP:
806 tr_setup:
807 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
808 		usbd_transfer_submit(xfer);
809 		return;
810 
811 	default:			/* Error */
812 		if (error != USB_ERR_CANCELLED) {
813 			/* try to clear stall first */
814 			usbd_xfer_set_stall(xfer);
815 			goto tr_setup;
816 		}
817 		return;
818 	}
819 }
820 
821 static void
822 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error)
823 {
824 	umcs7840_read_callbackN(xfer, error, 0);
825 }
826 
827 static void
828 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error)
829 {
830 	umcs7840_read_callbackN(xfer, error, 1);
831 }
832 static void
833 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error)
834 {
835 	umcs7840_read_callbackN(xfer, error, 2);
836 }
837 
838 static void
839 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error)
840 {
841 	umcs7840_read_callbackN(xfer, error, 3);
842 }
843 
844 static void
845 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
846 {
847 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
848 	struct ucom_softc *ucom = &sc->sc_ucom[subunit];
849 	struct usb_page_cache *pc;
850 	int actlen;
851 
852 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
853 
854 	DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen);
855 
856 	switch (USB_GET_STATE(xfer)) {
857 	case USB_ST_TRANSFERRED:
858 		pc = usbd_xfer_get_frame(xfer, 0);
859 		ucom_put_data(ucom, pc, 0, actlen);
860 		/* FALLTHROUGH */
861 	case USB_ST_SETUP:
862 tr_setup:
863 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
864 		usbd_transfer_submit(xfer);
865 		return;
866 
867 	default:			/* Error */
868 		if (error != USB_ERR_CANCELLED) {
869 			/* try to clear stall first */
870 			usbd_xfer_set_stall(xfer);
871 			goto tr_setup;
872 		}
873 		return;
874 	}
875 }
876 
877 static void
878 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error)
879 {
880 	umcs7840_write_callbackN(xfer, error, 0);
881 }
882 
883 static void
884 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error)
885 {
886 	umcs7840_write_callbackN(xfer, error, 1);
887 }
888 
889 static void
890 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error)
891 {
892 	umcs7840_write_callbackN(xfer, error, 2);
893 }
894 
895 static void
896 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error)
897 {
898 	umcs7840_write_callbackN(xfer, error, 3);
899 }
900 
901 static void
902 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
903 {
904 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
905 	struct ucom_softc *ucom = &sc->sc_ucom[subunit];
906 	struct usb_page_cache *pc;
907 	uint32_t actlen;
908 
909 	DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer));
910 
911 	switch (USB_GET_STATE(xfer)) {
912 	case USB_ST_SETUP:
913 	case USB_ST_TRANSFERRED:
914 tr_setup:
915 		pc = usbd_xfer_get_frame(xfer, 0);
916 		if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) {
917 			DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen);
918 			usbd_xfer_set_frame_len(xfer, 0, actlen);
919 			usbd_transfer_submit(xfer);
920 		}
921 		return;
922 
923 	default:			/* Error */
924 		if (error != USB_ERR_CANCELLED) {
925 			/* try to clear stall first */
926 			usbd_xfer_set_stall(xfer);
927 			goto tr_setup;
928 		}
929 		return;
930 	}
931 }
932 
933 static void
934 umcs7840_poll(struct ucom_softc *ucom)
935 {
936 	struct umcs7840_softc *sc = ucom->sc_parent;
937 
938 	DPRINTF("Port %d poll\n", ucom->sc_portno);
939 	usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
940 	usbd_transfer_poll(&sc->sc_intr_xfer, 1);
941 }
942 
943 static usb_error_t
944 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data)
945 {
946 	struct usb_device_request req;
947 	usb_error_t err;
948 	uint16_t len;
949 
950 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
951 	req.bRequest = MCS7840_RDREQ;
952 	USETW(req.wValue, 0);
953 	USETW(req.wIndex, reg);
954 	USETW(req.wLength, UMCS7840_READ_LENGTH);
955 
956 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
957 	if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
958 		device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len);
959 		return (USB_ERR_INVAL);
960 	} else if (err)
961 		device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err));
962 	return (err);
963 }
964 
965 static usb_error_t
966 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data)
967 {
968 	struct usb_device_request req;
969 	usb_error_t err;
970 
971 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
972 	req.bRequest = MCS7840_WRREQ;
973 	USETW(req.wValue, data);
974 	USETW(req.wIndex, reg);
975 	USETW(req.wLength, 0);
976 
977 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
978 	if (err)
979 		device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err));
980 
981 	return (err);
982 }
983 
984 static usb_error_t
985 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data)
986 {
987 	struct usb_device_request req;
988 	uint16_t wVal;
989 	usb_error_t err;
990 	uint16_t len;
991 
992 	/* portno is port number */
993 	wVal = ((uint16_t)(portno + 1)) << 8;
994 
995 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
996 	req.bRequest = MCS7840_RDREQ;
997 	USETW(req.wValue, wVal);
998 	USETW(req.wIndex, reg);
999 	USETW(req.wLength, UMCS7840_READ_LENGTH);
1000 
1001 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
1002 	if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
1003 		device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len);
1004 		return (USB_ERR_INVAL);
1005 	} else if (err)
1006 		device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1007 	return (err);
1008 }
1009 
1010 static usb_error_t
1011 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data)
1012 {
1013 	struct usb_device_request req;
1014 	usb_error_t err;
1015 	uint16_t wVal;
1016 
1017 	/* portno is port number */
1018 	wVal = ((uint16_t)(portno + 1)) << 8 | data;
1019 
1020 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1021 	req.bRequest = MCS7840_WRREQ;
1022 	USETW(req.wValue, wVal);
1023 	USETW(req.wIndex, reg);
1024 	USETW(req.wLength, 0);
1025 
1026 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
1027 	if (err)
1028 		device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1029 	return (err);
1030 }
1031 
1032 static usb_error_t
1033 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate)
1034 {
1035 	usb_error_t err;
1036 	uint16_t divisor;
1037 	uint8_t clk;
1038 	uint8_t data;
1039 
1040 	if (umcs7840_calc_baudrate(rate, &divisor, &clk)) {
1041 		DPRINTF("Port %d bad speed: %d\n", portno, rate);
1042 		return (-1);
1043 	}
1044 	if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) {
1045 		DPRINTF("Port %d bad speed calculation: %d\n", portno, rate);
1046 		return (-1);
1047 	}
1048 	DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor);
1049 
1050 	/* Set clock source for standard BAUD frequences */
1051 	err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data);
1052 	if (err)
1053 		return (err);
1054 	data &= MCS7840_DEV_SPx_CLOCK_MASK;
1055 	data |= clk;
1056 	err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data);
1057 	if (err)
1058 		return (err);
1059 
1060 	/* Set divider */
1061 	sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS;
1062 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1063 	if (err)
1064 		return (err);
1065 
1066 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff));
1067 	if (err)
1068 		return (err);
1069 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff));
1070 	if (err)
1071 		return (err);
1072 
1073 	/* Turn off access to DLL/DLM registers of UART */
1074 	sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS;
1075 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1076 	if (err)
1077 		return (err);
1078 	return (0);
1079 }
1080 
1081 /* Maximum speeds for standard frequences, when PLL is not used */
1082 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,};
1083 static const uint8_t umcs7840_baudrate_divisors_len = sizeof(umcs7840_baudrate_divisors) / sizeof(umcs7840_baudrate_divisors[0]);
1084 
1085 static usb_error_t
1086 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk)
1087 {
1088 	uint8_t i = 0;
1089 
1090 	if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1])
1091 		return (-1);
1092 
1093 	for (i = 0; i < umcs7840_baudrate_divisors_len - 1 &&
1094 	    !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i);
1095 	*divisor = umcs7840_baudrate_divisors[i + 1] / rate;
1096 	/* 0x00 .. 0x70 */
1097 	*clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT;
1098 	return (0);
1099 }
1100