1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * This driver supports several multiport USB-to-RS232 serial adapters driven 31 * by MosChip mos7820 and mos7840, bridge chips. 32 * The adapters are sold under many different brand names. 33 * 34 * Datasheets are available at MosChip www site at 35 * http://www.moschip.com. The datasheets don't contain full 36 * programming information for the chip. 37 * 38 * It is nornal to have only two enabled ports in devices, based on 39 * quad-port mos7840. 40 * 41 */ 42 #include <sys/cdefs.h> 43 __FBSDID("$FreeBSD$"); 44 45 #include <sys/stdint.h> 46 #include <sys/stddef.h> 47 #include <sys/param.h> 48 #include <sys/queue.h> 49 #include <sys/types.h> 50 #include <sys/systm.h> 51 #include <sys/kernel.h> 52 #include <sys/bus.h> 53 #include <sys/linker_set.h> 54 #include <sys/module.h> 55 #include <sys/lock.h> 56 #include <sys/mutex.h> 57 #include <sys/condvar.h> 58 #include <sys/sysctl.h> 59 #include <sys/sx.h> 60 #include <sys/unistd.h> 61 #include <sys/callout.h> 62 #include <sys/malloc.h> 63 #include <sys/priv.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usb_cdc.h> 69 #include "usbdevs.h" 70 71 #define USB_DEBUG_VAR umcs_debug 72 #include <dev/usb/usb_debug.h> 73 #include <dev/usb/usb_process.h> 74 75 #include <dev/usb/serial/usb_serial.h> 76 77 #include <dev/usb/serial/umcs.h> 78 79 #define UMCS7840_MODVER 1 80 81 #ifdef USB_DEBUG 82 static int umcs_debug = 0; 83 84 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 85 "USB umcs quadport serial adapter"); 86 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RWTUN, &umcs_debug, 0, "Debug level"); 87 #endif /* USB_DEBUG */ 88 89 90 /* 91 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port) 92 * have ports 0 and 2, with ports 1 and 3 omitted. 93 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2. 94 * This driver trys to use physical numbers as much as possible. 95 */ 96 97 /* 98 * Indexed by PHYSICAL port number. 99 * Pack non-regular registers to array to easier if-less access. 100 */ 101 struct umcs7840_port_registers { 102 uint8_t reg_sp; /* SP register. */ 103 uint8_t reg_control; /* CONTROL register. */ 104 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be 105 * calculated */ 106 }; 107 108 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = { 109 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1}, 110 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2}, 111 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3}, 112 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4}, 113 }; 114 115 enum { 116 UMCS7840_BULK_RD_EP, 117 UMCS7840_BULK_WR_EP, 118 UMCS7840_N_TRANSFERS 119 }; 120 121 struct umcs7840_softc_oneport { 122 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures 123 * for two transfers */ 124 125 uint8_t sc_lcr; /* local line control register */ 126 uint8_t sc_mcr; /* local modem control register */ 127 }; 128 129 struct umcs7840_softc { 130 struct ucom_super_softc sc_super_ucom; 131 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous 132 * array, so indexed by 133 * LOGICAL port 134 * (subunit) number */ 135 136 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */ 137 138 device_t sc_dev; /* Device for error prints */ 139 struct usb_device *sc_udev; /* USB Device for all operations */ 140 struct mtx sc_mtx; /* ucom requires this */ 141 142 uint8_t sc_driver_done; /* Flag when enumeration is finished */ 143 144 uint8_t sc_numports; /* Number of ports (subunits) */ 145 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL 146 * port number. */ 147 }; 148 149 /* prototypes */ 150 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *); 151 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t); 152 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *); 153 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t); 154 155 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t); 156 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *); 157 158 static void umcs7840_free(struct ucom_softc *); 159 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *); 160 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t); 161 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t); 162 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t); 163 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *); 164 static void umcs7840_cfg_open(struct ucom_softc *); 165 static void umcs7840_cfg_close(struct ucom_softc *); 166 167 static int umcs7840_pre_param(struct ucom_softc *, struct termios *); 168 169 static void umcs7840_start_read(struct ucom_softc *); 170 static void umcs7840_stop_read(struct ucom_softc *); 171 172 static void umcs7840_start_write(struct ucom_softc *); 173 static void umcs7840_stop_write(struct ucom_softc *); 174 175 static void umcs7840_poll(struct ucom_softc *ucom); 176 177 static device_probe_t umcs7840_probe; 178 static device_attach_t umcs7840_attach; 179 static device_detach_t umcs7840_detach; 180 static void umcs7840_free_softc(struct umcs7840_softc *); 181 182 static usb_callback_t umcs7840_intr_callback; 183 static usb_callback_t umcs7840_read_callback1; 184 static usb_callback_t umcs7840_read_callback2; 185 static usb_callback_t umcs7840_read_callback3; 186 static usb_callback_t umcs7840_read_callback4; 187 static usb_callback_t umcs7840_write_callback1; 188 static usb_callback_t umcs7840_write_callback2; 189 static usb_callback_t umcs7840_write_callback3; 190 static usb_callback_t umcs7840_write_callback4; 191 192 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 193 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 194 195 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */ 196 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = { 197 {&umcs7840_read_callback1, &umcs7840_write_callback1}, 198 {&umcs7840_read_callback2, &umcs7840_write_callback2}, 199 {&umcs7840_read_callback3, &umcs7840_write_callback3}, 200 {&umcs7840_read_callback4, &umcs7840_write_callback4}, 201 }; 202 203 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = { 204 [UMCS7840_BULK_RD_EP] = { 205 .type = UE_BULK, 206 .endpoint = 0x01, 207 .direction = UE_DIR_IN, 208 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 209 .bufsize = 0, /* use wMaxPacketSize */ 210 .callback = &umcs7840_read_callback1, 211 .if_index = 0, 212 }, 213 214 [UMCS7840_BULK_WR_EP] = { 215 .type = UE_BULK, 216 .endpoint = 0x02, 217 .direction = UE_DIR_OUT, 218 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 219 .bufsize = 0, /* use wMaxPacketSize */ 220 .callback = &umcs7840_write_callback1, 221 .if_index = 0, 222 }, 223 }; 224 225 static const struct usb_config umcs7840_intr_config_data[1] = { 226 [0] = { 227 .type = UE_INTERRUPT, 228 .endpoint = 0x09, 229 .direction = UE_DIR_IN, 230 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 231 .bufsize = 0, /* use wMaxPacketSize */ 232 .callback = &umcs7840_intr_callback, 233 .if_index = 0, 234 }, 235 }; 236 237 static struct ucom_callback umcs7840_callback = { 238 .ucom_cfg_get_status = &umcs7840_cfg_get_status, 239 240 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr, 241 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts, 242 .ucom_cfg_set_break = &umcs7840_cfg_set_break, 243 244 .ucom_cfg_param = &umcs7840_cfg_param, 245 .ucom_cfg_open = &umcs7840_cfg_open, 246 .ucom_cfg_close = &umcs7840_cfg_close, 247 248 .ucom_pre_param = &umcs7840_pre_param, 249 250 .ucom_start_read = &umcs7840_start_read, 251 .ucom_stop_read = &umcs7840_stop_read, 252 253 .ucom_start_write = &umcs7840_start_write, 254 .ucom_stop_write = &umcs7840_stop_write, 255 256 .ucom_poll = &umcs7840_poll, 257 .ucom_free = &umcs7840_free, 258 }; 259 260 static const STRUCT_USB_HOST_ID umcs7840_devs[] = { 261 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)}, 262 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)}, 263 }; 264 265 static device_method_t umcs7840_methods[] = { 266 DEVMETHOD(device_probe, umcs7840_probe), 267 DEVMETHOD(device_attach, umcs7840_attach), 268 DEVMETHOD(device_detach, umcs7840_detach), 269 DEVMETHOD_END 270 }; 271 272 static devclass_t umcs7840_devclass; 273 274 static driver_t umcs7840_driver = { 275 .name = "umcs7840", 276 .methods = umcs7840_methods, 277 .size = sizeof(struct umcs7840_softc), 278 }; 279 280 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0); 281 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1); 282 MODULE_DEPEND(umcs7840, usb, 1, 1, 1); 283 MODULE_VERSION(umcs7840, UMCS7840_MODVER); 284 USB_PNP_HOST_INFO(umcs7840_devs); 285 286 static int 287 umcs7840_probe(device_t dev) 288 { 289 struct usb_attach_arg *uaa = device_get_ivars(dev); 290 291 if (uaa->usb_mode != USB_MODE_HOST) 292 return (ENXIO); 293 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX) 294 return (ENXIO); 295 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX) 296 return (ENXIO); 297 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa)); 298 } 299 300 static int 301 umcs7840_attach(device_t dev) 302 { 303 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS]; 304 struct usb_attach_arg *uaa = device_get_ivars(dev); 305 struct umcs7840_softc *sc = device_get_softc(dev); 306 307 uint8_t iface_index = MCS7840_IFACE_INDEX; 308 int error; 309 int subunit; 310 int n; 311 uint8_t data; 312 313 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) 314 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n]; 315 316 device_set_usb_desc(dev); 317 mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF); 318 ucom_ref(&sc->sc_super_ucom); 319 320 sc->sc_dev = dev; 321 sc->sc_udev = uaa->device; 322 323 /* 324 * Get number of ports 325 * Documentation (full datasheet) says, that number of ports is 326 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only 327 * register. But vendor driver uses these undocumented 328 * register & bit. 329 * 330 * Experiments show, that MODE register can have `0' 331 * (4 ports) bit on 2-port device, so use vendor driver's way. 332 * 333 * Also, see notes in header file for these constants. 334 */ 335 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data); 336 if (data & MCS7840_DEV_GPIO_4PORTS) { 337 sc->sc_numports = 4; 338 /* Store physical port numbers in sc_portno */ 339 sc->sc_ucom[0].sc_portno = 0; 340 sc->sc_ucom[1].sc_portno = 1; 341 sc->sc_ucom[2].sc_portno = 2; 342 sc->sc_ucom[3].sc_portno = 3; 343 } else { 344 sc->sc_numports = 2; 345 /* Store physical port numbers in sc_portno */ 346 sc->sc_ucom[0].sc_portno = 0; 347 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */ 348 } 349 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports); 350 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) { 351 device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n", 352 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high", 353 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no", 354 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail", 355 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail", 356 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4", 357 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled", 358 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not "); 359 } 360 /* Setup all transfers */ 361 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 362 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) { 363 /* Set endpoint address */ 364 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno; 365 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n]; 366 } 367 error = usbd_transfer_setup(uaa->device, 368 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp, 369 UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx); 370 if (error) { 371 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n", 372 subunit + 1, sc->sc_numports); 373 goto detach; 374 } 375 } 376 error = usbd_transfer_setup(uaa->device, 377 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data, 378 1, sc, &sc->sc_mtx); 379 if (error) { 380 device_printf(dev, "allocating USB transfers failed for interrupt\n"); 381 goto detach; 382 } 383 /* clear stall at first run */ 384 mtx_lock(&sc->sc_mtx); 385 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 386 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]); 387 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]); 388 } 389 mtx_unlock(&sc->sc_mtx); 390 391 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc, 392 &umcs7840_callback, &sc->sc_mtx); 393 if (error) 394 goto detach; 395 396 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev); 397 398 return (0); 399 400 detach: 401 umcs7840_detach(dev); 402 return (ENXIO); 403 } 404 405 static int 406 umcs7840_detach(device_t dev) 407 { 408 struct umcs7840_softc *sc = device_get_softc(dev); 409 int subunit; 410 411 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom); 412 413 for (subunit = 0; subunit < sc->sc_numports; ++subunit) 414 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 415 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1); 416 417 device_claim_softc(dev); 418 419 umcs7840_free_softc(sc); 420 421 return (0); 422 } 423 424 UCOM_UNLOAD_DRAIN(umcs7840); 425 426 static void 427 umcs7840_free_softc(struct umcs7840_softc *sc) 428 { 429 if (ucom_unref(&sc->sc_super_ucom)) { 430 mtx_destroy(&sc->sc_mtx); 431 device_free_softc(sc); 432 } 433 } 434 435 static void 436 umcs7840_free(struct ucom_softc *ucom) 437 { 438 umcs7840_free_softc(ucom->sc_parent); 439 } 440 441 static void 442 umcs7840_cfg_open(struct ucom_softc *ucom) 443 { 444 struct umcs7840_softc *sc = ucom->sc_parent; 445 uint16_t pn = ucom->sc_portno; 446 uint8_t data; 447 448 /* If it very first open, finish global configuration */ 449 if (!sc->sc_driver_done) { 450 /* 451 * USB enumeration is finished, pass internal memory to FIFOs 452 * If it is done in the end of "attach", kernel panics. 453 */ 454 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data)) 455 return; 456 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE; 457 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data)) 458 return; 459 sc->sc_driver_done = 1; 460 } 461 /* Toggle reset bit on-off */ 462 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 463 return; 464 data |= MCS7840_DEV_SPx_UART_RESET; 465 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 466 return; 467 data &= ~MCS7840_DEV_SPx_UART_RESET; 468 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 469 return; 470 471 /* Set RS-232 mode */ 472 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232)) 473 return; 474 475 /* Disable RX on time of initialization */ 476 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 477 return; 478 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 479 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 480 return; 481 482 /* Disable all interrupts */ 483 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0)) 484 return; 485 486 /* Reset FIFO -- documented */ 487 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0)) 488 return; 489 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 490 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR | 491 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14)) 492 return; 493 494 /* Set 8 bit, no parity, 1 stop bit -- documented */ 495 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1; 496 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr)) 497 return; 498 499 /* 500 * Enable DTR/RTS on modem control, enable modem interrupts -- 501 * documented 502 */ 503 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_IE; 504 if (ucom->sc_tty == NULL || (ucom->sc_tty->t_termios.c_cflag & CNO_RTSDTR) == 0) 505 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS; 506 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr)) 507 return; 508 509 /* Clearing Bulkin and Bulkout FIFO */ 510 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 511 return; 512 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO; 513 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 514 return; 515 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO); 516 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 517 return; 518 519 /* Set speed 9600 */ 520 if (umcs7840_set_baudrate(sc, pn, 9600)) 521 return; 522 523 524 /* Finally enable all interrupts -- documented */ 525 /* 526 * Copied from vendor driver, I don't know why we should read LCR 527 * here 528 */ 529 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr)) 530 return; 531 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 532 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM)) 533 return; 534 535 /* Enable RX */ 536 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 537 return; 538 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE; 539 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 540 return; 541 542 DPRINTF("Port %d has been opened\n", pn); 543 } 544 545 static void 546 umcs7840_cfg_close(struct ucom_softc *ucom) 547 { 548 struct umcs7840_softc *sc = ucom->sc_parent; 549 uint16_t pn = ucom->sc_portno; 550 uint8_t data; 551 552 umcs7840_stop_read(ucom); 553 umcs7840_stop_write(ucom); 554 555 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0); 556 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0); 557 558 /* Disable RX */ 559 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 560 return; 561 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 562 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 563 return; 564 DPRINTF("Port %d has been closed\n", pn); 565 } 566 567 static void 568 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 569 { 570 struct umcs7840_softc *sc = ucom->sc_parent; 571 uint8_t pn = ucom->sc_portno; 572 573 if (onoff) 574 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR; 575 else 576 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR; 577 578 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 579 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off"); 580 } 581 582 static void 583 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 584 { 585 struct umcs7840_softc *sc = ucom->sc_parent; 586 uint8_t pn = ucom->sc_portno; 587 588 if (onoff) 589 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS; 590 else 591 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS; 592 593 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 594 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off"); 595 } 596 597 static void 598 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 599 { 600 struct umcs7840_softc *sc = ucom->sc_parent; 601 uint8_t pn = ucom->sc_portno; 602 603 if (onoff) 604 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK; 605 else 606 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK; 607 608 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 609 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off"); 610 } 611 612 613 static void 614 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t) 615 { 616 struct umcs7840_softc *sc = ucom->sc_parent; 617 uint8_t pn = ucom->sc_portno; 618 uint8_t lcr = sc->sc_ports[pn].sc_lcr; 619 uint8_t mcr = sc->sc_ports[pn].sc_mcr; 620 621 DPRINTF("Port %d config:\n", pn); 622 if (t->c_cflag & CSTOPB) { 623 DPRINTF(" 2 stop bits\n"); 624 lcr |= MCS7840_UART_LCR_STOPB2; 625 } else { 626 lcr |= MCS7840_UART_LCR_STOPB1; 627 DPRINTF(" 1 stop bit\n"); 628 } 629 630 lcr &= ~MCS7840_UART_LCR_PARITYMASK; 631 if (t->c_cflag & PARENB) { 632 lcr |= MCS7840_UART_LCR_PARITYON; 633 if (t->c_cflag & PARODD) { 634 lcr = MCS7840_UART_LCR_PARITYODD; 635 DPRINTF(" parity on - odd\n"); 636 } else { 637 lcr = MCS7840_UART_LCR_PARITYEVEN; 638 DPRINTF(" parity on - even\n"); 639 } 640 } else { 641 lcr &= ~MCS7840_UART_LCR_PARITYON; 642 DPRINTF(" parity off\n"); 643 } 644 645 lcr &= ~MCS7840_UART_LCR_DATALENMASK; 646 switch (t->c_cflag & CSIZE) { 647 case CS5: 648 lcr |= MCS7840_UART_LCR_DATALEN5; 649 DPRINTF(" 5 bit\n"); 650 break; 651 case CS6: 652 lcr |= MCS7840_UART_LCR_DATALEN6; 653 DPRINTF(" 6 bit\n"); 654 break; 655 case CS7: 656 lcr |= MCS7840_UART_LCR_DATALEN7; 657 DPRINTF(" 7 bit\n"); 658 break; 659 case CS8: 660 lcr |= MCS7840_UART_LCR_DATALEN8; 661 DPRINTF(" 8 bit\n"); 662 break; 663 } 664 665 if (t->c_cflag & CRTSCTS) { 666 mcr |= MCS7840_UART_MCR_CTSRTS; 667 DPRINTF(" CTS/RTS\n"); 668 } else 669 mcr &= ~MCS7840_UART_MCR_CTSRTS; 670 671 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) { 672 mcr |= MCS7840_UART_MCR_DTRDSR; 673 DPRINTF(" DTR/DSR\n"); 674 } else 675 mcr &= ~MCS7840_UART_MCR_DTRDSR; 676 677 sc->sc_ports[pn].sc_lcr = lcr; 678 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 679 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr); 680 681 sc->sc_ports[pn].sc_mcr = mcr; 682 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 683 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr); 684 685 umcs7840_set_baudrate(sc, pn, t->c_ospeed); 686 } 687 688 689 static int 690 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t) 691 { 692 uint8_t clk; 693 uint16_t divisor; 694 695 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor) 696 return (EINVAL); 697 return (0); 698 } 699 700 static void 701 umcs7840_start_read(struct ucom_softc *ucom) 702 { 703 struct umcs7840_softc *sc = ucom->sc_parent; 704 uint8_t pn = ucom->sc_portno; 705 706 /* Start interrupt transfer */ 707 usbd_transfer_start(sc->sc_intr_xfer); 708 709 /* Start read transfer */ 710 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 711 } 712 713 static void 714 umcs7840_stop_read(struct ucom_softc *ucom) 715 { 716 struct umcs7840_softc *sc = ucom->sc_parent; 717 uint8_t pn = ucom->sc_portno; 718 719 /* Stop read transfer */ 720 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 721 } 722 723 static void 724 umcs7840_start_write(struct ucom_softc *ucom) 725 { 726 struct umcs7840_softc *sc = ucom->sc_parent; 727 uint8_t pn = ucom->sc_portno; 728 729 /* Start interrupt transfer */ 730 usbd_transfer_start(sc->sc_intr_xfer); 731 732 /* Start write transfer */ 733 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 734 } 735 736 static void 737 umcs7840_stop_write(struct ucom_softc *ucom) 738 { 739 struct umcs7840_softc *sc = ucom->sc_parent; 740 uint8_t pn = ucom->sc_portno; 741 742 /* Stop write transfer */ 743 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 744 } 745 746 static void 747 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 748 { 749 struct umcs7840_softc *sc = ucom->sc_parent; 750 uint8_t pn = ucom->sc_portno; 751 uint8_t hw_msr = 0; /* local modem status register */ 752 753 /* 754 * Read status registers. MSR bits need translation from ns16550 to 755 * SER_* values. LSR bits are ns16550 in hardware and ucom. 756 */ 757 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, lsr); 758 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr); 759 760 if (hw_msr & MCS7840_UART_MSR_NEGCTS) 761 *msr |= SER_CTS; 762 763 if (hw_msr & MCS7840_UART_MSR_NEGDCD) 764 *msr |= SER_DCD; 765 766 if (hw_msr & MCS7840_UART_MSR_NEGRI) 767 *msr |= SER_RI; 768 769 if (hw_msr & MCS7840_UART_MSR_NEGDSR) 770 *msr |= SER_DSR; 771 772 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr); 773 } 774 775 static void 776 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error) 777 { 778 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 779 struct usb_page_cache *pc; 780 uint8_t buf[13]; 781 int actlen; 782 int subunit; 783 784 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 785 786 switch (USB_GET_STATE(xfer)) { 787 case USB_ST_TRANSFERRED: 788 if (actlen == 5 || actlen == 13) { 789 pc = usbd_xfer_get_frame(xfer, 0); 790 usbd_copy_out(pc, 0, buf, actlen); 791 /* Check status of all ports */ 792 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 793 uint8_t pn = sc->sc_ucom[subunit].sc_portno; 794 795 if (buf[pn] & MCS7840_UART_ISR_NOPENDING) 796 continue; 797 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK)); 798 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) { 799 case MCS7840_UART_ISR_RXERR: 800 case MCS7840_UART_ISR_RXHASDATA: 801 case MCS7840_UART_ISR_RXTIMEOUT: 802 case MCS7840_UART_ISR_MSCHANGE: 803 ucom_status_change(&sc->sc_ucom[subunit]); 804 break; 805 default: 806 /* Do nothing */ 807 break; 808 } 809 } 810 } else 811 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen); 812 /* FALLTHROUGH */ 813 case USB_ST_SETUP: 814 tr_setup: 815 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 816 usbd_transfer_submit(xfer); 817 return; 818 819 default: /* Error */ 820 if (error != USB_ERR_CANCELLED) { 821 /* try to clear stall first */ 822 usbd_xfer_set_stall(xfer); 823 goto tr_setup; 824 } 825 return; 826 } 827 } 828 829 static void 830 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error) 831 { 832 umcs7840_read_callbackN(xfer, error, 0); 833 } 834 835 static void 836 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error) 837 { 838 umcs7840_read_callbackN(xfer, error, 1); 839 } 840 static void 841 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error) 842 { 843 umcs7840_read_callbackN(xfer, error, 2); 844 } 845 846 static void 847 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error) 848 { 849 umcs7840_read_callbackN(xfer, error, 3); 850 } 851 852 static void 853 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 854 { 855 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 856 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 857 struct usb_page_cache *pc; 858 int actlen; 859 860 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 861 862 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen); 863 864 switch (USB_GET_STATE(xfer)) { 865 case USB_ST_TRANSFERRED: 866 pc = usbd_xfer_get_frame(xfer, 0); 867 ucom_put_data(ucom, pc, 0, actlen); 868 /* FALLTHROUGH */ 869 case USB_ST_SETUP: 870 tr_setup: 871 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 872 usbd_transfer_submit(xfer); 873 return; 874 875 default: /* Error */ 876 if (error != USB_ERR_CANCELLED) { 877 /* try to clear stall first */ 878 usbd_xfer_set_stall(xfer); 879 goto tr_setup; 880 } 881 return; 882 } 883 } 884 885 static void 886 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error) 887 { 888 umcs7840_write_callbackN(xfer, error, 0); 889 } 890 891 static void 892 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error) 893 { 894 umcs7840_write_callbackN(xfer, error, 1); 895 } 896 897 static void 898 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error) 899 { 900 umcs7840_write_callbackN(xfer, error, 2); 901 } 902 903 static void 904 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error) 905 { 906 umcs7840_write_callbackN(xfer, error, 3); 907 } 908 909 static void 910 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 911 { 912 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 913 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 914 struct usb_page_cache *pc; 915 uint32_t actlen; 916 917 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer)); 918 919 switch (USB_GET_STATE(xfer)) { 920 case USB_ST_SETUP: 921 case USB_ST_TRANSFERRED: 922 tr_setup: 923 pc = usbd_xfer_get_frame(xfer, 0); 924 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) { 925 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen); 926 usbd_xfer_set_frame_len(xfer, 0, actlen); 927 usbd_transfer_submit(xfer); 928 } 929 return; 930 931 default: /* Error */ 932 if (error != USB_ERR_CANCELLED) { 933 /* try to clear stall first */ 934 usbd_xfer_set_stall(xfer); 935 goto tr_setup; 936 } 937 return; 938 } 939 } 940 941 static void 942 umcs7840_poll(struct ucom_softc *ucom) 943 { 944 struct umcs7840_softc *sc = ucom->sc_parent; 945 946 DPRINTF("Port %d poll\n", ucom->sc_portno); 947 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 948 usbd_transfer_poll(&sc->sc_intr_xfer, 1); 949 } 950 951 static usb_error_t 952 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data) 953 { 954 struct usb_device_request req; 955 usb_error_t err; 956 uint16_t len; 957 958 req.bmRequestType = UT_READ_VENDOR_DEVICE; 959 req.bRequest = MCS7840_RDREQ; 960 USETW(req.wValue, 0); 961 USETW(req.wIndex, reg); 962 USETW(req.wLength, UMCS7840_READ_LENGTH); 963 964 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 965 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 966 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len); 967 return (USB_ERR_INVAL); 968 } else if (err) 969 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err)); 970 return (err); 971 } 972 973 static usb_error_t 974 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data) 975 { 976 struct usb_device_request req; 977 usb_error_t err; 978 979 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 980 req.bRequest = MCS7840_WRREQ; 981 USETW(req.wValue, data); 982 USETW(req.wIndex, reg); 983 USETW(req.wLength, 0); 984 985 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 986 if (err) 987 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err)); 988 989 return (err); 990 } 991 992 static usb_error_t 993 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data) 994 { 995 struct usb_device_request req; 996 uint16_t wVal; 997 usb_error_t err; 998 uint16_t len; 999 1000 /* portno is port number */ 1001 wVal = ((uint16_t)(portno + 1)) << 8; 1002 1003 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1004 req.bRequest = MCS7840_RDREQ; 1005 USETW(req.wValue, wVal); 1006 USETW(req.wIndex, reg); 1007 USETW(req.wLength, UMCS7840_READ_LENGTH); 1008 1009 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 1010 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 1011 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len); 1012 return (USB_ERR_INVAL); 1013 } else if (err) 1014 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 1015 return (err); 1016 } 1017 1018 static usb_error_t 1019 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data) 1020 { 1021 struct usb_device_request req; 1022 usb_error_t err; 1023 uint16_t wVal; 1024 1025 /* portno is port number */ 1026 wVal = ((uint16_t)(portno + 1)) << 8 | data; 1027 1028 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1029 req.bRequest = MCS7840_WRREQ; 1030 USETW(req.wValue, wVal); 1031 USETW(req.wIndex, reg); 1032 USETW(req.wLength, 0); 1033 1034 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 1035 if (err) 1036 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 1037 return (err); 1038 } 1039 1040 static usb_error_t 1041 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate) 1042 { 1043 usb_error_t err; 1044 uint16_t divisor; 1045 uint8_t clk; 1046 uint8_t data; 1047 1048 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) { 1049 DPRINTF("Port %d bad speed: %d\n", portno, rate); 1050 return (-1); 1051 } 1052 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) { 1053 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate); 1054 return (-1); 1055 } 1056 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor); 1057 1058 /* Set clock source for standard BAUD frequences */ 1059 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data); 1060 if (err) 1061 return (err); 1062 data &= MCS7840_DEV_SPx_CLOCK_MASK; 1063 data |= clk; 1064 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data); 1065 if (err) 1066 return (err); 1067 1068 /* Set divider */ 1069 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS; 1070 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1071 if (err) 1072 return (err); 1073 1074 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff)); 1075 if (err) 1076 return (err); 1077 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff)); 1078 if (err) 1079 return (err); 1080 1081 /* Turn off access to DLL/DLM registers of UART */ 1082 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS; 1083 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1084 if (err) 1085 return (err); 1086 return (0); 1087 } 1088 1089 /* Maximum speeds for standard frequences, when PLL is not used */ 1090 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,}; 1091 static const uint8_t umcs7840_baudrate_divisors_len = nitems(umcs7840_baudrate_divisors); 1092 1093 static usb_error_t 1094 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk) 1095 { 1096 uint8_t i = 0; 1097 1098 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1]) 1099 return (-1); 1100 1101 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 && 1102 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i); 1103 if (rate == 0) 1104 *divisor = 1; /* XXX */ 1105 else 1106 *divisor = umcs7840_baudrate_divisors[i + 1] / rate; 1107 /* 0x00 .. 0x70 */ 1108 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT; 1109 return (0); 1110 } 1111