1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * This driver supports several multiport USB-to-RS232 serial adapters driven 31 * by MosChip mos7820 and mos7840, bridge chips. 32 * The adapters are sold under many different brand names. 33 * 34 * Datasheets are available at MosChip www site at 35 * http://www.moschip.com. The datasheets don't contain full 36 * programming information for the chip. 37 * 38 * It is normal to have only two enabled ports in devices, based on 39 * quad-port mos7840. 40 * 41 */ 42 #include <sys/cdefs.h> 43 #include <sys/stdint.h> 44 #include <sys/stddef.h> 45 #include <sys/param.h> 46 #include <sys/queue.h> 47 #include <sys/types.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/bus.h> 51 #include <sys/linker_set.h> 52 #include <sys/module.h> 53 #include <sys/lock.h> 54 #include <sys/mutex.h> 55 #include <sys/condvar.h> 56 #include <sys/sysctl.h> 57 #include <sys/sx.h> 58 #include <sys/unistd.h> 59 #include <sys/callout.h> 60 #include <sys/malloc.h> 61 #include <sys/priv.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdi_util.h> 66 #include <dev/usb/usb_cdc.h> 67 #include "usbdevs.h" 68 69 #define USB_DEBUG_VAR umcs_debug 70 #include <dev/usb/usb_debug.h> 71 #include <dev/usb/usb_process.h> 72 73 #include <dev/usb/serial/usb_serial.h> 74 75 #include <dev/usb/serial/umcs.h> 76 77 #define UMCS7840_MODVER 1 78 79 #ifdef USB_DEBUG 80 static int umcs_debug = 0; 81 82 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 83 "USB umcs quadport serial adapter"); 84 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RWTUN, &umcs_debug, 0, "Debug level"); 85 #endif /* USB_DEBUG */ 86 87 /* 88 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port) 89 * have ports 0 and 2, with ports 1 and 3 omitted. 90 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2. 91 * This driver trys to use physical numbers as much as possible. 92 */ 93 94 /* 95 * Indexed by PHYSICAL port number. 96 * Pack non-regular registers to array to easier if-less access. 97 */ 98 struct umcs7840_port_registers { 99 uint8_t reg_sp; /* SP register. */ 100 uint8_t reg_control; /* CONTROL register. */ 101 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be 102 * calculated */ 103 }; 104 105 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = { 106 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1}, 107 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2}, 108 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3}, 109 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4}, 110 }; 111 112 enum { 113 UMCS7840_BULK_RD_EP, 114 UMCS7840_BULK_WR_EP, 115 UMCS7840_N_TRANSFERS 116 }; 117 118 struct umcs7840_softc_oneport { 119 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures 120 * for two transfers */ 121 122 uint8_t sc_lcr; /* local line control register */ 123 uint8_t sc_mcr; /* local modem control register */ 124 }; 125 126 struct umcs7840_softc { 127 struct ucom_super_softc sc_super_ucom; 128 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous 129 * array, so indexed by 130 * LOGICAL port 131 * (subunit) number */ 132 133 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */ 134 135 device_t sc_dev; /* Device for error prints */ 136 struct usb_device *sc_udev; /* USB Device for all operations */ 137 struct mtx sc_mtx; /* ucom requires this */ 138 139 uint8_t sc_driver_done; /* Flag when enumeration is finished */ 140 141 uint8_t sc_numports; /* Number of ports (subunits) */ 142 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL 143 * port number. */ 144 }; 145 146 /* prototypes */ 147 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *); 148 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t); 149 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *); 150 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t); 151 152 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t); 153 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *); 154 155 static void umcs7840_free(struct ucom_softc *); 156 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *); 157 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t); 158 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t); 159 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t); 160 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *); 161 static void umcs7840_cfg_open(struct ucom_softc *); 162 static void umcs7840_cfg_close(struct ucom_softc *); 163 164 static int umcs7840_pre_param(struct ucom_softc *, struct termios *); 165 166 static void umcs7840_start_read(struct ucom_softc *); 167 static void umcs7840_stop_read(struct ucom_softc *); 168 169 static void umcs7840_start_write(struct ucom_softc *); 170 static void umcs7840_stop_write(struct ucom_softc *); 171 172 static void umcs7840_poll(struct ucom_softc *ucom); 173 174 static device_probe_t umcs7840_probe; 175 static device_attach_t umcs7840_attach; 176 static device_detach_t umcs7840_detach; 177 static void umcs7840_free_softc(struct umcs7840_softc *); 178 179 static usb_callback_t umcs7840_intr_callback; 180 static usb_callback_t umcs7840_read_callback1; 181 static usb_callback_t umcs7840_read_callback2; 182 static usb_callback_t umcs7840_read_callback3; 183 static usb_callback_t umcs7840_read_callback4; 184 static usb_callback_t umcs7840_write_callback1; 185 static usb_callback_t umcs7840_write_callback2; 186 static usb_callback_t umcs7840_write_callback3; 187 static usb_callback_t umcs7840_write_callback4; 188 189 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 190 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 191 192 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */ 193 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = { 194 {&umcs7840_read_callback1, &umcs7840_write_callback1}, 195 {&umcs7840_read_callback2, &umcs7840_write_callback2}, 196 {&umcs7840_read_callback3, &umcs7840_write_callback3}, 197 {&umcs7840_read_callback4, &umcs7840_write_callback4}, 198 }; 199 200 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = { 201 [UMCS7840_BULK_RD_EP] = { 202 .type = UE_BULK, 203 .endpoint = 0x01, 204 .direction = UE_DIR_IN, 205 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 206 .bufsize = 0, /* use wMaxPacketSize */ 207 .callback = &umcs7840_read_callback1, 208 .if_index = 0, 209 }, 210 211 [UMCS7840_BULK_WR_EP] = { 212 .type = UE_BULK, 213 .endpoint = 0x02, 214 .direction = UE_DIR_OUT, 215 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 216 .bufsize = 0, /* use wMaxPacketSize */ 217 .callback = &umcs7840_write_callback1, 218 .if_index = 0, 219 }, 220 }; 221 222 static const struct usb_config umcs7840_intr_config_data[1] = { 223 [0] = { 224 .type = UE_INTERRUPT, 225 .endpoint = 0x09, 226 .direction = UE_DIR_IN, 227 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 228 .bufsize = 0, /* use wMaxPacketSize */ 229 .callback = &umcs7840_intr_callback, 230 .if_index = 0, 231 }, 232 }; 233 234 static struct ucom_callback umcs7840_callback = { 235 .ucom_cfg_get_status = &umcs7840_cfg_get_status, 236 237 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr, 238 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts, 239 .ucom_cfg_set_break = &umcs7840_cfg_set_break, 240 241 .ucom_cfg_param = &umcs7840_cfg_param, 242 .ucom_cfg_open = &umcs7840_cfg_open, 243 .ucom_cfg_close = &umcs7840_cfg_close, 244 245 .ucom_pre_param = &umcs7840_pre_param, 246 247 .ucom_start_read = &umcs7840_start_read, 248 .ucom_stop_read = &umcs7840_stop_read, 249 250 .ucom_start_write = &umcs7840_start_write, 251 .ucom_stop_write = &umcs7840_stop_write, 252 253 .ucom_poll = &umcs7840_poll, 254 .ucom_free = &umcs7840_free, 255 }; 256 257 static const STRUCT_USB_HOST_ID umcs7840_devs[] = { 258 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)}, 259 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)}, 260 }; 261 262 static device_method_t umcs7840_methods[] = { 263 DEVMETHOD(device_probe, umcs7840_probe), 264 DEVMETHOD(device_attach, umcs7840_attach), 265 DEVMETHOD(device_detach, umcs7840_detach), 266 DEVMETHOD_END 267 }; 268 269 static driver_t umcs7840_driver = { 270 .name = "umcs7840", 271 .methods = umcs7840_methods, 272 .size = sizeof(struct umcs7840_softc), 273 }; 274 275 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, 0, 0); 276 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1); 277 MODULE_DEPEND(umcs7840, usb, 1, 1, 1); 278 MODULE_VERSION(umcs7840, UMCS7840_MODVER); 279 USB_PNP_HOST_INFO(umcs7840_devs); 280 281 static int 282 umcs7840_probe(device_t dev) 283 { 284 struct usb_attach_arg *uaa = device_get_ivars(dev); 285 286 if (uaa->usb_mode != USB_MODE_HOST) 287 return (ENXIO); 288 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX) 289 return (ENXIO); 290 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX) 291 return (ENXIO); 292 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa)); 293 } 294 295 static int 296 umcs7840_attach(device_t dev) 297 { 298 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS]; 299 struct usb_attach_arg *uaa = device_get_ivars(dev); 300 struct umcs7840_softc *sc = device_get_softc(dev); 301 302 uint8_t iface_index = MCS7840_IFACE_INDEX; 303 int error; 304 int subunit; 305 int n; 306 uint8_t data; 307 308 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) 309 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n]; 310 311 device_set_usb_desc(dev); 312 mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF); 313 ucom_ref(&sc->sc_super_ucom); 314 315 sc->sc_dev = dev; 316 sc->sc_udev = uaa->device; 317 318 /* 319 * Get number of ports 320 * Documentation (full datasheet) says, that number of ports is 321 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only 322 * register. But vendor driver uses these undocumented 323 * register & bit. 324 * 325 * Experiments show, that MODE register can have `0' 326 * (4 ports) bit on 2-port device, so use vendor driver's way. 327 * 328 * Also, see notes in header file for these constants. 329 */ 330 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data); 331 if (data & MCS7840_DEV_GPIO_4PORTS) { 332 sc->sc_numports = 4; 333 /* Store physical port numbers in sc_portno */ 334 sc->sc_ucom[0].sc_portno = 0; 335 sc->sc_ucom[1].sc_portno = 1; 336 sc->sc_ucom[2].sc_portno = 2; 337 sc->sc_ucom[3].sc_portno = 3; 338 } else { 339 sc->sc_numports = 2; 340 /* Store physical port numbers in sc_portno */ 341 sc->sc_ucom[0].sc_portno = 0; 342 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */ 343 } 344 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports); 345 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) { 346 device_printf(dev, "On-die configuration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n", 347 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high", 348 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no", 349 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail", 350 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail", 351 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4", 352 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled", 353 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not "); 354 } 355 /* Setup all transfers */ 356 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 357 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) { 358 /* Set endpoint address */ 359 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno; 360 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n]; 361 } 362 error = usbd_transfer_setup(uaa->device, 363 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp, 364 UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx); 365 if (error) { 366 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n", 367 subunit + 1, sc->sc_numports); 368 goto detach; 369 } 370 } 371 error = usbd_transfer_setup(uaa->device, 372 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data, 373 1, sc, &sc->sc_mtx); 374 if (error) { 375 device_printf(dev, "allocating USB transfers failed for interrupt\n"); 376 goto detach; 377 } 378 /* clear stall at first run */ 379 mtx_lock(&sc->sc_mtx); 380 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 381 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]); 382 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]); 383 } 384 mtx_unlock(&sc->sc_mtx); 385 386 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc, 387 &umcs7840_callback, &sc->sc_mtx); 388 if (error) 389 goto detach; 390 391 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev); 392 393 return (0); 394 395 detach: 396 umcs7840_detach(dev); 397 return (ENXIO); 398 } 399 400 static int 401 umcs7840_detach(device_t dev) 402 { 403 struct umcs7840_softc *sc = device_get_softc(dev); 404 int subunit; 405 406 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom); 407 408 for (subunit = 0; subunit < sc->sc_numports; ++subunit) 409 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 410 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1); 411 412 device_claim_softc(dev); 413 414 umcs7840_free_softc(sc); 415 416 return (0); 417 } 418 419 UCOM_UNLOAD_DRAIN(umcs7840); 420 421 static void 422 umcs7840_free_softc(struct umcs7840_softc *sc) 423 { 424 if (ucom_unref(&sc->sc_super_ucom)) { 425 mtx_destroy(&sc->sc_mtx); 426 device_free_softc(sc); 427 } 428 } 429 430 static void 431 umcs7840_free(struct ucom_softc *ucom) 432 { 433 umcs7840_free_softc(ucom->sc_parent); 434 } 435 436 static void 437 umcs7840_cfg_open(struct ucom_softc *ucom) 438 { 439 struct umcs7840_softc *sc = ucom->sc_parent; 440 uint16_t pn = ucom->sc_portno; 441 uint8_t data; 442 443 /* If it very first open, finish global configuration */ 444 if (!sc->sc_driver_done) { 445 /* 446 * USB enumeration is finished, pass internal memory to FIFOs 447 * If it is done in the end of "attach", kernel panics. 448 */ 449 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data)) 450 return; 451 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE; 452 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data)) 453 return; 454 sc->sc_driver_done = 1; 455 } 456 /* Toggle reset bit on-off */ 457 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 458 return; 459 data |= MCS7840_DEV_SPx_UART_RESET; 460 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 461 return; 462 data &= ~MCS7840_DEV_SPx_UART_RESET; 463 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 464 return; 465 466 /* Set RS-232 mode */ 467 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232)) 468 return; 469 470 /* Disable RX on time of initialization */ 471 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 472 return; 473 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 474 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 475 return; 476 477 /* Disable all interrupts */ 478 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0)) 479 return; 480 481 /* Reset FIFO -- documented */ 482 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0)) 483 return; 484 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 485 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR | 486 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14)) 487 return; 488 489 /* Set 8 bit, no parity, 1 stop bit -- documented */ 490 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1; 491 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr)) 492 return; 493 494 /* 495 * Enable DTR/RTS on modem control, enable modem interrupts -- 496 * documented 497 */ 498 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_IE; 499 if (ucom->sc_tty == NULL || (ucom->sc_tty->t_termios.c_cflag & CNO_RTSDTR) == 0) 500 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS; 501 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr)) 502 return; 503 504 /* Clearing Bulkin and Bulkout FIFO */ 505 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 506 return; 507 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO; 508 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 509 return; 510 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO); 511 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 512 return; 513 514 /* Set speed 9600 */ 515 if (umcs7840_set_baudrate(sc, pn, 9600)) 516 return; 517 518 /* Finally enable all interrupts -- documented */ 519 /* 520 * Copied from vendor driver, I don't know why we should read LCR 521 * here 522 */ 523 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr)) 524 return; 525 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 526 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM)) 527 return; 528 529 /* Enable RX */ 530 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 531 return; 532 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE; 533 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 534 return; 535 536 DPRINTF("Port %d has been opened\n", pn); 537 } 538 539 static void 540 umcs7840_cfg_close(struct ucom_softc *ucom) 541 { 542 struct umcs7840_softc *sc = ucom->sc_parent; 543 uint16_t pn = ucom->sc_portno; 544 uint8_t data; 545 546 umcs7840_stop_read(ucom); 547 umcs7840_stop_write(ucom); 548 549 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0); 550 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0); 551 552 /* Disable RX */ 553 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 554 return; 555 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 556 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 557 return; 558 DPRINTF("Port %d has been closed\n", pn); 559 } 560 561 static void 562 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 563 { 564 struct umcs7840_softc *sc = ucom->sc_parent; 565 uint8_t pn = ucom->sc_portno; 566 567 if (onoff) 568 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR; 569 else 570 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR; 571 572 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 573 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off"); 574 } 575 576 static void 577 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 578 { 579 struct umcs7840_softc *sc = ucom->sc_parent; 580 uint8_t pn = ucom->sc_portno; 581 582 if (onoff) 583 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS; 584 else 585 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS; 586 587 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 588 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off"); 589 } 590 591 static void 592 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 593 { 594 struct umcs7840_softc *sc = ucom->sc_parent; 595 uint8_t pn = ucom->sc_portno; 596 597 if (onoff) 598 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK; 599 else 600 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK; 601 602 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 603 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off"); 604 } 605 606 static void 607 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t) 608 { 609 struct umcs7840_softc *sc = ucom->sc_parent; 610 uint8_t pn = ucom->sc_portno; 611 uint8_t lcr = sc->sc_ports[pn].sc_lcr; 612 uint8_t mcr = sc->sc_ports[pn].sc_mcr; 613 614 DPRINTF("Port %d config:\n", pn); 615 if (t->c_cflag & CSTOPB) { 616 DPRINTF(" 2 stop bits\n"); 617 lcr |= MCS7840_UART_LCR_STOPB2; 618 } else { 619 lcr |= MCS7840_UART_LCR_STOPB1; 620 DPRINTF(" 1 stop bit\n"); 621 } 622 623 lcr &= ~MCS7840_UART_LCR_PARITYMASK; 624 if (t->c_cflag & PARENB) { 625 lcr |= MCS7840_UART_LCR_PARITYON; 626 if (t->c_cflag & PARODD) { 627 lcr = MCS7840_UART_LCR_PARITYODD; 628 DPRINTF(" parity on - odd\n"); 629 } else { 630 lcr = MCS7840_UART_LCR_PARITYEVEN; 631 DPRINTF(" parity on - even\n"); 632 } 633 } else { 634 lcr &= ~MCS7840_UART_LCR_PARITYON; 635 DPRINTF(" parity off\n"); 636 } 637 638 lcr &= ~MCS7840_UART_LCR_DATALENMASK; 639 switch (t->c_cflag & CSIZE) { 640 case CS5: 641 lcr |= MCS7840_UART_LCR_DATALEN5; 642 DPRINTF(" 5 bit\n"); 643 break; 644 case CS6: 645 lcr |= MCS7840_UART_LCR_DATALEN6; 646 DPRINTF(" 6 bit\n"); 647 break; 648 case CS7: 649 lcr |= MCS7840_UART_LCR_DATALEN7; 650 DPRINTF(" 7 bit\n"); 651 break; 652 case CS8: 653 lcr |= MCS7840_UART_LCR_DATALEN8; 654 DPRINTF(" 8 bit\n"); 655 break; 656 } 657 658 if (t->c_cflag & CRTSCTS) { 659 mcr |= MCS7840_UART_MCR_CTSRTS; 660 DPRINTF(" CTS/RTS\n"); 661 } else 662 mcr &= ~MCS7840_UART_MCR_CTSRTS; 663 664 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) { 665 mcr |= MCS7840_UART_MCR_DTRDSR; 666 DPRINTF(" DTR/DSR\n"); 667 } else 668 mcr &= ~MCS7840_UART_MCR_DTRDSR; 669 670 sc->sc_ports[pn].sc_lcr = lcr; 671 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 672 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr); 673 674 sc->sc_ports[pn].sc_mcr = mcr; 675 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 676 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr); 677 678 umcs7840_set_baudrate(sc, pn, t->c_ospeed); 679 } 680 681 static int 682 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t) 683 { 684 uint8_t clk; 685 uint16_t divisor; 686 687 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor) 688 return (EINVAL); 689 return (0); 690 } 691 692 static void 693 umcs7840_start_read(struct ucom_softc *ucom) 694 { 695 struct umcs7840_softc *sc = ucom->sc_parent; 696 uint8_t pn = ucom->sc_portno; 697 698 /* Start interrupt transfer */ 699 usbd_transfer_start(sc->sc_intr_xfer); 700 701 /* Start read transfer */ 702 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 703 } 704 705 static void 706 umcs7840_stop_read(struct ucom_softc *ucom) 707 { 708 struct umcs7840_softc *sc = ucom->sc_parent; 709 uint8_t pn = ucom->sc_portno; 710 711 /* Stop read transfer */ 712 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 713 } 714 715 static void 716 umcs7840_start_write(struct ucom_softc *ucom) 717 { 718 struct umcs7840_softc *sc = ucom->sc_parent; 719 uint8_t pn = ucom->sc_portno; 720 721 /* Start interrupt transfer */ 722 usbd_transfer_start(sc->sc_intr_xfer); 723 724 /* Start write transfer */ 725 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 726 } 727 728 static void 729 umcs7840_stop_write(struct ucom_softc *ucom) 730 { 731 struct umcs7840_softc *sc = ucom->sc_parent; 732 uint8_t pn = ucom->sc_portno; 733 734 /* Stop write transfer */ 735 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 736 } 737 738 static void 739 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 740 { 741 struct umcs7840_softc *sc = ucom->sc_parent; 742 uint8_t pn = ucom->sc_portno; 743 uint8_t hw_msr = 0; /* local modem status register */ 744 745 /* 746 * Read status registers. MSR bits need translation from ns16550 to 747 * SER_* values. LSR bits are ns16550 in hardware and ucom. 748 */ 749 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, lsr); 750 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr); 751 752 if (hw_msr & MCS7840_UART_MSR_NEGCTS) 753 *msr |= SER_CTS; 754 755 if (hw_msr & MCS7840_UART_MSR_NEGDCD) 756 *msr |= SER_DCD; 757 758 if (hw_msr & MCS7840_UART_MSR_NEGRI) 759 *msr |= SER_RI; 760 761 if (hw_msr & MCS7840_UART_MSR_NEGDSR) 762 *msr |= SER_DSR; 763 764 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr); 765 } 766 767 static void 768 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error) 769 { 770 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 771 struct usb_page_cache *pc; 772 uint8_t buf[13]; 773 int actlen; 774 int subunit; 775 776 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 777 778 switch (USB_GET_STATE(xfer)) { 779 case USB_ST_TRANSFERRED: 780 if (actlen == 5 || actlen == 13) { 781 pc = usbd_xfer_get_frame(xfer, 0); 782 usbd_copy_out(pc, 0, buf, actlen); 783 /* Check status of all ports */ 784 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 785 uint8_t pn = sc->sc_ucom[subunit].sc_portno; 786 787 if (buf[pn] & MCS7840_UART_ISR_NOPENDING) 788 continue; 789 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK)); 790 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) { 791 case MCS7840_UART_ISR_RXERR: 792 case MCS7840_UART_ISR_RXHASDATA: 793 case MCS7840_UART_ISR_RXTIMEOUT: 794 case MCS7840_UART_ISR_MSCHANGE: 795 ucom_status_change(&sc->sc_ucom[subunit]); 796 break; 797 default: 798 /* Do nothing */ 799 break; 800 } 801 } 802 } else 803 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen); 804 /* FALLTHROUGH */ 805 case USB_ST_SETUP: 806 tr_setup: 807 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 808 usbd_transfer_submit(xfer); 809 return; 810 811 default: /* Error */ 812 if (error != USB_ERR_CANCELLED) { 813 /* try to clear stall first */ 814 usbd_xfer_set_stall(xfer); 815 goto tr_setup; 816 } 817 return; 818 } 819 } 820 821 static void 822 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error) 823 { 824 umcs7840_read_callbackN(xfer, error, 0); 825 } 826 827 static void 828 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error) 829 { 830 umcs7840_read_callbackN(xfer, error, 1); 831 } 832 static void 833 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error) 834 { 835 umcs7840_read_callbackN(xfer, error, 2); 836 } 837 838 static void 839 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error) 840 { 841 umcs7840_read_callbackN(xfer, error, 3); 842 } 843 844 static void 845 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 846 { 847 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 848 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 849 struct usb_page_cache *pc; 850 int actlen; 851 852 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 853 854 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen); 855 856 switch (USB_GET_STATE(xfer)) { 857 case USB_ST_TRANSFERRED: 858 pc = usbd_xfer_get_frame(xfer, 0); 859 ucom_put_data(ucom, pc, 0, actlen); 860 /* FALLTHROUGH */ 861 case USB_ST_SETUP: 862 tr_setup: 863 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 864 usbd_transfer_submit(xfer); 865 return; 866 867 default: /* Error */ 868 if (error != USB_ERR_CANCELLED) { 869 /* try to clear stall first */ 870 usbd_xfer_set_stall(xfer); 871 goto tr_setup; 872 } 873 return; 874 } 875 } 876 877 static void 878 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error) 879 { 880 umcs7840_write_callbackN(xfer, error, 0); 881 } 882 883 static void 884 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error) 885 { 886 umcs7840_write_callbackN(xfer, error, 1); 887 } 888 889 static void 890 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error) 891 { 892 umcs7840_write_callbackN(xfer, error, 2); 893 } 894 895 static void 896 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error) 897 { 898 umcs7840_write_callbackN(xfer, error, 3); 899 } 900 901 static void 902 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 903 { 904 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 905 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 906 struct usb_page_cache *pc; 907 uint32_t actlen; 908 909 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer)); 910 911 switch (USB_GET_STATE(xfer)) { 912 case USB_ST_SETUP: 913 case USB_ST_TRANSFERRED: 914 tr_setup: 915 pc = usbd_xfer_get_frame(xfer, 0); 916 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) { 917 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen); 918 usbd_xfer_set_frame_len(xfer, 0, actlen); 919 usbd_transfer_submit(xfer); 920 } 921 return; 922 923 default: /* Error */ 924 if (error != USB_ERR_CANCELLED) { 925 /* try to clear stall first */ 926 usbd_xfer_set_stall(xfer); 927 goto tr_setup; 928 } 929 return; 930 } 931 } 932 933 static void 934 umcs7840_poll(struct ucom_softc *ucom) 935 { 936 struct umcs7840_softc *sc = ucom->sc_parent; 937 938 DPRINTF("Port %d poll\n", ucom->sc_portno); 939 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 940 usbd_transfer_poll(&sc->sc_intr_xfer, 1); 941 } 942 943 static usb_error_t 944 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data) 945 { 946 struct usb_device_request req; 947 usb_error_t err; 948 uint16_t len; 949 950 req.bmRequestType = UT_READ_VENDOR_DEVICE; 951 req.bRequest = MCS7840_RDREQ; 952 USETW(req.wValue, 0); 953 USETW(req.wIndex, reg); 954 USETW(req.wLength, UMCS7840_READ_LENGTH); 955 956 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 957 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 958 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len); 959 return (USB_ERR_INVAL); 960 } else if (err) 961 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err)); 962 return (err); 963 } 964 965 static usb_error_t 966 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data) 967 { 968 struct usb_device_request req; 969 usb_error_t err; 970 971 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 972 req.bRequest = MCS7840_WRREQ; 973 USETW(req.wValue, data); 974 USETW(req.wIndex, reg); 975 USETW(req.wLength, 0); 976 977 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 978 if (err) 979 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err)); 980 981 return (err); 982 } 983 984 static usb_error_t 985 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data) 986 { 987 struct usb_device_request req; 988 uint16_t wVal; 989 usb_error_t err; 990 uint16_t len; 991 992 /* portno is port number */ 993 wVal = ((uint16_t)(portno + 1)) << 8; 994 995 req.bmRequestType = UT_READ_VENDOR_DEVICE; 996 req.bRequest = MCS7840_RDREQ; 997 USETW(req.wValue, wVal); 998 USETW(req.wIndex, reg); 999 USETW(req.wLength, UMCS7840_READ_LENGTH); 1000 1001 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 1002 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 1003 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len); 1004 return (USB_ERR_INVAL); 1005 } else if (err) 1006 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 1007 return (err); 1008 } 1009 1010 static usb_error_t 1011 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data) 1012 { 1013 struct usb_device_request req; 1014 usb_error_t err; 1015 uint16_t wVal; 1016 1017 /* portno is port number */ 1018 wVal = ((uint16_t)(portno + 1)) << 8 | data; 1019 1020 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1021 req.bRequest = MCS7840_WRREQ; 1022 USETW(req.wValue, wVal); 1023 USETW(req.wIndex, reg); 1024 USETW(req.wLength, 0); 1025 1026 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 1027 if (err) 1028 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 1029 return (err); 1030 } 1031 1032 static usb_error_t 1033 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate) 1034 { 1035 usb_error_t err; 1036 uint16_t divisor; 1037 uint8_t clk; 1038 uint8_t data; 1039 1040 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) { 1041 DPRINTF("Port %d bad speed: %d\n", portno, rate); 1042 return (-1); 1043 } 1044 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) { 1045 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate); 1046 return (-1); 1047 } 1048 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor); 1049 1050 /* Set clock source for standard BAUD frequences */ 1051 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data); 1052 if (err) 1053 return (err); 1054 data &= MCS7840_DEV_SPx_CLOCK_MASK; 1055 data |= clk; 1056 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data); 1057 if (err) 1058 return (err); 1059 1060 /* Set divider */ 1061 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS; 1062 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1063 if (err) 1064 return (err); 1065 1066 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff)); 1067 if (err) 1068 return (err); 1069 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff)); 1070 if (err) 1071 return (err); 1072 1073 /* Turn off access to DLL/DLM registers of UART */ 1074 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS; 1075 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1076 if (err) 1077 return (err); 1078 return (0); 1079 } 1080 1081 /* Maximum speeds for standard frequences, when PLL is not used */ 1082 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,}; 1083 static const uint8_t umcs7840_baudrate_divisors_len = nitems(umcs7840_baudrate_divisors); 1084 1085 static usb_error_t 1086 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk) 1087 { 1088 uint8_t i = 0; 1089 1090 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1]) 1091 return (-1); 1092 1093 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 && 1094 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i); 1095 if (rate == 0) 1096 *divisor = 1; /* XXX */ 1097 else 1098 *divisor = umcs7840_baudrate_divisors[i + 1] / rate; 1099 /* 0x00 .. 0x70 */ 1100 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT; 1101 return (0); 1102 } 1103