1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * This driver supports several multiport USB-to-RS232 serial adapters driven 31 * by MosChip mos7820 and mos7840, bridge chips. 32 * The adapters are sold under many different brand names. 33 * 34 * Datasheets are available at MosChip www site at 35 * http://www.moschip.com. The datasheets don't contain full 36 * programming information for the chip. 37 * 38 * It is nornal to have only two enabled ports in devices, based on 39 * quad-port mos7840. 40 * 41 */ 42 #include <sys/cdefs.h> 43 __FBSDID("$FreeBSD$"); 44 45 #include <sys/stdint.h> 46 #include <sys/stddef.h> 47 #include <sys/param.h> 48 #include <sys/queue.h> 49 #include <sys/types.h> 50 #include <sys/systm.h> 51 #include <sys/kernel.h> 52 #include <sys/bus.h> 53 #include <sys/linker_set.h> 54 #include <sys/module.h> 55 #include <sys/lock.h> 56 #include <sys/mutex.h> 57 #include <sys/condvar.h> 58 #include <sys/sysctl.h> 59 #include <sys/sx.h> 60 #include <sys/unistd.h> 61 #include <sys/callout.h> 62 #include <sys/malloc.h> 63 #include <sys/priv.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usb_cdc.h> 69 #include "usbdevs.h" 70 71 #define USB_DEBUG_VAR umcs_debug 72 #include <dev/usb/usb_debug.h> 73 #include <dev/usb/usb_process.h> 74 75 #include <dev/usb/serial/usb_serial.h> 76 77 #include <dev/usb/serial/umcs.h> 78 79 #define UMCS7840_MODVER 1 80 81 #ifdef USB_DEBUG 82 static int umcs_debug = 0; 83 84 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 85 "USB umcs quadport serial adapter"); 86 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RWTUN, &umcs_debug, 0, "Debug level"); 87 #endif /* USB_DEBUG */ 88 89 /* 90 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port) 91 * have ports 0 and 2, with ports 1 and 3 omitted. 92 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2. 93 * This driver trys to use physical numbers as much as possible. 94 */ 95 96 /* 97 * Indexed by PHYSICAL port number. 98 * Pack non-regular registers to array to easier if-less access. 99 */ 100 struct umcs7840_port_registers { 101 uint8_t reg_sp; /* SP register. */ 102 uint8_t reg_control; /* CONTROL register. */ 103 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be 104 * calculated */ 105 }; 106 107 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = { 108 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1}, 109 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2}, 110 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3}, 111 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4}, 112 }; 113 114 enum { 115 UMCS7840_BULK_RD_EP, 116 UMCS7840_BULK_WR_EP, 117 UMCS7840_N_TRANSFERS 118 }; 119 120 struct umcs7840_softc_oneport { 121 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures 122 * for two transfers */ 123 124 uint8_t sc_lcr; /* local line control register */ 125 uint8_t sc_mcr; /* local modem control register */ 126 }; 127 128 struct umcs7840_softc { 129 struct ucom_super_softc sc_super_ucom; 130 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous 131 * array, so indexed by 132 * LOGICAL port 133 * (subunit) number */ 134 135 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */ 136 137 device_t sc_dev; /* Device for error prints */ 138 struct usb_device *sc_udev; /* USB Device for all operations */ 139 struct mtx sc_mtx; /* ucom requires this */ 140 141 uint8_t sc_driver_done; /* Flag when enumeration is finished */ 142 143 uint8_t sc_numports; /* Number of ports (subunits) */ 144 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL 145 * port number. */ 146 }; 147 148 /* prototypes */ 149 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *); 150 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t); 151 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *); 152 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t); 153 154 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t); 155 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *); 156 157 static void umcs7840_free(struct ucom_softc *); 158 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *); 159 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t); 160 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t); 161 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t); 162 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *); 163 static void umcs7840_cfg_open(struct ucom_softc *); 164 static void umcs7840_cfg_close(struct ucom_softc *); 165 166 static int umcs7840_pre_param(struct ucom_softc *, struct termios *); 167 168 static void umcs7840_start_read(struct ucom_softc *); 169 static void umcs7840_stop_read(struct ucom_softc *); 170 171 static void umcs7840_start_write(struct ucom_softc *); 172 static void umcs7840_stop_write(struct ucom_softc *); 173 174 static void umcs7840_poll(struct ucom_softc *ucom); 175 176 static device_probe_t umcs7840_probe; 177 static device_attach_t umcs7840_attach; 178 static device_detach_t umcs7840_detach; 179 static void umcs7840_free_softc(struct umcs7840_softc *); 180 181 static usb_callback_t umcs7840_intr_callback; 182 static usb_callback_t umcs7840_read_callback1; 183 static usb_callback_t umcs7840_read_callback2; 184 static usb_callback_t umcs7840_read_callback3; 185 static usb_callback_t umcs7840_read_callback4; 186 static usb_callback_t umcs7840_write_callback1; 187 static usb_callback_t umcs7840_write_callback2; 188 static usb_callback_t umcs7840_write_callback3; 189 static usb_callback_t umcs7840_write_callback4; 190 191 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 192 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 193 194 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */ 195 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = { 196 {&umcs7840_read_callback1, &umcs7840_write_callback1}, 197 {&umcs7840_read_callback2, &umcs7840_write_callback2}, 198 {&umcs7840_read_callback3, &umcs7840_write_callback3}, 199 {&umcs7840_read_callback4, &umcs7840_write_callback4}, 200 }; 201 202 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = { 203 [UMCS7840_BULK_RD_EP] = { 204 .type = UE_BULK, 205 .endpoint = 0x01, 206 .direction = UE_DIR_IN, 207 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 208 .bufsize = 0, /* use wMaxPacketSize */ 209 .callback = &umcs7840_read_callback1, 210 .if_index = 0, 211 }, 212 213 [UMCS7840_BULK_WR_EP] = { 214 .type = UE_BULK, 215 .endpoint = 0x02, 216 .direction = UE_DIR_OUT, 217 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 218 .bufsize = 0, /* use wMaxPacketSize */ 219 .callback = &umcs7840_write_callback1, 220 .if_index = 0, 221 }, 222 }; 223 224 static const struct usb_config umcs7840_intr_config_data[1] = { 225 [0] = { 226 .type = UE_INTERRUPT, 227 .endpoint = 0x09, 228 .direction = UE_DIR_IN, 229 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 230 .bufsize = 0, /* use wMaxPacketSize */ 231 .callback = &umcs7840_intr_callback, 232 .if_index = 0, 233 }, 234 }; 235 236 static struct ucom_callback umcs7840_callback = { 237 .ucom_cfg_get_status = &umcs7840_cfg_get_status, 238 239 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr, 240 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts, 241 .ucom_cfg_set_break = &umcs7840_cfg_set_break, 242 243 .ucom_cfg_param = &umcs7840_cfg_param, 244 .ucom_cfg_open = &umcs7840_cfg_open, 245 .ucom_cfg_close = &umcs7840_cfg_close, 246 247 .ucom_pre_param = &umcs7840_pre_param, 248 249 .ucom_start_read = &umcs7840_start_read, 250 .ucom_stop_read = &umcs7840_stop_read, 251 252 .ucom_start_write = &umcs7840_start_write, 253 .ucom_stop_write = &umcs7840_stop_write, 254 255 .ucom_poll = &umcs7840_poll, 256 .ucom_free = &umcs7840_free, 257 }; 258 259 static const STRUCT_USB_HOST_ID umcs7840_devs[] = { 260 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)}, 261 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)}, 262 }; 263 264 static device_method_t umcs7840_methods[] = { 265 DEVMETHOD(device_probe, umcs7840_probe), 266 DEVMETHOD(device_attach, umcs7840_attach), 267 DEVMETHOD(device_detach, umcs7840_detach), 268 DEVMETHOD_END 269 }; 270 271 static devclass_t umcs7840_devclass; 272 273 static driver_t umcs7840_driver = { 274 .name = "umcs7840", 275 .methods = umcs7840_methods, 276 .size = sizeof(struct umcs7840_softc), 277 }; 278 279 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0); 280 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1); 281 MODULE_DEPEND(umcs7840, usb, 1, 1, 1); 282 MODULE_VERSION(umcs7840, UMCS7840_MODVER); 283 USB_PNP_HOST_INFO(umcs7840_devs); 284 285 static int 286 umcs7840_probe(device_t dev) 287 { 288 struct usb_attach_arg *uaa = device_get_ivars(dev); 289 290 if (uaa->usb_mode != USB_MODE_HOST) 291 return (ENXIO); 292 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX) 293 return (ENXIO); 294 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX) 295 return (ENXIO); 296 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa)); 297 } 298 299 static int 300 umcs7840_attach(device_t dev) 301 { 302 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS]; 303 struct usb_attach_arg *uaa = device_get_ivars(dev); 304 struct umcs7840_softc *sc = device_get_softc(dev); 305 306 uint8_t iface_index = MCS7840_IFACE_INDEX; 307 int error; 308 int subunit; 309 int n; 310 uint8_t data; 311 312 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) 313 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n]; 314 315 device_set_usb_desc(dev); 316 mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF); 317 ucom_ref(&sc->sc_super_ucom); 318 319 sc->sc_dev = dev; 320 sc->sc_udev = uaa->device; 321 322 /* 323 * Get number of ports 324 * Documentation (full datasheet) says, that number of ports is 325 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only 326 * register. But vendor driver uses these undocumented 327 * register & bit. 328 * 329 * Experiments show, that MODE register can have `0' 330 * (4 ports) bit on 2-port device, so use vendor driver's way. 331 * 332 * Also, see notes in header file for these constants. 333 */ 334 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data); 335 if (data & MCS7840_DEV_GPIO_4PORTS) { 336 sc->sc_numports = 4; 337 /* Store physical port numbers in sc_portno */ 338 sc->sc_ucom[0].sc_portno = 0; 339 sc->sc_ucom[1].sc_portno = 1; 340 sc->sc_ucom[2].sc_portno = 2; 341 sc->sc_ucom[3].sc_portno = 3; 342 } else { 343 sc->sc_numports = 2; 344 /* Store physical port numbers in sc_portno */ 345 sc->sc_ucom[0].sc_portno = 0; 346 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */ 347 } 348 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports); 349 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) { 350 device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n", 351 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high", 352 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no", 353 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail", 354 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail", 355 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4", 356 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled", 357 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not "); 358 } 359 /* Setup all transfers */ 360 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 361 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) { 362 /* Set endpoint address */ 363 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno; 364 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n]; 365 } 366 error = usbd_transfer_setup(uaa->device, 367 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp, 368 UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx); 369 if (error) { 370 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n", 371 subunit + 1, sc->sc_numports); 372 goto detach; 373 } 374 } 375 error = usbd_transfer_setup(uaa->device, 376 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data, 377 1, sc, &sc->sc_mtx); 378 if (error) { 379 device_printf(dev, "allocating USB transfers failed for interrupt\n"); 380 goto detach; 381 } 382 /* clear stall at first run */ 383 mtx_lock(&sc->sc_mtx); 384 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 385 usbd_xfer_set_zlp(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]); 386 } 387 mtx_unlock(&sc->sc_mtx); 388 389 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc, 390 &umcs7840_callback, &sc->sc_mtx); 391 if (error) 392 goto detach; 393 394 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev); 395 396 return (0); 397 398 detach: 399 umcs7840_detach(dev); 400 return (ENXIO); 401 } 402 403 static int 404 umcs7840_detach(device_t dev) 405 { 406 struct umcs7840_softc *sc = device_get_softc(dev); 407 int subunit; 408 409 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom); 410 411 for (subunit = 0; subunit < sc->sc_numports; ++subunit) 412 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 413 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1); 414 415 device_claim_softc(dev); 416 417 umcs7840_free_softc(sc); 418 419 return (0); 420 } 421 422 UCOM_UNLOAD_DRAIN(umcs7840); 423 424 static void 425 umcs7840_free_softc(struct umcs7840_softc *sc) 426 { 427 if (ucom_unref(&sc->sc_super_ucom)) { 428 mtx_destroy(&sc->sc_mtx); 429 device_free_softc(sc); 430 } 431 } 432 433 static void 434 umcs7840_free(struct ucom_softc *ucom) 435 { 436 umcs7840_free_softc(ucom->sc_parent); 437 } 438 439 static void 440 umcs7840_cfg_open(struct ucom_softc *ucom) 441 { 442 struct umcs7840_softc *sc = ucom->sc_parent; 443 uint16_t pn = ucom->sc_portno; 444 uint8_t data; 445 446 /* If it very first open, finish global configuration */ 447 if (!sc->sc_driver_done) { 448 /* 449 * USB enumeration is finished, pass internal memory to FIFOs 450 * If it is done in the end of "attach", kernel panics. 451 */ 452 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data)) 453 return; 454 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE; 455 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data)) 456 return; 457 sc->sc_driver_done = 1; 458 } 459 /* Toggle reset bit on-off */ 460 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 461 return; 462 data |= MCS7840_DEV_SPx_UART_RESET; 463 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 464 return; 465 data &= ~MCS7840_DEV_SPx_UART_RESET; 466 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 467 return; 468 469 /* Set RS-232 mode */ 470 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232)) 471 return; 472 473 /* Disable RX on time of initialization */ 474 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 475 return; 476 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 477 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 478 return; 479 480 /* Disable all interrupts */ 481 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0)) 482 return; 483 484 /* Reset FIFO -- documented */ 485 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0)) 486 return; 487 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 488 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR | 489 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14)) 490 return; 491 492 /* Set 8 bit, no parity, 1 stop bit -- documented */ 493 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1; 494 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr)) 495 return; 496 497 /* 498 * Enable DTR/RTS on modem control, enable modem interrupts -- 499 * documented 500 */ 501 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_IE; 502 if (ucom->sc_tty == NULL || (ucom->sc_tty->t_termios.c_cflag & CNO_RTSDTR) == 0) 503 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS; 504 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr)) 505 return; 506 507 /* Clearing Bulkin and Bulkout FIFO */ 508 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 509 return; 510 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO; 511 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 512 return; 513 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO); 514 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 515 return; 516 517 /* Set speed 9600 */ 518 if (umcs7840_set_baudrate(sc, pn, 9600)) 519 return; 520 521 /* Finally enable all interrupts -- documented */ 522 /* 523 * Copied from vendor driver, I don't know why we should read LCR 524 * here 525 */ 526 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr)) 527 return; 528 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 529 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM)) 530 return; 531 532 /* Enable RX */ 533 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 534 return; 535 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE; 536 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 537 return; 538 539 DPRINTF("Port %d has been opened\n", pn); 540 } 541 542 static void 543 umcs7840_cfg_close(struct ucom_softc *ucom) 544 { 545 struct umcs7840_softc *sc = ucom->sc_parent; 546 uint16_t pn = ucom->sc_portno; 547 uint8_t data; 548 549 umcs7840_stop_read(ucom); 550 umcs7840_stop_write(ucom); 551 552 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0); 553 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0); 554 555 /* Disable RX */ 556 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 557 return; 558 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 559 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 560 return; 561 DPRINTF("Port %d has been closed\n", pn); 562 } 563 564 static void 565 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 566 { 567 struct umcs7840_softc *sc = ucom->sc_parent; 568 uint8_t pn = ucom->sc_portno; 569 570 if (onoff) 571 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR; 572 else 573 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR; 574 575 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 576 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off"); 577 } 578 579 static void 580 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 581 { 582 struct umcs7840_softc *sc = ucom->sc_parent; 583 uint8_t pn = ucom->sc_portno; 584 585 if (onoff) 586 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS; 587 else 588 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS; 589 590 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 591 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off"); 592 } 593 594 static void 595 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 596 { 597 struct umcs7840_softc *sc = ucom->sc_parent; 598 uint8_t pn = ucom->sc_portno; 599 600 if (onoff) 601 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK; 602 else 603 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK; 604 605 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 606 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off"); 607 } 608 609 static void 610 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t) 611 { 612 struct umcs7840_softc *sc = ucom->sc_parent; 613 uint8_t pn = ucom->sc_portno; 614 uint8_t lcr = sc->sc_ports[pn].sc_lcr; 615 uint8_t mcr = sc->sc_ports[pn].sc_mcr; 616 617 DPRINTF("Port %d config:\n", pn); 618 if (t->c_cflag & CSTOPB) { 619 DPRINTF(" 2 stop bits\n"); 620 lcr |= MCS7840_UART_LCR_STOPB2; 621 } else { 622 lcr |= MCS7840_UART_LCR_STOPB1; 623 DPRINTF(" 1 stop bit\n"); 624 } 625 626 lcr &= ~MCS7840_UART_LCR_PARITYMASK; 627 if (t->c_cflag & PARENB) { 628 lcr |= MCS7840_UART_LCR_PARITYON; 629 if (t->c_cflag & PARODD) { 630 lcr = MCS7840_UART_LCR_PARITYODD; 631 DPRINTF(" parity on - odd\n"); 632 } else { 633 lcr = MCS7840_UART_LCR_PARITYEVEN; 634 DPRINTF(" parity on - even\n"); 635 } 636 } else { 637 lcr &= ~MCS7840_UART_LCR_PARITYON; 638 DPRINTF(" parity off\n"); 639 } 640 641 lcr &= ~MCS7840_UART_LCR_DATALENMASK; 642 switch (t->c_cflag & CSIZE) { 643 case CS5: 644 lcr |= MCS7840_UART_LCR_DATALEN5; 645 DPRINTF(" 5 bit\n"); 646 break; 647 case CS6: 648 lcr |= MCS7840_UART_LCR_DATALEN6; 649 DPRINTF(" 6 bit\n"); 650 break; 651 case CS7: 652 lcr |= MCS7840_UART_LCR_DATALEN7; 653 DPRINTF(" 7 bit\n"); 654 break; 655 case CS8: 656 lcr |= MCS7840_UART_LCR_DATALEN8; 657 DPRINTF(" 8 bit\n"); 658 break; 659 } 660 661 if (t->c_cflag & CRTSCTS) { 662 mcr |= MCS7840_UART_MCR_CTSRTS; 663 DPRINTF(" CTS/RTS\n"); 664 } else 665 mcr &= ~MCS7840_UART_MCR_CTSRTS; 666 667 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) { 668 mcr |= MCS7840_UART_MCR_DTRDSR; 669 DPRINTF(" DTR/DSR\n"); 670 } else 671 mcr &= ~MCS7840_UART_MCR_DTRDSR; 672 673 sc->sc_ports[pn].sc_lcr = lcr; 674 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 675 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr); 676 677 sc->sc_ports[pn].sc_mcr = mcr; 678 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 679 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr); 680 681 umcs7840_set_baudrate(sc, pn, t->c_ospeed); 682 } 683 684 static int 685 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t) 686 { 687 uint8_t clk; 688 uint16_t divisor; 689 690 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor) 691 return (EINVAL); 692 return (0); 693 } 694 695 static void 696 umcs7840_start_read(struct ucom_softc *ucom) 697 { 698 struct umcs7840_softc *sc = ucom->sc_parent; 699 uint8_t pn = ucom->sc_portno; 700 701 /* Start interrupt transfer */ 702 usbd_transfer_start(sc->sc_intr_xfer); 703 704 /* Start read transfer */ 705 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 706 } 707 708 static void 709 umcs7840_stop_read(struct ucom_softc *ucom) 710 { 711 struct umcs7840_softc *sc = ucom->sc_parent; 712 uint8_t pn = ucom->sc_portno; 713 714 /* Stop read transfer */ 715 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 716 } 717 718 static void 719 umcs7840_start_write(struct ucom_softc *ucom) 720 { 721 struct umcs7840_softc *sc = ucom->sc_parent; 722 uint8_t pn = ucom->sc_portno; 723 724 /* Start interrupt transfer */ 725 usbd_transfer_start(sc->sc_intr_xfer); 726 727 /* Start write transfer */ 728 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 729 } 730 731 static void 732 umcs7840_stop_write(struct ucom_softc *ucom) 733 { 734 struct umcs7840_softc *sc = ucom->sc_parent; 735 uint8_t pn = ucom->sc_portno; 736 737 /* Stop write transfer */ 738 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 739 } 740 741 static void 742 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 743 { 744 struct umcs7840_softc *sc = ucom->sc_parent; 745 uint8_t pn = ucom->sc_portno; 746 uint8_t hw_msr = 0; /* local modem status register */ 747 748 /* 749 * Read status registers. MSR bits need translation from ns16550 to 750 * SER_* values. LSR bits are ns16550 in hardware and ucom. 751 */ 752 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, lsr); 753 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr); 754 755 if (hw_msr & MCS7840_UART_MSR_NEGCTS) 756 *msr |= SER_CTS; 757 758 if (hw_msr & MCS7840_UART_MSR_NEGDCD) 759 *msr |= SER_DCD; 760 761 if (hw_msr & MCS7840_UART_MSR_NEGRI) 762 *msr |= SER_RI; 763 764 if (hw_msr & MCS7840_UART_MSR_NEGDSR) 765 *msr |= SER_DSR; 766 767 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr); 768 } 769 770 static void 771 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error) 772 { 773 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 774 struct usb_page_cache *pc; 775 uint8_t buf[13]; 776 int actlen; 777 int subunit; 778 779 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 780 781 switch (USB_GET_STATE(xfer)) { 782 case USB_ST_TRANSFERRED: 783 if (actlen == 5 || actlen == 13) { 784 pc = usbd_xfer_get_frame(xfer, 0); 785 usbd_copy_out(pc, 0, buf, actlen); 786 /* Check status of all ports */ 787 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 788 uint8_t pn = sc->sc_ucom[subunit].sc_portno; 789 790 if (buf[pn] & MCS7840_UART_ISR_NOPENDING) 791 continue; 792 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK)); 793 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) { 794 case MCS7840_UART_ISR_RXERR: 795 case MCS7840_UART_ISR_RXHASDATA: 796 case MCS7840_UART_ISR_RXTIMEOUT: 797 case MCS7840_UART_ISR_MSCHANGE: 798 ucom_status_change(&sc->sc_ucom[subunit]); 799 break; 800 default: 801 /* Do nothing */ 802 break; 803 } 804 } 805 } else 806 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen); 807 /* FALLTHROUGH */ 808 case USB_ST_SETUP: 809 tr_setup: 810 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 811 usbd_transfer_submit(xfer); 812 return; 813 814 default: /* Error */ 815 if (error != USB_ERR_CANCELLED) { 816 /* try to clear stall first */ 817 usbd_xfer_set_stall(xfer); 818 goto tr_setup; 819 } 820 return; 821 } 822 } 823 824 static void 825 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error) 826 { 827 umcs7840_read_callbackN(xfer, error, 0); 828 } 829 830 static void 831 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error) 832 { 833 umcs7840_read_callbackN(xfer, error, 1); 834 } 835 static void 836 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error) 837 { 838 umcs7840_read_callbackN(xfer, error, 2); 839 } 840 841 static void 842 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error) 843 { 844 umcs7840_read_callbackN(xfer, error, 3); 845 } 846 847 static void 848 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 849 { 850 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 851 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 852 struct usb_page_cache *pc; 853 int actlen; 854 855 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 856 857 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen); 858 859 switch (USB_GET_STATE(xfer)) { 860 case USB_ST_TRANSFERRED: 861 pc = usbd_xfer_get_frame(xfer, 0); 862 ucom_put_data(ucom, pc, 0, actlen); 863 /* FALLTHROUGH */ 864 case USB_ST_SETUP: 865 tr_setup: 866 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 867 usbd_transfer_submit(xfer); 868 return; 869 870 default: /* Error */ 871 if (error != USB_ERR_CANCELLED) { 872 /* try to clear stall first */ 873 usbd_xfer_set_stall(xfer); 874 goto tr_setup; 875 } 876 return; 877 } 878 } 879 880 static void 881 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error) 882 { 883 umcs7840_write_callbackN(xfer, error, 0); 884 } 885 886 static void 887 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error) 888 { 889 umcs7840_write_callbackN(xfer, error, 1); 890 } 891 892 static void 893 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error) 894 { 895 umcs7840_write_callbackN(xfer, error, 2); 896 } 897 898 static void 899 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error) 900 { 901 umcs7840_write_callbackN(xfer, error, 3); 902 } 903 904 static void 905 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 906 { 907 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 908 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 909 struct usb_page_cache *pc; 910 uint32_t actlen; 911 912 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer)); 913 914 switch (USB_GET_STATE(xfer)) { 915 case USB_ST_SETUP: 916 case USB_ST_TRANSFERRED: 917 tr_setup: 918 if (usbd_xfer_get_and_clr_zlp(xfer)) 919 break; 920 921 pc = usbd_xfer_get_frame(xfer, 0); 922 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) { 923 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen); 924 usbd_xfer_set_frame_len(xfer, 0, actlen); 925 usbd_transfer_submit(xfer); 926 } 927 break; 928 929 default: /* Error */ 930 if (error != USB_ERR_CANCELLED) { 931 /* try to clear stall first */ 932 usbd_xfer_set_stall(xfer); 933 goto tr_setup; 934 } 935 break; 936 } 937 } 938 939 static void 940 umcs7840_poll(struct ucom_softc *ucom) 941 { 942 struct umcs7840_softc *sc = ucom->sc_parent; 943 944 DPRINTF("Port %d poll\n", ucom->sc_portno); 945 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 946 usbd_transfer_poll(&sc->sc_intr_xfer, 1); 947 } 948 949 static usb_error_t 950 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data) 951 { 952 struct usb_device_request req; 953 usb_error_t err; 954 uint16_t len; 955 956 req.bmRequestType = UT_READ_VENDOR_DEVICE; 957 req.bRequest = MCS7840_RDREQ; 958 USETW(req.wValue, 0); 959 USETW(req.wIndex, reg); 960 USETW(req.wLength, UMCS7840_READ_LENGTH); 961 962 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 963 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 964 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len); 965 return (USB_ERR_INVAL); 966 } else if (err) 967 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err)); 968 return (err); 969 } 970 971 static usb_error_t 972 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data) 973 { 974 struct usb_device_request req; 975 usb_error_t err; 976 977 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 978 req.bRequest = MCS7840_WRREQ; 979 USETW(req.wValue, data); 980 USETW(req.wIndex, reg); 981 USETW(req.wLength, 0); 982 983 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 984 if (err) 985 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err)); 986 987 return (err); 988 } 989 990 static usb_error_t 991 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data) 992 { 993 struct usb_device_request req; 994 uint16_t wVal; 995 usb_error_t err; 996 uint16_t len; 997 998 /* portno is port number */ 999 wVal = ((uint16_t)(portno + 1)) << 8; 1000 1001 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1002 req.bRequest = MCS7840_RDREQ; 1003 USETW(req.wValue, wVal); 1004 USETW(req.wIndex, reg); 1005 USETW(req.wLength, UMCS7840_READ_LENGTH); 1006 1007 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 1008 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 1009 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len); 1010 return (USB_ERR_INVAL); 1011 } else if (err) 1012 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 1013 return (err); 1014 } 1015 1016 static usb_error_t 1017 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data) 1018 { 1019 struct usb_device_request req; 1020 usb_error_t err; 1021 uint16_t wVal; 1022 1023 /* portno is port number */ 1024 wVal = ((uint16_t)(portno + 1)) << 8 | data; 1025 1026 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1027 req.bRequest = MCS7840_WRREQ; 1028 USETW(req.wValue, wVal); 1029 USETW(req.wIndex, reg); 1030 USETW(req.wLength, 0); 1031 1032 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 1033 if (err) 1034 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 1035 return (err); 1036 } 1037 1038 static usb_error_t 1039 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate) 1040 { 1041 usb_error_t err; 1042 uint16_t divisor; 1043 uint8_t clk; 1044 uint8_t data; 1045 1046 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) { 1047 DPRINTF("Port %d bad speed: %d\n", portno, rate); 1048 return (-1); 1049 } 1050 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) { 1051 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate); 1052 return (-1); 1053 } 1054 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor); 1055 1056 /* Set clock source for standard BAUD frequences */ 1057 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data); 1058 if (err) 1059 return (err); 1060 data &= MCS7840_DEV_SPx_CLOCK_MASK; 1061 data |= clk; 1062 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data); 1063 if (err) 1064 return (err); 1065 1066 /* Set divider */ 1067 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS; 1068 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1069 if (err) 1070 return (err); 1071 1072 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff)); 1073 if (err) 1074 return (err); 1075 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff)); 1076 if (err) 1077 return (err); 1078 1079 /* Turn off access to DLL/DLM registers of UART */ 1080 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS; 1081 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1082 if (err) 1083 return (err); 1084 return (0); 1085 } 1086 1087 /* Maximum speeds for standard frequences, when PLL is not used */ 1088 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,}; 1089 static const uint8_t umcs7840_baudrate_divisors_len = nitems(umcs7840_baudrate_divisors); 1090 1091 static usb_error_t 1092 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk) 1093 { 1094 uint8_t i = 0; 1095 1096 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1]) 1097 return (-1); 1098 1099 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 && 1100 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i); 1101 if (rate == 0) 1102 *divisor = 1; /* XXX */ 1103 else 1104 *divisor = umcs7840_baudrate_divisors[i + 1] / rate; 1105 /* 0x00 .. 0x70 */ 1106 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT; 1107 return (0); 1108 } 1109