1 /* $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause-NetBSD 5 * 6 * Copyright (c) 2007, Takanori Watanabe 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * Copyright (c) 2007 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Takuya SHIOZAKI (tshiozak@netbsd.org). 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 48 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 51 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 54 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 #include <sys/cdefs.h> 61 __FBSDID("$FreeBSD$"); 62 63 /* 64 * Driver for WinChipHead CH341/340, the worst USB-serial chip in the 65 * world. 66 */ 67 68 #include <sys/stdint.h> 69 #include <sys/stddef.h> 70 #include <sys/param.h> 71 #include <sys/queue.h> 72 #include <sys/types.h> 73 #include <sys/systm.h> 74 #include <sys/kernel.h> 75 #include <sys/bus.h> 76 #include <sys/module.h> 77 #include <sys/lock.h> 78 #include <sys/mutex.h> 79 #include <sys/condvar.h> 80 #include <sys/sysctl.h> 81 #include <sys/sx.h> 82 #include <sys/unistd.h> 83 #include <sys/callout.h> 84 #include <sys/malloc.h> 85 #include <sys/priv.h> 86 87 #include <dev/usb/usb.h> 88 #include <dev/usb/usbdi.h> 89 #include <dev/usb/usbdi_util.h> 90 #include "usbdevs.h" 91 92 #define USB_DEBUG_VAR uchcom_debug 93 #include <dev/usb/usb_debug.h> 94 #include <dev/usb/usb_process.h> 95 96 #include <dev/usb/serial/usb_serial.h> 97 98 #ifdef USB_DEBUG 99 static int uchcom_debug = 0; 100 101 static SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 102 "USB uchcom"); 103 SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RWTUN, 104 &uchcom_debug, 0, "uchcom debug level"); 105 #endif 106 107 #define UCHCOM_IFACE_INDEX 0 108 #define UCHCOM_CONFIG_INDEX 0 109 110 #define UCHCOM_REV_CH340 0x0250 111 #define UCHCOM_INPUT_BUF_SIZE 8 112 113 #define UCHCOM_REQ_GET_VERSION 0x5F 114 #define UCHCOM_REQ_READ_REG 0x95 115 #define UCHCOM_REQ_WRITE_REG 0x9A 116 #define UCHCOM_REQ_RESET 0xA1 117 #define UCHCOM_REQ_SET_DTRRTS 0xA4 118 119 #define UCHCOM_REG_STAT1 0x06 120 #define UCHCOM_REG_STAT2 0x07 121 #define UCHCOM_REG_BPS_PRE 0x12 122 #define UCHCOM_REG_BPS_DIV 0x13 123 #define UCHCOM_REG_BPS_MOD 0x14 124 #define UCHCOM_REG_BPS_PAD 0x0F 125 #define UCHCOM_REG_BREAK1 0x05 126 #define UCHCOM_REG_LCR1 0x18 127 #define UCHCOM_REG_LCR2 0x25 128 129 #define UCHCOM_VER_20 0x20 130 #define UCHCOM_VER_30 0x30 131 132 #define UCHCOM_BASE_UNKNOWN 0 133 #define UCHCOM_BPS_MOD_BASE 20000000 134 #define UCHCOM_BPS_MOD_BASE_OFS 1100 135 136 #define UCHCOM_DTR_MASK 0x20 137 #define UCHCOM_RTS_MASK 0x40 138 139 #define UCHCOM_BRK_MASK 0x01 140 141 #define UCHCOM_LCR1_MASK 0xAF 142 #define UCHCOM_LCR2_MASK 0x07 143 #define UCHCOM_LCR1_RX 0x80 144 #define UCHCOM_LCR1_TX 0x40 145 #define UCHCOM_LCR1_PARENB 0x08 146 #define UCHCOM_LCR1_CS8 0x03 147 #define UCHCOM_LCR2_PAREVEN 0x07 148 #define UCHCOM_LCR2_PARODD 0x06 149 #define UCHCOM_LCR2_PARMARK 0x05 150 #define UCHCOM_LCR2_PARSPACE 0x04 151 152 #define UCHCOM_INTR_STAT1 0x02 153 #define UCHCOM_INTR_STAT2 0x03 154 #define UCHCOM_INTR_LEAST 4 155 156 #define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */ 157 158 enum { 159 UCHCOM_BULK_DT_WR, 160 UCHCOM_BULK_DT_RD, 161 UCHCOM_INTR_DT_RD, 162 UCHCOM_N_TRANSFER, 163 }; 164 165 struct uchcom_softc { 166 struct ucom_super_softc sc_super_ucom; 167 struct ucom_softc sc_ucom; 168 169 struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER]; 170 struct usb_device *sc_udev; 171 struct mtx sc_mtx; 172 173 uint8_t sc_dtr; /* local copy */ 174 uint8_t sc_rts; /* local copy */ 175 uint8_t sc_version; 176 uint8_t sc_msr; 177 uint8_t sc_lsr; /* local status register */ 178 }; 179 180 struct uchcom_divider { 181 uint8_t dv_prescaler; 182 uint8_t dv_div; 183 uint8_t dv_mod; 184 }; 185 186 struct uchcom_divider_record { 187 uint32_t dvr_high; 188 uint32_t dvr_low; 189 uint32_t dvr_base_clock; 190 struct uchcom_divider dvr_divider; 191 }; 192 193 static const struct uchcom_divider_record dividers[] = 194 { 195 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}}, 196 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}}, 197 {2999999, 23530, 6000000, {3, 0, 0}}, 198 {23529, 2942, 750000, {2, 0, 0}}, 199 {2941, 368, 93750, {1, 0, 0}}, 200 {367, 1, 11719, {0, 0, 0}}, 201 }; 202 203 #define NUM_DIVIDERS nitems(dividers) 204 205 static const STRUCT_USB_HOST_ID uchcom_devs[] = { 206 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)}, 207 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER, 0)}, 208 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER_2, 0)}, 209 }; 210 211 /* protypes */ 212 213 static void uchcom_free(struct ucom_softc *); 214 static int uchcom_pre_param(struct ucom_softc *, struct termios *); 215 static void uchcom_cfg_get_status(struct ucom_softc *, uint8_t *, 216 uint8_t *); 217 static void uchcom_cfg_open(struct ucom_softc *ucom); 218 static void uchcom_cfg_param(struct ucom_softc *, struct termios *); 219 static void uchcom_cfg_set_break(struct ucom_softc *, uint8_t); 220 static void uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t); 221 static void uchcom_cfg_set_rts(struct ucom_softc *, uint8_t); 222 static void uchcom_start_read(struct ucom_softc *); 223 static void uchcom_start_write(struct ucom_softc *); 224 static void uchcom_stop_read(struct ucom_softc *); 225 static void uchcom_stop_write(struct ucom_softc *); 226 static void uchcom_update_version(struct uchcom_softc *); 227 static void uchcom_convert_status(struct uchcom_softc *, uint8_t); 228 static void uchcom_update_status(struct uchcom_softc *); 229 static void uchcom_set_dtr_rts(struct uchcom_softc *); 230 static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t); 231 static void uchcom_set_baudrate(struct uchcom_softc *, uint32_t); 232 static void uchcom_poll(struct ucom_softc *ucom); 233 234 static device_probe_t uchcom_probe; 235 static device_attach_t uchcom_attach; 236 static device_detach_t uchcom_detach; 237 static void uchcom_free_softc(struct uchcom_softc *); 238 239 static usb_callback_t uchcom_intr_callback; 240 static usb_callback_t uchcom_write_callback; 241 static usb_callback_t uchcom_read_callback; 242 243 static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = { 244 [UCHCOM_BULK_DT_WR] = { 245 .type = UE_BULK, 246 .endpoint = UE_ADDR_ANY, 247 .direction = UE_DIR_OUT, 248 .bufsize = UCHCOM_BULK_BUF_SIZE, 249 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 250 .callback = &uchcom_write_callback, 251 }, 252 253 [UCHCOM_BULK_DT_RD] = { 254 .type = UE_BULK, 255 .endpoint = UE_ADDR_ANY, 256 .direction = UE_DIR_IN, 257 .bufsize = UCHCOM_BULK_BUF_SIZE, 258 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 259 .callback = &uchcom_read_callback, 260 }, 261 262 [UCHCOM_INTR_DT_RD] = { 263 .type = UE_INTERRUPT, 264 .endpoint = UE_ADDR_ANY, 265 .direction = UE_DIR_IN, 266 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 267 .bufsize = 0, /* use wMaxPacketSize */ 268 .callback = &uchcom_intr_callback, 269 }, 270 }; 271 272 static struct ucom_callback uchcom_callback = { 273 .ucom_cfg_get_status = &uchcom_cfg_get_status, 274 .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr, 275 .ucom_cfg_set_rts = &uchcom_cfg_set_rts, 276 .ucom_cfg_set_break = &uchcom_cfg_set_break, 277 .ucom_cfg_open = &uchcom_cfg_open, 278 .ucom_cfg_param = &uchcom_cfg_param, 279 .ucom_pre_param = &uchcom_pre_param, 280 .ucom_start_read = &uchcom_start_read, 281 .ucom_stop_read = &uchcom_stop_read, 282 .ucom_start_write = &uchcom_start_write, 283 .ucom_stop_write = &uchcom_stop_write, 284 .ucom_poll = &uchcom_poll, 285 .ucom_free = &uchcom_free, 286 }; 287 288 /* ---------------------------------------------------------------------- 289 * driver entry points 290 */ 291 292 static int 293 uchcom_probe(device_t dev) 294 { 295 struct usb_attach_arg *uaa = device_get_ivars(dev); 296 297 DPRINTFN(11, "\n"); 298 299 if (uaa->usb_mode != USB_MODE_HOST) { 300 return (ENXIO); 301 } 302 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) { 303 return (ENXIO); 304 } 305 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) { 306 return (ENXIO); 307 } 308 return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa)); 309 } 310 311 static int 312 uchcom_attach(device_t dev) 313 { 314 struct uchcom_softc *sc = device_get_softc(dev); 315 struct usb_attach_arg *uaa = device_get_ivars(dev); 316 int error; 317 uint8_t iface_index; 318 319 DPRINTFN(11, "\n"); 320 321 device_set_usb_desc(dev); 322 mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF); 323 ucom_ref(&sc->sc_super_ucom); 324 325 sc->sc_udev = uaa->device; 326 327 switch (uaa->info.idProduct) { 328 case USB_PRODUCT_WCH2_CH341SER: 329 device_printf(dev, "CH340 detected\n"); 330 break; 331 case USB_PRODUCT_WCH2_CH341SER_2: 332 device_printf(dev, "CH341 detected\n"); 333 break; 334 default: 335 device_printf(dev, "New CH340/CH341 product 0x%04x detected\n", 336 uaa->info.idProduct); 337 break; 338 } 339 340 iface_index = UCHCOM_IFACE_INDEX; 341 error = usbd_transfer_setup(uaa->device, 342 &iface_index, sc->sc_xfer, uchcom_config_data, 343 UCHCOM_N_TRANSFER, sc, &sc->sc_mtx); 344 345 if (error) { 346 DPRINTF("one or more missing USB endpoints, " 347 "error=%s\n", usbd_errstr(error)); 348 goto detach; 349 } 350 351 /* clear stall at first run */ 352 mtx_lock(&sc->sc_mtx); 353 usbd_xfer_set_zlp(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 354 mtx_unlock(&sc->sc_mtx); 355 356 error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc, 357 &uchcom_callback, &sc->sc_mtx); 358 if (error) { 359 goto detach; 360 } 361 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev); 362 363 return (0); 364 365 detach: 366 uchcom_detach(dev); 367 return (ENXIO); 368 } 369 370 static int 371 uchcom_detach(device_t dev) 372 { 373 struct uchcom_softc *sc = device_get_softc(dev); 374 375 DPRINTFN(11, "\n"); 376 377 ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom); 378 usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER); 379 380 device_claim_softc(dev); 381 382 uchcom_free_softc(sc); 383 384 return (0); 385 } 386 387 UCOM_UNLOAD_DRAIN(uchcom); 388 389 static void 390 uchcom_free_softc(struct uchcom_softc *sc) 391 { 392 if (ucom_unref(&sc->sc_super_ucom)) { 393 mtx_destroy(&sc->sc_mtx); 394 device_free_softc(sc); 395 } 396 } 397 398 static void 399 uchcom_free(struct ucom_softc *ucom) 400 { 401 uchcom_free_softc(ucom->sc_parent); 402 } 403 404 /* ---------------------------------------------------------------------- 405 * low level i/o 406 */ 407 408 static void 409 uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno, 410 uint16_t value, uint16_t index) 411 { 412 struct usb_device_request req; 413 414 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 415 req.bRequest = reqno; 416 USETW(req.wValue, value); 417 USETW(req.wIndex, index); 418 USETW(req.wLength, 0); 419 420 DPRINTF("WR REQ 0x%02X VAL 0x%04X IDX 0x%04X\n", 421 reqno, value, index); 422 ucom_cfg_do_request(sc->sc_udev, 423 &sc->sc_ucom, &req, NULL, 0, 1000); 424 } 425 426 static void 427 uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno, 428 uint16_t value, uint16_t index, void *buf, uint16_t buflen) 429 { 430 struct usb_device_request req; 431 432 req.bmRequestType = UT_READ_VENDOR_DEVICE; 433 req.bRequest = reqno; 434 USETW(req.wValue, value); 435 USETW(req.wIndex, index); 436 USETW(req.wLength, buflen); 437 438 DPRINTF("RD REQ 0x%02X VAL 0x%04X IDX 0x%04X LEN %d\n", 439 reqno, value, index, buflen); 440 ucom_cfg_do_request(sc->sc_udev, 441 &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000); 442 } 443 444 static void 445 uchcom_write_reg(struct uchcom_softc *sc, 446 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2) 447 { 448 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n", 449 (unsigned)reg1, (unsigned)val1, 450 (unsigned)reg2, (unsigned)val2); 451 uchcom_ctrl_write( 452 sc, UCHCOM_REQ_WRITE_REG, 453 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8)); 454 } 455 456 static void 457 uchcom_read_reg(struct uchcom_softc *sc, 458 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2) 459 { 460 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 461 462 uchcom_ctrl_read( 463 sc, UCHCOM_REQ_READ_REG, 464 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf)); 465 466 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n", 467 (unsigned)reg1, (unsigned)buf[0], 468 (unsigned)reg2, (unsigned)buf[1]); 469 470 if (rval1) 471 *rval1 = buf[0]; 472 if (rval2) 473 *rval2 = buf[1]; 474 } 475 476 static void 477 uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver) 478 { 479 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 480 481 uchcom_ctrl_read(sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf)); 482 483 if (rver) 484 *rver = buf[0]; 485 } 486 487 static void 488 uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval) 489 { 490 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL); 491 } 492 493 static void 494 uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val) 495 { 496 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val); 497 } 498 499 static void 500 uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val) 501 { 502 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0); 503 } 504 505 /* ---------------------------------------------------------------------- 506 * middle layer 507 */ 508 509 static void 510 uchcom_update_version(struct uchcom_softc *sc) 511 { 512 uchcom_get_version(sc, &sc->sc_version); 513 DPRINTF("Chip version: 0x%02x\n", sc->sc_version); 514 } 515 516 static void 517 uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur) 518 { 519 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK); 520 sc->sc_rts = !(cur & UCHCOM_RTS_MASK); 521 522 cur = ~cur & 0x0F; 523 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur); 524 } 525 526 static void 527 uchcom_update_status(struct uchcom_softc *sc) 528 { 529 uint8_t cur; 530 531 uchcom_get_status(sc, &cur); 532 uchcom_convert_status(sc, cur); 533 } 534 535 static void 536 uchcom_set_dtr_rts(struct uchcom_softc *sc) 537 { 538 uint8_t val = 0; 539 540 if (sc->sc_dtr) 541 val |= UCHCOM_DTR_MASK; 542 if (sc->sc_rts) 543 val |= UCHCOM_RTS_MASK; 544 545 if (sc->sc_version < UCHCOM_VER_20) 546 uchcom_set_dtr_rts_10(sc, ~val); 547 else 548 uchcom_set_dtr_rts_20(sc, ~val); 549 } 550 551 static void 552 uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 553 { 554 struct uchcom_softc *sc = ucom->sc_parent; 555 uint8_t brk1; 556 uint8_t brk2; 557 558 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_LCR1, &brk2); 559 if (onoff) { 560 /* on - clear bits */ 561 brk1 &= ~UCHCOM_BRK_MASK; 562 brk2 &= ~UCHCOM_LCR1_TX; 563 } else { 564 /* off - set bits */ 565 brk1 |= UCHCOM_BRK_MASK; 566 brk2 |= UCHCOM_LCR1_TX; 567 } 568 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_LCR1, brk2); 569 } 570 571 static int 572 uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate) 573 { 574 const struct uchcom_divider_record *rp; 575 uint32_t div; 576 uint32_t rem; 577 uint32_t mod; 578 uint8_t i; 579 580 /* find record */ 581 for (i = 0; i != NUM_DIVIDERS; i++) { 582 if (dividers[i].dvr_high >= rate && 583 dividers[i].dvr_low <= rate) { 584 rp = ÷rs[i]; 585 goto found; 586 } 587 } 588 return (-1); 589 590 found: 591 dp->dv_prescaler = rp->dvr_divider.dv_prescaler; 592 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN) 593 dp->dv_div = rp->dvr_divider.dv_div; 594 else { 595 div = rp->dvr_base_clock / rate; 596 rem = rp->dvr_base_clock % rate; 597 if (div == 0 || div >= 0xFF) 598 return (-1); 599 if ((rem << 1) >= rate) 600 div += 1; 601 dp->dv_div = (uint8_t)-div; 602 } 603 604 mod = (UCHCOM_BPS_MOD_BASE / rate) + UCHCOM_BPS_MOD_BASE_OFS; 605 mod = mod + (mod / 2); 606 607 dp->dv_mod = (mod + 0xFF) / 0x100; 608 609 return (0); 610 } 611 612 static void 613 uchcom_set_baudrate(struct uchcom_softc *sc, uint32_t rate) 614 { 615 struct uchcom_divider dv; 616 617 if (uchcom_calc_divider_settings(&dv, rate)) 618 return; 619 620 /* 621 * According to linux code we need to set bit 7 of UCHCOM_REG_BPS_PRE, 622 * otherwise the chip will buffer data. 623 */ 624 uchcom_write_reg(sc, 625 UCHCOM_REG_BPS_PRE, dv.dv_prescaler | 0x80, 626 UCHCOM_REG_BPS_DIV, dv.dv_div); 627 uchcom_write_reg(sc, 628 UCHCOM_REG_BPS_MOD, dv.dv_mod, 629 UCHCOM_REG_BPS_PAD, 0); 630 } 631 632 /* ---------------------------------------------------------------------- 633 * methods for ucom 634 */ 635 static void 636 uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 637 { 638 struct uchcom_softc *sc = ucom->sc_parent; 639 640 DPRINTF("\n"); 641 642 /* XXX Note: sc_lsr is always zero */ 643 *lsr = sc->sc_lsr; 644 *msr = sc->sc_msr; 645 } 646 647 static void 648 uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 649 { 650 struct uchcom_softc *sc = ucom->sc_parent; 651 652 DPRINTF("onoff = %d\n", onoff); 653 654 sc->sc_dtr = onoff; 655 uchcom_set_dtr_rts(sc); 656 } 657 658 static void 659 uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 660 { 661 struct uchcom_softc *sc = ucom->sc_parent; 662 663 DPRINTF("onoff = %d\n", onoff); 664 665 sc->sc_rts = onoff; 666 uchcom_set_dtr_rts(sc); 667 } 668 669 static void 670 uchcom_cfg_open(struct ucom_softc *ucom) 671 { 672 struct uchcom_softc *sc = ucom->sc_parent; 673 674 DPRINTF("\n"); 675 676 uchcom_update_version(sc); 677 uchcom_update_status(sc); 678 } 679 680 static int 681 uchcom_pre_param(struct ucom_softc *ucom, struct termios *t) 682 { 683 struct uchcom_divider dv; 684 685 switch (t->c_cflag & CSIZE) { 686 case CS8: 687 break; 688 default: 689 return (EIO); 690 } 691 if ((t->c_cflag & CSTOPB) != 0) 692 return (EIO); 693 if ((t->c_cflag & PARENB) != 0) 694 return (EIO); 695 696 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) { 697 return (EIO); 698 } 699 return (0); /* success */ 700 } 701 702 static void 703 uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t) 704 { 705 struct uchcom_softc *sc = ucom->sc_parent; 706 707 uchcom_get_version(sc, NULL); 708 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0); 709 uchcom_set_baudrate(sc, t->c_ospeed); 710 if (sc->sc_version < UCHCOM_VER_30) { 711 uchcom_read_reg(sc, UCHCOM_REG_LCR1, NULL, 712 UCHCOM_REG_LCR2, NULL); 713 uchcom_write_reg(sc, UCHCOM_REG_LCR1, 0x50, 714 UCHCOM_REG_LCR2, 0x00); 715 } else { 716 /* 717 * Set up line control: 718 * - enable transmit and receive 719 * - set 8n1 mode 720 * To do: support other sizes, parity, stop bits. 721 */ 722 uchcom_write_reg(sc, 723 UCHCOM_REG_LCR1, 724 UCHCOM_LCR1_RX | UCHCOM_LCR1_TX | UCHCOM_LCR1_CS8, 725 UCHCOM_REG_LCR2, 0x00); 726 } 727 uchcom_update_status(sc); 728 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0x501f, 0xd90a); 729 uchcom_set_baudrate(sc, t->c_ospeed); 730 uchcom_set_dtr_rts(sc); 731 uchcom_update_status(sc); 732 } 733 734 static void 735 uchcom_start_read(struct ucom_softc *ucom) 736 { 737 struct uchcom_softc *sc = ucom->sc_parent; 738 739 /* start interrupt endpoint */ 740 usbd_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 741 742 /* start read endpoint */ 743 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 744 } 745 746 static void 747 uchcom_stop_read(struct ucom_softc *ucom) 748 { 749 struct uchcom_softc *sc = ucom->sc_parent; 750 751 /* stop interrupt endpoint */ 752 usbd_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 753 754 /* stop read endpoint */ 755 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 756 } 757 758 static void 759 uchcom_start_write(struct ucom_softc *ucom) 760 { 761 struct uchcom_softc *sc = ucom->sc_parent; 762 763 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 764 } 765 766 static void 767 uchcom_stop_write(struct ucom_softc *ucom) 768 { 769 struct uchcom_softc *sc = ucom->sc_parent; 770 771 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 772 } 773 774 /* ---------------------------------------------------------------------- 775 * callback when the modem status is changed. 776 */ 777 static void 778 uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error) 779 { 780 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 781 struct usb_page_cache *pc; 782 uint8_t buf[UCHCOM_INTR_LEAST]; 783 int actlen; 784 785 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 786 787 switch (USB_GET_STATE(xfer)) { 788 case USB_ST_TRANSFERRED: 789 790 DPRINTF("actlen = %u\n", actlen); 791 792 if (actlen >= UCHCOM_INTR_LEAST) { 793 pc = usbd_xfer_get_frame(xfer, 0); 794 usbd_copy_out(pc, 0, buf, UCHCOM_INTR_LEAST); 795 796 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n", 797 (unsigned)buf[0], (unsigned)buf[1], 798 (unsigned)buf[2], (unsigned)buf[3]); 799 800 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]); 801 ucom_status_change(&sc->sc_ucom); 802 } 803 case USB_ST_SETUP: 804 tr_setup: 805 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 806 usbd_transfer_submit(xfer); 807 break; 808 809 default: /* Error */ 810 if (error != USB_ERR_CANCELLED) { 811 /* try to clear stall first */ 812 usbd_xfer_set_stall(xfer); 813 goto tr_setup; 814 } 815 break; 816 } 817 } 818 819 static void 820 uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error) 821 { 822 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 823 struct usb_page_cache *pc; 824 uint32_t actlen; 825 826 switch (USB_GET_STATE(xfer)) { 827 case USB_ST_SETUP: 828 case USB_ST_TRANSFERRED: 829 tr_setup: 830 if (usbd_xfer_get_and_clr_zlp(xfer)) 831 break; 832 833 pc = usbd_xfer_get_frame(xfer, 0); 834 if (ucom_get_data(&sc->sc_ucom, pc, 0, 835 usbd_xfer_max_len(xfer), &actlen)) { 836 DPRINTF("actlen = %d\n", actlen); 837 838 usbd_xfer_set_frame_len(xfer, 0, actlen); 839 usbd_transfer_submit(xfer); 840 } 841 break; 842 843 default: /* Error */ 844 if (error != USB_ERR_CANCELLED) { 845 /* try to clear stall first */ 846 usbd_xfer_set_stall(xfer); 847 goto tr_setup; 848 } 849 break; 850 } 851 } 852 853 static void 854 uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error) 855 { 856 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 857 struct usb_page_cache *pc; 858 int actlen; 859 860 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 861 862 switch (USB_GET_STATE(xfer)) { 863 case USB_ST_TRANSFERRED: 864 865 if (actlen > 0) { 866 pc = usbd_xfer_get_frame(xfer, 0); 867 ucom_put_data(&sc->sc_ucom, pc, 0, actlen); 868 } 869 870 case USB_ST_SETUP: 871 tr_setup: 872 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 873 usbd_transfer_submit(xfer); 874 break; 875 876 default: /* Error */ 877 if (error != USB_ERR_CANCELLED) { 878 /* try to clear stall first */ 879 usbd_xfer_set_stall(xfer); 880 goto tr_setup; 881 } 882 break; 883 } 884 } 885 886 static void 887 uchcom_poll(struct ucom_softc *ucom) 888 { 889 struct uchcom_softc *sc = ucom->sc_parent; 890 usbd_transfer_poll(sc->sc_xfer, UCHCOM_N_TRANSFER); 891 } 892 893 static device_method_t uchcom_methods[] = { 894 /* Device interface */ 895 DEVMETHOD(device_probe, uchcom_probe), 896 DEVMETHOD(device_attach, uchcom_attach), 897 DEVMETHOD(device_detach, uchcom_detach), 898 DEVMETHOD_END 899 }; 900 901 static driver_t uchcom_driver = { 902 .name = "uchcom", 903 .methods = uchcom_methods, 904 .size = sizeof(struct uchcom_softc) 905 }; 906 907 static devclass_t uchcom_devclass; 908 909 DRIVER_MODULE(uchcom, uhub, uchcom_driver, uchcom_devclass, NULL, 0); 910 MODULE_DEPEND(uchcom, ucom, 1, 1, 1); 911 MODULE_DEPEND(uchcom, usb, 1, 1, 1); 912 MODULE_VERSION(uchcom, 1); 913 USB_PNP_HOST_INFO(uchcom_devs); 914