1 /* $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause-NetBSD 5 * 6 * Copyright (c) 2007, Takanori Watanabe 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * Copyright (c) 2007 The NetBSD Foundation, Inc. 33 * All rights reserved. 34 * 35 * This code is derived from software contributed to The NetBSD Foundation 36 * by Takuya SHIOZAKI (tshiozak@netbsd.org). 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 48 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 51 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 54 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 #include <sys/cdefs.h> 61 __FBSDID("$FreeBSD$"); 62 63 /* 64 * Driver for WinChipHead CH341/340, the worst USB-serial chip in the 65 * world. 66 */ 67 68 #include <sys/stdint.h> 69 #include <sys/stddef.h> 70 #include <sys/param.h> 71 #include <sys/queue.h> 72 #include <sys/types.h> 73 #include <sys/systm.h> 74 #include <sys/kernel.h> 75 #include <sys/bus.h> 76 #include <sys/module.h> 77 #include <sys/lock.h> 78 #include <sys/mutex.h> 79 #include <sys/condvar.h> 80 #include <sys/sysctl.h> 81 #include <sys/sx.h> 82 #include <sys/unistd.h> 83 #include <sys/callout.h> 84 #include <sys/malloc.h> 85 #include <sys/priv.h> 86 87 #include <dev/usb/usb.h> 88 #include <dev/usb/usbdi.h> 89 #include <dev/usb/usbdi_util.h> 90 #include "usbdevs.h" 91 92 #define USB_DEBUG_VAR uchcom_debug 93 #include <dev/usb/usb_debug.h> 94 #include <dev/usb/usb_process.h> 95 96 #include <dev/usb/serial/usb_serial.h> 97 98 #ifdef USB_DEBUG 99 static int uchcom_debug = 0; 100 101 static SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW, 0, "USB uchcom"); 102 SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RWTUN, 103 &uchcom_debug, 0, "uchcom debug level"); 104 #endif 105 106 #define UCHCOM_IFACE_INDEX 0 107 #define UCHCOM_CONFIG_INDEX 0 108 109 #define UCHCOM_REV_CH340 0x0250 110 #define UCHCOM_INPUT_BUF_SIZE 8 111 112 #define UCHCOM_REQ_GET_VERSION 0x5F 113 #define UCHCOM_REQ_READ_REG 0x95 114 #define UCHCOM_REQ_WRITE_REG 0x9A 115 #define UCHCOM_REQ_RESET 0xA1 116 #define UCHCOM_REQ_SET_DTRRTS 0xA4 117 118 #define UCHCOM_REG_STAT1 0x06 119 #define UCHCOM_REG_STAT2 0x07 120 #define UCHCOM_REG_BPS_PRE 0x12 121 #define UCHCOM_REG_BPS_DIV 0x13 122 #define UCHCOM_REG_BPS_MOD 0x14 123 #define UCHCOM_REG_BPS_PAD 0x0F 124 #define UCHCOM_REG_BREAK1 0x05 125 #define UCHCOM_REG_LCR1 0x18 126 #define UCHCOM_REG_LCR2 0x25 127 128 #define UCHCOM_VER_20 0x20 129 #define UCHCOM_VER_30 0x30 130 131 #define UCHCOM_BASE_UNKNOWN 0 132 #define UCHCOM_BPS_MOD_BASE 20000000 133 #define UCHCOM_BPS_MOD_BASE_OFS 1100 134 135 #define UCHCOM_DTR_MASK 0x20 136 #define UCHCOM_RTS_MASK 0x40 137 138 #define UCHCOM_BRK_MASK 0x01 139 140 #define UCHCOM_LCR1_MASK 0xAF 141 #define UCHCOM_LCR2_MASK 0x07 142 #define UCHCOM_LCR1_RX 0x80 143 #define UCHCOM_LCR1_TX 0x40 144 #define UCHCOM_LCR1_PARENB 0x08 145 #define UCHCOM_LCR1_CS8 0x03 146 #define UCHCOM_LCR2_PAREVEN 0x07 147 #define UCHCOM_LCR2_PARODD 0x06 148 #define UCHCOM_LCR2_PARMARK 0x05 149 #define UCHCOM_LCR2_PARSPACE 0x04 150 151 #define UCHCOM_INTR_STAT1 0x02 152 #define UCHCOM_INTR_STAT2 0x03 153 #define UCHCOM_INTR_LEAST 4 154 155 #define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */ 156 157 enum { 158 UCHCOM_BULK_DT_WR, 159 UCHCOM_BULK_DT_RD, 160 UCHCOM_INTR_DT_RD, 161 UCHCOM_N_TRANSFER, 162 }; 163 164 struct uchcom_softc { 165 struct ucom_super_softc sc_super_ucom; 166 struct ucom_softc sc_ucom; 167 168 struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER]; 169 struct usb_device *sc_udev; 170 struct mtx sc_mtx; 171 172 uint8_t sc_dtr; /* local copy */ 173 uint8_t sc_rts; /* local copy */ 174 uint8_t sc_version; 175 uint8_t sc_msr; 176 uint8_t sc_lsr; /* local status register */ 177 }; 178 179 struct uchcom_divider { 180 uint8_t dv_prescaler; 181 uint8_t dv_div; 182 uint8_t dv_mod; 183 }; 184 185 struct uchcom_divider_record { 186 uint32_t dvr_high; 187 uint32_t dvr_low; 188 uint32_t dvr_base_clock; 189 struct uchcom_divider dvr_divider; 190 }; 191 192 static const struct uchcom_divider_record dividers[] = 193 { 194 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}}, 195 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}}, 196 {2999999, 23530, 6000000, {3, 0, 0}}, 197 {23529, 2942, 750000, {2, 0, 0}}, 198 {2941, 368, 93750, {1, 0, 0}}, 199 {367, 1, 11719, {0, 0, 0}}, 200 }; 201 202 #define NUM_DIVIDERS nitems(dividers) 203 204 static const STRUCT_USB_HOST_ID uchcom_devs[] = { 205 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)}, 206 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER, 0)}, 207 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER_2, 0)}, 208 }; 209 210 /* protypes */ 211 212 static void uchcom_free(struct ucom_softc *); 213 static int uchcom_pre_param(struct ucom_softc *, struct termios *); 214 static void uchcom_cfg_get_status(struct ucom_softc *, uint8_t *, 215 uint8_t *); 216 static void uchcom_cfg_open(struct ucom_softc *ucom); 217 static void uchcom_cfg_param(struct ucom_softc *, struct termios *); 218 static void uchcom_cfg_set_break(struct ucom_softc *, uint8_t); 219 static void uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t); 220 static void uchcom_cfg_set_rts(struct ucom_softc *, uint8_t); 221 static void uchcom_start_read(struct ucom_softc *); 222 static void uchcom_start_write(struct ucom_softc *); 223 static void uchcom_stop_read(struct ucom_softc *); 224 static void uchcom_stop_write(struct ucom_softc *); 225 static void uchcom_update_version(struct uchcom_softc *); 226 static void uchcom_convert_status(struct uchcom_softc *, uint8_t); 227 static void uchcom_update_status(struct uchcom_softc *); 228 static void uchcom_set_dtr_rts(struct uchcom_softc *); 229 static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t); 230 static void uchcom_set_baudrate(struct uchcom_softc *, uint32_t); 231 static void uchcom_poll(struct ucom_softc *ucom); 232 233 static device_probe_t uchcom_probe; 234 static device_attach_t uchcom_attach; 235 static device_detach_t uchcom_detach; 236 static void uchcom_free_softc(struct uchcom_softc *); 237 238 static usb_callback_t uchcom_intr_callback; 239 static usb_callback_t uchcom_write_callback; 240 static usb_callback_t uchcom_read_callback; 241 242 static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = { 243 244 [UCHCOM_BULK_DT_WR] = { 245 .type = UE_BULK, 246 .endpoint = UE_ADDR_ANY, 247 .direction = UE_DIR_OUT, 248 .bufsize = UCHCOM_BULK_BUF_SIZE, 249 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 250 .callback = &uchcom_write_callback, 251 }, 252 253 [UCHCOM_BULK_DT_RD] = { 254 .type = UE_BULK, 255 .endpoint = UE_ADDR_ANY, 256 .direction = UE_DIR_IN, 257 .bufsize = UCHCOM_BULK_BUF_SIZE, 258 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 259 .callback = &uchcom_read_callback, 260 }, 261 262 [UCHCOM_INTR_DT_RD] = { 263 .type = UE_INTERRUPT, 264 .endpoint = UE_ADDR_ANY, 265 .direction = UE_DIR_IN, 266 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 267 .bufsize = 0, /* use wMaxPacketSize */ 268 .callback = &uchcom_intr_callback, 269 }, 270 }; 271 272 static struct ucom_callback uchcom_callback = { 273 .ucom_cfg_get_status = &uchcom_cfg_get_status, 274 .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr, 275 .ucom_cfg_set_rts = &uchcom_cfg_set_rts, 276 .ucom_cfg_set_break = &uchcom_cfg_set_break, 277 .ucom_cfg_open = &uchcom_cfg_open, 278 .ucom_cfg_param = &uchcom_cfg_param, 279 .ucom_pre_param = &uchcom_pre_param, 280 .ucom_start_read = &uchcom_start_read, 281 .ucom_stop_read = &uchcom_stop_read, 282 .ucom_start_write = &uchcom_start_write, 283 .ucom_stop_write = &uchcom_stop_write, 284 .ucom_poll = &uchcom_poll, 285 .ucom_free = &uchcom_free, 286 }; 287 288 /* ---------------------------------------------------------------------- 289 * driver entry points 290 */ 291 292 static int 293 uchcom_probe(device_t dev) 294 { 295 struct usb_attach_arg *uaa = device_get_ivars(dev); 296 297 DPRINTFN(11, "\n"); 298 299 if (uaa->usb_mode != USB_MODE_HOST) { 300 return (ENXIO); 301 } 302 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) { 303 return (ENXIO); 304 } 305 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) { 306 return (ENXIO); 307 } 308 return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa)); 309 } 310 311 static int 312 uchcom_attach(device_t dev) 313 { 314 struct uchcom_softc *sc = device_get_softc(dev); 315 struct usb_attach_arg *uaa = device_get_ivars(dev); 316 int error; 317 uint8_t iface_index; 318 319 DPRINTFN(11, "\n"); 320 321 device_set_usb_desc(dev); 322 mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF); 323 ucom_ref(&sc->sc_super_ucom); 324 325 sc->sc_udev = uaa->device; 326 327 switch (uaa->info.idProduct) { 328 case USB_PRODUCT_WCH2_CH341SER: 329 device_printf(dev, "CH340 detected\n"); 330 break; 331 case USB_PRODUCT_WCH2_CH341SER_2: 332 device_printf(dev, "CH341 detected\n"); 333 break; 334 default: 335 device_printf(dev, "New CH340/CH341 product 0x%04x detected\n", 336 uaa->info.idProduct); 337 break; 338 } 339 340 iface_index = UCHCOM_IFACE_INDEX; 341 error = usbd_transfer_setup(uaa->device, 342 &iface_index, sc->sc_xfer, uchcom_config_data, 343 UCHCOM_N_TRANSFER, sc, &sc->sc_mtx); 344 345 if (error) { 346 DPRINTF("one or more missing USB endpoints, " 347 "error=%s\n", usbd_errstr(error)); 348 goto detach; 349 } 350 351 /* clear stall at first run */ 352 mtx_lock(&sc->sc_mtx); 353 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 354 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 355 mtx_unlock(&sc->sc_mtx); 356 357 error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc, 358 &uchcom_callback, &sc->sc_mtx); 359 if (error) { 360 goto detach; 361 } 362 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev); 363 364 return (0); 365 366 detach: 367 uchcom_detach(dev); 368 return (ENXIO); 369 } 370 371 static int 372 uchcom_detach(device_t dev) 373 { 374 struct uchcom_softc *sc = device_get_softc(dev); 375 376 DPRINTFN(11, "\n"); 377 378 ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom); 379 usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER); 380 381 device_claim_softc(dev); 382 383 uchcom_free_softc(sc); 384 385 return (0); 386 } 387 388 UCOM_UNLOAD_DRAIN(uchcom); 389 390 static void 391 uchcom_free_softc(struct uchcom_softc *sc) 392 { 393 if (ucom_unref(&sc->sc_super_ucom)) { 394 mtx_destroy(&sc->sc_mtx); 395 device_free_softc(sc); 396 } 397 } 398 399 static void 400 uchcom_free(struct ucom_softc *ucom) 401 { 402 uchcom_free_softc(ucom->sc_parent); 403 } 404 405 /* ---------------------------------------------------------------------- 406 * low level i/o 407 */ 408 409 static void 410 uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno, 411 uint16_t value, uint16_t index) 412 { 413 struct usb_device_request req; 414 415 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 416 req.bRequest = reqno; 417 USETW(req.wValue, value); 418 USETW(req.wIndex, index); 419 USETW(req.wLength, 0); 420 421 DPRINTF("WR REQ 0x%02X VAL 0x%04X IDX 0x%04X\n", 422 reqno, value, index); 423 ucom_cfg_do_request(sc->sc_udev, 424 &sc->sc_ucom, &req, NULL, 0, 1000); 425 } 426 427 static void 428 uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno, 429 uint16_t value, uint16_t index, void *buf, uint16_t buflen) 430 { 431 struct usb_device_request req; 432 433 req.bmRequestType = UT_READ_VENDOR_DEVICE; 434 req.bRequest = reqno; 435 USETW(req.wValue, value); 436 USETW(req.wIndex, index); 437 USETW(req.wLength, buflen); 438 439 DPRINTF("RD REQ 0x%02X VAL 0x%04X IDX 0x%04X LEN %d\n", 440 reqno, value, index, buflen); 441 ucom_cfg_do_request(sc->sc_udev, 442 &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000); 443 } 444 445 static void 446 uchcom_write_reg(struct uchcom_softc *sc, 447 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2) 448 { 449 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n", 450 (unsigned)reg1, (unsigned)val1, 451 (unsigned)reg2, (unsigned)val2); 452 uchcom_ctrl_write( 453 sc, UCHCOM_REQ_WRITE_REG, 454 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8)); 455 } 456 457 static void 458 uchcom_read_reg(struct uchcom_softc *sc, 459 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2) 460 { 461 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 462 463 uchcom_ctrl_read( 464 sc, UCHCOM_REQ_READ_REG, 465 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf)); 466 467 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n", 468 (unsigned)reg1, (unsigned)buf[0], 469 (unsigned)reg2, (unsigned)buf[1]); 470 471 if (rval1) 472 *rval1 = buf[0]; 473 if (rval2) 474 *rval2 = buf[1]; 475 } 476 477 static void 478 uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver) 479 { 480 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 481 482 uchcom_ctrl_read(sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf)); 483 484 if (rver) 485 *rver = buf[0]; 486 } 487 488 static void 489 uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval) 490 { 491 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL); 492 } 493 494 static void 495 uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val) 496 { 497 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val); 498 } 499 500 static void 501 uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val) 502 { 503 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0); 504 } 505 506 507 /* ---------------------------------------------------------------------- 508 * middle layer 509 */ 510 511 static void 512 uchcom_update_version(struct uchcom_softc *sc) 513 { 514 uchcom_get_version(sc, &sc->sc_version); 515 DPRINTF("Chip version: 0x%02x\n", sc->sc_version); 516 } 517 518 static void 519 uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur) 520 { 521 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK); 522 sc->sc_rts = !(cur & UCHCOM_RTS_MASK); 523 524 cur = ~cur & 0x0F; 525 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur); 526 } 527 528 static void 529 uchcom_update_status(struct uchcom_softc *sc) 530 { 531 uint8_t cur; 532 533 uchcom_get_status(sc, &cur); 534 uchcom_convert_status(sc, cur); 535 } 536 537 538 static void 539 uchcom_set_dtr_rts(struct uchcom_softc *sc) 540 { 541 uint8_t val = 0; 542 543 if (sc->sc_dtr) 544 val |= UCHCOM_DTR_MASK; 545 if (sc->sc_rts) 546 val |= UCHCOM_RTS_MASK; 547 548 if (sc->sc_version < UCHCOM_VER_20) 549 uchcom_set_dtr_rts_10(sc, ~val); 550 else 551 uchcom_set_dtr_rts_20(sc, ~val); 552 } 553 554 static void 555 uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 556 { 557 struct uchcom_softc *sc = ucom->sc_parent; 558 uint8_t brk1; 559 uint8_t brk2; 560 561 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_LCR1, &brk2); 562 if (onoff) { 563 /* on - clear bits */ 564 brk1 &= ~UCHCOM_BRK_MASK; 565 brk2 &= ~UCHCOM_LCR1_TX; 566 } else { 567 /* off - set bits */ 568 brk1 |= UCHCOM_BRK_MASK; 569 brk2 |= UCHCOM_LCR1_TX; 570 } 571 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_LCR1, brk2); 572 } 573 574 static int 575 uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate) 576 { 577 const struct uchcom_divider_record *rp; 578 uint32_t div; 579 uint32_t rem; 580 uint32_t mod; 581 uint8_t i; 582 583 /* find record */ 584 for (i = 0; i != NUM_DIVIDERS; i++) { 585 if (dividers[i].dvr_high >= rate && 586 dividers[i].dvr_low <= rate) { 587 rp = ÷rs[i]; 588 goto found; 589 } 590 } 591 return (-1); 592 593 found: 594 dp->dv_prescaler = rp->dvr_divider.dv_prescaler; 595 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN) 596 dp->dv_div = rp->dvr_divider.dv_div; 597 else { 598 div = rp->dvr_base_clock / rate; 599 rem = rp->dvr_base_clock % rate; 600 if (div == 0 || div >= 0xFF) 601 return (-1); 602 if ((rem << 1) >= rate) 603 div += 1; 604 dp->dv_div = (uint8_t)-div; 605 } 606 607 mod = (UCHCOM_BPS_MOD_BASE / rate) + UCHCOM_BPS_MOD_BASE_OFS; 608 mod = mod + (mod / 2); 609 610 dp->dv_mod = (mod + 0xFF) / 0x100; 611 612 return (0); 613 } 614 615 static void 616 uchcom_set_baudrate(struct uchcom_softc *sc, uint32_t rate) 617 { 618 struct uchcom_divider dv; 619 620 if (uchcom_calc_divider_settings(&dv, rate)) 621 return; 622 623 /* 624 * According to linux code we need to set bit 7 of UCHCOM_REG_BPS_PRE, 625 * otherwise the chip will buffer data. 626 */ 627 uchcom_write_reg(sc, 628 UCHCOM_REG_BPS_PRE, dv.dv_prescaler | 0x80, 629 UCHCOM_REG_BPS_DIV, dv.dv_div); 630 uchcom_write_reg(sc, 631 UCHCOM_REG_BPS_MOD, dv.dv_mod, 632 UCHCOM_REG_BPS_PAD, 0); 633 } 634 635 /* ---------------------------------------------------------------------- 636 * methods for ucom 637 */ 638 static void 639 uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 640 { 641 struct uchcom_softc *sc = ucom->sc_parent; 642 643 DPRINTF("\n"); 644 645 /* XXX Note: sc_lsr is always zero */ 646 *lsr = sc->sc_lsr; 647 *msr = sc->sc_msr; 648 } 649 650 static void 651 uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 652 { 653 struct uchcom_softc *sc = ucom->sc_parent; 654 655 DPRINTF("onoff = %d\n", onoff); 656 657 sc->sc_dtr = onoff; 658 uchcom_set_dtr_rts(sc); 659 } 660 661 static void 662 uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 663 { 664 struct uchcom_softc *sc = ucom->sc_parent; 665 666 DPRINTF("onoff = %d\n", onoff); 667 668 sc->sc_rts = onoff; 669 uchcom_set_dtr_rts(sc); 670 } 671 672 static void 673 uchcom_cfg_open(struct ucom_softc *ucom) 674 { 675 struct uchcom_softc *sc = ucom->sc_parent; 676 677 DPRINTF("\n"); 678 679 uchcom_update_version(sc); 680 uchcom_update_status(sc); 681 } 682 683 static int 684 uchcom_pre_param(struct ucom_softc *ucom, struct termios *t) 685 { 686 struct uchcom_divider dv; 687 688 switch (t->c_cflag & CSIZE) { 689 case CS8: 690 break; 691 default: 692 return (EIO); 693 } 694 if ((t->c_cflag & CSTOPB) != 0) 695 return (EIO); 696 if ((t->c_cflag & PARENB) != 0) 697 return (EIO); 698 699 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) { 700 return (EIO); 701 } 702 return (0); /* success */ 703 } 704 705 static void 706 uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t) 707 { 708 struct uchcom_softc *sc = ucom->sc_parent; 709 710 uchcom_get_version(sc, NULL); 711 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0); 712 uchcom_set_baudrate(sc, t->c_ospeed); 713 if (sc->sc_version < UCHCOM_VER_30) { 714 uchcom_read_reg(sc, UCHCOM_REG_LCR1, NULL, 715 UCHCOM_REG_LCR2, NULL); 716 uchcom_write_reg(sc, UCHCOM_REG_LCR1, 0x50, 717 UCHCOM_REG_LCR2, 0x00); 718 } else { 719 /* 720 * Set up line control: 721 * - enable transmit and receive 722 * - set 8n1 mode 723 * To do: support other sizes, parity, stop bits. 724 */ 725 uchcom_write_reg(sc, 726 UCHCOM_REG_LCR1, 727 UCHCOM_LCR1_RX | UCHCOM_LCR1_TX | UCHCOM_LCR1_CS8, 728 UCHCOM_REG_LCR2, 0x00); 729 } 730 uchcom_update_status(sc); 731 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0x501f, 0xd90a); 732 uchcom_set_baudrate(sc, t->c_ospeed); 733 uchcom_set_dtr_rts(sc); 734 uchcom_update_status(sc); 735 } 736 737 static void 738 uchcom_start_read(struct ucom_softc *ucom) 739 { 740 struct uchcom_softc *sc = ucom->sc_parent; 741 742 /* start interrupt endpoint */ 743 usbd_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 744 745 /* start read endpoint */ 746 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 747 } 748 749 static void 750 uchcom_stop_read(struct ucom_softc *ucom) 751 { 752 struct uchcom_softc *sc = ucom->sc_parent; 753 754 /* stop interrupt endpoint */ 755 usbd_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 756 757 /* stop read endpoint */ 758 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 759 } 760 761 static void 762 uchcom_start_write(struct ucom_softc *ucom) 763 { 764 struct uchcom_softc *sc = ucom->sc_parent; 765 766 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 767 } 768 769 static void 770 uchcom_stop_write(struct ucom_softc *ucom) 771 { 772 struct uchcom_softc *sc = ucom->sc_parent; 773 774 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 775 } 776 777 /* ---------------------------------------------------------------------- 778 * callback when the modem status is changed. 779 */ 780 static void 781 uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error) 782 { 783 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 784 struct usb_page_cache *pc; 785 uint8_t buf[UCHCOM_INTR_LEAST]; 786 int actlen; 787 788 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 789 790 switch (USB_GET_STATE(xfer)) { 791 case USB_ST_TRANSFERRED: 792 793 DPRINTF("actlen = %u\n", actlen); 794 795 if (actlen >= UCHCOM_INTR_LEAST) { 796 pc = usbd_xfer_get_frame(xfer, 0); 797 usbd_copy_out(pc, 0, buf, UCHCOM_INTR_LEAST); 798 799 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n", 800 (unsigned)buf[0], (unsigned)buf[1], 801 (unsigned)buf[2], (unsigned)buf[3]); 802 803 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]); 804 ucom_status_change(&sc->sc_ucom); 805 } 806 case USB_ST_SETUP: 807 tr_setup: 808 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 809 usbd_transfer_submit(xfer); 810 break; 811 812 default: /* Error */ 813 if (error != USB_ERR_CANCELLED) { 814 /* try to clear stall first */ 815 usbd_xfer_set_stall(xfer); 816 goto tr_setup; 817 } 818 break; 819 } 820 } 821 822 static void 823 uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error) 824 { 825 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 826 struct usb_page_cache *pc; 827 uint32_t actlen; 828 829 switch (USB_GET_STATE(xfer)) { 830 case USB_ST_SETUP: 831 case USB_ST_TRANSFERRED: 832 tr_setup: 833 pc = usbd_xfer_get_frame(xfer, 0); 834 if (ucom_get_data(&sc->sc_ucom, pc, 0, 835 usbd_xfer_max_len(xfer), &actlen)) { 836 837 DPRINTF("actlen = %d\n", actlen); 838 839 usbd_xfer_set_frame_len(xfer, 0, actlen); 840 usbd_transfer_submit(xfer); 841 } 842 break; 843 844 default: /* Error */ 845 if (error != USB_ERR_CANCELLED) { 846 /* try to clear stall first */ 847 usbd_xfer_set_stall(xfer); 848 goto tr_setup; 849 } 850 break; 851 } 852 } 853 854 static void 855 uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error) 856 { 857 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 858 struct usb_page_cache *pc; 859 int actlen; 860 861 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 862 863 switch (USB_GET_STATE(xfer)) { 864 case USB_ST_TRANSFERRED: 865 866 if (actlen > 0) { 867 pc = usbd_xfer_get_frame(xfer, 0); 868 ucom_put_data(&sc->sc_ucom, pc, 0, actlen); 869 } 870 871 case USB_ST_SETUP: 872 tr_setup: 873 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 874 usbd_transfer_submit(xfer); 875 break; 876 877 default: /* Error */ 878 if (error != USB_ERR_CANCELLED) { 879 /* try to clear stall first */ 880 usbd_xfer_set_stall(xfer); 881 goto tr_setup; 882 } 883 break; 884 } 885 } 886 887 static void 888 uchcom_poll(struct ucom_softc *ucom) 889 { 890 struct uchcom_softc *sc = ucom->sc_parent; 891 usbd_transfer_poll(sc->sc_xfer, UCHCOM_N_TRANSFER); 892 } 893 894 static device_method_t uchcom_methods[] = { 895 /* Device interface */ 896 DEVMETHOD(device_probe, uchcom_probe), 897 DEVMETHOD(device_attach, uchcom_attach), 898 DEVMETHOD(device_detach, uchcom_detach), 899 DEVMETHOD_END 900 }; 901 902 static driver_t uchcom_driver = { 903 .name = "uchcom", 904 .methods = uchcom_methods, 905 .size = sizeof(struct uchcom_softc) 906 }; 907 908 static devclass_t uchcom_devclass; 909 910 DRIVER_MODULE(uchcom, uhub, uchcom_driver, uchcom_devclass, NULL, 0); 911 MODULE_DEPEND(uchcom, ucom, 1, 1, 1); 912 MODULE_DEPEND(uchcom, usb, 1, 1, 1); 913 MODULE_VERSION(uchcom, 1); 914 USB_PNP_HOST_INFO(uchcom_devs); 915