1 /* $NetBSD: if_udavreg.h,v 1.2 2003/09/04 15:17:39 tsutsui Exp $ */ 2 /* $nabe: if_udavreg.h,v 1.2 2003/08/21 16:26:40 nabe Exp $ */ 3 /* $FreeBSD$ */ 4 /*- 5 * Copyright (c) 2003 6 * Shingo WATANABE <nabe@nabechan.org>. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 */ 33 34 #define UDAV_IFACE_INDEX 0 35 #define UDAV_CONFIG_INDEX 0 /* config number 1 */ 36 37 #define UDAV_TX_TIMEOUT 1000 38 #define UDAV_TIMEOUT 10000 39 40 #define UDAV_TX_TIMEOUT 1000 41 #define UDAV_TIMEOUT 10000 42 43 /* Packet length */ 44 #define UDAV_MIN_FRAME_LEN 60 45 46 /* Request */ 47 #define UDAV_REQ_REG_READ 0x00 /* Read from register(s) */ 48 #define UDAV_REQ_REG_WRITE 0x01 /* Write to register(s) */ 49 #define UDAV_REQ_REG_WRITE1 0x03 /* Write to a register */ 50 51 #define UDAV_REQ_MEM_READ 0x02 /* Read from memory */ 52 #define UDAV_REQ_MEM_WRITE 0x05 /* Write to memory */ 53 #define UDAV_REQ_MEM_WRITE1 0x07 /* Write a byte to memory */ 54 55 /* Registers */ 56 #define UDAV_NCR 0x00 /* Network Control Register */ 57 #define UDAV_NCR_EXT_PHY (1<<7) /* Select External PHY */ 58 #define UDAV_NCR_WAKEEN (1<<6) /* Wakeup Event Enable */ 59 #define UDAV_NCR_FCOL (1<<4) /* Force Collision Mode */ 60 #define UDAV_NCR_FDX (1<<3) /* Full-Duplex Mode (RO on Int. PHY) */ 61 #define UDAV_NCR_LBK1 (1<<2) /* Lookback Mode */ 62 #define UDAV_NCR_LBK0 (1<<1) /* Lookback Mode */ 63 #define UDAV_NCR_RST (1<<0) /* Software reset */ 64 65 #define UDAV_RCR 0x05 /* RX Control Register */ 66 #define UDAV_RCR_WTDIS (1<<6) /* Watchdog Timer Disable */ 67 #define UDAV_RCR_DIS_LONG (1<<5) /* Discard Long Packet(over 1522Byte) */ 68 #define UDAV_RCR_DIS_CRC (1<<4) /* Discard CRC Error Packet */ 69 #define UDAV_RCR_ALL (1<<3) /* Pass All Multicast */ 70 #define UDAV_RCR_RUNT (1<<2) /* Pass Runt Packet */ 71 #define UDAV_RCR_PRMSC (1<<1) /* Promiscuous Mode */ 72 #define UDAV_RCR_RXEN (1<<0) /* RX Enable */ 73 74 #define UDAV_RSR 0x06 /* RX Status Register */ 75 #define UDAV_RSR_RF (1<<7) /* Runt Frame */ 76 #define UDAV_RSR_MF (1<<6) /* Multicast Frame */ 77 #define UDAV_RSR_LCS (1<<5) /* Late Collision Seen */ 78 #define UDAV_RSR_RWTO (1<<4) /* Receive Watchdog Time-Out */ 79 #define UDAV_RSR_PLE (1<<3) /* Physical Layer Error */ 80 #define UDAV_RSR_AE (1<<2) /* Alignment Error */ 81 #define UDAV_RSR_CE (1<<1) /* CRC Error */ 82 #define UDAV_RSR_FOE (1<<0) /* FIFO Overflow Error */ 83 #define UDAV_RSR_ERR (UDAV_RSR_RF | UDAV_RSR_LCS | \ 84 UDAV_RSR_RWTO | UDAV_RSR_PLE | \ 85 UDAV_RSR_AE | UDAV_RSR_CE | UDAV_RSR_FOE) 86 87 #define UDAV_EPCR 0x0b /* EEPROM & PHY Control Register */ 88 #define UDAV_EPCR_REEP (1<<5) /* Reload EEPROM */ 89 #define UDAV_EPCR_WEP (1<<4) /* Write EEPROM enable */ 90 #define UDAV_EPCR_EPOS (1<<3) /* EEPROM or PHY Operation Select */ 91 #define UDAV_EPCR_ERPRR (1<<2) /* EEPROM/PHY Register Read Command */ 92 #define UDAV_EPCR_ERPRW (1<<1) /* EEPROM/PHY Register Write Command */ 93 #define UDAV_EPCR_ERRE (1<<0) /* EEPROM/PHY Access Status */ 94 95 #define UDAV_EPAR 0x0c /* EEPROM & PHY Control Register */ 96 #define UDAV_EPAR_PHY_ADR1 (1<<7) /* PHY Address bit 1 */ 97 #define UDAV_EPAR_PHY_ADR0 (1<<6) /* PHY Address bit 0 */ 98 #define UDAV_EPAR_EROA (1<<0) /* EEPROM Word/PHY Register Address */ 99 #define UDAV_EPAR_EROA_MASK (0x1f) /* [5:0] */ 100 101 #define UDAV_EPDRL 0x0d /* EEPROM & PHY Data Register */ 102 #define UDAV_EPDRH 0x0e /* EEPROM & PHY Data Register */ 103 104 #define UDAV_PAR0 0x10 /* Ethernet Address, load from EEPROM */ 105 #define UDAV_PAR1 0x11 /* Ethernet Address, load from EEPROM */ 106 #define UDAV_PAR2 0x12 /* Ethernet Address, load from EEPROM */ 107 #define UDAV_PAR3 0x13 /* Ethernet Address, load from EEPROM */ 108 #define UDAV_PAR4 0x14 /* Ethernet Address, load from EEPROM */ 109 #define UDAV_PAR5 0x15 /* Ethernet Address, load from EEPROM */ 110 #define UDAV_PAR UDAV_PAR0 111 112 #define UDAV_MAR0 0x16 /* Multicast Register */ 113 #define UDAV_MAR1 0x17 /* Multicast Register */ 114 #define UDAV_MAR2 0x18 /* Multicast Register */ 115 #define UDAV_MAR3 0x19 /* Multicast Register */ 116 #define UDAV_MAR4 0x1a /* Multicast Register */ 117 #define UDAV_MAR5 0x1b /* Multicast Register */ 118 #define UDAV_MAR6 0x1c /* Multicast Register */ 119 #define UDAV_MAR7 0x1d /* Multicast Register */ 120 #define UDAV_MAR UDAV_MAR0 121 122 #define UDAV_GPCR 0x1e /* General purpose control register */ 123 #define UDAV_GPCR_GEP_CNTL6 (1<<6) /* General purpose control 6 */ 124 #define UDAV_GPCR_GEP_CNTL5 (1<<5) /* General purpose control 5 */ 125 #define UDAV_GPCR_GEP_CNTL4 (1<<4) /* General purpose control 4 */ 126 #define UDAV_GPCR_GEP_CNTL3 (1<<3) /* General purpose control 3 */ 127 #define UDAV_GPCR_GEP_CNTL2 (1<<2) /* General purpose control 2 */ 128 #define UDAV_GPCR_GEP_CNTL1 (1<<1) /* General purpose control 1 */ 129 #define UDAV_GPCR_GEP_CNTL0 (1<<0) /* General purpose control 0 */ 130 131 #define UDAV_GPR 0x1f /* General purpose register */ 132 #define UDAV_GPR_GEPIO6 (1<<6) /* General purpose 6 */ 133 #define UDAV_GPR_GEPIO5 (1<<5) /* General purpose 5 */ 134 #define UDAV_GPR_GEPIO4 (1<<4) /* General purpose 4 */ 135 #define UDAV_GPR_GEPIO3 (1<<3) /* General purpose 3 */ 136 #define UDAV_GPR_GEPIO2 (1<<2) /* General purpose 2 */ 137 #define UDAV_GPR_GEPIO1 (1<<1) /* General purpose 1 */ 138 #define UDAV_GPR_GEPIO0 (1<<0) /* General purpose 0 */ 139 140 #define GET_MII(sc) uether_getmii(&(sc)->sc_ue) 141 142 struct udav_rxpkt { 143 uint8_t rxstat; 144 uint16_t pktlen; 145 } __packed; 146 147 enum { 148 UDAV_BULK_DT_WR, 149 UDAV_BULK_DT_RD, 150 UDAV_INTR_DT_RD, 151 UDAV_N_TRANSFER, 152 }; 153 154 struct udav_softc { 155 struct usb_ether sc_ue; 156 struct mtx sc_mtx; 157 struct usb_xfer *sc_xfer[UDAV_N_TRANSFER]; 158 159 int sc_flags; 160 #define UDAV_FLAG_LINK 0x0001 161 #define UDAV_FLAG_EXT_PHY 0x0040 162 #define UDAV_FLAG_NO_PHY 0x0080 163 }; 164 165 #define UDAV_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 166 #define UDAV_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 167 #define UDAV_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 168