xref: /freebsd/sys/dev/usb/net/if_smsc.c (revision d3d381b2b194b4d24853e92eecef55f262688d1a)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2012
5  *	Ben Gray <bgray@freebsd.org>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 /*
33  * SMSC LAN9xxx devices (http://www.smsc.com/)
34  *
35  * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that
36  * support USB 2.0 and 10/100 Mbps Ethernet.
37  *
38  * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter.
39  * The driver only covers the Ethernet part, the standard USB hub driver
40  * supports the hub part.
41  *
42  * This driver is closely modelled on the Linux driver written and copyrighted
43  * by SMSC.
44  *
45  *
46  *
47  *
48  * H/W TCP & UDP Checksum Offloading
49  * ---------------------------------
50  * The chip supports both tx and rx offloading of UDP & TCP checksums, this
51  * feature can be dynamically enabled/disabled.
52  *
53  * RX checksuming is performed across bytes after the IPv4 header to the end of
54  * the Ethernet frame, this means if the frame is padded with non-zero values
55  * the H/W checksum will be incorrect, however the rx code compensates for this.
56  *
57  * TX checksuming is more complicated, the device requires a special header to
58  * be prefixed onto the start of the frame which indicates the start and end
59  * positions of the UDP or TCP frame.  This requires the driver to manually
60  * go through the packet data and decode the headers prior to sending.
61  * On Linux they generally provide cues to the location of the csum and the
62  * area to calculate it over, on FreeBSD we seem to have to do it all ourselves,
63  * hence this is not as optimal and therefore h/w tX checksum is currently not
64  * implemented.
65  *
66  */
67 #include <sys/stdint.h>
68 #include <sys/stddef.h>
69 #include <sys/param.h>
70 #include <sys/queue.h>
71 #include <sys/types.h>
72 #include <sys/systm.h>
73 #include <sys/kernel.h>
74 #include <sys/bus.h>
75 #include <sys/module.h>
76 #include <sys/lock.h>
77 #include <sys/mutex.h>
78 #include <sys/condvar.h>
79 #include <sys/socket.h>
80 #include <sys/sysctl.h>
81 #include <sys/sx.h>
82 #include <sys/unistd.h>
83 #include <sys/callout.h>
84 #include <sys/malloc.h>
85 #include <sys/priv.h>
86 #include <sys/random.h>
87 
88 #include <net/if.h>
89 #include <net/if_var.h>
90 
91 #include <netinet/in.h>
92 #include <netinet/ip.h>
93 
94 #include "opt_platform.h"
95 
96 #ifdef FDT
97 #include <dev/fdt/fdt_common.h>
98 #include <dev/ofw/ofw_bus.h>
99 #include <dev/ofw/ofw_bus_subr.h>
100 #endif
101 
102 #include <dev/usb/usb.h>
103 #include <dev/usb/usbdi.h>
104 #include <dev/usb/usbdi_util.h>
105 #include "usbdevs.h"
106 
107 #define	USB_DEBUG_VAR smsc_debug
108 #include <dev/usb/usb_debug.h>
109 #include <dev/usb/usb_process.h>
110 
111 #include <dev/usb/net/usb_ethernet.h>
112 
113 #include <dev/usb/net/if_smscreg.h>
114 
115 #ifdef USB_DEBUG
116 static int smsc_debug = 0;
117 
118 SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW, 0, "USB smsc");
119 SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RWTUN, &smsc_debug, 0,
120     "Debug level");
121 #endif
122 
123 /*
124  * Various supported device vendors/products.
125  */
126 static const struct usb_device_id smsc_devs[] = {
127 #define	SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) }
128 	SMSC_DEV(LAN89530_ETH, 0),
129 	SMSC_DEV(LAN9500_ETH, 0),
130 	SMSC_DEV(LAN9500_ETH_2, 0),
131 	SMSC_DEV(LAN9500A_ETH, 0),
132 	SMSC_DEV(LAN9500A_ETH_2, 0),
133 	SMSC_DEV(LAN9505_ETH, 0),
134 	SMSC_DEV(LAN9505A_ETH, 0),
135 	SMSC_DEV(LAN9514_ETH, 0),
136 	SMSC_DEV(LAN9514_ETH_2, 0),
137 	SMSC_DEV(LAN9530_ETH, 0),
138 	SMSC_DEV(LAN9730_ETH, 0),
139 	SMSC_DEV(LAN9500_SAL10, 0),
140 	SMSC_DEV(LAN9505_SAL10, 0),
141 	SMSC_DEV(LAN9500A_SAL10, 0),
142 	SMSC_DEV(LAN9505A_SAL10, 0),
143 	SMSC_DEV(LAN9514_SAL10, 0),
144 	SMSC_DEV(LAN9500A_HAL, 0),
145 	SMSC_DEV(LAN9505A_HAL, 0),
146 #undef SMSC_DEV
147 };
148 
149 
150 #ifdef USB_DEBUG
151 #define smsc_dbg_printf(sc, fmt, args...) \
152 	do { \
153 		if (smsc_debug > 0) \
154 			device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \
155 	} while(0)
156 #else
157 #define smsc_dbg_printf(sc, fmt, args...) do { } while (0)
158 #endif
159 
160 #define smsc_warn_printf(sc, fmt, args...) \
161 	device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args)
162 
163 #define smsc_err_printf(sc, fmt, args...) \
164 	device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args)
165 
166 
167 #define ETHER_IS_ZERO(addr) \
168 	(!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
169 
170 #define ETHER_IS_VALID(addr) \
171 	(!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
172 
173 static device_probe_t smsc_probe;
174 static device_attach_t smsc_attach;
175 static device_detach_t smsc_detach;
176 
177 static usb_callback_t smsc_bulk_read_callback;
178 static usb_callback_t smsc_bulk_write_callback;
179 
180 static miibus_readreg_t smsc_miibus_readreg;
181 static miibus_writereg_t smsc_miibus_writereg;
182 static miibus_statchg_t smsc_miibus_statchg;
183 
184 #if __FreeBSD_version > 1000000
185 static int smsc_attach_post_sub(struct usb_ether *ue);
186 #endif
187 static uether_fn_t smsc_attach_post;
188 static uether_fn_t smsc_init;
189 static uether_fn_t smsc_stop;
190 static uether_fn_t smsc_start;
191 static uether_fn_t smsc_tick;
192 static uether_fn_t smsc_setmulti;
193 static uether_fn_t smsc_setpromisc;
194 
195 static int	smsc_ifmedia_upd(struct ifnet *);
196 static void	smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *);
197 
198 static int smsc_chip_init(struct smsc_softc *sc);
199 static int smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
200 
201 static const struct usb_config smsc_config[SMSC_N_TRANSFER] = {
202 
203 	[SMSC_BULK_DT_WR] = {
204 		.type = UE_BULK,
205 		.endpoint = UE_ADDR_ANY,
206 		.direction = UE_DIR_OUT,
207 		.frames = 16,
208 		.bufsize = 16 * (MCLBYTES + 16),
209 		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
210 		.callback = smsc_bulk_write_callback,
211 		.timeout = 10000,	/* 10 seconds */
212 	},
213 
214 	[SMSC_BULK_DT_RD] = {
215 		.type = UE_BULK,
216 		.endpoint = UE_ADDR_ANY,
217 		.direction = UE_DIR_IN,
218 		.bufsize = 20480,	/* bytes */
219 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
220 		.callback = smsc_bulk_read_callback,
221 		.timeout = 0,	/* no timeout */
222 	},
223 
224 	/* The SMSC chip supports an interrupt endpoints, however they aren't
225 	 * needed as we poll on the MII status.
226 	 */
227 };
228 
229 static const struct usb_ether_methods smsc_ue_methods = {
230 	.ue_attach_post = smsc_attach_post,
231 #if __FreeBSD_version > 1000000
232 	.ue_attach_post_sub = smsc_attach_post_sub,
233 #endif
234 	.ue_start = smsc_start,
235 	.ue_ioctl = smsc_ioctl,
236 	.ue_init = smsc_init,
237 	.ue_stop = smsc_stop,
238 	.ue_tick = smsc_tick,
239 	.ue_setmulti = smsc_setmulti,
240 	.ue_setpromisc = smsc_setpromisc,
241 	.ue_mii_upd = smsc_ifmedia_upd,
242 	.ue_mii_sts = smsc_ifmedia_sts,
243 };
244 
245 /**
246  *	smsc_read_reg - Reads a 32-bit register on the device
247  *	@sc: driver soft context
248  *	@off: offset of the register
249  *	@data: pointer a value that will be populated with the register value
250  *
251  *	LOCKING:
252  *	The device lock must be held before calling this function.
253  *
254  *	RETURNS:
255  *	0 on success, a USB_ERR_?? error code on failure.
256  */
257 static int
258 smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data)
259 {
260 	struct usb_device_request req;
261 	uint32_t buf;
262 	usb_error_t err;
263 
264 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
265 
266 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
267 	req.bRequest = SMSC_UR_READ_REG;
268 	USETW(req.wValue, 0);
269 	USETW(req.wIndex, off);
270 	USETW(req.wLength, 4);
271 
272 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
273 	if (err != 0)
274 		smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off);
275 
276 	*data = le32toh(buf);
277 
278 	return (err);
279 }
280 
281 /**
282  *	smsc_write_reg - Writes a 32-bit register on the device
283  *	@sc: driver soft context
284  *	@off: offset of the register
285  *	@data: the 32-bit value to write into the register
286  *
287  *	LOCKING:
288  *	The device lock must be held before calling this function.
289  *
290  *	RETURNS:
291  *	0 on success, a USB_ERR_?? error code on failure.
292  */
293 static int
294 smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data)
295 {
296 	struct usb_device_request req;
297 	uint32_t buf;
298 	usb_error_t err;
299 
300 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
301 
302 	buf = htole32(data);
303 
304 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
305 	req.bRequest = SMSC_UR_WRITE_REG;
306 	USETW(req.wValue, 0);
307 	USETW(req.wIndex, off);
308 	USETW(req.wLength, 4);
309 
310 	err = uether_do_request(&sc->sc_ue, &req, &buf, 1000);
311 	if (err != 0)
312 		smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off);
313 
314 	return (err);
315 }
316 
317 /**
318  *	smsc_wait_for_bits - Polls on a register value until bits are cleared
319  *	@sc: soft context
320  *	@reg: offset of the register
321  *	@bits: if the bits are clear the function returns
322  *
323  *	LOCKING:
324  *	The device lock must be held before calling this function.
325  *
326  *	RETURNS:
327  *	0 on success, or a USB_ERR_?? error code on failure.
328  */
329 static int
330 smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits)
331 {
332 	usb_ticks_t start_ticks;
333 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
334 	uint32_t val;
335 	int err;
336 
337 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
338 
339 	start_ticks = (usb_ticks_t)ticks;
340 	do {
341 		if ((err = smsc_read_reg(sc, reg, &val)) != 0)
342 			return (err);
343 		if (!(val & bits))
344 			return (0);
345 
346 		uether_pause(&sc->sc_ue, hz / 100);
347 	} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
348 
349 	return (USB_ERR_TIMEOUT);
350 }
351 
352 /**
353  *	smsc_eeprom_read - Reads the attached EEPROM
354  *	@sc: soft context
355  *	@off: the eeprom address offset
356  *	@buf: stores the bytes
357  *	@buflen: the number of bytes to read
358  *
359  *	Simply reads bytes from an attached eeprom.
360  *
361  *	LOCKING:
362  *	The function takes and releases the device lock if it is not already held.
363  *
364  *	RETURNS:
365  *	0 on success, or a USB_ERR_?? error code on failure.
366  */
367 static int
368 smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen)
369 {
370 	usb_ticks_t start_ticks;
371 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
372 	int err;
373 	int locked;
374 	uint32_t val;
375 	uint16_t i;
376 
377 	locked = mtx_owned(&sc->sc_mtx);
378 	if (!locked)
379 		SMSC_LOCK(sc);
380 
381 	err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY);
382 	if (err != 0) {
383 		smsc_warn_printf(sc, "eeprom busy, failed to read data\n");
384 		goto done;
385 	}
386 
387 	/* start reading the bytes, one at a time */
388 	for (i = 0; i < buflen; i++) {
389 
390 		val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i));
391 		if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0)
392 			goto done;
393 
394 		start_ticks = (usb_ticks_t)ticks;
395 		do {
396 			if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0)
397 				goto done;
398 			if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT))
399 				break;
400 
401 			uether_pause(&sc->sc_ue, hz / 100);
402 		} while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks);
403 
404 		if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) {
405 			smsc_warn_printf(sc, "eeprom command failed\n");
406 			err = USB_ERR_IOERROR;
407 			break;
408 		}
409 
410 		if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0)
411 			goto done;
412 
413 		buf[i] = (val & 0xff);
414 	}
415 
416 done:
417 	if (!locked)
418 		SMSC_UNLOCK(sc);
419 
420 	return (err);
421 }
422 
423 /**
424  *	smsc_miibus_readreg - Reads a MII/MDIO register
425  *	@dev: usb ether device
426  *	@phy: the number of phy reading from
427  *	@reg: the register address
428  *
429  *	Attempts to read a phy register over the MII bus.
430  *
431  *	LOCKING:
432  *	Takes and releases the device mutex lock if not already held.
433  *
434  *	RETURNS:
435  *	Returns the 16-bits read from the MII register, if this function fails 0
436  *	is returned.
437  */
438 static int
439 smsc_miibus_readreg(device_t dev, int phy, int reg)
440 {
441 	struct smsc_softc *sc = device_get_softc(dev);
442 	int locked;
443 	uint32_t addr;
444 	uint32_t val = 0;
445 
446 	locked = mtx_owned(&sc->sc_mtx);
447 	if (!locked)
448 		SMSC_LOCK(sc);
449 
450 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
451 		smsc_warn_printf(sc, "MII is busy\n");
452 		goto done;
453 	}
454 
455 	addr = (phy << 11) | (reg << 6) | SMSC_MII_READ | SMSC_MII_BUSY;
456 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
457 
458 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
459 		smsc_warn_printf(sc, "MII read timeout\n");
460 
461 	smsc_read_reg(sc, SMSC_MII_DATA, &val);
462 	val = le32toh(val);
463 
464 done:
465 	if (!locked)
466 		SMSC_UNLOCK(sc);
467 
468 	return (val & 0xFFFF);
469 }
470 
471 /**
472  *	smsc_miibus_writereg - Writes a MII/MDIO register
473  *	@dev: usb ether device
474  *	@phy: the number of phy writing to
475  *	@reg: the register address
476  *	@val: the value to write
477  *
478  *	Attempts to write a phy register over the MII bus.
479  *
480  *	LOCKING:
481  *	Takes and releases the device mutex lock if not already held.
482  *
483  *	RETURNS:
484  *	Always returns 0 regardless of success or failure.
485  */
486 static int
487 smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
488 {
489 	struct smsc_softc *sc = device_get_softc(dev);
490 	int locked;
491 	uint32_t addr;
492 
493 	if (sc->sc_phyno != phy)
494 		return (0);
495 
496 	locked = mtx_owned(&sc->sc_mtx);
497 	if (!locked)
498 		SMSC_LOCK(sc);
499 
500 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
501 		smsc_warn_printf(sc, "MII is busy\n");
502 		goto done;
503 	}
504 
505 	val = htole32(val);
506 	smsc_write_reg(sc, SMSC_MII_DATA, val);
507 
508 	addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE | SMSC_MII_BUSY;
509 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
510 
511 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
512 		smsc_warn_printf(sc, "MII write timeout\n");
513 
514 done:
515 	if (!locked)
516 		SMSC_UNLOCK(sc);
517 	return (0);
518 }
519 
520 
521 
522 /**
523  *	smsc_miibus_statchg - Called to detect phy status change
524  *	@dev: usb ether device
525  *
526  *	This function is called periodically by the system to poll for status
527  *	changes of the link.
528  *
529  *	LOCKING:
530  *	Takes and releases the device mutex lock if not already held.
531  */
532 static void
533 smsc_miibus_statchg(device_t dev)
534 {
535 	struct smsc_softc *sc = device_get_softc(dev);
536 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
537 	struct ifnet *ifp;
538 	int locked;
539 	int err;
540 	uint32_t flow;
541 	uint32_t afc_cfg;
542 
543 	locked = mtx_owned(&sc->sc_mtx);
544 	if (!locked)
545 		SMSC_LOCK(sc);
546 
547 	ifp = uether_getifp(&sc->sc_ue);
548 	if (mii == NULL || ifp == NULL ||
549 	    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
550 		goto done;
551 
552 	/* Use the MII status to determine link status */
553 	sc->sc_flags &= ~SMSC_FLAG_LINK;
554 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
555 	    (IFM_ACTIVE | IFM_AVALID)) {
556 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
557 			case IFM_10_T:
558 			case IFM_100_TX:
559 				sc->sc_flags |= SMSC_FLAG_LINK;
560 				break;
561 			case IFM_1000_T:
562 				/* Gigabit ethernet not supported by chipset */
563 				break;
564 			default:
565 				break;
566 		}
567 	}
568 
569 	/* Lost link, do nothing. */
570 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
571 		smsc_dbg_printf(sc, "link flag not set\n");
572 		goto done;
573 	}
574 
575 	err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg);
576 	if (err) {
577 		smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err);
578 		goto done;
579 	}
580 
581 	/* Enable/disable full duplex operation and TX/RX pause */
582 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
583 		smsc_dbg_printf(sc, "full duplex operation\n");
584 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN;
585 		sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX;
586 
587 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
588 			flow = 0xffff0002;
589 		else
590 			flow = 0;
591 
592 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
593 			afc_cfg |= 0xf;
594 		else
595 			afc_cfg &= ~0xf;
596 
597 	} else {
598 		smsc_dbg_printf(sc, "half duplex operation\n");
599 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX;
600 		sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN;
601 
602 		flow = 0;
603 		afc_cfg |= 0xf;
604 	}
605 
606 	err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
607 	err += smsc_write_reg(sc, SMSC_FLOW, flow);
608 	err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg);
609 	if (err)
610 		smsc_warn_printf(sc, "media change failed, error %d\n", err);
611 
612 done:
613 	if (!locked)
614 		SMSC_UNLOCK(sc);
615 }
616 
617 /**
618  *	smsc_ifmedia_upd - Set media options
619  *	@ifp: interface pointer
620  *
621  *	Basically boilerplate code that simply calls the mii functions to set the
622  *	media options.
623  *
624  *	LOCKING:
625  *	The device lock must be held before this function is called.
626  *
627  *	RETURNS:
628  *	Returns 0 on success or a negative error code.
629  */
630 static int
631 smsc_ifmedia_upd(struct ifnet *ifp)
632 {
633 	struct smsc_softc *sc = ifp->if_softc;
634 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
635 	struct mii_softc *miisc;
636 	int err;
637 
638 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
639 
640 	LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
641 		PHY_RESET(miisc);
642 	err = mii_mediachg(mii);
643 	return (err);
644 }
645 
646 /**
647  *	smsc_ifmedia_sts - Report current media status
648  *	@ifp: inet interface pointer
649  *	@ifmr: interface media request
650  *
651  *	Basically boilerplate code that simply calls the mii functions to get the
652  *	media status.
653  *
654  *	LOCKING:
655  *	Internally takes and releases the device lock.
656  */
657 static void
658 smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
659 {
660 	struct smsc_softc *sc = ifp->if_softc;
661 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
662 
663 	SMSC_LOCK(sc);
664 	mii_pollstat(mii);
665 	ifmr->ifm_active = mii->mii_media_active;
666 	ifmr->ifm_status = mii->mii_media_status;
667 	SMSC_UNLOCK(sc);
668 }
669 
670 /**
671  *	smsc_hash - Calculate the hash of a mac address
672  *	@addr: The mac address to calculate the hash on
673  *
674  *	This function is used when configuring a range of m'cast mac addresses to
675  *	filter on.  The hash of the mac address is put in the device's mac hash
676  *	table.
677  *
678  *	RETURNS:
679  *	Returns a value from 0-63 value which is the hash of the mac address.
680  */
681 static inline uint32_t
682 smsc_hash(uint8_t addr[ETHER_ADDR_LEN])
683 {
684 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
685 }
686 
687 /**
688  *	smsc_setmulti - Setup multicast
689  *	@ue: usb ethernet device context
690  *
691  *	Tells the device to either accept frames with a multicast mac address, a
692  *	select group of m'cast mac addresses or just the devices mac address.
693  *
694  *	LOCKING:
695  *	Should be called with the SMSC lock held.
696  */
697 static void
698 smsc_setmulti(struct usb_ether *ue)
699 {
700 	struct smsc_softc *sc = uether_getsc(ue);
701 	struct ifnet *ifp = uether_getifp(ue);
702 	struct ifmultiaddr *ifma;
703 	uint32_t hashtbl[2] = { 0, 0 };
704 	uint32_t hash;
705 
706 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
707 
708 	if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
709 		smsc_dbg_printf(sc, "receive all multicast enabled\n");
710 		sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS;
711 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT;
712 
713 	} else {
714 		/* Take the lock of the mac address list before hashing each of them */
715 		if_maddr_rlock(ifp);
716 
717 		if (!CK_STAILQ_EMPTY(&ifp->if_multiaddrs)) {
718 			/* We are filtering on a set of address so calculate hashes of each
719 			 * of the address and set the corresponding bits in the register.
720 			 */
721 			sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT;
722 			sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS);
723 
724 			CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
725 				if (ifma->ifma_addr->sa_family != AF_LINK)
726 					continue;
727 
728 				hash = smsc_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
729 				hashtbl[hash >> 5] |= 1 << (hash & 0x1F);
730 			}
731 		} else {
732 			/* Only receive packets with destination set to our mac address */
733 			sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT);
734 		}
735 
736 		if_maddr_runlock(ifp);
737 
738 		/* Debug */
739 		if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT)
740 			smsc_dbg_printf(sc, "receive select group of macs\n");
741 		else
742 			smsc_dbg_printf(sc, "receive own packets only\n");
743 	}
744 
745 	/* Write the hash table and mac control registers */
746 	smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]);
747 	smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]);
748 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
749 }
750 
751 
752 /**
753  *	smsc_setpromisc - Enables/disables promiscuous mode
754  *	@ue: usb ethernet device context
755  *
756  *	LOCKING:
757  *	Should be called with the SMSC lock held.
758  */
759 static void
760 smsc_setpromisc(struct usb_ether *ue)
761 {
762 	struct smsc_softc *sc = uether_getsc(ue);
763 	struct ifnet *ifp = uether_getifp(ue);
764 
765 	smsc_dbg_printf(sc, "promiscuous mode %sabled\n",
766 	                (ifp->if_flags & IFF_PROMISC) ? "en" : "dis");
767 
768 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
769 
770 	if (ifp->if_flags & IFF_PROMISC)
771 		sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS;
772 	else
773 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS;
774 
775 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
776 }
777 
778 
779 /**
780  *	smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming
781  *	@sc: driver soft context
782  *
783  *	LOCKING:
784  *	Should be called with the SMSC lock held.
785  *
786  *	RETURNS:
787  *	Returns 0 on success or a negative error code.
788  */
789 static int smsc_sethwcsum(struct smsc_softc *sc)
790 {
791 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
792 	uint32_t val;
793 	int err;
794 
795 	if (!ifp)
796 		return (-EIO);
797 
798 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
799 
800 	err = smsc_read_reg(sc, SMSC_COE_CTRL, &val);
801 	if (err != 0) {
802 		smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err);
803 		return (err);
804 	}
805 
806 	/* Enable/disable the Rx checksum */
807 	if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_RXCSUM)
808 		val |= SMSC_COE_CTRL_RX_EN;
809 	else
810 		val &= ~SMSC_COE_CTRL_RX_EN;
811 
812 	/* Enable/disable the Tx checksum (currently not supported) */
813 	if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_TXCSUM)
814 		val |= SMSC_COE_CTRL_TX_EN;
815 	else
816 		val &= ~SMSC_COE_CTRL_TX_EN;
817 
818 	err = smsc_write_reg(sc, SMSC_COE_CTRL, val);
819 	if (err != 0) {
820 		smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err);
821 		return (err);
822 	}
823 
824 	return (0);
825 }
826 
827 /**
828  *	smsc_setmacaddress - Sets the mac address in the device
829  *	@sc: driver soft context
830  *	@addr: pointer to array contain at least 6 bytes of the mac
831  *
832  *	Writes the MAC address into the device, usually the MAC is programmed with
833  *	values from the EEPROM.
834  *
835  *	LOCKING:
836  *	Should be called with the SMSC lock held.
837  *
838  *	RETURNS:
839  *	Returns 0 on success or a negative error code.
840  */
841 static int
842 smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr)
843 {
844 	int err;
845 	uint32_t val;
846 
847 	smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n",
848 	                addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
849 
850 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
851 
852 	val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
853 	if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0)
854 		goto done;
855 
856 	val = (addr[5] << 8) | addr[4];
857 	err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val);
858 
859 done:
860 	return (err);
861 }
862 
863 /**
864  *	smsc_reset - Reset the SMSC chip
865  *	@sc: device soft context
866  *
867  *	LOCKING:
868  *	Should be called with the SMSC lock held.
869  */
870 static void
871 smsc_reset(struct smsc_softc *sc)
872 {
873 	struct usb_config_descriptor *cd;
874 	usb_error_t err;
875 
876 	cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
877 
878 	err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
879 	                          cd->bConfigurationValue);
880 	if (err)
881 		smsc_warn_printf(sc, "reset failed (ignored)\n");
882 
883 	/* Wait a little while for the chip to get its brains in order. */
884 	uether_pause(&sc->sc_ue, hz / 100);
885 
886 	/* Reinitialize controller to achieve full reset. */
887 	smsc_chip_init(sc);
888 }
889 
890 
891 /**
892  *	smsc_init - Initialises the LAN95xx chip
893  *	@ue: USB ether interface
894  *
895  *	Called when the interface is brought up (i.e. ifconfig ue0 up), this
896  *	initialise the interface and the rx/tx pipes.
897  *
898  *	LOCKING:
899  *	Should be called with the SMSC lock held.
900  */
901 static void
902 smsc_init(struct usb_ether *ue)
903 {
904 	struct smsc_softc *sc = uether_getsc(ue);
905 	struct ifnet *ifp = uether_getifp(ue);
906 
907 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
908 
909 	if (smsc_setmacaddress(sc, IF_LLADDR(ifp)))
910 		smsc_dbg_printf(sc, "setting MAC address failed\n");
911 
912 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
913 		return;
914 
915 	/* Cancel pending I/O */
916 	smsc_stop(ue);
917 
918 #if __FreeBSD_version <= 1000000
919 	/* On earlier versions this was the first place we could tell the system
920 	 * that we supported h/w csuming, however this is only called after the
921 	 * the interface has been brought up - not ideal.
922 	 */
923 	if (!(ifp->if_capabilities & IFCAP_RXCSUM)) {
924 		ifp->if_capabilities |= IFCAP_RXCSUM;
925 		ifp->if_capenable |= IFCAP_RXCSUM;
926 		ifp->if_hwassist = 0;
927 	}
928 
929 	/* TX checksuming is disabled for now
930 	ifp->if_capabilities |= IFCAP_TXCSUM;
931 	ifp->if_capenable |= IFCAP_TXCSUM;
932 	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
933 	*/
934 #endif
935 
936 	/* Reset the ethernet interface. */
937 	smsc_reset(sc);
938 
939 	/* Load the multicast filter. */
940 	smsc_setmulti(ue);
941 
942 	/* TCP/UDP checksum offload engines. */
943 	smsc_sethwcsum(sc);
944 
945 	usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]);
946 
947 	/* Indicate we are up and running. */
948 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
949 
950 	/* Switch to selected media. */
951 	smsc_ifmedia_upd(ifp);
952 	smsc_start(ue);
953 }
954 
955 /**
956  *	smsc_bulk_read_callback - Read callback used to process the USB URB
957  *	@xfer: the USB transfer
958  *	@error:
959  *
960  *	Reads the URB data which can contain one or more ethernet frames, the
961  *	frames are copyed into a mbuf and given to the system.
962  *
963  *	LOCKING:
964  *	No locking required, doesn't access internal driver settings.
965  */
966 static void
967 smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
968 {
969 	struct smsc_softc *sc = usbd_xfer_softc(xfer);
970 	struct usb_ether *ue = &sc->sc_ue;
971 	struct ifnet *ifp = uether_getifp(ue);
972 	struct mbuf *m;
973 	struct usb_page_cache *pc;
974 	uint32_t rxhdr;
975 	uint16_t pktlen;
976 	int off;
977 	int actlen;
978 
979 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
980 	smsc_dbg_printf(sc, "rx : actlen %d\n", actlen);
981 
982 	switch (USB_GET_STATE(xfer)) {
983 	case USB_ST_TRANSFERRED:
984 
985 		/* There is always a zero length frame after bringing the IF up */
986 		if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN))
987 			goto tr_setup;
988 
989 		/* There maybe multiple packets in the USB frame, each will have a
990 		 * header and each needs to have it's own mbuf allocated and populated
991 		 * for it.
992 		 */
993 		pc = usbd_xfer_get_frame(xfer, 0);
994 		off = 0;
995 
996 		while (off < actlen) {
997 
998 			/* The frame header is always aligned on a 4 byte boundary */
999 			off = ((off + 0x3) & ~0x3);
1000 
1001 			usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr));
1002 			off += (sizeof(rxhdr) + ETHER_ALIGN);
1003 			rxhdr = le32toh(rxhdr);
1004 
1005 			pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr);
1006 
1007 			smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : "
1008 			                "off %d\n", rxhdr, pktlen, actlen, off);
1009 
1010 
1011 			if (rxhdr & SMSC_RX_STAT_ERROR) {
1012 				smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr);
1013 				if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1014 				if (rxhdr & SMSC_RX_STAT_COLLISION)
1015 					if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
1016 			} else {
1017 
1018 				/* Check if the ethernet frame is too big or too small */
1019 				if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off)))
1020 					goto tr_setup;
1021 
1022 				/* Create a new mbuf to store the packet in */
1023 				m = uether_newbuf();
1024 				if (m == NULL) {
1025 					smsc_warn_printf(sc, "failed to create new mbuf\n");
1026 					if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
1027 					goto tr_setup;
1028 				}
1029 
1030 				usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen);
1031 
1032 				/* Check if RX TCP/UDP checksumming is being offloaded */
1033 				if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) {
1034 
1035 					struct ether_header *eh;
1036 
1037 					eh = mtod(m, struct ether_header *);
1038 
1039 					/* Remove the extra 2 bytes of the csum */
1040 					pktlen -= 2;
1041 
1042 					/* The checksum appears to be simplistically calculated
1043 					 * over the udp/tcp header and data up to the end of the
1044 					 * eth frame.  Which means if the eth frame is padded
1045 					 * the csum calculation is incorrectly performed over
1046 					 * the padding bytes as well. Therefore to be safe we
1047 					 * ignore the H/W csum on frames less than or equal to
1048 					 * 64 bytes.
1049 					 *
1050 					 * Ignore H/W csum for non-IPv4 packets.
1051 					 */
1052 					if ((be16toh(eh->ether_type) == ETHERTYPE_IP) &&
1053 					    (pktlen > ETHER_MIN_LEN)) {
1054 						struct ip *ip;
1055 
1056 						ip = (struct ip *)(eh + 1);
1057 						if ((ip->ip_v == IPVERSION) &&
1058 						    ((ip->ip_p == IPPROTO_TCP) ||
1059 						     (ip->ip_p == IPPROTO_UDP))) {
1060 							/* Indicate the UDP/TCP csum has been calculated */
1061 							m->m_pkthdr.csum_flags |= CSUM_DATA_VALID;
1062 
1063 							/* Copy the TCP/UDP checksum from the last 2 bytes
1064 							 * of the transfer and put in the csum_data field.
1065 							 */
1066 							usbd_copy_out(pc, (off + pktlen),
1067 							              &m->m_pkthdr.csum_data, 2);
1068 
1069 							/* The data is copied in network order, but the
1070 							 * csum algorithm in the kernel expects it to be
1071 							 * in host network order.
1072 							 */
1073 							m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data);
1074 
1075 							smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n",
1076 							                m->m_pkthdr.csum_data);
1077 						}
1078 					}
1079 
1080 					/* Need to adjust the offset as well or we'll be off
1081 					 * by 2 because the csum is removed from the packet
1082 					 * length.
1083 					 */
1084 					off += 2;
1085 				}
1086 
1087 				/* Finally enqueue the mbuf on the receive queue */
1088 				/* Remove 4 trailing bytes */
1089 				if (pktlen < (4 + ETHER_HDR_LEN)) {
1090 					m_freem(m);
1091 					goto tr_setup;
1092 				}
1093 				uether_rxmbuf(ue, m, pktlen - 4);
1094 			}
1095 
1096 			/* Update the offset to move to the next potential packet */
1097 			off += pktlen;
1098 		}
1099 
1100 		/* FALLTHROUGH */
1101 
1102 	case USB_ST_SETUP:
1103 tr_setup:
1104 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
1105 		usbd_transfer_submit(xfer);
1106 		uether_rxflush(ue);
1107 		return;
1108 
1109 	default:
1110 		if (error != USB_ERR_CANCELLED) {
1111 			smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error));
1112 			usbd_xfer_set_stall(xfer);
1113 			goto tr_setup;
1114 		}
1115 		return;
1116 	}
1117 }
1118 
1119 /**
1120  *	smsc_bulk_write_callback - Write callback used to send ethernet frame(s)
1121  *	@xfer: the USB transfer
1122  *	@error: error code if the transfers is in an errored state
1123  *
1124  *	The main write function that pulls ethernet frames off the queue and sends
1125  *	them out.
1126  *
1127  *	LOCKING:
1128  *
1129  */
1130 static void
1131 smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
1132 {
1133 	struct smsc_softc *sc = usbd_xfer_softc(xfer);
1134 	struct ifnet *ifp = uether_getifp(&sc->sc_ue);
1135 	struct usb_page_cache *pc;
1136 	struct mbuf *m;
1137 	uint32_t txhdr;
1138 	uint32_t frm_len = 0;
1139 	int nframes;
1140 
1141 	switch (USB_GET_STATE(xfer)) {
1142 	case USB_ST_TRANSFERRED:
1143 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1144 		/* FALLTHROUGH */
1145 
1146 	case USB_ST_SETUP:
1147 tr_setup:
1148 		if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 ||
1149 			(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
1150 			/* Don't send anything if there is no link or controller is busy. */
1151 			return;
1152 		}
1153 
1154 		for (nframes = 0; nframes < 16 &&
1155 		    !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
1156 			IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1157 			if (m == NULL)
1158 				break;
1159 			usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
1160 			    nframes);
1161 			frm_len = 0;
1162 			pc = usbd_xfer_get_frame(xfer, nframes);
1163 
1164 			/* Each frame is prefixed with two 32-bit values describing the
1165 			 * length of the packet and buffer.
1166 			 */
1167 			txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) |
1168 					SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG;
1169 			txhdr = htole32(txhdr);
1170 			usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
1171 
1172 			txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len);
1173 			txhdr = htole32(txhdr);
1174 			usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr));
1175 
1176 			frm_len += 8;
1177 
1178 			/* Next copy in the actual packet */
1179 			usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
1180 			frm_len += m->m_pkthdr.len;
1181 
1182 			if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1183 
1184 			/* If there's a BPF listener, bounce a copy of this frame to him */
1185 			BPF_MTAP(ifp, m);
1186 
1187 			m_freem(m);
1188 
1189 			/* Set frame length. */
1190 			usbd_xfer_set_frame_len(xfer, nframes, frm_len);
1191 		}
1192 		if (nframes != 0) {
1193 			usbd_xfer_set_frames(xfer, nframes);
1194 			usbd_transfer_submit(xfer);
1195 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1196 		}
1197 		return;
1198 
1199 	default:
1200 		if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1201 		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1202 
1203 		if (error != USB_ERR_CANCELLED) {
1204 			smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error));
1205 			usbd_xfer_set_stall(xfer);
1206 			goto tr_setup;
1207 		}
1208 		return;
1209 	}
1210 }
1211 
1212 /**
1213  *	smsc_tick - Called periodically to monitor the state of the LAN95xx chip
1214  *	@ue: USB ether interface
1215  *
1216  *	Simply calls the mii status functions to check the state of the link.
1217  *
1218  *	LOCKING:
1219  *	Should be called with the SMSC lock held.
1220  */
1221 static void
1222 smsc_tick(struct usb_ether *ue)
1223 {
1224 	struct smsc_softc *sc = uether_getsc(ue);
1225 	struct mii_data *mii = uether_getmii(&sc->sc_ue);
1226 
1227 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1228 
1229 	mii_tick(mii);
1230 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
1231 		smsc_miibus_statchg(ue->ue_dev);
1232 		if ((sc->sc_flags & SMSC_FLAG_LINK) != 0)
1233 			smsc_start(ue);
1234 	}
1235 }
1236 
1237 /**
1238  *	smsc_start - Starts communication with the LAN95xx chip
1239  *	@ue: USB ether interface
1240  *
1241  *
1242  *
1243  */
1244 static void
1245 smsc_start(struct usb_ether *ue)
1246 {
1247 	struct smsc_softc *sc = uether_getsc(ue);
1248 
1249 	/*
1250 	 * start the USB transfers, if not already started:
1251 	 */
1252 	usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]);
1253 	usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]);
1254 }
1255 
1256 /**
1257  *	smsc_stop - Stops communication with the LAN95xx chip
1258  *	@ue: USB ether interface
1259  *
1260  *
1261  *
1262  */
1263 static void
1264 smsc_stop(struct usb_ether *ue)
1265 {
1266 	struct smsc_softc *sc = uether_getsc(ue);
1267 	struct ifnet *ifp = uether_getifp(ue);
1268 
1269 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1270 
1271 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1272 	sc->sc_flags &= ~SMSC_FLAG_LINK;
1273 
1274 	/*
1275 	 * stop all the transfers, if not already stopped:
1276 	 */
1277 	usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]);
1278 	usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]);
1279 }
1280 
1281 /**
1282  *	smsc_phy_init - Initialises the in-built SMSC phy
1283  *	@sc: driver soft context
1284  *
1285  *	Resets the PHY part of the chip and then initialises it to default
1286  *	values.  The 'link down' and 'auto-negotiation complete' interrupts
1287  *	from the PHY are also enabled, however we don't monitor the interrupt
1288  *	endpoints for the moment.
1289  *
1290  *	RETURNS:
1291  *	Returns 0 on success or EIO if failed to reset the PHY.
1292  */
1293 static int
1294 smsc_phy_init(struct smsc_softc *sc)
1295 {
1296 	int bmcr;
1297 	usb_ticks_t start_ticks;
1298 	const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000);
1299 
1300 	SMSC_LOCK_ASSERT(sc, MA_OWNED);
1301 
1302 	/* Reset phy and wait for reset to complete */
1303 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET);
1304 
1305 	start_ticks = ticks;
1306 	do {
1307 		uether_pause(&sc->sc_ue, hz / 100);
1308 		bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
1309 	} while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
1310 
1311 	if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) {
1312 		smsc_err_printf(sc, "PHY reset timed-out");
1313 		return (EIO);
1314 	}
1315 
1316 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR,
1317 	                     ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD |  /* all modes */
1318 	                     ANAR_CSMA |
1319 	                     ANAR_FC |
1320 	                     ANAR_PAUSE_ASYM);
1321 
1322 	/* Setup the phy to interrupt when the link goes down or autoneg completes */
1323 	smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT);
1324 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK,
1325 	                     (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN));
1326 
1327 	/* Restart auto-negotation */
1328 	bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);
1329 	bmcr |= BMCR_STARTNEG;
1330 	smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);
1331 
1332 	return (0);
1333 }
1334 
1335 
1336 /**
1337  *	smsc_chip_init - Initialises the chip after power on
1338  *	@sc: driver soft context
1339  *
1340  *	This initialisation sequence is modelled on the procedure in the Linux
1341  *	driver.
1342  *
1343  *	RETURNS:
1344  *	Returns 0 on success or an error code on failure.
1345  */
1346 static int
1347 smsc_chip_init(struct smsc_softc *sc)
1348 {
1349 	int err;
1350 	int locked;
1351 	uint32_t reg_val;
1352 	int burst_cap;
1353 
1354 	locked = mtx_owned(&sc->sc_mtx);
1355 	if (!locked)
1356 		SMSC_LOCK(sc);
1357 
1358 	/* Enter H/W config mode */
1359 	smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST);
1360 
1361 	if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) {
1362 		smsc_warn_printf(sc, "timed-out waiting for reset to complete\n");
1363 		goto init_failed;
1364 	}
1365 
1366 	/* Reset the PHY */
1367 	smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST);
1368 
1369 	if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST)) != 0) {
1370 		smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n");
1371 		goto init_failed;
1372 	}
1373 
1374 	/* Set the mac address */
1375 	if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) {
1376 		smsc_warn_printf(sc, "failed to set the MAC address\n");
1377 		goto init_failed;
1378 	}
1379 
1380 	/* Don't know what the HW_CFG_BIR bit is, but following the reset sequence
1381 	 * as used in the Linux driver.
1382 	 */
1383 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) != 0) {
1384 		smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err);
1385 		goto init_failed;
1386 	}
1387 	reg_val |= SMSC_HW_CFG_BIR;
1388 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
1389 
1390 	/* There is a so called 'turbo mode' that the linux driver supports, it
1391 	 * seems to allow you to jam multiple frames per Rx transaction.  By default
1392 	 * this driver supports that and therefore allows multiple frames per URB.
1393 	 *
1394 	 * The xfer buffer size needs to reflect this as well, therefore based on
1395 	 * the calculations in the Linux driver the RX bufsize is set to 18944,
1396 	 *     bufsz = (16 * 1024 + 5 * 512)
1397 	 *
1398 	 * Burst capability is the number of URBs that can be in a burst of data/
1399 	 * ethernet frames.
1400 	 */
1401 	if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH)
1402 		burst_cap = 37;
1403 	else
1404 		burst_cap = 128;
1405 
1406 	smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap);
1407 
1408 	/* Set the default bulk in delay (magic value from Linux driver) */
1409 	smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000);
1410 
1411 
1412 
1413 	/*
1414 	 * Initialise the RX interface
1415 	 */
1416 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) < 0) {
1417 		smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err);
1418 		goto init_failed;
1419 	}
1420 
1421 	/* Adjust the packet offset in the buffer (designed to try and align IP
1422 	 * header on 4 byte boundary)
1423 	 */
1424 	reg_val &= ~SMSC_HW_CFG_RXDOFF;
1425 	reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF;
1426 
1427 	/* The following setings are used for 'turbo mode', a.k.a multiple frames
1428 	 * per Rx transaction (again info taken form Linux driver).
1429 	 */
1430 	reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
1431 
1432 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
1433 
1434 	/* Clear the status register ? */
1435 	smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff);
1436 
1437 	/* Read and display the revision register */
1438 	if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) {
1439 		smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err);
1440 		goto init_failed;
1441 	}
1442 
1443 	device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n",
1444 	    (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16,
1445 	    (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK));
1446 
1447 	/* GPIO/LED setup */
1448 	reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
1449 	          SMSC_LED_GPIO_CFG_FDX_LED;
1450 	smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val);
1451 
1452 	/*
1453 	 * Initialise the TX interface
1454 	 */
1455 	smsc_write_reg(sc, SMSC_FLOW, 0);
1456 
1457 	smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT);
1458 
1459 	/* Read the current MAC configuration */
1460 	if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) {
1461 		smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err);
1462 		goto init_failed;
1463 	}
1464 
1465 	/* Vlan */
1466 	smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN);
1467 
1468 	/*
1469 	 * Initialise the PHY
1470 	 */
1471 	if ((err = smsc_phy_init(sc)) != 0)
1472 		goto init_failed;
1473 
1474 
1475 	/*
1476 	 * Start TX
1477 	 */
1478 	sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN;
1479 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
1480 	smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON);
1481 
1482 	/*
1483 	 * Start RX
1484 	 */
1485 	sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN;
1486 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
1487 
1488 	if (!locked)
1489 		SMSC_UNLOCK(sc);
1490 
1491 	return (0);
1492 
1493 init_failed:
1494 	if (!locked)
1495 		SMSC_UNLOCK(sc);
1496 
1497 	smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err);
1498 	return (err);
1499 }
1500 
1501 
1502 /**
1503  *	smsc_ioctl - ioctl function for the device
1504  *	@ifp: interface pointer
1505  *	@cmd: the ioctl command
1506  *	@data: data passed in the ioctl call, typically a pointer to struct ifreq.
1507  *
1508  *	The ioctl routine is overridden to detect change requests for the H/W
1509  *	checksum capabilities.
1510  *
1511  *	RETURNS:
1512  *	0 on success and an error code on failure.
1513  */
1514 static int
1515 smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1516 {
1517 	struct usb_ether *ue = ifp->if_softc;
1518 	struct smsc_softc *sc;
1519 	struct ifreq *ifr;
1520 	int rc;
1521 	int mask;
1522 	int reinit;
1523 
1524 	if (cmd == SIOCSIFCAP) {
1525 
1526 		sc = uether_getsc(ue);
1527 		ifr = (struct ifreq *)data;
1528 
1529 		SMSC_LOCK(sc);
1530 
1531 		rc = 0;
1532 		reinit = 0;
1533 
1534 		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1535 
1536 		/* Modify the RX CSUM enable bits */
1537 		if ((mask & IFCAP_RXCSUM) != 0 &&
1538 		    (ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
1539 			ifp->if_capenable ^= IFCAP_RXCSUM;
1540 
1541 			if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1542 				ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1543 				reinit = 1;
1544 			}
1545 		}
1546 
1547 		SMSC_UNLOCK(sc);
1548 		if (reinit)
1549 #if __FreeBSD_version > 1000000
1550 			uether_init(ue);
1551 #else
1552 			ifp->if_init(ue);
1553 #endif
1554 
1555 	} else {
1556 		rc = uether_ioctl(ifp, cmd, data);
1557 	}
1558 
1559 	return (rc);
1560 }
1561 
1562 #ifdef FDT
1563 /*
1564  * This is FreeBSD-specific compatibility strings for RPi/RPi2
1565  */
1566 static phandle_t
1567 smsc_fdt_find_eth_node(phandle_t start)
1568 {
1569 	phandle_t child, node;
1570 
1571 	/* Traverse through entire tree to find usb ethernet nodes. */
1572 	for (node = OF_child(start); node != 0; node = OF_peer(node)) {
1573 		if ((ofw_bus_node_is_compatible(node, "net,ethernet") &&
1574 		    ofw_bus_node_is_compatible(node, "usb,device")) ||
1575 		    ofw_bus_node_is_compatible(node, "usb424,ec00"))
1576 			return (node);
1577 		child = smsc_fdt_find_eth_node(node);
1578 		if (child != -1)
1579 			return (child);
1580 	}
1581 
1582 	return (-1);
1583 }
1584 
1585 /*
1586  * Check if node's path is <*>/usb/hub/ethernet
1587  */
1588 static int
1589 smsc_fdt_is_usb_eth(phandle_t node)
1590 {
1591 	char name[16];
1592 	int len;
1593 
1594 	memset(name, 0, sizeof(name));
1595 	len = OF_getprop(node, "name", name, sizeof(name));
1596 	if (len <= 0)
1597 		return (0);
1598 
1599 	if (strcmp(name, "ethernet"))
1600 		return (0);
1601 
1602 	node = OF_parent(node);
1603 	if (node == -1)
1604 		return (0);
1605 	len = OF_getprop(node, "name", name, sizeof(name));
1606 	if (len <= 0)
1607 		return (0);
1608 
1609 	if (strcmp(name, "hub"))
1610 		return (0);
1611 
1612 	node = OF_parent(node);
1613 	if (node == -1)
1614 		return (0);
1615 	len = OF_getprop(node, "name", name, sizeof(name));
1616 	if (len <= 0)
1617 		return (0);
1618 
1619 	if (strcmp(name, "usb"))
1620 		return (0);
1621 
1622 	return (1);
1623 }
1624 
1625 static phandle_t
1626 smsc_fdt_find_eth_node_by_path(phandle_t start)
1627 {
1628 	phandle_t child, node;
1629 
1630 	/* Traverse through entire tree to find usb ethernet nodes. */
1631 	for (node = OF_child(start); node != 0; node = OF_peer(node)) {
1632 		if (smsc_fdt_is_usb_eth(node))
1633 			return (node);
1634 		child = smsc_fdt_find_eth_node_by_path(node);
1635 		if (child != -1)
1636 			return (child);
1637 	}
1638 
1639 	return (-1);
1640 }
1641 
1642 /*
1643  * Look through known names that can contain mac address
1644  * return 0 if valid MAC address has been found
1645  */
1646 static int
1647 smsc_fdt_read_mac_property(phandle_t node, unsigned char *mac)
1648 {
1649 	int len;
1650 
1651 	/* Check if there is property */
1652 	if ((len = OF_getproplen(node, "local-mac-address")) > 0) {
1653 		if (len != ETHER_ADDR_LEN)
1654 			return (EINVAL);
1655 
1656 		OF_getprop(node, "local-mac-address", mac,
1657 		    ETHER_ADDR_LEN);
1658 		return (0);
1659 	}
1660 
1661 	if ((len = OF_getproplen(node, "mac-address")) > 0) {
1662 		if (len != ETHER_ADDR_LEN)
1663 			return (EINVAL);
1664 
1665 		OF_getprop(node, "mac-address", mac,
1666 		    ETHER_ADDR_LEN);
1667 		return (0);
1668 	}
1669 
1670 	return (ENXIO);
1671 }
1672 
1673 /**
1674  * Get MAC address from FDT blob.  Firmware or loader should fill
1675  * mac-address or local-mac-address property.  Returns 0 if MAC address
1676  * obtained, error code otherwise.
1677  */
1678 static int
1679 smsc_fdt_find_mac(unsigned char *mac)
1680 {
1681 	phandle_t node, root;
1682 
1683 	root = OF_finddevice("/");
1684 	node = smsc_fdt_find_eth_node(root);
1685 	if (node != -1) {
1686 		if (smsc_fdt_read_mac_property(node, mac) == 0)
1687 			return (0);
1688 	}
1689 
1690 	/*
1691 	 * If it's not FreeBSD FDT blob for RPi, try more
1692 	 *     generic .../usb/hub/ethernet
1693 	 */
1694 	node = smsc_fdt_find_eth_node_by_path(root);
1695 
1696 	if (node != -1)
1697 		return smsc_fdt_read_mac_property(node, mac);
1698 
1699 	return (ENXIO);
1700 }
1701 #endif
1702 
1703 /**
1704  *	smsc_attach_post - Called after the driver attached to the USB interface
1705  *	@ue: the USB ethernet device
1706  *
1707  *	This is where the chip is intialised for the first time.  This is different
1708  *	from the smsc_init() function in that that one is designed to setup the
1709  *	H/W to match the UE settings and can be called after a reset.
1710  *
1711  *
1712  */
1713 static void
1714 smsc_attach_post(struct usb_ether *ue)
1715 {
1716 	struct smsc_softc *sc = uether_getsc(ue);
1717 	uint32_t mac_h, mac_l;
1718 	int err;
1719 
1720 	smsc_dbg_printf(sc, "smsc_attach_post\n");
1721 
1722 	/* Setup some of the basics */
1723 	sc->sc_phyno = 1;
1724 
1725 
1726 	/* Attempt to get the mac address, if an EEPROM is not attached this
1727 	 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
1728 	 * address based on urandom.
1729 	 */
1730 	memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN);
1731 
1732 	/* Check if there is already a MAC address in the register */
1733 	if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) &&
1734 	    (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) {
1735 		sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1736 		sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff);
1737 		sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1738 		sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1739 		sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1740 		sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff);
1741 	}
1742 
1743 	/* MAC address is not set so try to read from EEPROM, if that fails generate
1744 	 * a random MAC address.
1745 	 */
1746 	if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) {
1747 
1748 		err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1749 #ifdef FDT
1750 		if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)))
1751 			err = smsc_fdt_find_mac(sc->sc_ue.ue_eaddr);
1752 #endif
1753 		if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) {
1754 			read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN);
1755 			sc->sc_ue.ue_eaddr[0] &= ~0x01;     /* unicast */
1756 			sc->sc_ue.ue_eaddr[0] |=  0x02;     /* locally administered */
1757 		}
1758 	}
1759 
1760 	/* Initialise the chip for the first time */
1761 	smsc_chip_init(sc);
1762 }
1763 
1764 
1765 /**
1766  *	smsc_attach_post_sub - Called after the driver attached to the USB interface
1767  *	@ue: the USB ethernet device
1768  *
1769  *	Most of this is boilerplate code and copied from the base USB ethernet
1770  *	driver.  It has been overriden so that we can indicate to the system that
1771  *	the chip supports H/W checksumming.
1772  *
1773  *	RETURNS:
1774  *	Returns 0 on success or a negative error code.
1775  */
1776 #if __FreeBSD_version > 1000000
1777 static int
1778 smsc_attach_post_sub(struct usb_ether *ue)
1779 {
1780 	struct smsc_softc *sc;
1781 	struct ifnet *ifp;
1782 	int error;
1783 
1784 	sc = uether_getsc(ue);
1785 	ifp = ue->ue_ifp;
1786 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1787 	ifp->if_start = uether_start;
1788 	ifp->if_ioctl = smsc_ioctl;
1789 	ifp->if_init = uether_init;
1790 	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
1791 	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
1792 	IFQ_SET_READY(&ifp->if_snd);
1793 
1794 	/* The chip supports TCP/UDP checksum offloading on TX and RX paths, however
1795 	 * currently only RX checksum is supported in the driver (see top of file).
1796 	 */
1797 	ifp->if_capabilities |= IFCAP_RXCSUM | IFCAP_VLAN_MTU;
1798 	ifp->if_hwassist = 0;
1799 
1800 	/* TX checksuming is disabled (for now?)
1801 	ifp->if_capabilities |= IFCAP_TXCSUM;
1802 	ifp->if_capenable |= IFCAP_TXCSUM;
1803 	ifp->if_hwassist = CSUM_TCP | CSUM_UDP;
1804 	*/
1805 
1806 	ifp->if_capenable = ifp->if_capabilities;
1807 
1808 	mtx_lock(&Giant);
1809 	error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
1810 	    uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
1811 	    BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
1812 	mtx_unlock(&Giant);
1813 
1814 	return (error);
1815 }
1816 #endif /* __FreeBSD_version > 1000000 */
1817 
1818 
1819 /**
1820  *	smsc_probe - Probe the interface.
1821  *	@dev: smsc device handle
1822  *
1823  *	Checks if the device is a match for this driver.
1824  *
1825  *	RETURNS:
1826  *	Returns 0 on success or an error code on failure.
1827  */
1828 static int
1829 smsc_probe(device_t dev)
1830 {
1831 	struct usb_attach_arg *uaa = device_get_ivars(dev);
1832 
1833 	if (uaa->usb_mode != USB_MODE_HOST)
1834 		return (ENXIO);
1835 	if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX)
1836 		return (ENXIO);
1837 	if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX)
1838 		return (ENXIO);
1839 
1840 	return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa));
1841 }
1842 
1843 
1844 /**
1845  *	smsc_attach - Attach the interface.
1846  *	@dev: smsc device handle
1847  *
1848  *	Allocate softc structures, do ifmedia setup and ethernet/BPF attach.
1849  *
1850  *	RETURNS:
1851  *	Returns 0 on success or a negative error code.
1852  */
1853 static int
1854 smsc_attach(device_t dev)
1855 {
1856 	struct usb_attach_arg *uaa = device_get_ivars(dev);
1857 	struct smsc_softc *sc = device_get_softc(dev);
1858 	struct usb_ether *ue = &sc->sc_ue;
1859 	uint8_t iface_index;
1860 	int err;
1861 
1862 	sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
1863 
1864 	device_set_usb_desc(dev);
1865 
1866 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1867 
1868 	/* Setup the endpoints for the SMSC LAN95xx device(s) */
1869 	iface_index = SMSC_IFACE_IDX;
1870 	err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
1871 	                          smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx);
1872 	if (err) {
1873 		device_printf(dev, "error: allocating USB transfers failed\n");
1874 		goto detach;
1875 	}
1876 
1877 	ue->ue_sc = sc;
1878 	ue->ue_dev = dev;
1879 	ue->ue_udev = uaa->device;
1880 	ue->ue_mtx = &sc->sc_mtx;
1881 	ue->ue_methods = &smsc_ue_methods;
1882 
1883 	err = uether_ifattach(ue);
1884 	if (err) {
1885 		device_printf(dev, "error: could not attach interface\n");
1886 		goto detach;
1887 	}
1888 	return (0);			/* success */
1889 
1890 detach:
1891 	smsc_detach(dev);
1892 	return (ENXIO);		/* failure */
1893 }
1894 
1895 /**
1896  *	smsc_detach - Detach the interface.
1897  *	@dev: smsc device handle
1898  *
1899  *	RETURNS:
1900  *	Returns 0.
1901  */
1902 static int
1903 smsc_detach(device_t dev)
1904 {
1905 	struct smsc_softc *sc = device_get_softc(dev);
1906 	struct usb_ether *ue = &sc->sc_ue;
1907 
1908 	usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER);
1909 	uether_ifdetach(ue);
1910 	mtx_destroy(&sc->sc_mtx);
1911 
1912 	return (0);
1913 }
1914 
1915 static device_method_t smsc_methods[] = {
1916 	/* Device interface */
1917 	DEVMETHOD(device_probe, smsc_probe),
1918 	DEVMETHOD(device_attach, smsc_attach),
1919 	DEVMETHOD(device_detach, smsc_detach),
1920 
1921 	/* bus interface */
1922 	DEVMETHOD(bus_print_child, bus_generic_print_child),
1923 	DEVMETHOD(bus_driver_added, bus_generic_driver_added),
1924 
1925 	/* MII interface */
1926 	DEVMETHOD(miibus_readreg, smsc_miibus_readreg),
1927 	DEVMETHOD(miibus_writereg, smsc_miibus_writereg),
1928 	DEVMETHOD(miibus_statchg, smsc_miibus_statchg),
1929 
1930 	DEVMETHOD_END
1931 };
1932 
1933 static driver_t smsc_driver = {
1934 	.name = "smsc",
1935 	.methods = smsc_methods,
1936 	.size = sizeof(struct smsc_softc),
1937 };
1938 
1939 static devclass_t smsc_devclass;
1940 
1941 DRIVER_MODULE(smsc, uhub, smsc_driver, smsc_devclass, NULL, 0);
1942 DRIVER_MODULE(miibus, smsc, miibus_driver, miibus_devclass, 0, 0);
1943 MODULE_DEPEND(smsc, uether, 1, 1, 1);
1944 MODULE_DEPEND(smsc, usb, 1, 1, 1);
1945 MODULE_DEPEND(smsc, ether, 1, 1, 1);
1946 MODULE_DEPEND(smsc, miibus, 1, 1, 1);
1947 MODULE_VERSION(smsc, 1);
1948 USB_PNP_HOST_INFO(smsc_devs);
1949